CN105226091A - A kind of igbt and preparation method thereof - Google Patents
A kind of igbt and preparation method thereof Download PDFInfo
- Publication number
- CN105226091A CN105226091A CN201510760653.4A CN201510760653A CN105226091A CN 105226091 A CN105226091 A CN 105226091A CN 201510760653 A CN201510760653 A CN 201510760653A CN 105226091 A CN105226091 A CN 105226091A
- Authority
- CN
- China
- Prior art keywords
- silicon substrate
- igbt
- miscellaneous area
- energy gap
- back side
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000002360 preparation method Methods 0.000 title claims abstract description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 147
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 147
- 239000010703 silicon Substances 0.000 claims abstract description 147
- 239000000758 substrate Substances 0.000 claims abstract description 139
- 229910052799 carbon Inorganic materials 0.000 claims description 33
- 229910052732 germanium Inorganic materials 0.000 claims description 21
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical group [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 21
- 150000001721 carbon Chemical group 0.000 claims description 19
- 239000011248 coating agent Substances 0.000 claims description 17
- 238000000576 coating method Methods 0.000 claims description 17
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 14
- 238000002513 implantation Methods 0.000 claims description 12
- 230000005540 biological transmission Effects 0.000 claims description 6
- 239000002800 charge carrier Substances 0.000 abstract description 18
- 239000000203 mixture Substances 0.000 description 30
- 239000002245 particle Substances 0.000 description 17
- 239000004065 semiconductor Substances 0.000 description 14
- 239000000463 material Substances 0.000 description 11
- 238000000034 method Methods 0.000 description 11
- 238000002347 injection Methods 0.000 description 6
- 239000007924 injection Substances 0.000 description 6
- 229910010271 silicon carbide Inorganic materials 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 125000004429 atom Chemical group 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 125000004437 phosphorous atom Chemical group 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 238000002207 thermal evaporation Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
Abstract
This application discloses a kind of igbt and preparation method thereof, wherein, described igbt comprises: the silicon substrate of the first doping type; Be positioned at the Facad structure in described silicon substrate front; Be positioned at the Ji Qu at the described silicon substrate back side, described Ji Qu comprises and is juxtaposed on first of the described silicon substrate back side and mixes miscellaneous area and second and mix miscellaneous area; Be positioned at the collector electrode that described Ji Qu deviates from described silicon substrate side; Described first energy gap of energy gap higher than described silicon substrate of mixing miscellaneous area, the described second energy gap of energy gap lower than described silicon substrate of mixing miscellaneous area.When described igbt work, charge carrier is mixed miscellaneous area more easily by first and is flowed to described emitter, thus reduces the conduction voltage drop of described igbt; And when described igbt turns off, charge carrier is mixed miscellaneous area more easily by second and is flowed to described collector electrode, thus shortens the turn-off time of described igbt.
Description
Technical field
The present invention relates to field of semiconductor devices, more particularly, relate to a kind of igbt and preparation method thereof.
Background technology
Igbt (Insulate-GateBipolarTransistor, IGBT) be by huge transistor (GiantTransistor, and mos field effect transistor (Metal-Oxide-Semiconductor-Field-Effect-Transistor GTR), MOSFET) the compound full-control type voltage driven type power semiconductor formed, have the advantage of the high input impedance of MOSFET and low conduction voltage drop two aspect of GTR concurrently, there is operating frequency high, control circuit is simple, current density is high, on-state such as to force down at the feature, be widely used in industrial automation.
Described igbt is widely used as the switch control device of high-current equipment, and the reduction of its conduction voltage drop significantly can reduce the power consumption of described high-current equipment, and the reduction of its turn-off time can reduce the power-off delay of described high-current equipment.Therefore one of the conduction voltage drop and the turn-off time research topic becoming researcher of described igbt how is reduced.
Summary of the invention
Embodiments provide a kind of igbt and preparation method thereof, to reduce conduction voltage drop and the turn-off time of described igbt.
A kind of igbt, comprising:
The silicon substrate of the first doping type;
Be positioned at the Facad structure in described silicon substrate front;
Be positioned at the Ji Qu at the described silicon substrate back side, described Ji Qu comprises and is juxtaposed on first of the described silicon substrate back side and mixes miscellaneous area and second and mix miscellaneous area;
Be positioned at the collector electrode that described Ji Qu deviates from described silicon substrate side;
Described first energy gap of energy gap higher than described silicon substrate of mixing miscellaneous area, the described second energy gap of energy gap lower than described silicon substrate of mixing miscellaneous area.
Preferably, described first mixes the carbon doping Ji Qu that miscellaneous area is doping carbon atom.
Preferably, form described carbon doping and integrate the span of the carbon atom Implantation Energy needed for district as 3E4eV-5E5eV, comprise endpoint value, the span of dosage is 1E13cm
-2-1E18cm
-2, comprise endpoint value.
Preferably, described second mixes the Ge-doped Ji Qu that miscellaneous area is doped germanium atom.
Preferably, form the described Ge-doped span integrating germanium atom Implantation Energy needed for district as 5E4eV-1E6eV, comprise endpoint value, the span of dosage is 1E13cm
-2-1E18cm
-2, comprise endpoint value.
Preferably, described Facad structure comprises:
Be positioned at the base of the second doping type of inside, described silicon substrate front;
Be positioned at the emitter region of the first doping type of described base;
Be positioned at the emitter on surface, described emitter region;
Be positioned at the grid structure of described surface of silicon, described grid structure is between adjacent transmission pole;
Described grid structure comprises: the gate dielectric layer being positioned at described surface of silicon, is positioned at the gate electrode layer on described gate dielectric layer surface and is positioned at the grid oxic horizon on described gate electrode layer surface.
Preferably, described igbt also comprises:
Be positioned at the resilient coating that described Ji Qu deviates from described collector electrode side.
A preparation method for igbt, comprising:
The silicon substrate of the first doping type is provided;
The Facad structure of described igbt is formed in the front of described silicon substrate;
Reduction processing is carried out to the back side of described silicon substrate;
The Ji Qu of described igbt is formed at the described silicon substrate back side, described Ji Qu comprises and is juxtaposed on first of the described silicon substrate back side and mixes miscellaneous area and second and mix miscellaneous area, described first energy gap of energy gap higher than described silicon substrate of mixing miscellaneous area, the described second energy gap of energy gap lower than described silicon substrate of mixing miscellaneous area;
The collector electrode of described igbt is formed on surface, described collection district.
Preferably, described first mixes the carbon doping Ji Qu that miscellaneous area is doping carbon atom.
Preferably, described second mixes the Ge-doped Ji Qu that miscellaneous area is doped germanium atom.
Preferably, the Facad structure forming described igbt in the front of described silicon substrate comprises:
The base of the second doping type is formed in described surface of silicon;
The emitter region of the first doping type is formed in described base;
Emitter is formed on the surface of described emitter region;
Grid structure is formed in described surface of silicon, described grid structure comprises between adjacent transmission pole: the gate dielectric layer being positioned at described surface of silicon, is positioned at the gate electrode layer on described gate dielectric layer surface and is positioned at the grid oxic horizon on described gate electrode layer surface.
Preferably, after reduction processing is carried out to the back side of described silicon substrate, also comprised before the described silicon substrate back side forms the Ji Qu of described igbt:
Resilient coating is formed in inside, the described silicon substrate back side.
Embodiments provide a kind of igbt and preparation method thereof, wherein, described igbt comprises and is juxtaposed on first of the described silicon substrate back side and mixes miscellaneous area and second and mix miscellaneous area, wherein, described first energy gap of energy gap higher than described silicon substrate of mixing miscellaneous area, the described second energy gap of energy gap lower than described silicon substrate of mixing miscellaneous area.And in the heterojunction formed at two kinds of different semi-conducting materials, the easier semi-conducting material high by energy gap of charge carrier flows to the low semi-conducting material of energy gap, therefore when described igbt work, charge carrier more easily by energy gap high first mix the emitter that miscellaneous area flows to described igbt, thus reduce the conduction voltage drop of described igbt; And when described igbt turns off, charge carrier more easily by energy gap low second mix the collector electrode that miscellaneous area flows to described igbt, thus shorten the turn-off time of described igbt.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only embodiments of the invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to the accompanying drawing provided.
The sectional structure chart of a kind of igbt that Fig. 1 provides for one embodiment of the present of invention;
The generalized section of a kind of igbt Facad structure that Fig. 2 provides for a specific embodiment of the present invention;
The sectional structure chart of a kind of igbt that Fig. 3 provides for a preferred embodiment of the present invention;
The flow chart of the preparation method of a kind of igbt that Fig. 4 provides for one embodiment of the present of invention;
The flow chart of the preparation method of a kind of igbt that Fig. 5 provides for a specific embodiment of the present invention.
Embodiment
As described in background, the igbt of low conduction voltage drop and short turn-off time becomes the striving direction of researcher's device research and development.
In view of this, embodiments provide a kind of igbt, comprising:
The silicon substrate of the first doping type;
Be positioned at the Facad structure in described silicon substrate front;
Be positioned at the Ji Qu at the described silicon substrate back side, described Ji Qu comprises and is juxtaposed on first of the described silicon substrate back side and mixes miscellaneous area and second and mix miscellaneous area;
Be positioned at the collector electrode that described Ji Qu deviates from described silicon substrate side;
Described first energy gap of energy gap higher than described silicon substrate of mixing miscellaneous area, the described second energy gap of energy gap lower than described silicon substrate of mixing miscellaneous area.
Accordingly, the embodiment of the present invention additionally provides a kind of preparation method of igbt, comprising:
The silicon substrate of the first doping type is provided;
The Facad structure of described igbt is formed in the front of described silicon substrate;
Reduction processing is carried out to the back side of described silicon substrate;
The Ji Qu of described igbt is formed at the described silicon substrate back side, described Ji Qu comprises and is juxtaposed on first of the described silicon substrate back side and mixes miscellaneous area and second and mix miscellaneous area, described first energy gap of energy gap higher than described silicon substrate of mixing miscellaneous area, the described second energy gap of energy gap lower than described silicon substrate of mixing miscellaneous area;
The collector electrode of described igbt is formed on surface, described collection district.
Igbt that the embodiment of the present invention provides and preparation method thereof, wherein, described igbt comprises and is juxtaposed on first of the described silicon substrate back side and mixes miscellaneous area and second and mix miscellaneous area, wherein, described first energy gap of energy gap higher than described silicon substrate of mixing miscellaneous area, the described second energy gap of energy gap lower than described silicon substrate of mixing miscellaneous area.And in the heterojunction formed at two kinds of different semi-conducting materials, the easier semi-conducting material high by energy gap of charge carrier flows to the low semi-conducting material of energy gap, therefore when described igbt work, charge carrier more easily by energy gap high first mix the emitter that miscellaneous area flows to described igbt, thus reduce the conduction voltage drop of described igbt; And when described igbt turns off, charge carrier more easily by energy gap low second mix the collector electrode that miscellaneous area flows to described igbt, thus shorten the turn-off time of described igbt.
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Embodiments provide a kind of igbt, as shown in Figure 1, comprising:
The silicon substrate 300 of the first doping type;
Be positioned at the Facad structure 200 in described silicon substrate 300 front;
Be positioned at the collection district 400 at described silicon substrate 300 back side, described collection district 400 comprises and is juxtaposed on first of described silicon substrate 300 back side and mixes miscellaneous area 401 and second and mix miscellaneous area 402;
Be positioned at the collector electrode 500 that described collection district 400 deviates from described silicon substrate 300 side;
Described first energy gap of energy gap higher than described silicon substrate 300 of mixing miscellaneous area 401, the described second energy gap of energy gap lower than described silicon substrate 300 of mixing miscellaneous area 402.
It should be noted that, in embodiments of the present invention, described silicon substrate 300 is the silicon substrate 300 of monocrystalline, polycrystalline or non-crystal structure, and the concrete kind of the present invention to described silicon substrate 300 does not limit, specifically depending on actual conditions.The doping content of described silicon substrate 300 and thickness can be selected according to the characteristic of described igbt, for igbt prepared by N-type silicon substrate 300, the puncture voltage of igbt is higher, the doping content of n type material requires lower, substrate thickness requires thicker, the present invention does not limit this, the requirement of the igbt specifically optionally prepared and determining.。
Also it should be noted that, in a preferred embodiment of the invention, described first doping type is N-type, and the second doping type is P type.But in other embodiments of the invention, described first doping type is P type, and the second doping type is N-type, and the present invention does not limit this, specifically depending on actual conditions.
On the basis of above-described embodiment, in one embodiment of the invention, described first mixes the carbon doping Ji Qu that miscellaneous area 401 is doping carbon atom.
It should be noted that, carbon doping Ji Qu is due to the injection formation carborundum (SiC of carbon atom
x) material, described carbofrax material has wider energy gap compared with described silicon substrate 300.Therefore when the work of described igbt, charge carrier easier by energy gap wider first mix the emitter that miscellaneous area 401 flows to described igbt, thus reduce the conduction voltage drop of described igbt.
Also it should be noted that, described carbon doping collection district can by first injecting the particle of the second doping type, and the carbon atom that reinjects is formed; Also can by first injecting carbon atom, the particle of second doping type that reinjects is formed.The concrete forming process of the present invention to described carbon doping Ji Qu does not limit, specifically depending on actual conditions.
On the basis of above-described embodiment, in another embodiment of the present invention, form described carbon doping and integrate the span of the carbon atom Implantation Energy needed for district as 3E4eV-5E5eV, comprise endpoint value, the span of dosage is 1E13cm
-2-1E18cm
-2, comprise endpoint value.
It should be noted that, described first mixes miscellaneous area 401 also can adulterate the atom of other types, as long as can make described first, to mix the energy gap of miscellaneous area 401 wider than the energy gap of described silicon substrate 300, and the present invention does not limit this, specifically depending on actual conditions.
Also it should be noted that, the present invention does not limit the particle Implantation Energy of described carbon atom and the concrete value of dosage, the conduction voltage drop parameter needed for the igbt specifically optionally prepared and determining.
On the basis of above-described embodiment, in yet another embodiment of the present invention, described second mixes the Ge-doped Ji Qu that miscellaneous area 402 is doped germanium atom.
It should be noted that, Ge-doped Ji Qu defines SiGe (SiGe due to the injection of germanium atom
x) material, described germanium material has narrower energy gap compared with described silicon substrate 300.Therefore when described igbt turns off, charge carrier more easily by energy gap narrower second mix the collector electrode 500 that miscellaneous area 402 flows to described igbt, thus reduce the turn-off time of described igbt.
Also it should be noted that, described Ge-doped collection district can by first injecting the particle of the second doping type, and the germanium atom that reinjects is formed; Also can by first injecting germanium atom, the particle of second doping type that reinjects is formed.The concrete forming process of the present invention to described Ge-doped Ji Qu does not limit, specifically depending on actual conditions.
On the basis of above-described embodiment, in yet another embodiment of the present invention, form the described Ge-doped span integrating germanium atom Implantation Energy needed for district as 5E4eV-1E6eV, comprise endpoint value, the span of dosage is 1E13cm
-2-1E18cm
-2, comprise endpoint value.
It should be noted that, described second mixes miscellaneous area 402 also can adulterate the particle of other types, as long as can make described second, to mix the energy gap of miscellaneous area 402 narrower than the energy gap of described silicon substrate 300, and the present invention does not limit this, specifically depending on actual conditions.In addition, the present invention does not limit the particle Implantation Energy of described germanium atom and the concrete value of dosage, the turn-off time parameter needed for the igbt specifically optionally prepared and determining.
Also it should be noted that, the present invention mixes miscellaneous area 401 to described first and the second area ratio of mixing miscellaneous area 402 does not limit, described first mix miscellaneous area 401 and described second mix the concrete distribution proportion of miscellaneous area 402 can conduction voltage drop parameter needed for described igbt and turn-off time parameter and determine.
On the basis of above-described embodiment, a specific embodiment of the present invention provides a kind of concrete structure of described igbt Facad structure 200, and as shown in Figure 2, described Facad structure 200 comprises:
Be positioned at the base 204 of the second doping type of inside, described silicon substrate 300 front;
Be positioned at the emitter region 203 of the first doping type of described base 204;
Be positioned at the emitter 202 on surface, described emitter region 203;
Be positioned at the grid structure on described silicon substrate 300 surface, described grid structure is between adjacent transmission pole 202;
Described grid structure comprises: the gate dielectric layer 205 being positioned at described silicon substrate 300 surface, be positioned at the gate electrode layer 206 on described gate dielectric layer 205 surface, be positioned at the gate electrode 201 of described gate electrode layer 206 and be positioned at the grid oxic horizon 207 on described gate electrode layer 206 surface.
On the basis of above-described embodiment, in a preferred embodiment of the invention, as shown in Figure 3, described igbt also comprises:
Be positioned at the resilient coating 600 that described collection district 400 deviates from described collector electrode 500 side.
It should be noted that, when the doping type of described silicon substrate 300 is N-type, by forming described resilient coating 600 to the mode of the back side hydrogen injecting of described silicon substrate 300, phosphorus; When the doping type of described silicon substrate 300 is P type, form described resilient coating 600 by the mode injecting copper to the back side of described silicon substrate 300.But the present invention does not limit, specifically depending on actual conditions the concrete mode and the concrete kind injecting particle that form described resilient coating 600.
Also it should be noted that, described resilient coating 600, by reducing the injection of minority carrier and improving the carrier recombination velocity of switching process, improves the turn-off speed of described igbt.And because the existence of described resilient coating 600 makes the internal electric field of described igbt more stable, thus improve the puncture voltage of described igbt.
In sum, a kind of igbt that the embodiment of the present invention provides comprises and is juxtaposed on first of described silicon substrate 300 back side and mixes miscellaneous area 401 and second and mix miscellaneous area 402, wherein, described first energy gap of energy gap higher than described silicon substrate 300 of mixing miscellaneous area 401, the described second energy gap of energy gap lower than described silicon substrate 300 of mixing miscellaneous area 402.And in the heterojunction formed at two kinds of different semi-conducting materials, the easier semi-conducting material high by energy gap of charge carrier flows to the low semi-conducting material of energy gap, therefore when described igbt work, charge carrier more easily by energy gap high first mix the emitter 202 that miscellaneous area 401 flows to described igbt, thus reduce the conduction voltage drop of described igbt; And when described igbt turns off, charge carrier more easily by energy gap low second mix the collector electrode 500 that miscellaneous area 402 flows to described igbt, thus shorten the turn-off time of described igbt.
Accordingly, the embodiment of the present invention additionally provides a kind of preparation method of igbt, as shown in Figure 4, comprising:
Step 1: the silicon substrate 300 that the first doping type is provided.
It should be noted that, in the present embodiment, described silicon substrate 300 is the silicon substrate 300 of monocrystalline, polycrystalline or non-crystal structure, and the concrete kind of the present invention to described silicon substrate 300 does not limit, specifically depending on actual conditions.
Also it should be noted that, the doping content of described silicon substrate 300 and thickness can be selected according to the characteristic of described igbt.For igbt prepared by N-type silicon substrate 300, the puncture voltage of igbt is higher, the doping content of silicon substrate 300 requires lower, substrate thickness requires thicker, the present invention does not limit this, the requirement of the igbt specifically optionally prepared and determining.
Step 2: the Facad structure 200 forming described igbt in the front of described silicon substrate 300.
On the basis of above-described embodiment, in one particular embodiment of the present invention, the Facad structure 200 forming described igbt in the front of described silicon substrate 300 comprises:
The base 204 of the second doping type is formed in described silicon substrate 300 surface;
The emitter region 203 of the first doping type is formed in described base 204;
Emitter 202 is formed on the surface of described emitter region 203;
Grid structure is formed on described silicon substrate 300 surface, described grid structure comprises between adjacent transmission pole 202: the gate dielectric layer 205 being positioned at described silicon substrate 300 surface, be positioned at the gate electrode layer 206 on described gate dielectric layer 205 surface, be positioned at the gate electrode 201 of described gate electrode layer 206 and be positioned at the grid oxic horizon 207 on described gate electrode layer 206 surface.
It should be noted that, in the present embodiment, described first doping type is N-type, and the second doping type is P type.But in other embodiments of the invention, described first doping type is P type, and the second doping type is N-type, and the present invention does not limit this, specifically depending on actual conditions.
Step 3: reduction processing is carried out to the back side of described silicon substrate 300.
It should be noted that, because the flow process of the back side of described silicon substrate 300 being carried out to reduction processing is well known to those skilled in the art, the present invention does not repeat at this.
Step 4: the collection district 400 forming described igbt at described silicon substrate 300 back side, described collection district 400 comprises and is juxtaposed on first of described silicon substrate 300 back side and mixes miscellaneous area 401 and second and mix miscellaneous area 402, described first energy gap of energy gap higher than described silicon substrate 300 of mixing miscellaneous area 401, the described second energy gap of energy gap lower than described silicon substrate 300 of mixing miscellaneous area 402.
On the basis of above-described embodiment, in a preferred embodiment of the invention, described first mixes the carbon doping Ji Qu that miscellaneous area 401 is doping carbon atom.
It should be noted that, carbon doping Ji Qu is due to the injection formation carborundum (SiC of carbon atom
x) material, described carbofrax material has wider energy gap compared with described silicon substrate 300.Therefore when the work of described igbt, charge carrier easier by energy gap wider first mix the emitter 202 that miscellaneous area 401 flows to described igbt, thus reduce the conduction voltage drop of described igbt.
On the basis of above-described embodiment, in another embodiment of the present invention, form described carbon doping and integrate the span of the carbon atom Implantation Energy needed for district as 3E4eV-5E5eV, comprise endpoint value, the span of dosage is 1E13cm
-2-1E18cm
-2, comprise endpoint value.
It should be noted that, described first mixes miscellaneous area 401 also can adulterate the atom of other types, as long as can make described first, to mix the energy gap of miscellaneous area 401 wider than the energy gap of described silicon substrate 300, and the present invention does not limit this, specifically depending on actual conditions.
Also it should be noted that, the present invention does not limit the particle Implantation Energy of described carbon atom and the concrete value of dosage, the conduction voltage drop parameter needed for the igbt specifically optionally prepared and determining.
On the basis of above-described embodiment, in yet another embodiment of the present invention, described second mixes the Ge-doped Ji Qu that miscellaneous area 402 is doped germanium atom.
It should be noted that, Ge-doped Ji Qu defines SiGe (SiGe due to the injection of germanium atom
x) material, described germanium material has narrower energy gap compared with described silicon substrate 300.Therefore when described igbt turns off, charge carrier more easily by energy gap narrower second mix the collector electrode 500 that miscellaneous area 402 flows to described igbt, thus reduce the turn-off time of described igbt.
On the basis of above-described embodiment, in yet another embodiment of the present invention, form the described Ge-doped span integrating germanium atom Implantation Energy needed for district as 5E4eV-1E6eV, comprise endpoint value, the span of dosage is 1E13cm
-2-1E18cm
-2, comprise endpoint value.
It should be noted that, described second mixes miscellaneous area 402 also can adulterate the particle of other types, as long as can make described second, to mix the energy gap of miscellaneous area 402 narrower than the energy gap of described silicon substrate 300, and the present invention does not limit this, specifically depending on actual conditions.In addition, the present invention does not limit the particle Implantation Energy of described germanium atom and the concrete value of dosage, the turn-off time parameter needed for the igbt specifically optionally prepared and determining.
Also it should be noted that, the present invention mixes miscellaneous area 401 to described first and the second area ratio of mixing miscellaneous area 402 does not limit, described first mix miscellaneous area 401 and described second mix the concrete distribution proportion of miscellaneous area 402 can conduction voltage drop parameter needed for described igbt and turn-off time parameter and determine.
On the basis of above-described embodiment, in one particular embodiment of the present invention, the collection district 400 forming described igbt at described silicon substrate 300 back side comprises:
The particle of the second doping type is injected at described silicon substrate 300 back side;
Inject carbon atom at first predeterminable area at described silicon substrate 300 back side, form first and mix miscellaneous area 401;
Inject germanium atom at second predeterminable area at described silicon substrate 300 back side, form second and mix miscellaneous area 402.
On the basis of above-described embodiment, in another specific embodiment of the present invention, the collection district 400 forming described igbt at described silicon substrate 300 back side comprises:
Inject particle and the carbon atom of the second doping type at first predeterminable area at described silicon substrate 300 back side, form described first and mix miscellaneous area 401;
Inject particle and the germanium atom of the second doping type at second predeterminable area at described silicon substrate 300 back side, form described second and mix miscellaneous area 402.
Step 5: the collector electrode 500 forming described igbt on surface, described collection district 400.
It should be noted that, the material preparing described collector electrode 500 includes but not limited to aluminium, copper.The technique preparing described collector electrode 500 includes but not limited to magnetron sputtering technique, thermal evaporation process.The materials and process of the present invention to the described collector electrode 500 of preparation does not limit, specifically depending on actual conditions.
On the basis of above-described embodiment, in another preferred embodiment of the invention, after reduction processing is carried out to the back side of described silicon substrate 300, also comprised before described silicon substrate 300 back side forms the collection district 400 of described igbt:
Resilient coating 600 is formed in inside, described silicon substrate 300 back side.
When the doping type of described silicon substrate 300 is N-type, by forming described resilient coating 600 to the mode of the back side hydrogen injecting of described silicon substrate 300, phosphorus; When the doping type of described silicon substrate 300 is P type, form described resilient coating 600 by the mode injecting copper to the back side of described silicon substrate 300.But the present invention does not limit, specifically depending on actual conditions the concrete mode and the concrete kind injecting particle that form described resilient coating 600.
Also it should be noted that, described resilient coating 600, by reducing the injection of minority carrier and improving the carrier recombination velocity of switching process, improves the turn-off speed of described igbt.And because the existence of described resilient coating 600 makes the internal electric field of described igbt more stable, thus improve the puncture voltage of described igbt.
On the basis of above-described embodiment, a concrete preferred embodiment of the present invention provides a kind of preparation flow of described igbt, as shown in Figure 5, comprising:
S101: N-type silicon substrate 300 is provided;
S102: the Facad structure 200 forming described igbt in the front of described silicon substrate 300;
S103: reduction processing is carried out to the back side of described silicon substrate 300;
S104: inject phosphorus atoms at the back side of described silicon substrate 300, forms resilient coating 600;
S105: the particle and the carbon atom that inject the second doping type at first predeterminable area at described silicon substrate 300 back side, forms described first and mixes miscellaneous area 401;
S106: the particle and the germanium atom that inject the second doping type at second predeterminable area at described silicon substrate 300 back side, forms described second and mixes miscellaneous area 402;
S107: at described silicon substrate 300 backside deposition one deck aluminum metal layer, as the collector electrode 500 of described igbt.
In sum, igbt that the embodiment of the present invention provides and preparation method thereof, wherein, described igbt comprises and is juxtaposed on first of described silicon substrate 300 back side and mixes miscellaneous area 401 and second and mix miscellaneous area 402, wherein, described first energy gap of energy gap higher than described silicon substrate 300 of mixing miscellaneous area 401, the described second energy gap of energy gap lower than described silicon substrate 300 of mixing miscellaneous area 402.And in the heterojunction formed at two kinds of different semi-conducting materials, the easier semi-conducting material high by energy gap of charge carrier flows to the low semi-conducting material of energy gap, therefore when described igbt work, charge carrier more easily by energy gap high first mix the emitter 202 that miscellaneous area 401 flows to described igbt, thus reduce the conduction voltage drop of described igbt; And when described igbt turns off, charge carrier more easily by energy gap low second mix the collector electrode 500 that miscellaneous area 402 flows to described igbt, thus shorten the turn-off time of described igbt.
In this specification, each embodiment adopts the mode of going forward one by one to describe, and what each embodiment stressed is the difference with other embodiments, between each embodiment identical similar portion mutually see.For device disclosed in embodiment, because it corresponds to the method disclosed in Example, so description is fairly simple, relevant part illustrates see method part.
To the above-mentioned explanation of the disclosed embodiments, professional and technical personnel in the field are realized or uses the present invention.To be apparent for those skilled in the art to the multiple amendment of these embodiments, General Principle as defined herein can without departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention can not be restricted to these embodiments shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (12)
1. an igbt, is characterized in that, comprising:
The silicon substrate of the first doping type;
Be positioned at the Facad structure in described silicon substrate front;
Be positioned at the Ji Qu at the described silicon substrate back side, described Ji Qu comprises and is juxtaposed on first of the described silicon substrate back side and mixes miscellaneous area and second and mix miscellaneous area;
Be positioned at the collector electrode that described Ji Qu deviates from described silicon substrate side;
Described first energy gap of energy gap higher than described silicon substrate of mixing miscellaneous area, the described second energy gap of energy gap lower than described silicon substrate of mixing miscellaneous area.
2. igbt according to claim 1, is characterized in that, described first mixes the carbon doping Ji Qu that miscellaneous area is doping carbon atom.
3. igbt according to claim 2, is characterized in that, form described carbon doping and integrate the span of the carbon atom Implantation Energy needed for district as 3E4eV-5E5eV, comprise endpoint value, the span of dosage is 1E13cm
- 2-1E18cm
- 2, comprise endpoint value.
4. igbt according to claim 1, is characterized in that, described second mixes the Ge-doped Ji Qu that miscellaneous area is doped germanium atom.
5. igbt according to claim 4, is characterized in that, form the described Ge-doped span integrating germanium atom Implantation Energy needed for district as 5E4eV-1E6eV, comprise endpoint value, the span of dosage is 1E13cm
-2-1E18cm
-2, comprise endpoint value.
6. igbt according to claim 1, is characterized in that, described Facad structure comprises:
Be positioned at the base of the second doping type of inside, described silicon substrate front;
Be positioned at the emitter region of the first doping type of described base;
Be positioned at the emitter on surface, described emitter region;
Be positioned at the grid structure of described surface of silicon, described grid structure is between adjacent transmission pole;
Described grid structure comprises: the gate dielectric layer being positioned at described surface of silicon, is positioned at the gate electrode layer on described gate dielectric layer surface and is positioned at the grid oxic horizon on described gate electrode layer surface.
7. igbt according to claim 1, is characterized in that, described igbt also comprises:
Be positioned at the resilient coating that described Ji Qu deviates from described collector electrode side.
8. a preparation method for igbt, is characterized in that, comprising:
The silicon substrate of the first doping type is provided;
The Facad structure of described igbt is formed in the front of described silicon substrate;
Reduction processing is carried out to the back side of described silicon substrate;
The Ji Qu of described igbt is formed at the described silicon substrate back side, described Ji Qu comprises and is juxtaposed on first of the described silicon substrate back side and mixes miscellaneous area and second and mix miscellaneous area, described first energy gap of energy gap higher than described silicon substrate of mixing miscellaneous area, the described second energy gap of energy gap lower than described silicon substrate of mixing miscellaneous area;
The collector electrode of described igbt is formed on surface, described collection district.
9. preparation method according to claim 8, is characterized in that, described first mixes the carbon doping Ji Qu that miscellaneous area is doping carbon atom.
10. preparation method according to claim 8, is characterized in that, described second mixes the Ge-doped Ji Qu that miscellaneous area is doped germanium atom.
11. preparation methods according to claim 8, is characterized in that, the Facad structure forming described igbt in the front of described silicon substrate comprises:
The base of the second doping type is formed in described surface of silicon;
The emitter region of the first doping type is formed in described base;
Emitter is formed on the surface of described emitter region;
Grid structure is formed in described surface of silicon, described grid structure comprises between adjacent transmission pole: the gate dielectric layer being positioned at described surface of silicon, is positioned at the gate electrode layer on described gate dielectric layer surface and is positioned at the grid oxic horizon on described gate electrode layer surface.
12. preparation methods according to claim 8, is characterized in that, after carrying out reduction processing, also comprise before the described silicon substrate back side forms the Ji Qu of described igbt the back side of described silicon substrate:
Resilient coating is formed in inside, the described silicon substrate back side.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510760653.4A CN105226091B (en) | 2015-11-10 | 2015-11-10 | A kind of igbt and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510760653.4A CN105226091B (en) | 2015-11-10 | 2015-11-10 | A kind of igbt and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105226091A true CN105226091A (en) | 2016-01-06 |
| CN105226091B CN105226091B (en) | 2018-08-07 |
Family
ID=54994933
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510760653.4A Active CN105226091B (en) | 2015-11-10 | 2015-11-10 | A kind of igbt and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105226091B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106816377A (en) * | 2015-11-30 | 2017-06-09 | 株洲中车时代电气股份有限公司 | IGBT back sides preparation method and IGBT |
| CN108122971A (en) * | 2017-12-25 | 2018-06-05 | 电子科技大学 | A kind of RC-IGBT devices and preparation method thereof |
| CN108155230A (en) * | 2017-12-25 | 2018-06-12 | 电子科技大学 | A kind of transverse direction RC-IGBT devices and preparation method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040079989A1 (en) * | 2002-10-11 | 2004-04-29 | Nissan Motor Co., Ltd. | Insulated gate tunnel-injection device having heterojunction and method for manufacturing the same |
| EP1503425A2 (en) * | 2003-07-30 | 2005-02-02 | Nissan Motor Co., Ltd. | Heterojunction semiconductor device and method of manufacturing the same |
| CN103855203A (en) * | 2012-12-07 | 2014-06-11 | 中国科学院微电子研究所 | Reverse-conducting type insulated gate bipolar transistor structure and manufacturing method thereof |
| CN103943671A (en) * | 2013-01-23 | 2014-07-23 | 中国科学院微电子研究所 | Power semiconductor device and forming method thereof |
-
2015
- 2015-11-10 CN CN201510760653.4A patent/CN105226091B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040079989A1 (en) * | 2002-10-11 | 2004-04-29 | Nissan Motor Co., Ltd. | Insulated gate tunnel-injection device having heterojunction and method for manufacturing the same |
| EP1503425A2 (en) * | 2003-07-30 | 2005-02-02 | Nissan Motor Co., Ltd. | Heterojunction semiconductor device and method of manufacturing the same |
| CN103855203A (en) * | 2012-12-07 | 2014-06-11 | 中国科学院微电子研究所 | Reverse-conducting type insulated gate bipolar transistor structure and manufacturing method thereof |
| CN103943671A (en) * | 2013-01-23 | 2014-07-23 | 中国科学院微电子研究所 | Power semiconductor device and forming method thereof |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106816377A (en) * | 2015-11-30 | 2017-06-09 | 株洲中车时代电气股份有限公司 | IGBT back sides preparation method and IGBT |
| CN106816377B (en) * | 2015-11-30 | 2019-11-22 | 株洲中车时代电气股份有限公司 | The back side IGBT production method and IGBT |
| CN108122971A (en) * | 2017-12-25 | 2018-06-05 | 电子科技大学 | A kind of RC-IGBT devices and preparation method thereof |
| CN108155230A (en) * | 2017-12-25 | 2018-06-12 | 电子科技大学 | A kind of transverse direction RC-IGBT devices and preparation method thereof |
| CN108122971B (en) * | 2017-12-25 | 2020-11-27 | 电子科技大学 | RC-IGBT device and preparation method thereof |
| CN108155230B (en) * | 2017-12-25 | 2021-02-12 | 电子科技大学 | Transverse RC-IGBT device and preparation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105226091B (en) | 2018-08-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102779847A (en) | Carrier stored groove bipolar transistor | |
| CN101393928A (en) | Tunnel IGBT with anode in short circuit | |
| CN104409507B (en) | low on-resistance VDMOS device and preparation method | |
| CN101866855B (en) | Method for preparing chip of high-voltage planar fast-recovery diode | |
| CN105226091A (en) | A kind of igbt and preparation method thereof | |
| CN102487078A (en) | Insulated gate bipolar power tube and manufacture method thereof | |
| CN101752415A (en) | Insulated gate bipolar transistor and method for producing same | |
| CN102709317B (en) | Low-threshold voltage diode | |
| CN108574016A (en) | A kind of the silicon carbide DSRD devices and Pulsed power generator of super-junction structure | |
| CN107305909A (en) | A kind of inverse conductivity type IGBT back structure and preparation method thereof | |
| CN103855155A (en) | Tri-mode integrated insulated gate bipolar transistor and forming method thereof | |
| CN106783611A (en) | A kind of trench gate IGBT with the embedded diode of grid and preparation method thereof | |
| CN103681817B (en) | IGBT device and preparation method thereof | |
| CN105957894A (en) | DMOS with composite dielectric layer structure | |
| Vaidya et al. | Trench IGBT with stepped doped collector for low energy loss | |
| CN103915489B (en) | Insulated gate bipolar transistor | |
| CN103872101A (en) | Insulated gate field effect transistor and manufacture method thereof | |
| CN103681811A (en) | Insulated gate bipolar transistor at non-complete emitter region and preparation method thereof | |
| CN205595336U (en) | Contrary type IGBT back structure of leading | |
| CN107910367A (en) | Igbt and preparation method thereof, IPM modules and air conditioner | |
| CN102683404A (en) | Insulated gate bipolar transistor and preparation method thereof | |
| CN107634094A (en) | A kind of insulated gate bipolar transistor structure and its manufacture method | |
| CN104106139A (en) | Semiconductor device | |
| Vaidya et al. | 1.2 kV Stepped Oxide Trench Insulated Gate Bipolar Transistor with Low Loss for Fast Switching Application | |
| CN207883697U (en) | Igbt, IPM modules and air conditioner |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder |
Address after: The age of 412001 in Hunan Province, Zhuzhou Shifeng District Road No. 169 Patentee after: ZHUZHOU CRRC TIMES ELECTRIC Co.,Ltd. Address before: The age of 412001 in Hunan Province, Zhuzhou Shifeng District Road No. 169 Patentee before: ZHUZHOU CSR TIMES ELECTRIC Co.,Ltd. |
|
| CP01 | Change in the name or title of a patent holder | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20201009 Address after: 412001 Room 309, floor 3, semiconductor third line office building, Tianxin hi tech park, Shifeng District, Zhuzhou City, Hunan Province Patentee after: Zhuzhou CRRC times Semiconductor Co.,Ltd. Address before: The age of 412001 in Hunan Province, Zhuzhou Shifeng District Road No. 169 Patentee before: ZHUZHOU CRRC TIMES ELECTRIC Co.,Ltd. |
|
| TR01 | Transfer of patent right |