CN105225586A - Digital circuit multifunction chip simulator and using method thereof - Google Patents
Digital circuit multifunction chip simulator and using method thereof Download PDFInfo
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- CN105225586A CN105225586A CN201510746192.5A CN201510746192A CN105225586A CN 105225586 A CN105225586 A CN 105225586A CN 201510746192 A CN201510746192 A CN 201510746192A CN 105225586 A CN105225586 A CN 105225586A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09B—EDUCATIONAL OR DEMONSTRATION APPLIANCES; APPLIANCES FOR TEACHING, OR COMMUNICATING WITH, THE BLIND, DEAF OR MUTE; MODELS; PLANETARIA; GLOBES; MAPS; DIAGRAMS
- G09B23/00—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes
- G09B23/06—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics
- G09B23/18—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism
- G09B23/183—Models for scientific, medical, or mathematical purposes, e.g. full-sized devices for demonstration purposes for physics for electricity or magnetism for circuits
Abstract
The present invention relates to digital circuit experiment device and experimental technique, specifically a kind of rational in infrastructure, easy to use, be specially adapted to digital circuit multifunction chip simulator and the using method thereof of teaching and scientific research, it is characterized in that being provided with EPM3032, LED display circuit, clock circuit, download debug circuit, fine motion dial-up circuit, pin gating grounding circuit, wherein EPM3032 respectively with LED display circuit, clock circuit, download debug circuit, fine motion dial-up circuit, pin gating grounding circuit is connected, fine motion dial-up circuit is connected with pin gating grounding circuit, the present invention is relative to prior art, not only cost-saving conserve space, equipment operating is strong, and be convenient for carrying, student only needs a computer independently to test after class, has the significant advantages such as intuitive is strong, good economy performance, volume are little.
Description
Technical field
The present invention relates to digital circuit experiment device and experimental technique, specifically a kind of rational in infrastructure, easy to use, be specially adapted to digital circuit multifunction chip simulator and the using method thereof of teaching and scientific research.
Background technology
Digital and electronic industry is being in the period of technological change, and main change is that EDA+FPGA development scheme substitutes traditional resolution element+Karnaugh map development scheme, and development tool change very greatly.But digital electronic ultimate principle changes not quite.This produces a kind of contradiction and conflict in colleges and universities' Education of Digital Electronics.How could several electric principle and current EDA mainstream technology are combined with each other.
Specifically, Digital Electronic Technique is the basic electronic simulation courses of one, colleges and universities, and this subject is the initiation course of electrical type.Give lessons+experiment method in form of teaching many employings classroom.Wherein the Experimental Teaching Method of Digital Electronic Technique all adopts the method that EDA+FPGA and resolution element+chamber combine.
The method of resolution element+chamber very easily can show the ultimate principle of Digital Electronic Technique course, helps student to theorize concept.But 74 series of separate elements are in the technology edge be eliminated, and disconnect with the epoch.Concrete manifestation is exactly the development along with semiconductor technology, and the use of 74 series of separate elements is fewer and feweri, utilizes the mode of EDA technological development fpga chip to use more and more extensive.Fpga chip replaces resolution element trend of the times.
EDA+FPGA method represents following technique direction, but it is not easy to allow student understand number electricity principle from basis.Because FPGA and resolution element are technically discontinuous.Beginner is difficult to the relation understanding EDA and Digital Electronic Technique principle.This method and Digital Electronic Technique principle contact not tight.
The experiment of current colleges and universities will generally adopt the associated form of resolution element+experimental box+EDA+FPGA chamber to test.Student is helped to understand number electricity principle with 74 series of separate elements.
There is several respects deficiency in existing this mode: (1) Education of Digital Electronics does not reach the effect combined with EDA development technique with FPGA, number electric theory by resolution element.The layout of current digital circuit textbook is all form according to digital circuit basic theories+EDA mode.But because textbook itself lacks the experimental technique that the method, the experiment link that allow two kinds of technology link up do not allow the two unified yet.Actual middle school student do not learn to utilize Digital Electronic Technique principle to develop this purpose of FPGA, do not set up the electric concept of correct number and direction simultaneously yet.(2) resolution element due to usable range fewer and feweri, start progressively to stop production, buy become more and more difficult, price is more and more higher, school instruction use cost is increasing.(3) if resolution element pin damages or after burning, cannot repair, can only do discard processing.(4) in order to reach the functional design requirements of number electricity, the serial multiple components and parts of purchase 74 are needed.Because quantity purchase distributes, uses the reason of damage or experimental establishment.Often cause certain model chip not enough, or the phenomenon that another kind of chip overstocks in a large number.Between chip, function can not be exchanged.(5) no matter resolution element experimental box mode or EDA chamber mode student can only utilize the experimental box in classroom to learn.Owing to lacking the hardware of practice, several electricity habit cannot be carried out after class.(6) EDA experimental box is too complicated, and the class hour that Students ' Learning is grasped is beyond digital and electronic experimental teaching class distribution.
Summary of the invention
The present invention is directed to the shortcoming and defect existed in prior art, propose a kind of rational in infrastructure, easy to use, be specially adapted to digital circuit multifunction chip simulator and the using method thereof of teaching and scientific research.The maximum feature of the present invention allows student oneself with EDA technical design 74 series of separate chip, then the chip simulator designed built Miniature digital system at resolution element experimental box.Thus achieve a kind of method EDA technology and number electric principle, resolution element and FPGA be combined with each other.This method advantage does not change the current teaching process of number electricity, just inserts a teaching link how used chip simulator in EDA teaching and resolution element experimental box teaching link.
The present invention can be reached by following measures:
A kind of digital circuit multifunction chip simulator, it is characterized in that being provided with EPM3032, LED display circuit, clock circuit, download debug circuit, fine motion dial-up circuit, pin gating grounding circuit, wherein EPM3032 is connected with LED display circuit, clock circuit, download debug circuit, fine motion dial-up circuit, pin gating grounding circuit respectively, and fine motion dial-up circuit is connected with pin gating grounding circuit.
Fine motion dial-up circuit of the present invention is for switching chip functions when power-off (will switch).
The present invention only needs to increase the programming of chip simulator with exploitation at EDA teaching link, use chip simulator to be connected in resolution element connecting link, just resolution element number electricity experimental teaching mode can be merged mutually with EDA number electricity form of teaching, the cost of cost is extremely low.
Resolution element number electricity experimental teaching mode can merge with EDA number electricity form of teaching by the present invention mutually.
A simulator of the present invention most multipotency when again not rewriting program simulates the function of 4 kind of 74 family chip.
The present invention achieves the compatibility of 3.3V and 5V logic level by current-limiting resistance.
Chip simulator of the present invention is of a size of 1.8CM × 5CM, and shape exactly likes key.
The present invention AMS11173.3V mu balanced circuit is connected with EPM3032 chip, for providing chip operating voltage.Voltage stabilizing chip can be set as access by wire jumper and not connect access way.Directly can be connected with the LVTTL logic of 3.3V during mu balanced circuit when not accessing, can directly be connected with the TTL logic of 5V during access mu balanced circuit.
Clock circuit of the present invention provides reference signal source for derived digital signal or sequential logical circuit.
Download debug circuit of the present invention is for downloading code and debugging.
Power LED of the present invention is used to indicate chip power supply and whether crystal oscillator work is normal, and function indication LED is for illustration of current chip simulator logic function.
Pin gating grounding circuit of the present invention is for changing the grounding pin of chip, chip simulator can be changed from packing forms such as DIP12, DIP14, DIP16, DIP18, DIP20, when ensureing to access corresponding packaging power in reality, ensure chip power supply and ground connection correct.
The present invention has multifunctionality and dirigibility: the programmable features utilizing EMP3032, simulates all chip logic functions of 74 series; Specific I/O port logic level is controlled high and low by circuit board breaker in middle, then specific program is coordinated, thus simulator has a key conversion chip functional switch, by regulating two microswitch syntagmatics, chip simulator is made easily to convert 4 kinds of different chip functions to, and have 2 LED function pilot lamp above, utilize the light on and off of LED combine can be real-time instruction current logic function; In addition chip simulator can use as derived digital signal, can to the maintenance of digital electronic technology experimental box as aid, also can as driving source construction logic large scale digital circuit;
The present invention, relative to prior art, utilizes small-sized CPLD device EPM3032 to be core, achieves chip simulator by download circuit, power interface, DIP base, microswitch etc.; Low price, just need about 10 yuan and can produce the equipment that one can be simulated many moneys chip, Instructional Design, instructional device, the many-sided function of Practical training equipment are integrated, not only cost-saving conserve space, equipment operating is strong; And be convenient for carrying, student only needs a computer independently to test after class, has the significant advantages such as intuitive is strong, good economy performance, volume are little.
The invention allows for a kind of using method of digital circuit multifunction chip simulator, it is characterized in that comprising the following steps:
Step 1: allow student draw PCB according to chip simulator reference schematic oneself, then make PCB, welding, or provide ready-made PCB to allow student carry out welding and debugging;
Step 2: after having debugged, simulates simulator by FPGA emulator and chip and is connected;
Step 3: utilize computing machine USB port or external power source to power to chip simulator;
Step 4: reference experiment case process template, utilizes 74 serial truth tables design resolution elements, and concrete model has the devices such as 74138,74161,74112,74374, carries out pin assignments according to the pin definitions of chip to simulator; Its middle school student can design multiple different 74 family chips, then by building corresponding DIP encapsulation to the resistance short circuit of Fig. 6, can select corresponding logic function by toggle switch simultaneously;
Step 5: emulate according to the logic of chip simulation organ pipe pin to design, compile, the teaching such as download, programming enters in chip simulator.
The present invention, at resolution element experiment link, first carries out logic testing according to 74 family chip truth tables to the chip simulator designed, test by after test according to resolution element mode, otherwise re-start EDA logical design.
The present invention in use, can allow student utilize EDA technical design 74 family chip, and emulate on classroom, downloads, and can also meet outside students in class simultaneously and carry out experimental design download; At resolution element experimental box, student utilizes self-designed chip, carries out higher level Functional Design.
accompanying drawing explanation:
Accompanying drawing 1 is structural representation of the present invention.
Accompanying drawing 2 is the structural representation of clock circuit.
Accompanying drawing 3 is the structural representation downloading debug circuit.
Accompanying drawing 4 is the structural representation of mu balanced circuit.
Accompanying drawing 5 is the structural representation of LED and fine motion dial-up circuit.
Accompanying drawing 6 is pin gating ground structure schematic diagram.
Accompanying drawing 7 is program circuit schematic diagram.
Reference numeral: EPM30321, LED display circuit 2, clock circuit 3, download debug circuit 4, fine motion dial-up circuit 5, pin gating grounding circuit 6, program circuit Fig. 7.
embodiment:
Below in conjunction with accompanying drawing, the present invention is further illustrated.
As shown in Figure 1, the present invention proposes a kind of digital circuit multifunction chip simulator, it is characterized in that being provided with EPM30321, LED display circuit 2, clock circuit 3, downloading debug circuit 4, fine motion dial-up circuit 5, pin gating grounding circuit 6, program circuit 7.Wherein EPM30321 respectively with LED display circuit 2, clock circuit 3, download debug circuit 4, fine motion dial-up circuit 5, pin gating grounding circuit 6 be connected, fine motion dial-up circuit 5 is connected with pin gating grounding circuit 6, program circuit 7 writes in EPM30321, acts on other modules.
The present invention is also provided with mu balanced circuit, and mu balanced circuit is connected with EPM3032, for generation of the stable operating voltage needed for chip, adopts based on AMS11173.3v voltage stabilizing chip, for CPLD provides stable operating voltage.
Clock circuit of the present invention is for doing signal source of clock and facilitating the design of sequential logical circuit, and clock source when doing sequential logic specifically for CPLD, clock circuit comprises crystal oscillator, electric capacity C2, resistance R5, adopts the active crystal oscillator of 1MHz.
Download debug circuit of the present invention, for downloading code and debugging, adopting the jtag interface of standard, for downloading code in CPLD, thus carrying out the debugging of code.
LED circuit of the present invention be used to indicate chip and crystal oscillator work whether normal, can instruction simulation device current logic function.
Fine motion dial-up circuit of the present invention, for switching chip functions when power-off (will switch), is the core of whole system, is realized a key conversion of chip functions by the combination of software and hardware.Manually regulate the break-make of toggle switch, and then affect the low and high level of CPLD pin; CPLD detects the change of level, adjusts the duty of inner each chip, uses triple gate to reach the software exchange of the input/output state of pin simultaneously.Fine motion dial-up circuit coordinates the effect that really can reach omnipotent chip and simulate with pin gating grounding circuit.Simultaneously this circuit is furnished with a LED, this LED be used for test chip and clock source whether working properly, for quick debugging.
Pin gating grounding circuit of the present invention, for changing the grounding pin of chip, ensures that, when the chip of difference encapsulation, chip all can proper grounding when powering on.
The present invention has multifunctionality and dirigibility: can simulate all chip logic functions of 74 series; From the simulation of DIP12, DIP14, DIP16, DIP18, DIP20 package dimension, a key conversion chip function button can be furnished with, by the break-make of by-pass cock, make chip simulator convert different chip functions to; Can use as derived digital signal; Subtest can be carried out to Digital Electronics Experiment box function; In use, first student is allowed to draw PCB according to chip simulator reference schematic oneself, then ready-made PCB can be provided to allow student carry out welding and debugging, classroom allow student utilize EDA technical design 74 family chip, and emulate, download, can also meet outside students in class simultaneously and carry out experimental design download; At resolution element experimental box, student utilizes self-designed chip, carries out higher level Functional Design.
The present invention, relative to prior art, utilizes small-sized CPLD device EPM3032 to be core, achieves chip simulator by download circuit, power interface, DIP base, microswitch etc.; Low price, just need about 10 yuan and can produce the equipment that one can be simulated many moneys chip, Instructional Design, instructional device, the many-sided function of Practical training equipment are integrated, not only cost-saving conserve space, equipment operating is strong; And be convenient for carrying, student only needs a computer independently to test after class, has the significant advantages such as intuitive is strong, good economy performance, volume are little.
Claims (8)
1. a digital circuit multifunction chip simulator, it is characterized in that being provided with EPM3032, LED display circuit, clock circuit, download debug circuit, fine motion dial-up circuit, pin gating grounding circuit, wherein EPM3032 is connected with LED display circuit, clock circuit, download debug circuit, fine motion dial-up circuit, pin gating grounding circuit respectively, and fine motion dial-up circuit is connected with pin gating grounding circuit.
2. a kind of digital circuit multifunction chip simulator according to claim 1, it is characterized in that also being provided with mu balanced circuit, mu balanced circuit is connected with EPM3032, for generation of the stable operating voltage needed for chip.
3. a kind of digital circuit multifunction chip simulator according to claim 1, is characterized in that described clock circuit is for doing signal source of clock and facilitating the design of sequential logical circuit.
4. a kind of digital circuit multifunction chip simulator according to claim 1, is characterized in that described download debug circuit is for downloading code and debugging.
5. a kind of digital circuit multifunction chip simulator according to claim 1, is characterized in that described LED circuit is used to indicate chip and whether crystal oscillator work is normal.
6. a kind of digital circuit multifunction chip simulator according to claim 1, is characterized in that described fine motion dial-up circuit is for changing the grounding pin of chip, ensures that at the chip of difference encapsulation be that chip all can proper grounding when powering on.
7. a using method for digital circuit multifunction chip simulator, is characterized in that comprising the following steps:
Step 1: allow student draw PCB according to chip simulator reference schematic oneself, then make PCB, welding, or provide ready-made PCB to allow student carry out welding and debugging;
Step 2: after having debugged, simulates simulator by FPGA emulator and chip and is connected;
Step 3: utilize computing machine USB port or external power source to power to chip simulator;
Step 4: reference experiment case process template, utilizes 74 serial truth tables design resolution elements, and concrete model has the devices such as 74138,74161,74112,74374, carries out pin assignments according to the pin definitions of chip to simulator; Its middle school student can design multiple different 74 family chips, then build corresponding DIP encapsulation by resistance short circuit, can select corresponding logic function simultaneously by toggle switch;
Step 5: emulate according to the logic of chip simulation organ pipe pin to design, compile, the teaching such as download, programming enters in chip simulator.
8. the using method of a kind of digital circuit multifunction chip simulator according to claim 7, characterized by further comprising resolution element experiment link, first according to 74 family chip truth tables, logic testing is carried out to the chip simulator designed, test by after test according to resolution element mode, otherwise re-start EDA logical design.
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| CN107800277A (en) * | 2016-08-28 | 2018-03-13 | 上海奇电电气科技股份有限公司 | The frequency converter and control method of minimum pulse width limitation are realized in CPLD controls |
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Application publication date: 20160106 |