CN105207478A - Capacitor voltage balance control method for L-type Buck multilevel circuit - Google Patents

Capacitor voltage balance control method for L-type Buck multilevel circuit Download PDF

Info

Publication number
CN105207478A
CN105207478A CN201510690097.8A CN201510690097A CN105207478A CN 105207478 A CN105207478 A CN 105207478A CN 201510690097 A CN201510690097 A CN 201510690097A CN 105207478 A CN105207478 A CN 105207478A
Authority
CN
China
Prior art keywords
voltage
electric capacity
control method
type buck
balance control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201510690097.8A
Other languages
Chinese (zh)
Inventor
赵与辉
何�雄
贺明智
郑琼林
李金芝
董宁
李志君
段宣祥
张志恒
杨晓峰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JINGYI CHUNSHU RECTIFIER CO Ltd BEIJING
Beijing Jiaotong University
Original Assignee
JINGYI CHUNSHU RECTIFIER CO Ltd BEIJING
Beijing Jiaotong University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JINGYI CHUNSHU RECTIFIER CO Ltd BEIJING, Beijing Jiaotong University filed Critical JINGYI CHUNSHU RECTIFIER CO Ltd BEIJING
Priority to CN201510690097.8A priority Critical patent/CN105207478A/en
Publication of CN105207478A publication Critical patent/CN105207478A/en
Pending legal-status Critical Current

Links

Landscapes

  • Dc-Dc Converters (AREA)

Abstract

The invention relates to a capacitor voltage balance control method for an L-type Buck multilevel circuit, which comprises the following steps: step 1, the voltage of each capacitor on a bus is sampled; step 2, the total voltage is calculated; step 3, through comparison of sampling voltage values, each capacitor produces a control signal for a switching tube relative to the capacitor, and if voltage unbalance exists, through comparison of sampling voltage values and a set balance voltage value, voltage balance on each capacitor is realized by duty cycle adjustment. The capacitor voltage balance control method for the L-type Buck multilevel circuit has the advantages that the power loss of the L-type Buck multilevel circuit is reduced, the bus voltage balance is realized, the output ripple is reduced, the output precision degree is improved, and the method is suitable for an application occasion with relatively meticulous requirements and low cost requirement.

Description

L-type Buck multi-level circuit capacitance voltage balance control method
Technical field
The present invention relates to electrical engineering multi-level converter field, is L-type Buck multi-level circuit capacitance voltage balance control method specifically.
Background technology
Along with the develop rapidly of power electronic technology, the topology research relevant in high-voltage applications field also increases gradually.In high-voltage applications field, the power grade of converter process is comparatively large, in order to obtain good output waveform quality, often needs the physical switching frequency improving power electronic power device as far as possible.And the switching frequency that high-power switch device allows is lower, while raising conventional electric power electronic converter voltage and energy process grade, be but difficult to improve its output performance.
In view of the contradiction often existed between the power handling capability of high-power switch device and switching frequency, the direct series/parallel technology of device, multiple technology, multilevel converter etc. obtain to be studied widely.The research of multi-level converter and control technology thereof becomes the study hotspot of application just gradually.
In recent decades, multilevel technology (mainly referring to voltage-type multi-level converter) is constantly promoted.And one of key technology realizing multi-level converter is converter topology.
Adopt the converter of multilevel converter that device for power switching can be avoided directly to connect, there is the advantages such as output voltage is high, harmonic content is low, voltage change ratio is little, device for power switching voltage stress is little, switching frequency is low, can be applicable to the fields such as the speed governing of middle pressure high power AC, electric power system static reactive.
But, due to the factor such as actual difference of electric capacity on stray parameter, bus in circuit, cause the voltage on each electric capacity unbalanced, very large impact can be brought on the selection of device like this.So all will press the electric capacity on bus, to ensure that output voltage is more steady, the voltage stress equilibrium (differing less) of each switching device.
Existing the most frequently used technical scheme uses grading resistor, by the grading resistor in the other similar resistance in parallel of each electric capacity, to make ohmically pressure drop identical, thus makes voltage on the electric capacity that is in parallel identical.The method safety of grading resistor is reliable, and method is simple.There is energy consumption in shortcoming, when especially monomer capacity is larger, it is too large that resistance has selected loss little exactly, and it is too slow that resistance has selected pressure rate large.
Summary of the invention
For the defect existed in prior art, the object of the present invention is to provide L-type Buck multi-level circuit capacitance voltage balance control method, decrease the power loss of L-type Buck multi-level circuit, make the bus capacitor balance of voltage, decrease output ripple, add the levels of precision of output, be more suitable for the application scenario that requirement is comparatively meticulous and not high to cost requirement.
For reaching above object, the technical scheme that the present invention takes is:
L-type Buck multi-level circuit capacitance voltage balance control method, is characterized in that, comprise the steps:
Step 1, samples to the voltage of each electric capacity on bus;
Step 2, calculates total voltage;
Step 3, each electric capacity, by comparing the sampled value of voltage, produces the control signal of the switching tube that this electric capacity is correlated with, if voltage exists unbalanced, compared by the equalizing voltage value of sampling with setting, then make the balance of voltage on each electric capacity by the adjustment of duty ratio.
On the basis of technique scheme, Hall or voltage sensor is adopted to sample to the voltage of each electric capacity on bus.
On the basis of technique scheme, electric capacity quantity is N, and the Hall of employing or the quantity of voltage sensor are N,
Total voltage is N number of electric capacity sampled voltage sum.
On the basis of technique scheme, the switching device on the longitudinal axis selects MOSFET or IGBT, and the switching device on transverse axis selects MOSFET or IGBT.
On the basis of technique scheme, setting the balanced set point of each capacitance voltage is VC, and when circuit is started working, respectively to capacitance voltage sampling, then set point VC balanced with capacitance voltage compares, and obtains error value E ck, E c (k-1)..., E c1, error amount regulates through PID controller, compares obtain corresponding duty ratio to triangle or sawtooth carrier wave, respectively to the switching device on the longitudinal axis and the switching device on transverse axis.
L-type Buck multi-level circuit capacitance voltage balance control method of the present invention, decrease the power loss of L-type Buck multi-level circuit, make the bus capacitor balance of voltage, decrease output ripple, add the levels of precision of output, be more suitable for the application scenario that requirement is comparatively meticulous and not high to cost requirement.
L-type Buck multi-level circuit capacitance voltage balance control method of the present invention, owing to being many level topology, the words of N level, N-1 voltage sample transducer can be used, cost can be made to increase more, requiring comparatively meticulous and not high to cost requirement application scenario, be suitable for the control mode using this kind of electric voltage equalization.This kind of method loss is less, and the speed of well-balanced adjustment can be regulated by program.
Accompanying drawing explanation
The present invention has following accompanying drawing:
Fig. 1 schematic diagram of the present invention;
Fig. 2 switching device Control timing sequence figure.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described in further detail.
As shown in Figure 1, 2, L-type Buck multi-level circuit capacitance voltage balance control method of the present invention, comprises the steps:
Step 1, samples to the voltage of each electric capacity on bus;
Step 2, calculates total voltage;
Step 3, each electric capacity, by comparing the sampled value of voltage, produces the control signal of the switching tube that this electric capacity is correlated with, if voltage exists unbalanced, compared by the equalizing voltage value of sampling with setting, then make the balance of voltage on each electric capacity by the adjustment of duty ratio.
On the basis of technique scheme, Hall or voltage sensor is adopted to sample to the voltage of each electric capacity on bus.Adopt high-precision transducer to sample respectively to bus capacitor, and adopt the Balance route strategy of L-Buck circuit to carry out closed-loop control, the bus capacitor balance of voltage.
On the basis of technique scheme, electric capacity quantity is N, and the Hall of employing or the quantity of voltage sensor are N,
Total voltage is N number of electric capacity sampled voltage sum.
As shown in Figure 1, wherein:
SV k, SV (k-1)..., SV 1for Hall or voltage sensor,
C k, C (k-1)..., C 1for the electric capacity that bus is connected,
S k1, S (k-1) 1..., S 21for the switching device on the longitudinal axis, generally select MOSFET (Metal-Oxide-SemiconductorField-EffectTransistor Metal-Oxide Semiconductor field-effect transistor) or IGBT (InsulatedGateBipolarTransistor insulated gate bipolar transistor)
S k2, S (k-1) 2..., S 12for the switching device on transverse axis, generally select MOSFET or IGBT,
S dk1, S d (k-1) 1..., S d21and S dk2, S d (k-1) 2..., S d22it is all the diode on transverse axis.
Setting the balanced set point of each capacitance voltage is VC, when circuit is started working, and SV k, SV (k-1)..., SV 1respectively to capacitance voltage sampling, then set point VC balanced with capacitance voltage compares, and obtains error value E ck, E c (k-1)..., E c1, error amount regulates through PID controller, compares obtain corresponding duty ratio to triangle or sawtooth carrier wave, respectively to the switching device on the longitudinal axis and the switching device S on transverse axis k1and S k2, S (k-1) 1and S (k-1) 2..., S 21and S 22, S 12.
As shown in Figure 2, be switching device Control timing sequence figure, initial S k2, S (k-1) 2..., S 12all open-minded, S k1, S (k-1) 1..., S 21whole shutoff.C 1pass through S dk1, S d (k-1) 1..., S d21, S dk2, S d (k-1) 2..., S d22and S 12form loop.
Then S 12turn off, L passes through S dk1, S d (k-1) 1..., S d21, S dk2, S d (k-1) 2..., S d22and S 22form continuous current circuit.
Input to capacitor charging, SV 1gather C 1upper voltage, set point VC balanced with capacitance voltage compares, and controls to open the turn-off time, make capacitance voltage equilibrium value (near).
Then S 21open-minded, C 2pass through S dk1, S d (k-1) 1..., S d31, S dk2, S d (k-1) 2..., S d22, S 22and S 21form loop, give and export power supply.
Then, S 22and S 21turn off, input to capacitor charging, SV 2gather C 2upper voltage, set point VC balanced with capacitance voltage compares, and controls to open the turn-off time, make capacitance voltage equilibrium value (near).Follow-up work situation is identical.
The content be not described in detail in this specification belongs to the known prior art of professional and technical personnel in the field.

Claims (5)

1.L type Buck multi-level circuit capacitance voltage balance control method, is characterized in that, comprise the steps:
Step 1, samples to the voltage of each electric capacity on bus;
Step 2, calculates total voltage;
Step 3, each electric capacity, by comparing the sampled value of voltage, produces the control signal of the switching tube that this electric capacity is correlated with, if voltage exists unbalanced, compared by the equalizing voltage value of sampling with setting, then make the balance of voltage on each electric capacity by the adjustment of duty ratio.
2. L-type Buck multi-level circuit capacitance voltage balance control method as claimed in claim 1, is characterized in that: adopt Hall or voltage sensor to sample to the voltage of each electric capacity on bus.
3. L-type Buck multi-level circuit capacitance voltage balance control method as claimed in claim 1, it is characterized in that: electric capacity quantity is N, the Hall of employing or the quantity of voltage sensor are N,
Total voltage is N number of electric capacity sampled voltage sum.
4. L-type Buck multi-level circuit capacitance voltage balance control method as claimed in claim 1, it is characterized in that: the switching device on the longitudinal axis selects MOSFET or IGBT, the switching device on transverse axis selects MOSFET or IGBT.
5. L-type Buck multi-level circuit capacitance voltage balance control method as claimed in claim 1, it is characterized in that: setting the balanced set point of each capacitance voltage is VC, when circuit is started working, samples respectively to capacitance voltage, then set point VC balanced with capacitance voltage compares, and obtains error value E ck, E c (k-1)..., E c1, error amount regulates through PID controller, compares obtain corresponding duty ratio to triangle or sawtooth carrier wave, respectively to the switching device on the longitudinal axis and the switching device on transverse axis.
CN201510690097.8A 2015-10-22 2015-10-22 Capacitor voltage balance control method for L-type Buck multilevel circuit Pending CN105207478A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510690097.8A CN105207478A (en) 2015-10-22 2015-10-22 Capacitor voltage balance control method for L-type Buck multilevel circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510690097.8A CN105207478A (en) 2015-10-22 2015-10-22 Capacitor voltage balance control method for L-type Buck multilevel circuit

Publications (1)

Publication Number Publication Date
CN105207478A true CN105207478A (en) 2015-12-30

Family

ID=54954976

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510690097.8A Pending CN105207478A (en) 2015-10-22 2015-10-22 Capacitor voltage balance control method for L-type Buck multilevel circuit

Country Status (1)

Country Link
CN (1) CN105207478A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109639144A (en) * 2018-12-10 2019-04-16 广州金升阳科技有限公司 A kind of five-level converter

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005048195A1 (en) * 2005-10-07 2007-04-19 Infineon Technologies Ag Integrated semiconductor circuit with a voltage pump and method for operating a semiconductor integrated circuit with a voltage pump
CN101355302A (en) * 2008-09-16 2009-01-28 北京交通大学 Topological structure of L-shaped step-down converter
CN101355301A (en) * 2008-09-16 2009-01-28 北京交通大学 Topological structure of L-shaped booster converter
CN101488708A (en) * 2008-12-11 2009-07-22 北京交通大学 Topology structure for improved L type step-down converter

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005048195A1 (en) * 2005-10-07 2007-04-19 Infineon Technologies Ag Integrated semiconductor circuit with a voltage pump and method for operating a semiconductor integrated circuit with a voltage pump
CN101355302A (en) * 2008-09-16 2009-01-28 北京交通大学 Topological structure of L-shaped step-down converter
CN101355301A (en) * 2008-09-16 2009-01-28 北京交通大学 Topological structure of L-shaped booster converter
CN101488708A (en) * 2008-12-11 2009-07-22 北京交通大学 Topology structure for improved L type step-down converter

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
戴剑锋等: "新型L-BOOST DC-DC多电平拓扑研究", 《中国电机工程学报》 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109639144A (en) * 2018-12-10 2019-04-16 广州金升阳科技有限公司 A kind of five-level converter

Similar Documents

Publication Publication Date Title
CN102646987B (en) Power factor regulating circuit and regulating method
CN203872056U (en) Direct-current power supply controlled by constant power
CN103916004A (en) Power factor correction circuit and control method thereof
EP2396882A1 (en) Method in a cascaded two-level converter, control device and computer program products
CN203775025U (en) Power factor correction circuit and control circuit thereof
CN110297130B (en) DC/DC converter with fuel cell internal resistance measuring function and internal resistance measuring method
CN108899907A (en) Based on the LCLCL type Control Method of Active Power Filter for repeating sliding formwork control
CN105048821A (en) Load current feedforward control method of increasing full-bridge isolation DC-DC convertor output voltage dynamic response
CN103199719B (en) Submodule capacitor voltage optimization equalizing method of modularization multi-level converter
CN104104325A (en) Method and system for controlling series photovoltaic inverter
CN102591399A (en) Perturbation and observation method for tracking maximum power point of photovoltaic grid-connected generating system
CN105450063A (en) Half-bridge cascaded multi-level inverter and control method
CN204145814U (en) The linear constant current drive circuit that a kind of multistage controls
CN106787642B (en) A kind of IGBT series average-voltage control method
CN107656567A (en) A kind of the driving voltage adjusting means and method of smooth IGBT variations injunction temperatures
CN103236790A (en) Method and device for controlling half-hysteresis ring pulse sequences of switching power supply in continuous working mode
CN106300964B (en) Independent charge and discharge sequential single-inductance double-output switch converters method for controlling frequency conversion and its device
Liu et al. Model predictive control of single phase grid-connected inverter with LC filter
CN106941324B (en) The DC voltage balance control method of neutral point clamp type three-level voltage source current transformer
CN104393620A (en) Control method and device for current-predicated photovoltaic grid-connected inverter
CN101902046A (en) Non-liner switching control method of single-phase shunt active power filter
CN105207478A (en) Capacitor voltage balance control method for L-type Buck multilevel circuit
CN205336145U (en) Half -bridge cascades many inverter of type
CN103986308A (en) Dynamic voltage-sharing circuit of direct-current capacitor of multilevel converter
CN105305815A (en) Voltage balanced control method for capacitors of L type Boost multi-level circuit

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20151230