CN105207463B - A kind of input power controls circuit - Google Patents

A kind of input power controls circuit Download PDF

Info

Publication number
CN105207463B
CN105207463B CN201510715680.XA CN201510715680A CN105207463B CN 105207463 B CN105207463 B CN 105207463B CN 201510715680 A CN201510715680 A CN 201510715680A CN 105207463 B CN105207463 B CN 105207463B
Authority
CN
China
Prior art keywords
module
power supply
power
voltage
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201510715680.XA
Other languages
Chinese (zh)
Other versions
CN105207463A (en
Inventor
王亦鸾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhongtian Broadband Technology Co Ltd
Original Assignee
Shanghai Feixun Data Communication Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Feixun Data Communication Technology Co Ltd filed Critical Shanghai Feixun Data Communication Technology Co Ltd
Priority to CN201510715680.XA priority Critical patent/CN105207463B/en
Publication of CN105207463A publication Critical patent/CN105207463A/en
Application granted granted Critical
Publication of CN105207463B publication Critical patent/CN105207463B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

Circuit, including power supply output module, time delay module, power supply trace signal generator module, power supply trace voltage transformation module and supported chip are controlled the invention discloses a kind of input power;Power supply output module, for exporting the first supply voltage;Time delay module, for being delayed, power supply output module exports the first supply voltage;Power supply trace signal generator module, the supply voltage rate of rise for controlling power supply trace voltage transformation module output voltage;First supply voltage is converted into second source voltage by power supply trace voltage transformation module, the rate of rise for the output signal according to power supply trace signal generator module;Supported chip, input voltage is used as the first supply voltage of reception delay output simultaneously and the second source voltage of conversion.The present invention can be realized without additionally increasing power module all the way and piece of CPLD module to chip power supply, reduced and taken PCB space, reduce the complexity of design.

Description

A kind of input power controls circuit
Technical field
Circuit is controlled the present invention relates to a kind of input power.
Background technology
, it is necessary to supply 4 road power supplys on the chip of existing many big power consumptions:3.3V, 1.025V, 1.035V and 1.055V; And there is higher requirement to 4 road power supply electrifying times and electric sequence, it is specific as follows as shown in Figure 1:
1. 4 road power supplys are required for electricity on slope, maximum voltage value is risen to from no-voltage in 5ms;
2. electric sequence is 3.3V preferentially upper electric, 3 road power supplys are so that mutually ibid electric slope is simultaneously upper electric in addition.
Also there is the technical scheme for solving above-mentioned technical problem in the prior art, concrete scheme is:First from a 3.3V electricity Source module produces 3.3V power supplys, and PLD (CPLD, Complex Programmable is used as using this 3.3V power supply Logic Device) module, 1.025V power modules, the input of 1.035V power modules and 1.055V power modules, but this Individual 3.3V power supplys not as chip 3.3V supply inputs, it is necessary to by another piece of 3.3V power module give chip supply 3.3V electricity Source, the enable signal to 4 road power supplys of chip power supply is produced by CPLD modules, to control the opening time of 4 road power supplys, reaches control The purpose of electric sequence processed.
The shortcoming of prior art is:Due to needing extra increase 3.3V power modules and piece of CPLD module all the way, account for With PCB space, increase cost, increase the complexity of design.
The content of the invention
Circuit is controlled it is an object of the invention to provide a kind of input power, to solve due to needing extra increase power supply all the way Module and piece of CPLD module, take PCB space, increase the technical problem of the complexity of design.
To realize above goal of the invention, the present invention provides a kind of input power control circuit, it is characterised in that including power supply Output module, time delay module, power supply trace signal generator module, power supply trace voltage transformation module and supported chip, wherein, Power supply output module, for export the first supply voltage as time delay module, power supply trace signal generator module and power supply with Track voltage transformation module fundamental power supply is inputted;Time delay module, for being delayed, power supply output module exports the first supply voltage;Power supply Track signal generator module, the supply voltage rate of rise for controlling power supply trace voltage transformation module output voltage;Power supply Floating voltage modular converter, the rate of rise for the output signal according to power supply trace signal generator module is electric by the first power supply Pressure is converted into second source voltage;Supported chip, the first supply voltage and the second of conversion for reception delay output simultaneously Supply voltage is used as input voltage.
Further, the power supply output module respectively with time delay module, power supply trace signal generator module and power supply Floating voltage modular converter is connected, and the time delay module is connected with power supply trace signal generator module and supported chip respectively, The power supply trace signal generator module is connected with power supply trace voltage transformation module, the power supply trace voltage transformation module with Supported chip is connected.
Further, the external power source input signal of the power supply output module is power supply and backflow earth signal, electricity respectively Series resistance between the output and ground of source output module, power supply output module exports the first supply voltage.
Further, the power supply output module according to the first supply voltage and connection power supply output module output end and The resistance of earth terminal, adjusts the first supply voltage of output;Adjustment output voltage the first supply voltage calculation formula be:
Wherein, Rup is defeated for connection power supply output module Go out the resistance of end and earth terminal;Vo is the first supply voltage, and △ is regulation coefficient.
Further, the time delay module includes delay chip, N-channel Metal-Oxide Semiconductor field-effect transistor, And the electric capacity being connected with delay chip with N-channel Metal-Oxide Semiconductor field-effect transistor;N-channel metal-oxide Semiconductor field effect transistor receives the first supply voltage, by adjusting Capacity control delay time.
Further, the time delay module enters after line delay according to the delay time of setting exports the first supply voltage, prolongs When the time calculation formula be:tDELAY(s)=2.484x106x CSET(F) wherein, tDELAYFor delay time, Cset (F) is electricity Capacitance.
Further, the first supply voltage of the delay output triggers the power supply trace signal as trigger signal and produced Raw module, the output rate of rise for producing the control power supply trace voltage transformation module follows voltage;The power supply trace Voltage transformation module follows the rate of rise for following voltage of the power supply trace signal generator module output to export second source Voltage.
Further, the power supply output module is 3.3V power supply output modules;The power supply trace voltage transformation module Turn that 1.025V power subsystems, 3.3V turn 1.035V power subsystems and 3.3V turns 1.055V power subsystems including 3.3V.
Further, the 3.3V, which turns 1.025V power subsystems, includes power module and resistance, is exported by adjusting resistance 1.025V voltages, power module output conversion signal;Adjustment resistance output 1.025V voltages calculation formula be:Wherein, Rset be resistance count and, Vout is output voltage.
Further, the 3.3V, which turns 1.035V power subsystems, includes power module and resistance, is exported by adjusting resistance 1.035V voltages, power module output conversion signal;Adjustment resistance output 1.035V voltages calculation formula be:Wherein, RTRIMBe resistance count and;Vout is output voltage.
Further, the 3.3V, which turns 1.055V power subsystems, includes power module and resistance, is exported by adjusting resistance 1.055V voltages, power module output conversion signal;Adjustment resistance output 1.055V voltages calculation formula be:Wherein, RTRIMBe resistance count and;Vout is output voltage.
Further, the 3.3V power supplys output module output 3.3V supply voltages are exported to time delay module, time delay module When reaching delay time, by 3.3V power supply voltage supplying power supply trace signal generator modules;The 3.3V turns 1.025V power supplys Unit, 3.3V turn 1.035V power subsystems and 3.3V turns 1.055V power subsystems and produces conversion signal respectively, work as power supply trace Voltage transformation module is produced after conversion signal, and progress 3.3V turns 1.025V supply voltage conversion, 3.3V and turns 1.035V electricity respectively Source voltage conversion and 3.3V turn the conversion of 1.055V supply voltages;Be delayed the 3.3V supply voltages exported and three tunnels by conversion It is real that 1.025V supply voltages, 1.035V supply voltages and 1.055V supply voltages are input to supported chip together as input voltage It is now simultaneously upper electric.
Compared with prior art, the beneficial effects of the invention are as follows:The present invention uses time delay module, obtains 4 road power supplys and exists The technique effect of upper electricity is completed in 5ms;With power supply trace signal generator module, the consistent of 3 road power supply electrifying slopes is obtained Property and reduce the technique effect of the dash current produced during upper electricity;With time delay module and power supply trace signal generator module, Obtain the technique effect for reducing and taking PCB space.In addition, the design of power delay circuit, it is ensured that 4 road power supplys are in 5mS It is electric in completion.The generation for the power supply trace signal that slope delays, it is ensured that the uniformity of the upper electric slope of 3 road power supplys, and reduce The power-on impact current of 3 road voltage 1.025V, 1.035V and 1.055V power supplys ensure that the security of Power Management Design and reliable Property.
Brief description of the drawings
Fig. 1 is a schematic diagram in the background technology of the present invention;
Fig. 2 is that the input power of the present invention controls the block diagram of circuit;
Fig. 3 is that the input power of the present invention controls the block diagram that circuit includes three power supply trace voltage transformation modules;
Fig. 4 is the circuit diagram of the 3.3V power supply output modules of the present invention;
Fig. 5 is the circuit diagram of the time delay module of the present invention;
Fig. 6 is the circuit diagram of the power supply trace signal generator module of the present invention;
Fig. 7 is that the 3.3V of the present invention turns the circuit diagram of 1.025V power subsystems;
Fig. 8 is that the 3.3V of the present invention turns the circuit diagram of 1.035V power subsystems;
Fig. 9 is that the 3.3V of the present invention turns the circuit diagram of 1.055V power subsystems;
Figure 10 is the output voltage curve schematic diagram of the present invention;
In figure:
Power supply output module 1;
Time delay module 2;
Power supply trace signal generator module 3;
Power supply trace voltage transformation module 4;3.3V turns 1.025V power subsystems 41;3.3V turns 1.035V power subsystems 42; 3.3V turns 1.055V power subsystems 43
Supported chip 5.
Embodiment
Below with reference to embodiment shown in the drawings, the present invention will be described in detail, but these embodiments are simultaneously The present invention is not limited, structure that one of ordinary skill in the art is made according to these embodiments, method or functionally Conversion is all contained in protection scope of the present invention.
Embodiment 1:
As shown in Fig. 2 the present invention input power control circuit, including power supply output module 1, time delay module 2, power supply with Track signal generator module 3, power supply trace voltage transformation module 4 and supported chip 5;
Wherein power supply output module 1:Produced for exporting the first supply voltage as time delay module 2, power supply trace signal Module 3 and the input of the fundamental power supply of power supply trace voltage transformation module 4;
Time delay module 2:For being delayed, power supply output module 1 exports the first supply voltage;
Power supply trace signal generator module 3:Supply voltage for controlling the output voltage of power supply trace voltage transformation module 4 The rate of rise;
Power supply trace voltage transformation module 4:Rising for the output signal according to power supply trace signal generator module 3 is oblique First supply voltage is converted into second source voltage by rate;
Supported chip 5:Receive the chip of second source power voltage supply;
The power supply output module 1 is electric with time delay module 2, power supply trace signal generator module 3 and power supply trace respectively Pressure modular converter 4 is connected, and the time delay module 2 is connected with power supply trace signal generator module 3 and supported chip 5 respectively, institute State power supply trace signal generator module 3 to be connected with power supply trace voltage transformation module 4, the power supply trace voltage transformation module 4 It is connected with supported chip 5;
Power supply output module 1 export the first supply voltage be used for time delay module 2, power supply trace signal generator module 3 and The fundamental power supply input of power supply trace voltage transformation module 4;First supply voltage enters after time delay module 2 that time delay module 2 can be according to Enter line delay the first supply voltage of output according to the delay time of setting;The first supply voltage exported that is delayed is touched as trigger signal What energy source tracking signal generator module 3 produced that control power supply trace voltage transformation module 4 exports the rate of rise follows voltage;Electricity The rate of rise for following voltage that source floating voltage modular converter 4 follows power supply trace signal generator module 3 to export exports second Supply voltage;First supply voltage of delay output is also with second source voltage together as the input voltage of supported chip 5.
Specifically, so that power supply output module is 3.3V power supply output modules as an example;When 3.3V power supplys output module 1 is exported After 3.3V power supplys, the 3.3V power supplys are as the first supply voltage, by (the general delay of the delay a period of time of time delay module 2 12ms),, then will not be by 3.3V power supplys because power supply trace voltage transformation module 4 does not receive conversion signal during delay Voltage is changed;After delay terminates, 3.3V is supplied power supply trace signal generator module 3 and load core by time delay module 2 Piece 5, when producing conversion signal after the work of power supply trace signal generator module 3, when power supply trace voltage transformation module 4 receives conversion Supply voltage conversion is carried out after signal.Because supported chip 5 needs the upper electricity simultaneously of each power supply after supply voltage conversion, by prolonging When circuit 2 and power supply trace signal generator module 3 can just control well supply voltage change each power supply in the same time Upper electricity.
Embodiment 2:
On the basis of embodiment 1, wherein power supply trace voltage transformation module 4 is further embodied:
Turn as shown in figure 3, power supply trace voltage transformation module 4 turns 1.025V power subsystems 41,3.3V including 3.3V 1.035V power subsystems 42 and 3.3V turn 1.055V power subsystems 43;
The 3.3V power supplys output module 1 turns 1.025V power subsystems 41,3.3V with 3.3V and turns 1.035V power supply lists respectively 42 and 3.3V of member turns 1.055V power subsystems 43 and connected;
The power supply trace signal generator module 3 turns 1.025V power subsystems 41,3.3V with 3.3V and turns 1.035V electricity respectively Source unit 42 and 3.3V turn 1.055V power subsystems 43 and connected;
Specifically, three power supply trace voltage transformation modules all access it is same follow signal, three power supplys can be made The output voltage of floating voltage modular converter has the identical rate of rise.
Embodiment 3:
On the basis of embodiment 1, the external power source input signal of power supply output module is power supply respectively and believed with flowing back Number, series resistance between the output and ground of power supply output module, power supply output module exports the first supply voltage.Power supply Output module is according to the first supply voltage and connects the resistance of power supply output module output and ground, the of adjustment output One supply voltage.
Specific circuit structure is as shown in figure 4, wherein 3.3V power supplys output module 1 is by power module U1, resistance R1, resistance R2, electrochemical capacitor C1 and electrochemical capacitor C2 compositions;The Vin+ pin and Vin- pin of the power module U1 connects with external power source Connect;The Vout+ pin of the power module U1 respectively with the SEN+ pin of the power module U1, electrochemical capacitor C1 positive pole, described Resistance R2 one end and electrochemical capacitor C2 positive pole connection;The resistance R2 other ends are connected with described resistance R1 one end;Institute The TRIM/VADJ pin that the resistance R1 other ends are stated with above-mentioned power module U1 are connected;The SEN- pin of the power module U1 respectively with The Vout- pin of the power module U1, electrochemical capacitor C1 negative pole, electrochemical capacitor C2 negative pole and digitally connect;
Specifically:Power module U1 uses QPS4033N055 power modules, the Vin+ of QPS4033N055 power modules Pin takes back stream earth signal BGND;The Vin- pin of QPS4033N055 power modules connect -48V power supplys, and resistance R1 and resistance R2 can be with Output voltage is finely tuned, specific formula for calculation is as follows:
Wherein " Rup " be resistance R1 with resistance R2 count and;" Vo " is output voltage standard value;" △ " is regulation; Actual output voltage value is calculated further according to output voltage standard value " Vo " by regulation " △ ".For example:Work as R1=34K;R2 =402K;Rup=R1+R2=436K Ω;During Vo=3.3V, △=2 are calculated;So output voltage on the basis of the 3.3V on It is 3.3* (1+2%)=3.366V to adjust 2%, i.e. actual output voltage.The purpose for heightening actual output voltage is to consider compensating line Voltage loss in road.
Embodiment 4:
On the basis of embodiment 1, time delay module includes delay chip, N-channel Metal-Oxide Semiconductor field-effect crystalline substance Body pipe, and the electric capacity being connected with delay chip with N-channel Metal-Oxide Semiconductor field-effect transistor;N-channel metal- Oxide semiconductor field effect transistor receives the first supply voltage, by adjusting Capacity control delay time.
As shown in figure 5, wherein the physical circuit of time delay module 2 is by power supply control chip U2, N-channel MOS FET FETs U3, resistance R3, resistance R4, resistance R5, resistance R6, electric capacity C3, electric capacity C4, electric capacity C5 and electric capacity C6 compositions;The 3.3V electricity Positive pole, resistance R3 one end, power supply control chip U2 the VCC1 pin and electricity of source output module output end respectively with electric capacity C3 Source control chip U2 VCC2 pin connection;The other end of the resistance R3 is connected with resistance R4 one end;The resistance R4's is another One end is connected with resistance R5 one end and power supply control chip U2 SETV pin respectively;The GATE of the power supply control chip U2 Pin is connected with resistance R6 one end and electric capacity C6 positive pole respectively;The SETD pin of the power supply control chip U2 respectively with electric capacity The positive pole connection of C4 positive pole and electric capacity C5;The negative pole of the electric capacity C3 other end respectively with resistance R5, electric capacity C4 it is negative Pole, electric capacity C5 negative pole, electric capacity C6 negative pole, the GND pin of power supply control chip and digitally connect;The resistance R6's is another One end is connected with N-channel MOS FET FETs U3 4 pin;The 3.3V power supplys output module output end respectively with N-channel MOSFET FETs U3 5,6,7,8 pin connection;1,2,3 pin of the N-channel MOS FET FETs U3 are connected as stagnant Power supply DELAY_VCC3.3V output ends afterwards;
Specifically, power supply control chip U2 uses MAX6820, N-channel MOS FET FETs U3 to use IRF7413PBF.Wherein electric capacity C4 and electric capacity C5 has the effect of control delay time, and delay time calculation formula is as follows:
tDELAY(s)=2.484x106x CSET(F).
Wherein " Cset " be electric capacity C4 and electric capacity C5 count and;“tDELAY" it is delay time, for example:Work as C1= 2200pF;C2=2200pF;During Cset=C1+C2=2200+2200=4400pF, t is calculatedDELAYAbout 12ms.In 3.3V 12ms after power supply output module is powered to MAX6820 power supply control chips, IRF7413PBF are opened and lag output DELAY_ VCC3.3V power supplys.
If supported chip 5 and power supply trace voltage transformation module 4 all use what is produced by 3.3V power supplys output module VCC3.3V power supplys as power supply, then can cause can not at the appointed time (generally 5ms to 10ms) interior 3.3V preferentially to Electric on supported chip 5, other power supply same slopes are simultaneously to electricity on supported chip 5.Produced by time delay module to supported chip 5 Power supply delayed power supply DELAY_VCC3.3V, then avoid well it is above-mentioned can not at the appointed time (generally 5ms extremely 3.3V is preferentially to electricity on supported chip 5 in 10ms), the problem of other power supply same slopes give electricity on supported chip 5 simultaneously.
Embodiment 5:
On the basis of embodiment 1, wherein power supply trace signal generator module 3 is further embodied;
As shown in fig. 6, wherein power supply trace signal generator module 3 is by resistance R7, resistance R8, resistance R9, resistance R10, electricity Hinder R11, FET Q1, FET Q2 and electric capacity C7 compositions;The output end of the time delay module and resistance R7 one end Connection;The resistance R7 other ends are connected with FET Q1 G poles and resistance R8 one end respectively;The resistance R8's is another One end is respectively with FET Q1 S poles and being digitally connected;The D poles of the FET Q1 are respectively with FET Q2's G poles and the connection of resistance R9 one end;The one end of the other end of the resistance R9 respectively with VCC3.3V power supplys and resistance R10 Connection;The other end of the resistance R10 is connected with FET Q2 D poles and resistance R11 one end respectively;The resistance The R11 other end is connected as signal output part with electric capacity C7 positive pole;The negative pole of the electric capacity C7 respectively with FET Q2 S poles and digitally connect;
Specifically, after time delay module 2 exports DELAY_VCC3.3V power supplys, FET Q1 conductings, Q1 drain D For low-voltage, FET Q2 cut-offs, the VCC3.3V that 3.3V power supplys output module 1 is exported is to resistance R10, resistance R11 and electricity The RC circuits for holding C7 compositions are charged, formation PW_TRACK power supply signals, and the PW_TRACK slope rise time is about 1ms。
Because supply voltage modular converter is power supply trace voltage transformation module 4 that function is followed with power supply, power supply with Track voltage transformation module 4 follows PW_TRACK power supply signals, when PW_TRACK rises according to certain slope, power supply trace voltage The output of modular converter 4 can follow the PW_TRACK rates of rise to rise untill maximum.
Because PW_TRACK passes through RC circuits, the rate of rise slows down, and appropriate increases power supply trace voltage transformation module 4 Slope power-on time, reduce power-on impact current, make the design of power supply with family's safety.
Embodiment 6:
On the basis of embodiment 2, turn the further materialization of 1.025V power subsystems 41 to wherein 3.3V;
As shown in fig. 7, wherein 3.3V turns 1.025V power subsystems 41 by electrochemical capacitor C8, electrochemical capacitor C9, electrochemical capacitor C10, electrochemical capacitor C11, electrochemical capacitor C12, electrochemical capacitor C13, electrochemical capacitor C14, resistance R12, resistance R13, resistance R14, Resistance R15 and PTH04040 power module are constituted;The 3.3V power supplys output module output end is respectively with electrochemical capacitor C8's Positive pole, electrochemical capacitor C9 positive pole, electrochemical capacitor C10 positive pole, electrochemical capacitor C11 positive pole and PTH04040 power modules 2,4,6 pin connection;Negative pole, electrochemical capacitor C10 negative pole, the electricity of the negative pole of the electrochemical capacitor C8 respectively with electrochemical capacitor C9 Solve electric capacity C11 negative pole and digitally connect;8 pin of the PTH04040 power modules are connected with resistance R12 one end;Institute State 1,3,5,10,13,16 pin, resistance R13 one end and the number of the resistance R12 other end respectively with PTH04040 power modules Connect word;The other end of the resistance R13 is connected with resistance R14 one end;The other end of the resistance R14 and resistance R15 One end connection;The other end of the resistance R15 is connected with 17 pin of PTH04040 power modules;The PTH04040 power supplys mould 11 pin of block positive pole respectively with electrochemical capacitor C12, electrochemical capacitor C13 positive pole, electrochemical capacitor C14 positive pole and 9,12, the 15 pin connection of PTH04040 power modules;14 pin of the PTH04040 power modules are respectively with electrochemical capacitor C12's Negative pole, electrochemical capacitor C13 negative pole, electrochemical capacitor C14 negative pole and digitally connect;
Specifically, resistance R13, resistance R14 and resistance R15 are used for setting output voltage, and calculation formula is as follows:
Wherein " Rset " be R13, R14 and R15 count and, " Vout " is output voltage;For example:When R13=30K, R14=3K, R15=100;During Rset=30K+3K+100=33.1K Ω;Calculate Vout=1.025V.
PTH04040 power modules follow the rate of rise output 1.025V voltages that power supply trace generation module is produced.
Embodiment 7:
On the basis of embodiment 2, turn the further materialization of 1.035V power subsystems 42 to wherein 3.3V;
As shown in figure 8, wherein 3.3V turns 1.035V power subsystems 42 by electrochemical capacitor C15, electrochemical capacitor C16, electrolysis electricity Hold C17, resistance R16, resistance R17, resistance R18, resistance R19 and OKL power module composition;The 3.3V power supplys output module Positive pole, electrochemical capacitor C16 positive pole, resistance R16 one end and the OKL power modules of output end respectively with electrochemical capacitor C15 2 pin connection;The other end of the resistance R16 is connected with 1 pin of OKL power modules;The power supply trace signal generator module Signal output part be connected with 3 pin of OKL power modules;The negative pole of the electrochemical capacitor C15 is negative with electrochemical capacitor C16 respectively One end connection of pole, 4 pin of OKL power modules and resistance R17;The other end of the resistance R17 connects with resistance R18 one end Connect;The other end of the resistance R18 is connected with resistance R19 one end;The other end of the resistance R19 and the 6 of OKL power modules Pin is connected;5 pin of the OKL power modules are connected with 7 pin of OKL power modules and electrochemical capacitor C17 positive pole respectively;Institute 8 pin of OKL power modules are stated respectively with electrochemical capacitor C17 negative pole and being digitally connected;
Specifically, resistance R17, resistance R18 and resistance R19 are used for setting output voltage, and calculation formula is as follows:
Wherein " RTRIM" be R17, R18 and R19 count and;" Vout " is output voltage, for example:When R17=2.2K, R18=470, R19=100;RTRIMDuring=2.2K+470+100=2.77K Ω, Vout=1.035V is calculated.
OKL power modules follow the rate of rise output 1.035V voltages that power supply trace generation module is produced.
Embodiment 8:
On the basis of embodiment 2, turn the further materialization of 1.055V power subsystems 43 to wherein 3.3V;
As shown in figure 9, wherein 3.3V turns 1.055V power subsystems 43 by electrochemical capacitor C19, electrochemical capacitor C20, electrolysis electricity Hold C21, electrochemical capacitor C22, resistance R20, resistance R21, resistance R22, resistance R23 and OKL power module composition;The 3.3V Power supply output module output end positive pole respectively with electrochemical capacitor C19, electrochemical capacitor C20 positive pole, resistance R20 one end and The 2 pin connection of OKL power modules;The other end of the resistance R20 is connected with 1 pin of OKL power modules;The power supply trace letter Number signal output part of generation module is connected with 3 pin of OKL power modules;The negative pole of the electrochemical capacitor C19 respectively with electrolysis One end connection of electric capacity C20 negative pole, 4 pin of OKL power modules and resistance R21;The other end and resistance of the resistance R21 R22 one end connection;The other end of the resistance R22 is connected with resistance R23 one end;The other end and OKL of the resistance R23 The 6 pin connection of power module;The positive pole of 5 pin of the OKL power modules respectively with 7 pin electrochemical capacitor C21 of OKL power modules And electrochemical capacitor C22 positive pole connection;Negative pole, the electrolysis electricity of 8 pin of the OKL power modules respectively with electrochemical capacitor C21 Hold C22 negative pole and digitally connect;
Specifically, resistance R21, resistance R22 and resistance R23 are used for setting output voltage, and calculation formula is as follows:
Wherein " RTRIM" be R21, R22 and R23 count and;" Vout " is output voltage, for example:When R21=2.2K, R22=130, R23=300;RTRIMDuring=2.2K+130+300=2.63K Ω, Vout=1.055V is calculated.
OKL power modules follow the rate of rise output 1.055V voltages that power supply trace generation module is produced.
Final output voltage curve as shown in Figure 10, on the 3.3V power supplys of supply load chip start after delay 12ms Electricity;1.025V, 1.035V and 1.055V power supply carry out electricity in the 5ms after delay 12ms with the identical rate of rise.
The present invention uses MAX6820 and MOSFET, and some capacitance resistance wares, realize 4 road power supplys in 5mS on electricity, And electric slope is consistent in 3 tunnel low-voltages, and the upper electric slope of 3 tunnel low-voltages of high current is delayed as far as possible, so as to reduce Power-on impact current, it is ensured that the safety and reliability of Power Management Design.Compared with existing technology, the present invention utilizes less Device, occupies less PCB space, realizes the power up requirement of chip, and improves the performance of Power Management Design.
Although the present invention is disclosed as above with preferred embodiment, the present invention is not limited to this.Any art technology Personnel, without departing from the spirit and scope of the present invention, can make various changes or modifications, therefore protection scope of the present invention should It is defined when by claim limited range.It is obvious to a person skilled in the art that the invention is not restricted to above-mentioned demonstration Property embodiment details, and without departing from the spirit or essential characteristics of the present invention, can be with other specific shapes Formula realizes the present invention.Therefore, no matter from the point of view of which point, embodiment all should be regarded as exemplary, and is non-limiting , the scope of the present invention is limited by appended claims rather than described above, it is intended that will fall being equal in claim All changes in the implication and scope of important document are included in the present invention.

Claims (9)

1. a kind of input power controls circuit, it is characterised in that including power supply output module, time delay module, power supply trace signal Generation module, power supply trace voltage transformation module and supported chip, wherein, the power supply output module respectively with delay mould Block, power supply trace signal generator module and power supply trace voltage transformation module connection, the time delay module respectively with power supply with Track signal generator module and supported chip connection, the power supply trace signal generator module and power supply trace voltage transformation module Connection, the power supply trace voltage transformation module is connected with supported chip,
Power supply output module, time delay module, power supply trace signal generator module and electricity are used as exporting the first supply voltage Source floating voltage modular converter fundamental power supply input;
Time delay module, the first supply voltage for power supply output module to be exported enters line delay output;
Power supply trace signal generator module, the supply voltage for controlling power supply trace voltage transformation module output voltage rises oblique Rate;
Power supply trace voltage transformation module, the rate of rise for the output signal according to power supply trace signal generator module is by One supply voltage is converted into second source voltage;
Supported chip, input electricity is used as the first supply voltage of reception delay output simultaneously and the second source voltage of conversion Pressure,
Wherein, the external power source input signal of the power supply output module is power supply and backflow earth signal, power supply output mould respectively Series resistance between the output and ground of block, power supply output module exports the first supply voltage;
The power supply output module according to the first supply voltage and connect power supply output module output and ground resistance, Adjust the first supply voltage of output;
Adjustment output voltage the first supply voltage calculation formula be:
<mrow> <mi>R</mi> <mi>u</mi> <mi>p</mi> <mo>=</mo> <mrow> <mo>(</mo> <mfrac> <mrow> <mn>5.11</mn> <mi>V</mi> <mi>o</mi> <mrow> <mo>(</mo> <mn>100</mn> <mo>+</mo> <mi>&amp;Delta;</mi> <mo>)</mo> </mrow> </mrow> <mrow> <mn>1.225</mn> <mi>&amp;Delta;</mi> </mrow> </mfrac> <mo>-</mo> <mfrac> <mn>511</mn> <mi>&amp;Delta;</mi> </mfrac> <mo>-</mo> <mn>10.22</mn> <mo>)</mo> </mrow> <mrow> <mo>(</mo> <mi>k</mi> <mi>&amp;Omega;</mi> <mo>)</mo> </mrow> <mo>;</mo> </mrow>
Wherein, Rup for connection power supply output module output and ground resistance count and;Vo is the first supply voltage, △ is regulation coefficient.
2. input power as claimed in claim 1 controls circuit, it is characterised in that the time delay module includes delay chip, N Channel metal-oxide semiconductor field effect transistor, and imitated with delay chip and N-channel Metal-Oxide Semiconductor The electric capacity for answering transistor to connect;
N-channel Metal-Oxide Semiconductor field-effect transistor receives the first supply voltage, when being delayed by adjusting Capacity control Between.
3. input power as claimed in claim 2 controls circuit, it is characterised in that the time delay module is according to the delay of setting Time enters after line delay to export the first supply voltage, and the calculation formula of delay time is:
tDELAY(s)=2.484 × 106×CSET(F).
Wherein, tDELAYFor delay time, Cset (F) is capacitance.
4. input power as claimed in claim 1 controls circuit, it is characterised in that the first supply voltage of the delay output The power supply trace signal generator module is triggered as trigger signal, the defeated of the control power supply trace voltage transformation module is produced Go out the rate of rise follows voltage;The power supply trace voltage transformation module follows the power supply trace signal generator module to export Follow voltage the rate of rise export second source voltage.
5. input power as claimed in claim 1 controls circuit, it is characterised in that the power supply output module is 3.3V power supplys Output module;
The power supply trace voltage transformation module including 3.3V turn 1.025V power subsystems, 3.3V turn 1.035V power subsystems and 3.3V turns 1.055V power subsystems.
6. input power as claimed in claim 5 controls circuit, it is characterised in that the 3.3V turns 1.025V power subsystem bags Power module and resistance are included, 1.025V voltages, power module output conversion signal are exported by adjusting resistance;
Adjustment resistance output 1.025V voltages calculation formula be:
<mrow> <mi>R</mi> <mi>s</mi> <mi>e</mi> <mi>t</mi> <mo>=</mo> <mn>10</mn> <mi>k</mi> <mi>&amp;Omega;</mi> <mfrac> <mrow> <mn>0.8</mn> <mi>V</mi> </mrow> <mrow> <mi>V</mi> <mi>o</mi> <mi>u</mi> <mi>t</mi> <mo>-</mo> <mn>0.8</mn> <mi>V</mi> </mrow> </mfrac> <mo>-</mo> <mn>2.49</mn> <mi>k</mi> <mi>&amp;Omega;</mi> </mrow>
Wherein, Rset be resistance count and, Vout is output voltage.
7. input power as claimed in claim 5 controls circuit, it is characterised in that the 3.3V turns 1.035V power subsystem bags Power module and resistance are included, 1.035V voltages, power module output conversion signal are exported by adjusting resistance;
Adjustment resistance output 1.035V voltages calculation formula be:
<mrow> <msub> <mi>R</mi> <mrow> <mi>T</mi> <mi>R</mi> <mi>I</mi> <mi>M</mi> </mrow> </msub> <mrow> <mo>(</mo> <mi>k</mi> <mi>&amp;Omega;</mi> <mo>)</mo> </mrow> <mo>=</mo> <mfrac> <mn>6.9</mn> <mrow> <mi>V</mi> <mi>o</mi> <mi>u</mi> <mi>t</mi> <mo>-</mo> <mn>0.69</mn> </mrow> </mfrac> </mrow>
Wherein, RTRIMBe resistance count and;Vout is output voltage.
8. input power as claimed in claim 5 controls circuit, it is characterised in that the 3.3V turns 1.055V power subsystem bags Power module and resistance are included, 1.055V voltages, power module output conversion signal are exported by adjusting resistance;
Adjustment resistance output 1.055V voltages calculation formula be:
<mrow> <msub> <mi>R</mi> <mrow> <mi>T</mi> <mi>R</mi> <mi>I</mi> <mi>M</mi> </mrow> </msub> <mrow> <mo>(</mo> <mi>k</mi> <mi>&amp;Omega;</mi> <mo>)</mo> </mrow> <mo>=</mo> <mfrac> <mn>6.9</mn> <mrow> <mi>V</mi> <mi>o</mi> <mi>u</mi> <mi>t</mi> <mo>-</mo> <mn>0.69</mn> </mrow> </mfrac> </mrow>
Wherein, RTRIMBe resistance count and;Vout is output voltage.
9. input power as claimed in claim 5 controls circuit, it is characterised in that the 3.3V power supplys output module output 3.3V supply voltages are exported to time delay module, time delay module when reaching delay time, by 3.3V power supply voltage supplyings power supply with Track signal generator module is to produce conversion signal;
When power supply trace voltage transformation module receive conversion signal after, respectively carry out 3.3V turn 1.025V supply voltage conversion, 3.3V turns the conversion of 1.035V supply voltages and 3.3V turns the conversion of 1.055V supply voltages;
Be delayed output 3.3V supply voltages and by conversion three road 1.025V supply voltages, 1.035V supply voltages and 1.055V supply voltages are input to supported chip together as input voltage and realized while upper electricity.
CN201510715680.XA 2015-10-28 2015-10-28 A kind of input power controls circuit Active CN105207463B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510715680.XA CN105207463B (en) 2015-10-28 2015-10-28 A kind of input power controls circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510715680.XA CN105207463B (en) 2015-10-28 2015-10-28 A kind of input power controls circuit

Publications (2)

Publication Number Publication Date
CN105207463A CN105207463A (en) 2015-12-30
CN105207463B true CN105207463B (en) 2017-10-13

Family

ID=54954961

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510715680.XA Active CN105207463B (en) 2015-10-28 2015-10-28 A kind of input power controls circuit

Country Status (1)

Country Link
CN (1) CN105207463B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111813208A (en) * 2019-04-12 2020-10-23 鸿富锦精密工业(武汉)有限公司 Power supply control circuit and mainboard using same

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1601412A (en) * 2003-09-25 2005-03-30 华为技术有限公司 Method and circuit for controlling time sequence of power supplying
CN2718635Y (en) * 2004-03-03 2005-08-17 中兴通讯股份有限公司 Multi-power source charging sequential control circuit
CN201222720Y (en) * 2008-07-08 2009-04-15 深圳市同洲电子股份有限公司 Control circuit for electrification sequence
CN201298810Y (en) * 2008-11-07 2009-08-26 深圳市宝德计算机系统有限公司 Electrification sequence control circuit of chip voltages
CN101789682B (en) * 2010-02-10 2012-12-12 福建星网锐捷网络有限公司 Multiple output power supply time sequence control device and method
CN103728896A (en) * 2012-10-10 2014-04-16 杭州华三通信技术有限公司 Method and device for controlling power-on sequence of multiple channels of power supplies

Also Published As

Publication number Publication date
CN105207463A (en) 2015-12-30

Similar Documents

Publication Publication Date Title
CN104112473B (en) A kind of low-power consumption rapid pressure FLASH control electrical appliances for electric charge pump
CN104319983B (en) A kind of source driving method, drive circuit and Switching Power Supply being used in Switching Power Supply
CN104991597B (en) Peak current control circuitry
CN106532631B (en) A kind of space flight is booted with N MOS flash and drives current-limiting protection circuit
CN107124166A (en) A kind of low-power consumption high speed Zero Current Switch
CN105915042B (en) A kind of soft start and soft breaking circuit for Buck converters
CN203537351U (en) Oscillator circuit
CN106664083A (en) Circuit for controlling slew rate of a high-side switching element
CN105207463B (en) A kind of input power controls circuit
CN104333062B (en) The charging circuit of current detecting can be charged
CN107947539A (en) Switching Power Supply drives power supply circuit and Switching Power Supply
CN104518646B (en) Controller for adjusting output voltage of power converter
CN107508466A (en) Boost-voltage regulator with efficient soft starting circuit
CN204465030U (en) Portable power source and charge-discharge system thereof
CN105871184B (en) A kind of superhigh precision Overpower compensating circuit
CN104485819B (en) A kind of booster circuit
CN105790567A (en) Anti-ringing circuit
CN206274644U (en) The oscillator and inductance converter used with reference to inductance converter
CN104393754B (en) Shunting control circuit of spacecraft power supply system and method thereof
CN107565953A (en) A kind of control circuit of transition detection device and clock frequency regulating system
CN105958576A (en) Battery charging management circuit and system
CN206657070U (en) Transformer station&#39;s integrated test system based on ZYNQ platforms
CN103973120B (en) Device for detecting average output current of power converter and related method
Lu et al. A wireless charging circuit with high power efficiency and security for implantable devices
CN206462412U (en) NMOS tube drive control circuit, chip and device

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
TR01 Transfer of patent right

Effective date of registration: 20201130

Address after: Room 10242, No. 260, Jiangshu Road, Xixing street, Binjiang District, Hangzhou City, Zhejiang Province

Patentee after: Hangzhou Jiji Intellectual Property Operation Co.,Ltd.

Address before: 201616 Shanghai city Songjiang District Sixian Road No. 3666

Patentee before: Phicomm (Shanghai) Co.,Ltd.

TR01 Transfer of patent right
TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20201216

Address after: 8319 Yanshan Road, Bengbu City, Anhui Province

Patentee after: Bengbu Lichao Information Technology Co.,Ltd.

Address before: Room 10242, No. 260, Jiangshu Road, Xixing street, Binjiang District, Hangzhou City, Zhejiang Province

Patentee before: Hangzhou Jiji Intellectual Property Operation Co.,Ltd.

TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20210310

Address after: 313000 room 1019, Xintiandi commercial office, Yishan street, Wuxing District, Huzhou, Zhejiang, China

Patentee after: Huzhou YingLie Intellectual Property Operation Co.,Ltd.

Address before: 8319 Yanshan Road, Bengbu City, Anhui Province

Patentee before: Bengbu Lichao Information Technology Co.,Ltd.

TR01 Transfer of patent right
TR01 Transfer of patent right

Effective date of registration: 20220812

Address after: 226463 Zhongtian Industrial Park, Hekou Town, Rudong, Nantong, Jiangsu

Patentee after: ZHONGTIAN BROADBAND TECHNOLOGY Co.,Ltd.

Address before: 313000 room 1019, Xintiandi commercial office, Yishan street, Wuxing District, Huzhou, Zhejiang, China

Patentee before: Huzhou YingLie Intellectual Property Operation Co.,Ltd.