CN105206663A - Si-based AlGaN/GaN high-electron-mobility transistor - Google Patents
Si-based AlGaN/GaN high-electron-mobility transistor Download PDFInfo
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- CN105206663A CN105206663A CN201510661083.3A CN201510661083A CN105206663A CN 105206663 A CN105206663 A CN 105206663A CN 201510661083 A CN201510661083 A CN 201510661083A CN 105206663 A CN105206663 A CN 105206663A
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- mobility transistor
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- 229910002704 AlGaN Inorganic materials 0.000 title claims abstract description 67
- 238000002161 passivation Methods 0.000 claims abstract description 8
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 230000008901 benefit Effects 0.000 abstract description 6
- 230000015556 catabolic process Effects 0.000 abstract description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 33
- 229910002601 GaN Inorganic materials 0.000 description 32
- 230000005684 electric field Effects 0.000 description 14
- 230000005533 two-dimensional electron gas Effects 0.000 description 13
- 230000000694 effects Effects 0.000 description 5
- 239000000463 material Substances 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- 230000010287 polarization Effects 0.000 description 3
- 230000002269 spontaneous effect Effects 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
A Si-based AlGaN/GaN high-electron-mobility transistor comprises a Si-based substrate. An AlN nucleating layer is formed on the Si-based substrate. An intrinsic GaN layer is formed on the AlN nucleating layer. An AlGaN doping layer is formed on the intrinsic GaN layer. A gate oxide layer is formed in the AlGaN doping layer. The lower surface of the gate oxide layer makes contact with the upper surface of the intrinsic GaN layer. A gate is formed on the upper surface of the gate oxide layer. A source is formed on one side of the gate and on the upper surface of the AlGaN doping layer. A drain is formed on the other side of the gate and on the upper surface of the AlGaN doping layer. Passivation layers are formed on the gate, the source and the drain. The source and the drain are separated from the gate through the passivation layers. The Si-based AlGaN/GaN high-electron-mobility transistor is characterized in that a P type AlGaN doping area is formed in the intrinsic GaN layer and located below the area between the gate and the drain. The Si-based AlGaN/GaN high-electron-mobility transistor structurally has the advantage that on the premise that the frequency characteristics and the threshold voltage of the device are kept basically unchanged, the breakdown voltage of the device is remarkably improved.
Description
Technical field
The present invention relates generally to a kind of broad stopband power semiconductor, particularly relates to a kind of high pressure enhancement mode Si base AlGaN/GaN High Electron Mobility Transistor being applied to power switch field.
Background technology
Gallium nitride (GaN) is as a kind of novel semiconductor material, there is the features such as energy gap large (3.39eV), breakdown field strength high (~ 3.0MV/cm) and electron mobility high (800 ~ 1700/Vs), obtain great concern in power semiconductor field.
AlGaN/GaN High Electron Mobility Transistor (HighElectronicMobilityTransistor) is the field-effect transistor based on GaN material, and energy gap, electron mobility and puncture voltage have advantage., so heterojunction inside has very strong polarity effect, also therefore there is extremely strong electric field in the piezoelectric polarization brought because AlGaN/GaN heterosphere exists the spontaneous polarization of AlGaN and GaN material and both storeroom piezoelectric effects.This extremely strong electric field makes to produce the two-dimensional electron gas higher than other compound semiconductors ten times of concentration in AlGaN/GaN heterojunction.Simultaneously due to the two-dimensional electron gas at AlGaN/GaN heterojunction boundary place be limited in this interface two dimensional surface in move, so these electronic distance donor atoms are far away, scattering process between impurity can be less on the impact of electron mobility, therefore the electron mobility of the two-dimensional electron gas at heterojunction boundary place is quite high, so obtain the On current with high density and high electron mobility.Such High Electron Mobility Transistor just can obtain lower conduction resistance (Ron-sp), thus reduces the loss of power device.Therefore, conventional transistor of comparing, AlGaN/GaN High Electron Mobility Transistor can be applied in the occasion of more high power and efficiency.
AlGaN/GaN High Electron Mobility Transistor is as transversal device, in the off state, the power line that positive charge in raceway groove depletion region sends is concentrated and is pointed to gate edge, forms peak electric field at grid near drain terminal side, is the one of the main reasons that constraint device puncture voltage improves.Excessive peak value electric field makes device electric fields peak Distribution uneven, and device is easily breakdown under lower source-drain voltage, cannot give full play to the withstand voltage advantage of height of GaN material.In order to improve the puncture voltage of AlGaN/GaN High Electron Mobility Transistor, the method the most often adopted introduces field plate structure, as grid field plate, source field plate etc., the employing of field plate, another peak electric field can be introduced at the edge of field plate, electric field between grid leak is redistributed, reduces the peak electric field of nearly drain terminal gate edge, substantially increase puncture voltage.But the size adding membership increase parasitic capacitance of field plate, makes the frequency characteristic of device degenerate.
Summary of the invention
The present invention is directed to the problems referred to above, propose a kind of Si base AlGaN/GaN High Electron Mobility Transistor, this structure devices keeps, on threshold voltage and the substantially constant basis of frequency characteristic, effectively to improve puncture voltage.
The present invention adopts following technical scheme: Si base substrate, Si base substrate is formed with AlN nucleating layer, AlN nucleating layer is formed intrinsic GaN layer, intrinsic GaN layer is formed AlGaN doped layer; In described AlGaN doped layer, be formed with gate oxide, the lower surface of described gate oxide contacts with the upper surface of intrinsic GaN layer, is formed with grid at the upper surface of gate oxide; Source electrode is formed in the side of the upper surface grid of AlGaN doped layer, drain electrode is formed at the opposite side of the upper surface grid of AlGaN doped layer, grid, source electrode and drain electrode are formed with passivation layer, and source electrode and drain electrode by passivation layer and grid isolated, it is characterized in that, P type AlGaN doped region is formed, the below in region between grid and drain electrode, described P type AlGaN doped region in intrinsic GaN layer.
Compared with prior art, tool of the present invention has the following advantages:
(1), device of the present invention adopts the structure of P type AlGaN doped region in intrinsic GaN layer, and the concentration changing two-dimensional electron gas between grid leak by polarity effect adjusts the Electric Field Distribution between grid leak, and then device electric breakdown strength is improved.
AlGaN/GaN High Electron Mobility Transistor is due to strong polarity effect, piezoelectricity and spontaneous polarization electric field can be formed at AlGaN/GaN heterojunction boundary place, being with of AlGaN/GaN heterojunction boundary place is bent, form the two-dimensional electron gas of high concentration near GaN side at AlGaN/GaN interface, reduce the concentration of two-dimensional electron gas, the Electric Field Distribution between grid leak can be adjusted, thus reach the object improving puncture voltage.Therefore the present invention adopts the method inserting P type AlGaN doped region in intrinsic GaN layer 3, polarity effect is there is in the interface of AlGaN and GaN heterojunction, heterojunction boundary place is made to form highdensity two-dimensional electron gas, thus two-dimensional electron gas corresponding above P type AlGaN doped region is reduced, in raceway groove, the reduction of two-dimensional electron gas can introduce new peak value electric field, thus reach Electric Field Distribution between adjustment grid leak, and then improve the object of puncture voltage.Fig. 3 is the two-dimensional electron gas distribution map of device of the present invention, can find that the raceway groove place (X=2.8-3.5) of two-dimensional electron gas corresponding to the structure of P type AlGaN doped region in raceway groove obviously reduces.Fig. 4 is the puncture voltage correlation curve figure of device of the present invention and conventional device, and can find that device of the present invention is compared with conventional device, puncture voltage is improved.
(2), the benefit of device of the present invention is that on the basis of the puncture voltage that improve device, threshold voltage remains unchanged substantially.Fig. 5 is the threshold voltage comparison diagram of device of the present invention and conventional device, and can find that device of the present invention is compared with conventional device, the threshold voltage of device remains unchanged substantially.
(4), the benefit of device of the present invention is that, on the basis of the puncture voltage that improve device, the frequency characteristic of device remains unchanged substantially.The structure of P type AlGaN doped region 10 is compared with traditional field plate structure, the former is by doing structural adjustment at device inside, change the Electric Field Distribution of device inside, do not introduce extra parasitic capacitance, therefore parasitic capacitance remains unchanged substantially, and then ensure that the frequency characteristic of device remains unchanged substantially.
Accompanying drawing explanation
Fig. 1 is conventional Si base AlGaN/GaN high electron mobility transistor structure profile.
Fig. 2 is Si base AlGaN/GaN high electron mobility transistor structure profile of the present invention.
Fig. 3 is device two-dimensional electron gas scatter chart of the present invention.Can find out that device of the present invention makes two-dimensional electron gas between grid leak corresponding above P type AlGaN doped region occur obvious reduction.
Fig. 4 is the puncture voltage comparison diagram of device of the present invention and conventional device.Can find out that device of the present invention makes puncture voltage be significantly improved.
Fig. 5 is the threshold voltage comparison diagram of device of the present invention and conventional device.Can find out that device of the present invention is compared with conventional device, threshold voltage remains unchanged substantially.
Embodiment
A kind of Si base AlGaN/GaN High Electron Mobility Transistor, comprising: Si base substrate 1, Si base substrate 1 is formed with AlN nucleating layer 2, AlN nucleating layer 2 is formed intrinsic GaN layer 3, intrinsic GaN layer 3 is formed AlGaN doped layer 4; In described AlGaN doped layer 4, be formed with gate oxide 5, the lower surface of described gate oxide 5 contacts with the upper surface of intrinsic GaN layer 3, is formed with grid 6 at the upper surface of gate oxide 5; Source electrode 7 is formed in the side of the upper surface grid 6 of AlGaN doped layer 4, drain electrode 8 is formed at the opposite side of the upper surface grid 6 of AlGaN doped layer 4, grid 6, source electrode 7 and drain electrode 8 are formed with passivation layer 9, and passivation layer 9 is passed through in source electrode 7 and drain electrode 8 and grid 6 is isolated, it is characterized in that, P type AlGaN doped region 10 is formed, the below in region between grid 6 and drain electrode 8, described P type AlGaN doped region 10 in intrinsic GaN layer 3.The thickness of P type AlGaN doped region 10 is 20-30nm.The length of P type AlGaN doped region 10 is 0.5-1.The upper surface of P type AlGaN doped region 10 and the distance of AlGaN doped layer 4 lower surface are 10-20nm.The doping content of P type AlGaN doped region is 1-5e19.
Claims (5)
1. a Si base AlGaN/GaN High Electron Mobility Transistor, comprise: Si base substrate (1), Si base substrate (1) is formed AlN nucleating layer (2), AlN nucleating layer (2) is formed intrinsic GaN layer (3), intrinsic GaN layer (3) is formed AlGaN doped layer (4), gate oxide (5) is formed in described AlGaN doped layer (4), the lower surface of described gate oxide (5) contacts with the upper surface of intrinsic GaN layer (3), is formed with grid (6) at the upper surface of gate oxide (5), source electrode (7) is formed in the side of the upper surface grid (6) of AlGaN doped layer (4), drain electrode (8) is formed at the opposite side of the upper surface grid (6) of AlGaN doped layer (4), in grid (6), source electrode (7) and drain electrode (8) are formed with passivation layer (9), and source electrode (7) and drain electrode (8) by passivation layer (9) and grid (6) isolated, it is characterized in that, P type AlGaN doped region (10) is formed in intrinsic GaN layer (3), described P type AlGaN doped region (10) is positioned at the below in region between grid (6) and drain electrode (8).
2. Si base AlGaN/GaN High Electron Mobility Transistor according to claim 1, is characterized in that, the thickness of described P type AlGaN doped region (10) is 20-30nm.
3. Si base AlGaN/GaN High Electron Mobility Transistor according to claim 1, is characterized in that, the length of described P type AlGaN doped region (10) is 0.5-1.
4. Si base AlGaN/GaN High Electron Mobility Transistor according to claim 1, is characterized in that, the upper surface of described P type AlGaN doped region (10) and the distance of AlGaN doped layer (4) lower surface are 10-20nm.
5. Si base AlGaN/GaN High Electron Mobility Transistor according to claim 1, is characterized in that, the doping content of described P type AlGaN doped region (10) is 1-5e19.
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| CN201510661083.3A CN105206663A (en) | 2015-10-14 | 2015-10-14 | Si-based AlGaN/GaN high-electron-mobility transistor |
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| CN201510661083.3A CN105206663A (en) | 2015-10-14 | 2015-10-14 | Si-based AlGaN/GaN high-electron-mobility transistor |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111129118A (en) * | 2019-12-27 | 2020-05-08 | 英诺赛科（珠海）科技有限公司 | Semiconductor device and method for manufacturing the same |
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| CN103337516A (en) * | 2013-06-07 | 2013-10-02 | 苏州晶湛半导体有限公司 | Enhanced switching device and manufacturing method thereof |
| CN104409496A (en) * | 2014-11-24 | 2015-03-11 | 电子科技大学 | Gallium-nitride-based power heterojunction field effect transistor with local back barrier |
| CN104538440A (en) * | 2014-12-29 | 2015-04-22 | 电子科技大学 | Buffer layer electrical charge RESURF HEMT device |
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- 2015-10-14 CN CN201510661083.3A patent/CN105206663A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103337516A (en) * | 2013-06-07 | 2013-10-02 | 苏州晶湛半导体有限公司 | Enhanced switching device and manufacturing method thereof |
| CN104409496A (en) * | 2014-11-24 | 2015-03-11 | 电子科技大学 | Gallium-nitride-based power heterojunction field effect transistor with local back barrier |
| CN104538440A (en) * | 2014-12-29 | 2015-04-22 | 电子科技大学 | Buffer layer electrical charge RESURF HEMT device |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111129118A (en) * | 2019-12-27 | 2020-05-08 | 英诺赛科（珠海）科技有限公司 | Semiconductor device and method for manufacturing the same |
| US11302778B2 (en) | 2019-12-27 | 2022-04-12 | Innoscience (Zhuhai) Technology Co., Ltd. | Semiconductor device and manufacturing method therefor |
| US11784221B2 (en) | 2019-12-27 | 2023-10-10 | Innoscienc (Zhuhai) Technology Co., Ltd. | Semiconductor device and manufacturing method therefor |
| US11837633B2 (en) | 2019-12-27 | 2023-12-05 | Innoscience (Zhuhai) Technology Co., Ltd. | Semiconductor device and manufacturing method therefor |
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