CN105206563A - TSV electroplating process - Google Patents
TSV electroplating process Download PDFInfo
- Publication number
- CN105206563A CN105206563A CN201510514469.1A CN201510514469A CN105206563A CN 105206563 A CN105206563 A CN 105206563A CN 201510514469 A CN201510514469 A CN 201510514469A CN 105206563 A CN105206563 A CN 105206563A
- Authority
- CN
- China
- Prior art keywords
- wafer
- tsv
- electroplating
- filling
- thickness
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/48—After-treatment of electroplated surfaces
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
- C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1068—Formation and after-treatment of conductors
Abstract
The invention relates to an electroplating process, especially relates to a TSV electroplating process, specifically relates to an electroplating process capable of reducing the CMP cost, and belongs to the field of a TSV technology. According to the technical scheme provided by the invention, the TSV electroplating process comprises the following steps: a, providing a wafer to be electroplated and filled, and carrying out needed TSV electroplating filling on the wafer; and b, applying deplating currents opposite to that of the TSV electroplating filling to the wafer after the electroplating filling so as to reduce the thickness of an overplated copper layer on the electroplated and filled wafer. According to the invention, after the wafer is electroplated and filled by use of TSV electroplating, then the deplating currents opposite to the direction of currents during the TSV electroplating are applied, uniform deplating is carried out by use of the deplating currents, the thickness of the overplated copper layer is reduced, the purpose of TSV filling of the wafer is ensured, the thickness of the overplated copper layer can also be reduced as much as possible, the purpose of the CMP cost is effectively decreased, the application scope is wide, and the safety and reliability are high.
Description
Technical field
The present invention relates to a kind of electroplating technology, especially a kind of TSV electroplating technology, concrete ground says it is a kind of electroplating technology that can reduce CMP cost, belongs to the technical field of TSV.
Background technology
At present, TSV(ThroughSiliconVias) utilization of perpendicular interconnection technology in microelectronics Packaging field be more and more extensive, and Cost Problems is the obstacle that of limiting that this technology widely applies is very large.TSV electro-coppering hole filling technology is requisite technique in TSV processing procedure, and TSV has electroplated rear crystal column surface and can form one deck and cross copper electroplating layer, needs by CMP(chemico-mechanical polishing) technique removes, and cross copper electroplating layer thicker, CMP cost is higher.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, provide a kind of TSV electroplating technology, it is easy to operate, effectively can realize the strip to wafer, reduce the thickness of copper electroplating layer, reduces CMP cost, safe and reliable.
According to technical scheme provided by the invention, a kind of TSV electroplating technology, described TSV electroplating technology comprises the steps:
A, the wafer providing electroplated to fill, and required TSV plating filling is carried out to described wafer;
B, plating is filled after wafer, described wafer applies electroplate contrary strip electric current when filling with TSV, to reduce the thickness electroplating on filling wafer copper electroplating layer.
After wafer being carried out to TSV plating filling, take out and clean, to remove the additive that crystal column surface adsorbs.
After to wafer cleaning, then insert in electroplating bath by described wafer, the current density being applied to strip electric current on wafer is 0.1ASD ~ 3ASD.
To the wafer that step b obtains, adopt the copper electroplating layer excessively on CMP removal crystal column surface.
Advantage of the present invention: electroplate after plating filling is carried out to wafer utilizing TSV, the strip electric current that when applying to electroplate with TSV, the sense of current is contrary again, strip electric current is utilized to carry out even strip, reduced the thickness of copper electroplating layer, namely ensure that the TSV of wafer fills object, the thickness crossing copper electroplating layer can be reduced as far as possible again, effectively reduce the object of CMP cost, wide accommodation, safe and reliable.
Accompanying drawing explanation
Fig. 1 is the present invention's sense of current and relation schematic diagram of time when electroplating.
Embodiment
Below in conjunction with concrete drawings and Examples, the invention will be further described.
As shown in Figure 1: in order to the strip to wafer effectively can be realized, reduced the thickness of copper electroplating layer, CMP cost is reduced, following steps of the present invention:
A, the wafer providing electroplated to fill, and required TSV plating filling is carried out to described wafer;
In the embodiment of the present invention, carry out conventional TSV plating to providing wafer and fill, specific implementation process and technological parameter are known by the art personnel.After carrying out TSV plating filling, one deck can be formed at crystal column surface and cross copper electroplating layer.In order to reduce the described thickness crossing copper electroplating layer, reducing CMP cost, needing the wafer after TSV plating being filled to take out from electroplating bath, and utilizing clear water to clean, to remove the additive of crystal column surface absorption.The type of described additive and kind are known by the art personnel, no longer enumerate herein.
B, plating is filled after wafer, described wafer applies electroplate contrary strip electric current when filling with TSV, to reduce the thickness electroplating on filling wafer copper electroplating layer.
In the embodiment of the present invention, after to wafer cleaning, then insert in electroplating bath by described wafer, the current density being applied to strip electric current on wafer is 0.1ASD ~ 3ASD.To electroplate the sense of current of filling contrary with carrying out TSV for described strip sense of current, as shown in fig. 1.In Fig. 1, the process of 0 ~ time T1 is the process of carrying out TSV plating filling, when time T1 ~ time T2, is the stage applying strip electric current.The technological parameters such as the time that the time applying strip electric current can fill according to TSV plating, the size of strip electric current are determined, can be one or many during applying strip electric current, the effect of filling not affect wafer inner via hole is as the criterion, and namely will ensure filling up of wafer inner via hole.
To the wafer that step b obtains, adopt the copper electroplating layer excessively on CMP removal crystal column surface.Because the copper electroplating layer thickness after the strip function of current of crossing on crystal column surface reduces, then remove remaining copper electroplating layer by CMP, CMP removes the process of layers of copper known by the art personnel, repeats no more herein.
The present invention is after utilizing TSV plating to carry out plating filling to wafer, the strip electric current that when applying to electroplate with TSV, the sense of current is contrary again, strip electric current is utilized to carry out even strip, reduced the thickness of copper electroplating layer, namely ensure that the TSV of wafer fills object, the thickness crossing copper electroplating layer can be reduced as far as possible again, effectively reduce the object of CMP cost, wide accommodation, safe and reliable.
Claims (4)
1. a TSV electroplating technology, is characterized in that, described TSV electroplating technology comprises the steps:
(a), the wafer providing electroplated to fill, and required TSV plating filling is carried out to described wafer;
(b), plating is filled after wafer, described wafer applies electroplate contrary strip electric current when filling with TSV, to reduce the thickness electroplating on filling wafer copper electroplating layer.
2. TSV electroplating technology according to claim 1, is characterized in that: after wafer being carried out to TSV plating filling, take out and clean, to remove the additive that crystal column surface adsorbs.
3. TSV electroplating technology according to claim 2, is characterized in that: after to wafer cleaning, then inserts in electroplating bath by described wafer, and the current density being applied to strip electric current on wafer is 0.1ASD ~ 3ASD.
4. TSV electroplating technology according to claim 1, is characterized in that: the wafer obtained step (b), adopts the copper electroplating layer excessively on CMP removal crystal column surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510514469.1A CN105206563A (en) | 2015-08-20 | 2015-08-20 | TSV electroplating process |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510514469.1A CN105206563A (en) | 2015-08-20 | 2015-08-20 | TSV electroplating process |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN105206563A true CN105206563A (en) | 2015-12-30 |
Family
ID=54954150
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510514469.1A Pending CN105206563A (en) | 2015-08-20 | 2015-08-20 | TSV electroplating process |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105206563A (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101140902A (en) * | 2006-09-08 | 2008-03-12 | 东部高科股份有限公司 | Method of forming metal line in semiconductor device |
| US7589021B2 (en) * | 2005-12-28 | 2009-09-15 | Dongbu Hitek Co., Ltd. | Copper metal interconnection with a local barrier metal layer |
| CN104342748A (en) * | 2013-08-08 | 2015-02-11 | 波音公司 | Method of removing a metal detail from a substrate |
| CN104835750A (en) * | 2014-02-07 | 2015-08-12 | 应用材料公司 | Electroplating methods for semiconductor substrates |
-
2015
- 2015-08-20 CN CN201510514469.1A patent/CN105206563A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7589021B2 (en) * | 2005-12-28 | 2009-09-15 | Dongbu Hitek Co., Ltd. | Copper metal interconnection with a local barrier metal layer |
| CN101140902A (en) * | 2006-09-08 | 2008-03-12 | 东部高科股份有限公司 | Method of forming metal line in semiconductor device |
| CN104342748A (en) * | 2013-08-08 | 2015-02-11 | 波音公司 | Method of removing a metal detail from a substrate |
| CN104835750A (en) * | 2014-02-07 | 2015-08-12 | 应用材料公司 | Electroplating methods for semiconductor substrates |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101750665B1 (en) | A method for microvia filling by copper electroplating with tsv technology for 3d copper interconnection at high aspect ratio | |
| WO2011041522A3 (en) | Methods for multi-step copper plating on a continuous ruthenium film in recessed features | |
| TW200623323A (en) | Methods for forming interconnects in vias and microelectronic workpieces including such interconnects | |
| CN104602452B (en) | A kind of preparation method of circuit board | |
| WO2012150133A3 (en) | Method of depositing metallic layers based on nickel or cobalt on a semiconducting solid substrate; kit for application of said method | |
| CN102883536A (en) | Processing method of through holes of printed circuit board (PCB) and through hole structure | |
| CN105722315B (en) | Wiring board method for plugging and wiring board | |
| CN102438412B (en) | Back drilling method of PCB (Printed Circuit Board) | |
| CN102912395A (en) | Method for filling blind-buried holes through electro-coppering | |
| CN103730382B (en) | A kind of manufacture method of copper-copper bonding salient points | |
| CN103484908B (en) | Electrochemical copper deposition method of TSV | |
| CN108882559B (en) | Manufacturing process of metallized half hole | |
| KR101841199B1 (en) | Method of forming semiconductor device and the device formed by the method | |
| CN105063703A (en) | Surface treatment method of die casting aluminum alloy piece and die casting aluminum alloy product | |
| CN104684263B (en) | A kind of processing method of negative and positive heavy copper circuit board | |
| CN104470234A (en) | Method for producing step copper-plated PCB | |
| CN105206563A (en) | TSV electroplating process | |
| CN105472909B (en) | A kind of processing method of stepped groove circuit board | |
| CN110993506B (en) | IC carrier plate through hole filling process | |
| CN204550753U (en) | A kind of dash roller devices | |
| WO2009137610A3 (en) | Method of forming an electronic device including removing a differential etch layer | |
| CN106793517A (en) | A kind of pcb board filling holes with resin electroplates preparation method | |
| Koo et al. | Electrochemical process for 3D TSV without CMP and lithographic processes | |
| CN108401370A (en) | A kind of processing method of metal blind slot | |
| CN109273403A (en) | A kind of TSV filling perforation method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20151230 |