CN105205034B - A kind of highly reliable method for parameter configuration based on ASIC - Google Patents
A kind of highly reliable method for parameter configuration based on ASIC Download PDFInfo
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Abstract
A kind of highly reliable method for parameter configuration based on ASIC, the steps include: S1: configure hardware configuration by ASIC method；S2: chip configuration parameter is reinforced；S3: be stored in needing configuration parameter in programmable read only memory PROM outside System on Chip/SoC；S4: after System on Chip/SoC powers on, opens parameter configuration module；S5: read the configuration parameter data being stored in the outside PROM of System on Chip/SoC；S6: reading is configured data and carries out the reliability selection of data；S7: according to the identification marking of the configuration parameter of each module of parameter identification read, the supplemental characteristic of each module is decomposed and framing, and by parameter configuration to each functional module；S8: complete initial configuration；S9: start the real-time detection of configuration parameter；S10: according to the time of setting, detection current system operational factor is the most normal, if normal, wait and detecting next time；If wrong, again parameter is configured.The present invention has advantages such as being easily achieved, parameter configuration is reliable.
Description
Technical field
Present invention relates generally to electronic system reliability reinforcement technique field, refer in particular to a kind of highly reliable parameter based on ASIC and join
The method put.
Background technology
Along with improving constantly of space flight detection mission demand, the functional requirement to space electronic system is more and more higher.Multiple in order to complete
Miscellaneous space flight detection mission, with the FPGA (Field Programmable Gate Array) the large scale integrated circuit core as representative
Sheet is widely used in electronic system.The single particle effect caused due to space radiation environment can make integrated circuit send out
Raw logic state upset, the instantaneous abnormal or interruption of logic function, and along with CMOS (Complementary Metal Oxide
Semiconductors) decline of technique, the threshold voltage of PN junction reduces, such as the large scale integrated circuit such as FPGA, processor
Face single particle effect and threaten increasingly severe, and there is presently no a kind of mode and can be designed by chip and avoid single-particle to imitate completely
The impact that reply integrated circuit normally works.
For customization or the special integrated chip (ASIC Application Specific Integrated Circuit) of semi-custom, contrast
FPGA possesses the ability of stronger anti-single particle effect.Special integrated chip has that cost of manufacture is high, the cycle is longer and chip
The feature that function determines relatively, the application the most how extending ASIC is urgently to be resolved hurrily the asking that ASIC design faces
Topic.And making asic chip can meet the demand of different application occasion by parameter configuration, this is to expand asic chip application model
The important technology approach enclosed.Under the current demand of above ASIC expanded application, how to ensure the reliability of ASIC configuration parameter
It is to ensure that asic chip application reliability in-orbit needs the key issue solved.
Summary of the invention
The technical problem to be solved in the present invention is that the technical problem existed for prior art, and the present invention provides one to be prone to
Realization, the method for parameter configuration highly reliable parameter configuration based on ASIC reliably.
For solve above-mentioned technical problem, the present invention by the following technical solutions:
A kind of highly reliable method for parameter configuration based on ASIC, the steps include:
S1: configure hardware configuration by ASIC method；
S2: reinforce chip configuration parameter, divides according to the function of System on Chip/SoC and carries out redundancy and increase module parameter identification
Mark, for distinguishing the parameter of each module；
S3: be stored in needing configuration parameter in programmable read only memory PROM outside System on Chip/SoC；
S4: after System on Chip/SoC powers on, it is determined that after System on Chip/SoC internal clocking working stability, opens parameter configuration module；
S5: by the parameter configuration module within System on Chip/SoC, starts to read the configuration being stored in the outside PROM of System on Chip/SoC
Supplemental characteristic；
S6: System on Chip/SoC inner parameter configuration module, configures data and carries out the reliability selection of data, if choosing reading
Correct parameter, then judge to read data correct；Otherwise, enter step S5 and re-read configuration data；
S7: according to the identification marking of the configuration parameter of each module of parameter identification read, the supplemental characteristic of each module is decomposed
And framing, and by parameter configuration to each functional module；
S8: complete initial configuration, System on Chip/SoC starts properly functioning work according to the parameter of configuration；
S9: start the real-time detection of configuration parameter, if assay shows correctly, judges that current system parameter is working properly；If
Wrong then entrance step S5, configures System on Chip/SoC parameter again, and during configuration, System on Chip/SoC is in normal work all the time
State；
S10: according to the time of setting, repeats step S9 the most afterwards, and detection current system operational factor is the most normal,
If normal, wait and detecting next time；If wrong, again parameter is configured.
As a further improvement on the present invention: in described step S1, the hardware configuration configured by ASIC method includes ASIC
Chip and PROM storage chip, described PROMPROM storage chip is used for storing configuration data, and described asic chip is only
PROM storage chip is read.
As a further improvement on the present invention: the idiographic flow carrying out chip configuration parameter reinforcing in described step S2 is:
S201: n the functional module divided according to System on Chip/SoC, is divided into configuration parameter n part, and sets for each module
Fixed unique module parameter identification marking；
S202: functional module m, completes certain specific function, needs configuration parameter i, then this i configuration parameter is function
The module parameter of module m, and given unique module parameter identification marking 2 before this module parametern-i, identification marking presses byte
Polishing；
S203: all supplemental characteristics are done unification according to the bit wide format of PROM and is split as one data mode of a byte；
S204: each functional module parameter is carried out by byte and verifies；Check results is left in each module ginseng as one of parameter
In number；
S205: parameter after fractionation is done triplication redundancy design, i.e. each byte data is copied into 3 parts；
S206: design parameter configuration files based on PROM form；
S207: the data file of generation is loaded in PROM.
As a further improvement on the present invention: the idiographic flow of the loading parameters configuration process that carries out powering in described step S4 is as follows:
S401: System on Chip/SoC power up, there is the transition period before of short duration steady operation in the internal clocking of System on Chip/SoC；
S402: according to the design of chip internal, it is determined that whether the internal clocking of System on Chip/SoC is stable, it is determined that start ginseng after Wen Ding
Number configuration module；
S403: according to the mode of operation of PROM, by control signal, the internal data of PROM is read address and be zeroed out behaviour
Make；
S404: parameter configuration module, starts to start to read joining of storage PROM from first data of PROM storage inside
Put parameter；
S405: after reading the data of PROM, carries out the data decimation operation of one-out-three, if in three data, any two
The data read are identical, then select these data as the data of this use；Otherwise, then assert that this time is read data and mistake occurred,
Re-start the operation in above-mentioned steps S405, restart to read data；
S406: the data after reading are carried out module id identification according to the Module Division of System on Chip/SoC；
S407: after the identification marking of certain module being detected, starts the data after identification marking are carried out data framing, by framing
After data store as depositor；
S408: after completing the framing of all module parameters, release configuration completes signal, starts normally to work as System on Chip/SoC
Enable signal.
As a further improvement on the present invention: carry out the idiographic flow that parameter detecting reconfigures as follows:
The assay intervals time of S1001: setup parameter, according to the assay intervals time, open primary parameter at set intervals and run
Correctness detects；Wherein the assay intervals time is the configuration parameter of parametric test module, according to demand and chip operation clock design
Enumerator, according to the interval time parameter of configuration, completes time parameter detection at equal intervals；
S1002: after completing initial parameter configuration process, according to the assay intervals time set, the inspection of opening chip configuration parameter
Survey process；
S1003: according in current chip run parameter, chip internal complete each module parameter and verification, calculate and school
Test result；
S1004: read deposit the most each module parameter and check results；
S1005: relatively each functional module chip is internal and check results with deposit in the prom and check results, if result one
Cause, assert that the configuration parameter that this module is run is correct；Otherwise, assert that this module operational factor is wrong, parameter reconfigured,
This module of labelling；
S1006: set and need reconfiguration module flag register as 2n-1, n are the total number of modules of chip, if in step S1005
Detect that the operational factor of module m is wrong, then need reconfiguration module flag register to deduct 2m-1, reconfiguration module mark will be needed
The m-1 position of note depositor is 0；
S1007: the module of labelling is carried out parameter reconfiguration and puts, completed by repeat the above steps S1005, S1006, S1007；
S1008: if reconfiguring, i.e. completes the dynamic restructuring of configuration parameter, it is not necessary to interrupt the normal work of chip.
Compared with prior art, it is an advantage of the current invention that:
1, the method for based on ASIC the highly reliable parameter configuration of the present invention, uses the system configuration mode of ASIC+PROM,
It is able to ensure that the reliable memory of ASIC configuration parameter and reads flexibly.
2, the method for based on ASIC the highly reliable parameter configuration of the present invention, the Design of Reinforcement of configuration parameter, including the mould of parameter
Block division, parameter identification and parameter verification, it can be ensured that the reliability during parameter reading and use.
3, the method for based on ASIC the highly reliable parameter configuration of the present invention, the real-time testing mechanism of configuration parameter is able to ensure that core
Sheet uses the correctness of parameter at run duration.
Accompanying drawing explanation
Fig. 1 is the schematic flow sheet of the present invention.
Fig. 2 is present invention topological structure schematic diagram in application example.
Fig. 3 is the schematic flow sheet that the present invention carries out chip configuration parameter reinforcing in concrete application example.
Fig. 4 is that the present invention is carried out powering on the schematic flow sheet of loading parameters configuration process in concrete application example.
Fig. 5 is that the present invention carries out the schematic flow sheet that parameter detecting reconfigures in concrete application example.
Detailed description of the invention
Below with reference to Figure of description and specific embodiment, the present invention is described in further details.
As it is shown in figure 1, based on ASIC the highly reliable method for parameter configuration of the present invention, step is:
The hardware configuration of S1:ASIC configuration；
S2: reinforce chip configuration parameter, divides according to the function of System on Chip/SoC and carries out redundancy and increase module parameter identification
Mark, for distinguishing the parameter of each module；
S3: be stored in programmable read only memory (the hereinafter referred to as PROM outside System on Chip/SoC by needing configuration parameter
Programmable Read-Only Memory) in；
S4: after System on Chip/SoC powers on, it is determined that after System on Chip/SoC internal clocking working stability, opens parameter configuration module；
S5: by the parameter configuration module within System on Chip/SoC, starts to read the configuration being stored in the outside PROM of System on Chip/SoC
Supplemental characteristic；
S6: System on Chip/SoC inner parameter configuration module, configures data and carries out the reliability selection of data, if choosing reading
Correct parameter, then judge to read data correct；Otherwise, enter step S5 and re-read configuration data；
S7: according to the identification marking of the configuration parameter of each module of parameter identification read, the supplemental characteristic of each module is decomposed
And framing, and by parameter configuration to each functional module；
S8: complete initial configuration, System on Chip/SoC starts properly functioning work according to the parameter of configuration；
S9: start the real-time detection of configuration parameter, if assay shows correctly, judges that current system parameter is working properly；If
Wrong then entrance step S5, configures System on Chip/SoC parameter again, and during configuration, System on Chip/SoC is in normal work all the time
State；
S10: according to the time of setting, repeats step S9 the most afterwards, and detection current system operational factor is the most normal,
If normal, wait and detecting next time；If wrong, can again parameter be configured.
As in figure 2 it is shown, be the topological structure schematic diagram in the configuration of concrete application example chips, by ASIC collocation method
Hardware configuration is made up of with PROM storage chip asic chip.PROM storage configuration data, asic chip is only to PROM
It is read.
As it is shown on figure 3, in concrete application example, the idiographic flow carrying out chip configuration parameter reinforcing in step s 2 is as follows:
S201: n the functional module divided according to System on Chip/SoC, is divided into configuration parameter n part, and sets for each module
Fixed unique module parameter identification marking；
S202: functional module m, completes certain specific function, needs configuration parameter i, then this i configuration parameter is function
The module parameter of module m, and given unique module parameter identification marking 2 before this module parametern-i, identification marking presses byte
Polishing；
S203: all supplemental characteristics are done unification according to the bit wide format of PROM and is split as one data mode of a byte；
S204: each functional module parameter is carried out by byte and verifies；Check results is left in each module ginseng as one of parameter
In number；
S205: parameter after fractionation is done triplication redundancy design, i.e. each byte data is copied into 3 parts；
S206: design parameter configuration files based on PROM form；
S207: the data file of generation is loaded in PROM.
As shown in Figure 4, in concrete application example, the idiographic flow of the loading parameters configuration process that carries out in step s 4 powering on is such as
Under:
S401: System on Chip/SoC power up, there is the transition period before of short duration steady operation in the internal clocking of System on Chip/SoC；
S402: according to the design of chip internal, it is determined that whether the internal clocking of System on Chip/SoC is stable, it is determined that start ginseng after Wen Ding
Number configuration module；
S403: according to the mode of operation of PROM, by control signal, the internal data of PROM is read address and be zeroed out behaviour
Make；
S404: parameter configuration module, starts to start to read joining of storage PROM from first data of PROM storage inside
Put parameter.
S405: after reading the data of PROM, carries out the data decimation operation of one-out-three, if in three data, any two
The data read are identical, then select these data as the data of this use；Otherwise, then assert that this time is read data and mistake occurred,
The operation in above-mentioned steps S405 need to be re-started, restart to read data；
S406: the data after reading are carried out module id identification according to the Module Division of System on Chip/SoC；
S407: after the identification marking of certain module being detected, starts the data after identification marking are carried out data framing, by framing
After data store as depositor；
S408: after completing the framing of all module parameters, release configuration completes signal, starts normally to work as System on Chip/SoC
Enable signal.
As it is shown in figure 5, in concrete application example, above-mentioned steps carries out the idiographic flow that parameter detecting reconfigures as follows:
The assay intervals time of S1001: setup parameter, according to the assay intervals time, open primary parameter at set intervals and run
Correctness detects；Wherein the assay intervals time is the configuration parameter of parametric test module, according to demand and chip operation clock design
Enumerator, according to the interval time parameter of configuration, completes time parameter detection at equal intervals；
S1002: after completing initial parameter configuration process, according to the assay intervals time set, the inspection of opening chip configuration parameter
Survey process；
S1003: according in current chip run parameter, chip internal complete each module parameter and verification, calculate and school
Test result；
S1004: read deposit the most each module parameter and check results；
S1005: relatively each functional module chip is internal and check results with deposit in the prom and check results, if result one
Cause, assert that the configuration parameter that this module is run is correct；Otherwise, assert that this module operational factor is wrong, need parameter carries out weight
Configuration, this module of labelling；
S1006: set and need reconfiguration module flag register as 2n-1, n are the total number of modules of chip, if in step S1005
Detect that the operational factor of module m is wrong, then need reconfiguration module flag register to deduct 2m-1, reconfiguration module mark will be needed
The m-1 position of note depositor is 0；
S1007: the module of labelling is carried out parameter reconfiguration and puts, completed by repeat the above steps S1005, S1006, S1007；
S1008: if reconfiguring, i.e. completes the dynamic restructuring of configuration parameter, it is not necessary to interrupt the normal work of chip.
Below being only the preferred embodiment of the present invention, protection scope of the present invention is not limited merely to above-described embodiment, all belongs to
Technical scheme under thinking of the present invention belongs to protection scope of the present invention.It should be pointed out that, the ordinary skill for the art
For personnel, some improvements and modifications without departing from the principles of the present invention, should be regarded as protection scope of the present invention.
Claims (4)
1. a highly reliable method for parameter configuration based on ASIC, it is characterised in that step is:
S1: configure hardware configuration by ASIC method；
S2: reinforce chip configuration parameter, divides according to the function of System on Chip/SoC and carries out redundancy and increase module parameter identification marking, for distinguishing the parameter of each module；
S3: be stored in needing configuration parameter in programmable read only memory PROM outside System on Chip/SoC；
S4: after System on Chip/SoC powers on, it is determined that after System on Chip/SoC internal clocking working stability, opens parameter configuration module；
S5: by the parameter configuration module within System on Chip/SoC, starts to read the configuration parameter data being stored in the outside PROM of System on Chip/SoC；
S6: System on Chip/SoC inner parameter configuration module, configures data and carries out the reliability selection of data reading, if choosing correct parameter, then judges to read data correct；Otherwise, enter step S5 and re-read configuration data；
S7: according to the identification marking of the configuration parameter of each module of parameter identification read, the supplemental characteristic of each module is decomposed and framing, and by parameter configuration to each functional module；
S8: complete initial configuration, System on Chip/SoC starts properly functioning work according to the parameter of configuration；
S9: start the real-time detection of configuration parameter, if assay shows correctly, judges that current system parameter is working properly；If wrong, entering step S5, again configure System on Chip/SoC parameter, during configuration, System on Chip/SoC is in normal operating conditions all the time；
S10: according to the time of setting, repeats step S9 the most afterwards, and detection current system operational factor is the most normal, if normal, wait and detecting next time；If wrong, again parameter is configured；
The idiographic flow carrying out chip configuration parameter reinforcing in described step S2 is:
S201: n the functional module divided according to System on Chip/SoC, is divided into configuration parameter n part, and is each module settings unique module parameter identification marking；
S202: functional module m, completes certain specific function, needs configuration parameter i, then this i configuration parameter is the module parameter of functional module m, and given unique module parameter identification marking 2 before this module parametern-i, identification marking presses byte polishing；
S203: all supplemental characteristics are done unification according to the bit wide format of PROM and is split as one data mode of a byte；
S204: each functional module parameter is carried out by byte and verifies；Check results is left in each module parameter as one of parameter；
S205: parameter after fractionation is done triplication redundancy design, i.e. each byte data is copied into 3 parts；
S206: design parameter configuration files based on PROM form；
S207: the data file of generation is loaded in PROM.
Highly reliable method for parameter configuration based on ASIC the most according to claim 1, it is characterized in that, in described step S1, the hardware configuration configured by ASIC method includes asic chip and PROM storage chip, described PROM storage chip is used for storing configuration data, and PROM storage chip is only read by described asic chip.
Highly reliable method for parameter configuration based on ASIC the most according to claim 1, it is characterised in that the idiographic flow of the loading parameters configuration process that carries out powering in described step S4 is as follows:
S401: System on Chip/SoC power up, there is the transition period before of short duration steady operation in the internal clocking of System on Chip/SoC；
S402: according to the design of chip internal, it is determined that whether the internal clocking of System on Chip/SoC is stable, it is determined that start-up parameter configuration module after stable；
S403: according to the mode of operation of PROM, by control signal, the internal data of PROM is read address and be zeroed out operation；
S404: parameter configuration module, starts first data from PROM storage inside and starts to read the configuration parameter of storage PROM；
S405: after reading the data of PROM, carries out the data decimation operation of one-out-three, if in three data, the data that any two reads are identical, then selects these data as the data of this use；Otherwise, then assert that this time is read data and mistake occurred, re-start the operation in above-mentioned steps S405, restart to read data；
S406: the data after reading are carried out module id identification according to the Module Division of System on Chip/SoC；
S407: after the identification marking of certain module being detected, starts the data after identification marking are carried out data framing, the data after framing is stored as depositor；
S408: after completing the framing of all module parameters, release configuration completes signal, starts the enable signal normally worked as System on Chip/SoC.
Highly reliable method for parameter configuration based on ASIC the most according to claim 1, it is characterised in that carry out the idiographic flow that parameter detecting reconfigures as follows:
The assay intervals time of S1001: setup parameter, according to the assay intervals time, open primary parameter at set intervals and run correctness detection；Wherein the assay intervals time is the configuration parameter of parametric test module, according to demand and chip operation clock design enumerator, according to configuration interval time parameter, complete at equal intervals time parameter detection；
S1002: after completing initial parameter configuration process, according to the assay intervals time set, the detection process of opening chip configuration parameter；
S1003: according in current chip run parameter, chip internal complete each module parameter and verification, calculate and check results；
S1004: read deposit the most each module parameter and check results；
S1005: relatively each functional module chip is internal and check results with deposit in the prom and check results, if result is consistent, assert that the configuration parameter that this module is run is correct；Otherwise, assert that this module operational factor is wrong, parameter is reconfigured, this module of labelling；
S1006: set and need reconfiguration module flag register as 2n-1, n are the total number of modules of chip, if detecting in step S1005, the operational factor of module m is wrong, then need reconfiguration module flag register to deduct 2m-1, the m-1 position that will need reconfiguration module flag register is 0；
S1007: the module of labelling is carried out parameter reconfiguration and puts, completed by repeat the above steps S1005, S1006, S1007；
S1008: if reconfiguring, i.e. completes the dynamic restructuring of configuration parameter, it is not necessary to interrupt the normal work of chip.
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