CN105183062B - Adaptive voltage scaling system based on on-line monitoring and monitoring path screening technique - Google Patents

Abstract

The invention discloses a kind of adaptive voltage scaling system based on on-line monitoring towards wide-voltage range work and monitoring path screening technique, reduce time sequence allowance by the operating timing condition of on-line monitoring integrated circuit, carry out the regulation of voltage and frequency to reduce power consumption with this.The invention also discloses a kind of monitoring path screening technique, the method combined by " dynamic timing analysis+static timing analysis under random input stimuli ", find out the set in the most critical path being activated under a large amount of stochastic inputs vectors, thus greatly reduce the critical path quantity needing monitoring.

Description

Adaptive voltage scaling system based on on-line monitoring and monitoring path screening technique

Technical field

The present invention relates to IC design Low-power Technology field, be based especially on the self adaptation electricity of online sequential monitoring Voltage-frequency rate regulation technology field.

Background technology

In recent years, Width funtion (Wide voltage range) integrated circuit gets the attention, and it generally contains closely/ Sub-threshold region, to conventional voltage district, can be powered voltage-regulation in wide-voltage range, in order to bears meeting chip difference High-performance under Zaiing or high energy efficiency demand.Due to the existence of PVT (Process, Voltage, Temperature) deviation, integrated Circuit design needs reserved certain time sequence allowance to meet the temporal constraint under worst case, cause performance and power consumption wave Take.On sheet, sequential monitoring technology is by assigning sequential monitoring means on sheet in circuit, PVT deviation is converted for circuit impact Become the change of critical path time delay in circuit, enter according to the monitoring information of monitoring means such that it is able to combine certain control circuit Row voltage and the regulation of frequency.The make mistakes type of correcting mistakes and time series forecasting type two class can be divided into.Timing error forecasting type monitoring means Having advantage owing to need not system-level Restoration Mechanism, its Typical Representative is Canary Flip-flop and HEPP circuit.

In order to ensure that digital circuit normally works, it is necessary to assure all of critical path just works in single clock cycle Really.Path delay can pass through static timing analysis (Static Timing Analysis, STA) and obtain, if but all being supervised Survey and then realize cost prohibitive, a part of critical path that generally monitoring time delay is longer, but specifically take how many critical paths as prison Measuring point is simple setting, not yet has rigorous theory analysis.This method is excessively simple, often leads to the critical path of monitoring Too much so that realize cost and improve, and attract the extra power consumption of monitoring means itself, therefore cannot give full play to low-power consumption excellent Gesture.

This problem is more serious under nearly threshold voltage, and when voltage declines, the mean μ of not only time delay all becomes multiplication with variance б Adding, 3 б/μ value also dramatically increases, and this makes the fluctuation of critical path time delay more seriously, due to its unpredictability, in order to not make One-tenth is failed to judge, it usually needs monitor more path.The front 70% the longest critical path of such as near threshold value HEPP circuit monitoring Footpath, 10%～30% conventional much larger than atmospheric area, cause area, power consumption cost to be multiplied.

Summary of the invention

Goal of the invention: for the problem of the adaptive voltage scaling system existence of above-mentioned Width funtion circuit, the mesh of the present invention Be to provide a kind of Width funtion adaptive voltage scaling system monitored based on online sequential and critical path screening technique, pass through The timing condition regulation voltage of on-line monitoring circuit and frequency, to reduce power consumption.

For achieving the above object, the present invention adopts the following technical scheme that

A kind of Width funtion adaptive voltage scaling system monitored based on online sequential, including monitored main circuit, monitoring Unit, monitoring path, electric voltage frequency adjustment module and power module, wherein monitoring means is positioned at the end in monitoring path, is used for The monitoring PVT deviation impact on sequential in real time, and the early warning signal that makes mistake is given when circuit sequence anxiety will be made mistakes；Monitoring road Footpath is the set of paths that in monitored main circuit, sequential is the most key；Electric voltage frequency adjustment module is according to the real-time prison of monitoring means Survey result, control power module respectively and regulate the operating voltage of monitored main circuit, and control the phaselocked loop monitored master of regulation The operating frequency of circuit, it is characterised in that described monitoring path is big by the many groups of time delays being activated under a large amount of stochastic inputs vectors Critical path set merging in correspondence group screening threshold value produces, and described corresponding group screening threshold value refers to obtain under certain PVT environment To all paths relating to end trigger time delay envelope in minimum of a value.

A kind of Width funtion adaptive voltage scaling method monitored based on online sequential, comprises the steps:

(1) select to need to carry out the critical path set of sequential monitoring in all paths of monitored main circuit；

(2) in described critical path set, the trigger of each path ends is replaced respectively with monitoring means；

(3) each monitoring means monitors the impact on sequential of the PVT deviation in real time, and when circuit sequence anxiety will be made mistakes to Make mistake early warning signal；

(4) the real-time monitoring result according to monitoring means carries out the regulation of voltage and frequency,

It is characterized in that described monitoring path is more than correspondence by the many groups of time delays being activated under a large amount of stochastic inputs vectors The critical path set of group screening threshold value merges generation, and described corresponding group screening threshold value refers to that obtain under certain PVT environment relates to And the minimum of a value in the time delay envelope in all paths of end trigger.

Native system adds online sequential monitoring means in monitored circuit in the design phase and carrys out real-time monitoring PVT deviation Impact on sequential, when PVT deviation causes the most greatly circuit sequence nervous and makes mistakes, reduces operating frequency or improves work electricity Pressure；Accordingly, operating frequency can be improved when sequential is loose or reduce voltage, therefore, it is possible to effectively reduce traditional integrated circuit Time sequence allowance reserved in design, thus reduce circuit power consumption or improve circuit performance.

Owing to when working towards wide-voltage range, PVT deviation is serious, it is possible to become the number of path of critical path Amount is greatly increased, and needs the number of paths of monitoring to become a lot, adds additional circuit area and power dissipation overhead.The present invention's is another One purpose is to provide a kind of monitoring path screening technique, can effectively reduce the number of paths needing monitoring under Width funtion.This The bright path delay statistical analysis technique using consideration activity ratio instructs choosing of critical path monitoring point, i.e. by " random Dynamic timing analysis+STA static path under input stimulus is analyzed " method that combines, find out at a large amount of stochastic inputs vector Under the set in most critical path that is activated, thus draw the system of selection of optimized monitoring point.Monitoring path screening technique bag Include following steps:

1) under a kind of PVT environment, monitored main circuit is carried out static timing analysis, obtain and relate to end trigger Set of paths；

2) monitored main circuit is carried out dynamic timing analysis, obtain under a large amount of arbitrary excitation all in above-mentioned set of paths The envelope diagram of path delay；

3) obtaining the minimum of a value in above-mentioned envelope, as screening threshold value, the time delay filtering out the path that is activated with this is more than The critical path set of one group of needs monitoring of above-mentioned screening threshold value；

4) repeat the above steps 1 under multiple PVT environment)-3), obtain organizing the critical path set needing monitoring more；

5) the critical path set of above-mentioned many groups is merged, finally needed the critical path set of monitoring.

Beneficial effect: the adaptive voltage scaling system of the present invention can monitor the impact on sequential of the PVT deviation in real time, with this Regulate circuit voltage, voltage can be reduced when sequential is loose, therefore, it is possible to effectively reduce circuit power consumption.Native system can To work in the wide-voltage range including nearly threshold value, and the PVT deviation effects under Width funtion causes the most greatly becoming Path number for critical path is greatly increased, the monitoring routing resource of the present invention can effectively reduce need under Width funtion by The quantity in monitoring path, thus reduces area cost and power consumption cost that adaptive voltage scaling brings.

Accompanying drawing explanation

Fig. 1 is adaptive voltage scaling system block diagram based on on-line monitoring；

Fig. 2 is the on-line monitoring element circuit figure of timing error of the present invention prediction；

Fig. 3 is monitoring path screening technique fundamental diagram (step 1～3)；

The all paths of Fig. 4 are at SS process corner, 1.1V, time delay envelope diagram at 125 DEG C；

Fig. 5 STA analyzes the path after the path profile figure obtained and screening；

The dynamic analysis path of Fig. 6 static state STA+ screens the critical path quantity obtained；

Adaptive voltage frequency regulation overall process under the 1.1V of Fig. 7 above-threshold region；

Adaptive voltage frequency adjustment procedure under the 0.6V of Fig. 8 nearly threshold zone；

Detailed description of the invention

Below in conjunction with the accompanying drawings and specific embodiment, it is further elucidated with the present invention, it should be understood that these embodiments are merely to illustrate The present invention rather than restriction the scope of the present invention.

As it is shown in figure 1, be adaptive voltage scaling system block diagram based on on-line monitoring, including monitored main circuit, prison Survey unit, monitoring path, electric voltage frequency adjustment module and power module.The need after screening at monitored main circuit are monitored Critical path end inserts monitoring means, is used for the monitoring PVT deviation impact on sequential in real time, when PVT deviation causes the most greatly electricity When road sequential anxiety will be made mistakes, monitoring means gives the early warning signal that makes mistake, and flows to the adaptive voltage frequency regulation in chip Module regulates operating voltage and the frequency of chip.Wherein monitoring means is positioned at the end in monitoring path, during for prediction circuit Sequence is the most nervous, gives the early warning signal that makes mistake when sequential anxiety will be made mistakes；Monitoring path is sequential in monitored main circuit The most key set of paths, the trigger of its end is replaced by monitoring means；The output of all monitoring means is through XOR After be input to electric voltage frequency adjustment module, the result monitored in real time according to monitoring means control respectively power module with regulation supervised Survey the operating voltage of main circuit, and control phaselocked loop to regulate operating frequency.Monitoring means herein can be forecasting type or Person makes mistakes-corrects mistakes type, in the present invention as a example by forecasting type, whole structure is described.

As in figure 2 it is shown, the on-line monitoring element circuit figure predicted for timing error of the present invention.By prolonging that a time delay can be joined Shi Danyuan and an XOR gate and some transistors are constituted.Wherein, IN is the data input pin of monitoring means, and IN_delay is Data input after can joining delay unit, XOR represents the output of XOR gate, and Error_pre is the mistake of monitoring means output Early warning signal by mistake.When input IN upset too late time, Error_pre exports high level.

The Width funtion adaptive voltage scaling system monitored based on online sequential of the present invention needs at conventional digital circuit On the basis of increase some steps, its method for designing comprises the steps:

(1) main circuit design: main circuit is completed Front-end Design and rear end layout design；

(2) monitoring means design: design can monitor the monitoring means that sequential is the most nervous, and needed for draw standard unit Storehouse information；

(3) monitoring Path selection: select to need the critical path collection carrying out sequential monitoring in all paths of main circuit Close；

(4) in main circuit, monitoring means is inserted: in the critical path set determined in previous step, pass through engineering change Monitoring means is replaced the trigger of each path ends by order (Engineering Change Order, ECO).

(5) design voltage frequency adjustment module, carries out the tune of voltage and frequency accordingly when there is mistake early warning signal Joint, in order to reduce power consumption on the premise of ensureing normal circuit operation.

As it is shown on figure 3, the step 1～3 monitoring path screening technique fundamental diagram for the present invention, comprise the steps:

1) under a kind of PVT environment, monitored main circuit is carried out static timing analysis, obtain and relate to end trigger Set of paths；

2) monitored main circuit is carried out dynamic timing analysis, obtain under a large amount of arbitrary excitation all in above-mentioned set of paths The envelope diagram of path delay；

3) obtaining the minimum of a value in above-mentioned envelope, as screening threshold value, the time delay filtering out the path that is activated with this is more than The critical path set of one group of needs monitoring of above-mentioned screening threshold value；

4) under multiple PVT environment, (three kinds and more than three kinds) repeat above-mentioned 1)～3) step, obtain many groups of needs monitorings Critical path set.Finally, the critical path set of above-mentioned many groups is merged, is finally needed the critical path of monitoring Set.

Present system and method towards carry out in nearly threshold zone to the wide-voltage range of above-threshold region sequential monitoring and Voltage-regulation, reduces frequency to ensure no longer to occur that new sequential is wrong in next cycle immediately when there is mistake early warning signal By mistake, send when the first setting value M (be embodied as desirable M >=1) individual mistake early warning signal occurs continuously voltage raise signal to Power module makes supply voltage improve a step-length, and frequency brings up to after supply voltage is stable former operating frequency.In frequency Second setting value N after stable (be embodied as desirable N >=3) individual period long does not has during wrong early warning signal to send voltage drop Low signal makes supply voltage improve a step-length to power module.

Monitoring path screening technique specifically includes following steps:

Step one: carry out static timing analysis under a kind of PVT environment, obtains the set of paths relating to end trigger:

All path delay values in can being designed by STA, owing to monitoring means will replace critical path end Trigger, first screening leave the critical path relating to end (Endpoint) trigger, are set to gather S1, and add up each and prolong The path number that duration is corresponding, as shown in curve (a) in Fig. 3.

Step 2: dynamic timing analysis seeks the envelope diagram of path delay under a large amount of arbitrary excitation, such as curve (b) institute in Fig. 3 Show:

The purpose of dynamic timing analysis is for paths each clock in actual moving process every in measuring assembly S1 The time delay changing value in cycle, to investigate the activity ratio in path.This is a large amount of random sharp by running input under exemplary operation scene Encourage what lower emulation obtained.By the actual time delay change curve in all paths in set S1 comprehensively in a figure, and extract on it EnvelopeWherein dij represents the time delay in the jth clock cycle of i-th paths, obtains time delay change curve envelope diagram.

Assume there is N paths, the dynamic delay figure of this N paths is overlapped in a figure, just obtain the dynamic of N paths The envelope diagram produced after state time delay is overlapping, as shown in curve (c) in Fig. 3, represents time delay in N paths under each clock cycle The dynamic delay value in maximum path, the path that in i.e. corresponding circuit, each moment sequential is the most key.Due to on-line monitoring Needs guarantee monitor the path of most critical (dynamic delay is the longest) in the design of each moment and ensure that it occurs without sequential In violation of rules and regulations, just can be navigated to need the critical path set of monitoring by this dynamic delay envelope.

Step 3: the path that screening is activated:

Path delay maximum obtained in the previous step broadly falls into the longest path being activated, and obtains further in its envelope Minimum of a value:

${\mathrm{Paths}}_{opt}=\underset{\∀j}{\min }\left\{\underset{\∀j}{\max }\right\{dij\left\}\right\}$

As threshold value, monitoring time delay more than all paths of this threshold value, then can ensure to be activated under a large amount of excitations Long path can be monitored to.Concrete grammar is that the path in set S1 is divided into two groups, wherein more than one group of path of this value Set S2 is us needs the set of those critical paths of monitoring, the road on the threshold point right side as shown in curve (d) in Fig. 3 Footpath is gathered.

As shown in Figure 4, the monitored main circuit used by specific embodiment of the invention citing emulates under 40nm technique Result, it is shown that all paths time delay envelope diagram under a PVT environment (SS process corner, 1.1V, 125 DEG C), can obtain threshold Value pointFor 2.28ns.

As it is shown in figure 5, analyze, for present invention STA under a PVT environment (SS process corner, 1.1V, 125 DEG C), the road obtained Footpath distribution map.After screening, path selection time delay, more than the set of paths of threshold point (being 2.28ns) herein, is under this PVT Need the critical path set of monitoring.

As shown in Figure 6, the critical path quantity under each PVT obtained after screening for path of the present invention, its high voltage appearance It is respectively arranged with three kinds of PVT environment under 1.1V and low-voltage 0.6V, is BC (best-case), TT (typical case) and WC (the worst feelings respectively Condition), BC represents ceiling voltage (ceiling voltage allowed under this voltage range, generally high by 10% than normal voltage), FF process corner And minimum temperature, TT represents normal voltage, TT process corner and 25 DEG C, and WC represents minimum pressing and (allows under this voltage range Low-voltage, generally forces down 10% than standard electric), SS process corner and maximum temperature.In figure, display has the road that end trigger is total Footpath quantity is 1917, the critical path quantity (708) after merging, accounts for the 36.9% of total path, compares nearly threshold voltage The 70% monitoring number of paths that HEPP circuit uses, greatly reduces, after this method screening, the critical path quantity that need to monitor.

As it is shown in fig. 7, be adaptive voltage frequency regulation overall process under above-threshold region 1.1V of the present invention, system is from initial electricity Pressure is stepped down near 0.84V sequential early warning information occur, then begins to stable, completes adaptive voltage scaling process, Reduce operating voltage.

It is illustrated in figure 8 adaptive voltage frequency adjustment procedure under nearly threshold value 0.6V.In order to verify native system at low electricity The pressure rejection ability to PVT deviation, the 50mV big ups and downs Δ Vout that superposition one is instantaneous the most on the supply voltage.This Place's initial voltage is 0.6V, and frequency is the tune under mains fluctuations occur after 20MHz, Fig. 8 emphatically show initial adjustment Joint process, as a example by TT process corner, 25 DEG C of situations, owing to the introducing of Δ Vout causes PVT environment moment to deteriorate, occurs continuously Pre_Error signal, after 3 times are raised voltage, the regulation of adaptive adjustment module makes system recover, stable at minimum electricity Near pressure point 0.46V.

Embodiment

The Width funtion adaptive voltage scaling system monitored based on online sequential and one of monitoring path screening technique It is embodied as in case, this method is applied in the on-chip system chip of Cortex-M3 kernel, mainly include hanging over AHB Cortex-M3 kernel, ESRAM in bus and hang over AES (the Advanced Encryption in APB bus Standard) module.Chip is designed with 40nm CMOS technology, first design monitoring unit complete it and build storehouse process；So The front-end and back-end domain of the monitored main circuit of rear design；Then it is monitored a screening, obtains needing the total number of paths of monitoring Amount is 708, needs the position inserting monitoring means to be the end of these critical paths；Finally by engineering change order Monitoring means is added in domain by (Engineering Change Order, ECO), completes the design of circuit system of entirety. Under chip conventional voltage, sign-off frequency is 250MHz, and under low-voltage, sign-off frequency is 20Mhz.Chip transistor sum Being 38.4 ten thousand, wherein adaptive voltage frequency regulation interlock circuit has 2.6 ten thousand transistors, accounts for the 4.7% of the gross area.

Respectively system is emulated in conventional voltage above-threshold region and nearly threshold zone, measure its self adaptation dynamic electric voltage and adjust The function of joint and power consumption save effect, and as shown in Figure 7, Figure 8, Vout represents the output voltage of power module DC-DC, Clk_slow Signal represents the clock frequency after fast frequency hopping, and Pre_error takes by early warning signal wrong in chip or afterwards total wrong Early warning signal by mistake, Slow signal is that frequency stretching enables signal, represents that chip needs frequency reducing immediately to work；Volt_Done signal Represent that voltage-regulation completes signal, be the feedback signal of DC-DC module；Volt_ctrl [0] and Volt_ctrl [1] is defeated respectively Go out to DC-DC module controls the control signal that voltage rises and voltage declines.It is illustrated in figure 7 the system emulation of above-threshold region As a result, the operating frequency of main circuit maintains constant 250MHz, and initial operating voltage is 1.1V, and now the sequential of circuit is relatively wide Pine, so control module persistently exports reduction voltage signal, volt_ctrl persistently keeps 2 ' b01.Voltage is down to during 0.84V open Begin that mistake early warning signal, the of short duration high jump of slow signal simultaneously occur, control Clk_slow two divided-frequency to avoid real sequential wrong By mistake.When there is the wrong early warning signal in continuous 3 cycles, volt_ctrl becomes 2 ' 10 control power supply chips and raises voltage.Due to The existence of voltage pulsation, last operating voltage fuctuation within a narrow range between 0.84V and 0.86V.

Compare TT process corner, 25 DEG C, 1.1V unused adaptive voltage scaling time circuit power consumption (11.17mW), native system Under superthreshold voltage, under each PVT environment, there are the power consumption income of 28.5%-54.3%, wherein (FF technique under best-case Angle ,-25 DEG C) income is 54.3%, under worst case, (SS process corner, 125 DEG C) income is 28.5%.

System emulation result under nearly threshold value low-voltage is as shown in Figure 8, inclined to PVT under low-voltage in order to verify this paper system The rejection ability of difference, the big ups and downs Δ Vout of one instantaneous 50mV of superposition the most on the supply voltage.Initial electricity herein Pressure is 0.6V, and frequency is 20MHz, as a example by TT process corner, 25 DEG C of situations, owing to the introducing of Δ Vout causes PVT environment moment Deteriorating, continuous P re_Error signal occur, after 3 times are raised voltage, the regulation of adaptive adjustment module makes system extensive Multiple, stable near minimum voltage point 0.46V.

Compare TT process corner, 25 DEG C, 0.6V unused adaptive voltage scaling time circuit power consumption (0.406mW), native system Under nearly threshold voltage, under each PVT environment, there is the power consumption income of 4.0%-73.2%, even if in worst condition (SS technique Angle ,-25 DEG C) under still have a power consumption income through adaptive voltage scaling, and best-case i.e. FF process corner, 125 DEG C time power consumption receive Benefit up to 73.2%.

Result above shows that the present invention can significantly reduce the number of paths needing monitoring, and uses adaptive voltage to adjust Joint significantly reduces power consumption.

Claims (4)

1. the Width funtion adaptive voltage scaling system monitored based on online sequential, including monitored main circuit, monitoring list Unit, monitoring path, electric voltage frequency adjustment module and power module, wherein monitoring means is positioned at the end in monitoring path, is used for real Time the monitoring PVT deviation impact on sequential, and made mistake early warning signal when circuit sequence anxiety will be made mistakes；Monitoring path It it is the set of paths that in monitored main circuit, sequential is the most key；Electric voltage frequency adjustment module is according to the real-time monitoring of monitoring means As a result, control power module respectively and regulate the operating voltage of monitored main circuit, and control the phaselocked loop monitored main electricity of regulation The operating frequency on road, it is characterised in that described monitoring path is more than by the many groups of time delays being activated under a large amount of stochastic inputs vectors The critical path set of corresponding group screening threshold value merges generation, and described corresponding group screening threshold value refers to obtain under corresponding PVT environment The all paths relating to end trigger time delay envelope in minimum of a value.

2. the Width funtion adaptive voltage scaling method monitored based on online sequential, comprises the steps:

(1) select to need to carry out the critical path set of sequential monitoring in all paths of monitored main circuit；

(2) in described critical path set, the trigger of each path ends is replaced respectively with monitoring means；

(3) each monitoring means monitors the impact on sequential of the PVT deviation in real time, and is made mistakes when circuit sequence anxiety will be made mistakes Early warning signal by mistake；

(4) the real-time monitoring result according to monitoring means carries out the regulation of voltage and frequency,

It is characterized in that described critical path set is more than correspondence by the many groups of time delays being activated under a large amount of stochastic inputs vectors The critical path set of group screening threshold value merges generation, and described corresponding group screening threshold value refers to that obtain under corresponding PVT environment relates to And the minimum of a value in the time delay envelope in all paths of end trigger.

The Width funtion adaptive voltage scaling method monitored based on online sequential the most according to claim 2, its feature exists In, reduce frequency immediately when mistake early warning signal occurs, with guarantee, new timing error no longer occurs, occur first continuously During setting value mistake early warning signal, supply voltage is improved a step-length, after supply voltage is stable, frequency is brought up to former work Working frequency, after frequency stable, being reduced by supply voltage during wrong early warning signal does not occur in the second setting value period long One step-length.

4. a monitoring path screening technique, it is characterised in that comprise the steps:

1) under a kind of PVT environment, monitored main circuit is carried out static timing analysis, obtain the path relating to end trigger Set；

2) monitored main circuit is carried out dynamic timing analysis, obtain under a large amount of arbitrary excitation all paths in above-mentioned set of paths The envelope diagram of time delay；

3) obtain the minimum of a value in envelope, as screening threshold value, filter out the time delay in the path that is activated with this more than above-mentioned screening The critical path set of one group of needs monitoring of threshold value；

4) repeat the above steps 1 under multiple PVT environment)-3), obtain organizing the critical path set needing monitoring more；

5) the critical path set of above-mentioned many groups is merged, finally needed the critical path set of monitoring.