CN105183062A - Adaptive voltage adjusting system based on online monitoring and monitoring path screening method - Google Patents

Abstract

The invention discloses an adaptive voltage adjusting system based on online monitoring and a monitoring path screening method in a wide voltage working scope; the adaptive voltage adjusting system can online monitor sequential conditions in integrated circuit operation so as to reduce sequential margin, thus adjusting voltage and frequency, and reducing power consumption. The invention also discloses the monitoring path screening method combining dynamic sequential analysis with static state sequential analysis under random input excitation, so activated most critical path collection under mass random input vectors can be spotted, thus greatly reducing quantity of critical paths needing monitoring.

Description

Based on adaptive voltage scaling system and the monitoring path screening technique of on-line monitoring

Technical field

The present invention relates to integrated circuit (IC) design Low-power Technology field, especially based on the adaptive voltage frequency adjustment technical field that online sequential is monitored.

Background technology

In recent years, Width funtion (Widevoltagerange) integrated circuit gets the attention, it contains closely/sub-threshold region usually to conventional voltage district, can carry out supply voltage adjustment in wide-voltage range, so that in the high-performance met under chip different loads or high energy efficiency demand.Due to the existence of PVT (Process, Voltage, Temperature) deviation, need reserved certain time sequence allowance to meet the temporal constraint under worst case in integrated circuit (IC) design, cause performance and power wastage.On sheet, sequential monitoring technology is by assigning sequential monitoring means on sheet in circuit, PVT deviation is changed into the change of critical path time delay in circuit for circuit impact, thus the adjustment of voltage and frequency can be carried out in conjunction with certain control circuit according to the monitoring information of monitoring means.The make mistakes type of correcting mistakes and time series forecasting type two class can be divided into.Timing error forecasting type monitoring means has advantage owing to not needing system-level Restoration Mechanism, and its Typical Representative is CanaryFlip-flop and HEPP circuit.

In order to ensure that digital circuit normally works, must ensure that all critical paths work correctly in single clock cycle.Path delay is by static timing analysis (StaticTimingAnalysis, STA) obtain, if but all monitored, realize cost prohibitive, a part of critical path that usual monitoring time delay is longer, but specifically get how many critical paths and be simple setting as monitoring point, not yet have rigorous theoretical analysis.This method is too simple, often causes the critical path of monitoring too much, makes to realize cost and improves, and attract the extra power consumption of monitoring means itself, therefore cannot give full play to low-power consumption advantage.

This problem is more serious under nearly threshold voltage, average μ and the variance б of not only time delay during voltage drop are all multiplied, 3 б/μ values also significantly increase, this makes the fluctuation of critical path time delay more serious, due to its unpredictability, failing to judge to not cause, usually needing to monitor more path.Front the 70% the longest critical path of such as nearly threshold value HEPP circuit monitoring, much larger than atmospheric area is commonly used 10% ~ 30%, causes area, power consumption cost is multiplied.

Summary of the invention

Goal of the invention: for the adaptive voltage scaling system Problems existing of above-mentioned Width funtion circuit, the object of this invention is to provide a kind of Width funtion adaptive voltage scaling system of monitoring based on online sequential and critical path screening technique, by timing condition regulation voltage and the frequency of on-line monitoring circuit, to reduce power consumption.

For achieving the above object, the present invention adopts following technical scheme:

A kind of Width funtion adaptive voltage scaling system of monitoring based on online sequential, comprise monitored main circuit, monitoring means, monitoring path, electric voltage frequency adjustment module and power module, wherein monitoring means is positioned at the end in monitoring path, be used for Real-Time Monitoring PVT deviation to the impact of sequential, and when circuit sequence anxiety is about to make mistakes to the early warning signal that makes mistake; Monitoring path is the set of paths that in monitored main circuit, sequential is the most key; Electric voltage frequency adjustment module is according to the Real-Time Monitoring result of monitoring means, control the operating voltage that power module regulates monitored main circuit respectively, and control the frequency of operation that phaselocked loop regulates monitored main circuit, it is characterized in that the critical path set that described monitoring path is greater than corresponding group screening threshold value by the time delay that many groups are activated under a large amount of stochastic inputs vector merges generation, the minimum value related in the time delay envelope in all paths of end trigger obtained under described correspondence group screening threshold value refers to certain PVT environment.

Based on the Width funtion adaptive voltage scaling method that online sequential is monitored, comprise the steps:

(1) select to need the critical path set carrying out sequential monitoring in all paths of monitored main circuit;

(2) in described critical path set, the trigger of each path ends is replaced respectively with monitoring means;

(3) each monitoring means Real-Time Monitoring PVT deviation is on the impact of sequential, and when circuit sequence anxiety is about to make mistakes to the early warning signal that makes mistake;

(4) adjustment of voltage and frequency is carried out according to the Real-Time Monitoring result of monitoring means,

It is characterized in that the critical path set that described monitoring path is greater than corresponding group screening threshold value by the time delay that many groups are activated under a large amount of stochastic inputs vector merges generation, the minimum value related in the time delay envelope in all paths of end trigger obtained under described correspondence group screening threshold value refers to certain PVT environment.

Native system adds online sequential monitoring means in the design phase and carrys out real-time monitoring PVT deviation to the impact of sequential in monitored circuit, when PVT deviation causes too greatly circuit sequence nervous and makes mistakes, reduces frequency of operation or improves operating voltage; Accordingly, frequency of operation can be improved when sequential is loose or reduce voltage, therefore, it is possible to effectively reduce time sequence allowance reserved in traditional integrated circuit design, thus reduce circuit power consumption or improve circuit performance.

Because PVT deviation is serious when working towards wide-voltage range, the number of paths likely becoming critical path being increased greatly, needing the number of paths of monitoring to become a lot, adding additional circuit area and power dissipation overhead.Another object of the present invention is to provide a kind of monitoring path screening technique, needs the number of paths of monitoring under being effectively reduced in Width funtion.The present invention adopts and considers that the path delay statistical analysis technique of activity ratio is to instruct choosing of critical path monitoring point, namely, by the method that " dynamic timing analysis+STA static path under random input stimuli is analyzed " combines, find out the set in the most critical path be activated under a large amount of stochastic inputs vector, thus draw the system of selection of optimized monitoring point.Monitoring path screening technique comprises the steps:

1) under a kind of PVT environment, static timing analysis is carried out to monitored main circuit, obtain the set of paths relating to end trigger;

2) dynamic timing analysis is carried out to monitored main circuit, the envelope diagram of all path delay in above-mentioned set of paths under obtaining a large amount of arbitrary excitation;

3) obtain the minimum value in above-mentioned envelope, as screening threshold value, the time delay filtering out the path that is activated with this is greater than the critical path set of one group of needs monitoring of above-mentioned screening threshold value;

4) under multiple PVT environment, above-mentioned steps 1 is repeated)-3), obtain the critical path set that many groups need monitoring;

5) set of above-mentioned many group critical paths is merged, obtain the final critical path set needing monitoring.

Beneficial effect: adaptive voltage scaling system energy Real-Time Monitoring PVT deviation of the present invention, on the impact of sequential, is carried out regulating circuit operating voltage with this, can be reduced voltage when sequential is loose, therefore, it is possible to effectively reduce circuit power consumption.Native system can work in the wide-voltage range comprising nearly threshold value, and the PVT deviation effects under Width funtion causes too greatly the path number that may become critical path greatly to increase, monitoring routing resource of the present invention needs the quantity in monitored path under effectively reducing Width funtion, thus reduce area cost and power consumption cost that adaptive voltage scaling brings.

Accompanying drawing explanation

Fig. 1 is the adaptive voltage scaling system chart based on on-line monitoring;

Fig. 2 is the on-line monitoring element circuit figure of timing error of the present invention prediction;

Fig. 3 is monitoring path screening technique fundamental diagram (step 1 ~ 3);

The all paths of Fig. 4 are at SS process corner, 1.1V, time delay envelope diagram at 125 DEG C;

Fig. 5 STA analyzes the path after the path profile figure and screening obtained;

Fig. 6 screens the critical path quantity obtained in static STA+ performance analysis path;

Adaptive voltage frequency adjustment overall process under the 1.1V of Fig. 7 above-threshold region;

Adaptive voltage frequency adjustment procedure under the nearly threshold zone 0.6V of Fig. 8;

Embodiment

Below in conjunction with the drawings and specific embodiments, illustrate the present invention further, these embodiments should be understood and be only not used in for illustration of the present invention and limit the scope of the invention.

As shown in Figure 1, be the adaptive voltage scaling system chart based on on-line monitoring, comprise monitored main circuit, monitoring means, monitoring path, electric voltage frequency adjustment module and power module.Monitoring means is inserted at the critical path end of the monitoring of the need after screening of monitored main circuit, be used for Real-Time Monitoring PVT deviation to the impact of sequential, when PVT deviation causes too greatly circuit sequence anxiety to be about to make mistakes, monitoring means is to the early warning signal that makes mistake, and flows to adaptive voltage frequency adjustment module in chip to regulate operating voltage and the frequency of chip.Wherein monitoring means is positioned at the end in monitoring path, and whether nervous, when sequential anxiety is about to make mistakes to the early warning signal that makes mistake if being used for prediction circuit sequential; Monitoring path is the set of paths that in monitored main circuit, sequential is the most key, and the trigger of its end is replaced by monitoring means; The output of all monitoring means is input to electric voltage frequency adjustment module after XOR, controls power module respectively to regulate the operating voltage of monitored main circuit according to the result of monitoring means Real-Time Monitoring, and controls phaselocked loop to regulate frequency of operation.Monitoring means herein can be forecasting type or type of makeing mistakes-correct mistakes, and for forecasting type in the present invention, whole structure is described.

As shown in Figure 2, be the on-line monitoring element circuit figure of timing error prediction of the present invention.The delay unit can joined by a time delay and an XOR gate and some transistors are formed.Wherein, IN is the data input pin of monitoring means, and IN_delay is the data input after can joining delay unit, and XOR represents the output of XOR gate, and Error_pre is the wrong early warning signal that monitoring means exports.When input IN be turned over late time, Error_pre exports high level.

Width funtion adaptive voltage scaling system of monitoring based on online sequential of the present invention needs to increase some steps on the basis of conventional digital circuit, and its method for designing comprises the steps:

(1) main circuit design: Front-end Design and rear end layout design are completed to main circuit;

(2) monitoring means design: design can monitor the whether nervous monitoring means of sequential, and the library information needed for draw standard unit;

(3) routing is monitored: select to need the critical path set carrying out sequential monitoring in all paths of main circuit;

(4) in main circuit, monitoring means is inserted: in the critical path set determined in previous step, by engineering change order (EngineeringChangeOrder, ECO), monitoring means is replaced the trigger of each path ends.

(5) design voltage frequency adjustment module, carries out the adjustment of voltage and frequency accordingly when there is wrong early warning signal, to ensure the prerequisite decline low-power consumption that circuit normally works.

As shown in Figure 3, be step 1 ~ 3 that the present invention monitors path screening technique fundamental diagram, comprise the steps:

1) under a kind of PVT environment, static timing analysis is carried out to monitored main circuit, obtain the set of paths relating to end trigger;

2) dynamic timing analysis is carried out to monitored main circuit, the envelope diagram of all path delay in above-mentioned set of paths under obtaining a large amount of arbitrary excitation;

3) obtain the minimum value in above-mentioned envelope, as screening threshold value, the time delay filtering out the path that is activated with this is greater than the critical path set of one group of needs monitoring of above-mentioned screening threshold value;

4) under multiple PVT environment, (more than three kinds and three kinds) repeat above-mentioned 1) ~ 3) step, obtain the critical path set that many groups need monitoring.Finally, the set of above-mentioned many group critical paths is merged, obtains the final critical path set needing monitoring.

Present system and method carry out sequential monitoring and voltage-regulation towards from nearly threshold zone in the wide-voltage range of above-threshold region, frequency is reduced to ensure no longer to occur new timing error in next cycle immediately when there is wrong early warning signal, sending voltage raises signal when there is the first setting value M (the desirable M>=1 of concrete enforcement) individual wrong early warning signal continuously makes supply voltage improve a step-length to power module, after supply voltage is stable, frequency is brought up to former frequency of operation.After frequency stabilization, individual period long does not have to send voltage drop signal during wrong early warning signal to the second setting value N (concrete implement desirable N>=3) makes supply voltage improve a step-length to power module.

Monitoring path screening technique specifically comprises the steps:

Step one: carry out static timing analysis under a kind of PVT environment, obtain the set of paths relating to end trigger:

All path delay values in design can be obtained by STA, because monitoring means will replace the trigger of critical path end, first screening leaves the critical path relating to end (Endpoint) trigger, be set to S set 1, and add up path number corresponding to each delay value, as shown in curve (a) in Fig. 3.

Step 2: dynamic timing analysis asks the envelope diagram of path delay under a large amount of arbitrary excitation, as shown in curve (b) in Fig. 3:

The object of dynamic timing analysis is the time delay changing value in order to paths each clock period in actual moving process every in measuring assembly S1, to investigate the activity ratio in path.This obtains by emulating under inputting a large amount of arbitrary excitation under running exemplary operation scene.By the actual time delay change curve in paths all in S set 1 comprehensively in a figure, and extract its coenvelope wherein dij represents the time delay of the i-th paths in a jth clock period, obtains time delay change curve envelope diagram.

Suppose there is N paths, the dynamic delay figure of this N paths is overlapped in a figure, just obtain the envelope diagram of the overlapping rear generation of dynamic delay of N paths, as shown in curve (c) in Fig. 3, represent the dynamic delay value in the path that time delay is maximum in N paths under each clock period, the path that in namely corresponding circuit, each moment sequential is the most key.Need to guarantee to monitor the path of most critical (dynamic delay is the longest) in the design of each moment due to on-line monitoring and ensure that it does not occur that sequential in violation of rules and regulations, just can navigate to the critical path set needing to monitor by this dynamic delay envelope.

Step 3: screen the path be activated:

Path delay maximal value obtained in the previous step all belongs to the longest path be activated, and obtains the minimum value in its envelope further:

${\mathrm{Paths}}_{opt}=\underset{\∀j}{\min }\left\{\underset{\∀j}{\max }\right\{dij\left\}\right\}$

As threshold value, monitoring time delay is greater than all paths of this threshold value, then can ensure that the long path be activated under a large amount of excitation can be monitored to.Concrete grammar is that the path in S set 1 is divided into two groups, and the one group of set of paths S2 being wherein greater than this value is the set that we need those critical paths of monitoring, the set of paths on the threshold point right side as shown in curve (d) in Fig. 3.

As shown in Figure 4, for the specific embodiment of the invention is illustrated monitored main circuit used simulation result under 40nm technique, show the time delay envelope diagram of all paths under a PVT environment (SS process corner, 1.1V, 125 DEG C), can threshold point be obtained for 2.28ns.

As shown in Figure 5, for the present invention STA under a PVT environment (SS process corner, 1.1V, 125 DEG C) analyzes the path profile figure obtained.After screening, path selection time delay is greater than the set of paths of threshold point (herein for 2.28ns), namely needs the critical path set of monitoring under PVT for this reason.

As shown in Figure 6, for the critical path quantity under each PVT of obtaining after the screening of path of the present invention, three kinds of PVT environment are respectively had under its high voltage appearance 1.1V and low-voltage 0.6V, BC (best-case) respectively, TT (typical case) and WC (worst case), BC represents the ceiling voltage (ceiling voltage allowed under this voltage range, usually higher than normal voltage by 10%), FF process corner and minimum temperature, TT represents normal voltage, TT process corner and 25 DEG C, WC represents and minimumly presses (the minimum voltage allowed under this voltage range, usually 10% is forced down than standard electric), SS process corner and maximum temperature.In figure, display has the total number of paths of end trigger is 1917, critical path quantity (708) after merging, account for 36.9% of total path, compare the 70% monitoring number of paths that nearly threshold voltage HEPP circuit adopts, after this method screening, greatly reduce the critical path quantity that need monitor.

As shown in Figure 7, for adaptive voltage frequency adjustment overall process under above-threshold region 1.1V of the present invention, system is progressively reduced near 0.84V from initial voltage and occurs sequential early warning information, starts subsequently to stablize, complete adaptive voltage scaling process, reduce operating voltage.

Be illustrated in figure 8 adaptive voltage frequency adjustment procedure under nearly threshold value 0.6V.In order to verify native system at lower voltages to the rejection ability of PVT deviation, superpose an instantaneous 50mV big ups and downs Δ Vout on the supply voltage artificially.Initial voltage is 0.6V herein, frequency is 20MHz, the adjustment process under mains fluctuations is there is in Fig. 8 after having focused on display initial adjustment, for TT process corner, 25 DEG C of situations, introducing due to Δ Vout causes PVT environment to worsen instantaneously, occurs continuous P re_Error signal, after 3 times are raised voltage, the adjustment of adaptive adjustment module makes System recover, is stabilized near minimum voltage point 0.46V.

Embodiment

In a concrete case study on implementation of the Width funtion adaptive voltage scaling system of monitoring based on online sequential and monitoring path screening technique, this method is applied in the on-chip system chip of Cortex-M3 kernel, AES (the AdvancedEncryptionStandard) module mainly comprising the Cortex-M3 kernel hung on ahb bus, ESRAM and hang in APB bus.Chip design adopts 40nmCMOS technique, first designs monitoring unit and completes it and build storehouse process; Then the front-end and back-end domain of monitored main circuit is designed; Then carry out monitoring point screening, the total number of paths amount obtaining needing monitoring is 708, needs the position of inserting monitoring means to be the end of these critical paths; Finally by engineering change order (EngineeringChangeOrder, ECO), monitoring means is added in domain, complete overall design of circuit system.Under chip conventional voltage, sign-off frequency is 250MHz, and under low-voltage, sign-off frequency is 20Mhz.Chip transistor adds up to 38.4 ten thousand, and wherein adaptive voltage frequency adjustment interlock circuit has 2.6 ten thousand transistors, accounts for 4.7% of the total area.

Respectively system is emulated in conventional voltage above-threshold region and nearly threshold zone, function and the power consumption of measuring its self-adaptation dynamic voltage regulation save effect, as shown in Figure 7, Figure 8, Vout represents the output voltage of power module DC-DC, Clk_slow signal represents the clock frequency after fast frequency hopping, Pre_error gets or total wrong early warning signal afterwards by early warning signal wrong in chip, and Slow signal is frequency stretching enable signal, represents that chip needs frequency reducing work immediately; Volt_Done signal represents voltage-regulation settling signal, is the feedback signal of DC-DC module; Volt_ctrl [0] and Volt_ctrl [1] outputs to the control voltage rising of DC-DC module and the control signal of voltage drop.Be illustrated in figure 7 the system emulation result of above-threshold region, the frequency of operation of main circuit maintains constant 250MHz, and initial operating voltage is 1.1V, and now the sequential of circuit is looser, so control module continues to export reduce voltage signal, volt_ctrl continues maintenance 2 ' b01.Voltage starts when being down to 0.84V to occur wrong early warning signal, simultaneously the of short duration high jump of slow signal, and control Clk_slow two divided-frequency is to avoid real timing error.When there is the wrong early warning signal in continuous 3 cycles, volt_ctrl becomes 2 ' 10 and controls power supply chip rise voltage.Due to the existence of voltage fluctuation, last operating voltage fuctuation within a narrow range between 0.84V and 0.86V.

Compare TT process corner, 25 DEG C, 1.1V adaptive voltage scaling time circuit power consumption (11.17mW), native system is under superthreshold voltage, the power consumption income of 28.5%-54.3% is had under each PVT environment, wherein under best-case (FF process corner ,-25 DEG C) income is 54.3%, and under worst case, (SS process corner, 125 DEG C) income is 28.5%.

System emulation result under nearly threshold value low-voltage as shown in Figure 8, in order to verify that herein system is to the rejection ability of PVT deviation under low-voltage, superposes the big ups and downs Δ Vout of an instantaneous 50mV artificially on the supply voltage.Initial voltage is 0.6V herein, frequency is 20MHz, for TT process corner, 25 DEG C of situations, introducing due to Δ Vout causes PVT environment to worsen instantaneously, there is continuous P re_Error signal, after 3 times are raised voltage, the adjustment of adaptive adjustment module makes System recover, is stabilized near minimum voltage point 0.46V.

Compare TT process corner, 25 DEG C, 0.6V adaptive voltage scaling time circuit power consumption (0.406mW), native system is under nearly threshold voltage, the power consumption income of 4.0%-73.2% is had under each PVT environment, even if still have power consumption income through adaptive voltage scaling under worst condition (SS process corner ,-25 DEG C), and best-case and FF process corner, 125 DEG C time power consumption income up to 73.2%.

Above result shows the present invention significantly can reduce the number of paths needing monitoring, and adopts adaptive voltage scaling significantly to reduce power consumption.

Claims (4)

1. a Width funtion adaptive voltage scaling system of monitoring based on online sequential, comprise monitored main circuit, monitoring means, monitoring path, electric voltage frequency adjustment module and power module, wherein monitoring means is positioned at the end in monitoring path, be used for Real-Time Monitoring PVT deviation to the impact of sequential, and when circuit sequence anxiety is about to make mistakes to the early warning signal that makes mistake; Monitoring path is the set of paths that in monitored main circuit, sequential is the most key; Electric voltage frequency adjustment module is according to the Real-Time Monitoring result of monitoring means, control the operating voltage that power module regulates monitored main circuit respectively, and control the frequency of operation that phaselocked loop regulates monitored main circuit, it is characterized in that the critical path set that described monitoring path is greater than corresponding group screening threshold value by the time delay that many groups are activated under a large amount of stochastic inputs vector merges generation, the minimum value related in the time delay envelope in all paths of end trigger obtained under described correspondence group screening threshold value refers to certain PVT environment.

2., based on the Width funtion adaptive voltage scaling method that online sequential is monitored, comprise the steps:

(1) select to need the critical path set carrying out sequential monitoring in all paths of monitored main circuit;

(2) in described critical path set, the trigger of each path ends is replaced respectively with monitoring means;

(3) each monitoring means Real-Time Monitoring PVT deviation is on the impact of sequential, and when circuit sequence anxiety is about to make mistakes to the early warning signal that makes mistake;

(4) adjustment of voltage and frequency is carried out according to the Real-Time Monitoring result of monitoring means,

It is characterized in that the critical path set that described monitoring path is greater than corresponding group screening threshold value by the time delay that many groups are activated under a large amount of stochastic inputs vector merges generation, the minimum value related in the time delay envelope in all paths of end trigger obtained under described correspondence group screening threshold value refers to certain PVT environment.

3. Width funtion adaptive voltage scaling method of monitoring based on online sequential according to claim 2, it is characterized in that, frequency is reduced immediately to ensure no longer to occur new timing error when there is wrong early warning signal, when continuous appearance the first setting value individual wrong early warning signal, supply voltage is improved a step-length, after supply voltage is stable, frequency is brought up to former frequency of operation, when wrong early warning signal does not appear in the second setting value period long after frequency stabilization, supply voltage is reduced a step-length.

4. monitor a path screening technique, it is characterized in that comprising the steps:

1) under a kind of PVT environment, static timing analysis is carried out to monitored main circuit, obtain the set of paths relating to end trigger;

2) dynamic timing analysis is carried out to monitored main circuit, the envelope diagram of all path delay in above-mentioned set of paths under obtaining a large amount of arbitrary excitation;

3) obtain the minimum value in above-mentioned envelope, as screening threshold value, the time delay filtering out the path that is activated with this is greater than the critical path set of one group of needs monitoring of above-mentioned screening threshold value;

4) under multiple PVT environment, above-mentioned steps 1 is repeated)-3), obtain the critical path set that many groups need monitoring;

5) set of above-mentioned many group critical paths is merged, obtain the final critical path set needing monitoring.