CN105118789B - A kind of low temperature bonding processes of thyristor chip - Google Patents

A kind of low temperature bonding processes of thyristor chip Download PDF

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CN105118789B
CN105118789B CN201510430034.9A CN201510430034A CN105118789B CN 105118789 B CN105118789 B CN 105118789B CN 201510430034 A CN201510430034 A CN 201510430034A CN 105118789 B CN105118789 B CN 105118789B
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deformation
molybdenum sheet
piece
alusil alloy
monocrystalline silicon
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CN105118789A (en
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王大江
王森彪
徐艳艳
李建忠
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Ningbo Silcr Power Semiconductor Co ltd
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Ningbo Silcr Power Semiconductor Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Thyristors (AREA)

Abstract

The invention discloses a kind of low temperature bonding processes of thyristor chip, it first takes monocrystalline silicon piece, alusil alloy piece, molybdenum sheet;Then the deformation that default deformation quantity is produced at the center of molybdenum sheet is made;Then the molybdenum sheet of monocrystalline silicon piece, alusil alloy piece and deformation is sequentially placed into graphite jig, the concave surface face alusil alloy piece of the molybdenum sheet of deformation is required when being put into;Graphite jig is put into high-temperature vacuum furnace again, melts alusil alloy piece, monocrystalline silicon piece is attached to the thyristor chip that intimate plane is formed on molybdenum sheet;Advantage is that aluminium flake is changed to alusil alloy piece, and the fusing point of alusil alloy piece is lower, therefore combination temperature can be reduced to 580~600 DEG C, so as to the deformation of the thyristor chip reduced;Molybdenum sheet center is set to produce the deformation of default deformation quantity in advance, so cancel each other with reference to the thermal expansion deformation that rear molybdenum sheet produces with the deformation suppressed in advance, so that the intimate plane of the thyristor chip finally obtained, silicon chip is pressed down the possibility split when can greatly reduce installation.

Description

A kind of low temperature bonding processes of thyristor chip
Technical field
The present invention relates to a kind of technology of preparing of thyristor chip, more particularly, to a kind of low temperature bond of thyristor chip Method.
Background technology
With commercial power force transformation and control device(Power electronic equipment)Develop towards the direction of super high power, it is desirable to The power conversion capability of the power electronic element of core can be lifted at double the most in power converter and control device, and this certainty It is required that power electronic chip ever-larger diameters, super-large diameter.At present, the maximum gauge of single thyristor chip is up to 3~6 English It is very little.Thyristor chip generally by the silicon chip machined, by metal-to-metal adhesive, under high temperature and high vacuum condition, is adhered to The closest refractory metal of the coefficient of expansion(The Mo wafer of plane)On, provided by Mo wafer for thyristor chip conductive, scattered Heat, structural support and protection etc..
At present, the associated methods of thyristor chip comprise the following steps that:1)As shown in Figure 1, by the silicon chip of high flatness, Aluminium flake, the molybdenum sheet of high-purity as metal-to-metal adhesive, by the order of silicon-aluminium-molybdenum, are sequentially loaded into semienclosed cylindrical shape stone In black mould, that is, open-topped cylindrical shape graphite jig;2)Cylindrical shape graphite jig equipped with silicon chip, aluminium flake, molybdenum sheet is put into In high-temperature vacuum furnace, it is higher than 3 × 10 in vacuum-3Pa, and temperature melts aluminium flake under conditions of 700~800 DEG C, silicon chip It is attached to by aluminium flake on molybdenum sheet, forms thyristor chip, Fig. 2 is to combine obtained thyristor chip.This associated methods are deposited In problems with:1)Since the thermal linear expansion coefficient of monocrystalline silicon is 2.5 × 10-6/ DEG C, the thermal linear expansion coefficient of metal molybdenum is 5.2×10-6/ DEG C, therefore when the temperature of silicon chip and molybdenum sheet is finally cooled to room temperature from 700~800 DEG C when combining, molybdenum sheet is opposite In silicon chip to shrink, silicon chip is expansion relative to molybdenum sheet, can produce deformation between them, as shown in Figure 2;And when high temperature bond When temperature is higher, the diameter of thyristor chip is bigger, deformation is bigger, the deformation at the center of 3~6 inches of thyristor chip Amount is generally at 40~400 μm;2)Using the thyristor chip that this associated methods obtain when installing and using, the installation born Pressure is 10~150KN, and at this pressure, the thyristor chip of deformation is driven plain, but the silicon chip in thyristor chip produces change Shape stress, when deforming larger or long-time service, silicon chip is easy to be broken, and the use that this will seriously affect thyristor chip is reliable Property;3)Semienclosed cylindrical shape graphite jig used in this associated methods has heat safe characteristic, for thyristor The high temperature bond of chip, but due to the poor thermal conductivity of graphite, the thyristor chip and vacuum high-temperature in graphite jig can be made The temperature of the burner hearth of stove produces the temperature difference, so as to will influence to combine precision and uniformity, easily makes in being bonded in of silicon chip and molybdenum sheet The cavity of Poor cohesion is formed at the heart, most influences the electric conductivity and heat dissipation performance of thyristor chip at last.
The content of the invention
The technical problems to be solved by the invention are to provide a kind of low temperature bonding processes of thyristor chip, are obtained using it The intimate plane of thyristor chip, considerably reduce silicon chip when thyristor chip is installed and used and be pressed down the possibility split.
Technical solution is used by the present invention solves above-mentioned technical problem:A kind of low temperature bond side of thyristor chip Method, it is characterised in that include the following steps:
1. choose monocrystalline silicon piece, the alusil alloy piece that silicon content is 9.7%~13.7%, molybdenum sheet, wherein, alusil alloy piece is used Make metal binding agent;
2. being pre-processed to molybdenum sheet, the center is set to produce the deformation of default deformation quantity;
3. the molybdenum sheet of monocrystalline silicon piece, alusil alloy piece and deformation is sequentially placed into graphite jig, deformation is required when being put into Molybdenum sheet concave surface face alusil alloy piece;
4. the graphite jig of the molybdenum sheet equipped with monocrystalline silicon piece, alusil alloy piece and deformation is put into high-temperature vacuum furnace, Vacuum is higher than 3 × 10-3Pa, and temperature melts alusil alloy piece under conditions of 580~600 DEG C, monocrystalline silicon piece is attached to The thyristor chip of intimate plane is formed on molybdenum sheet.
The step 2. in molybdenum sheet is pre-processed as the mould using dimpling to molybdenum sheet carry out punching press;It is this pre- Processing mode is simple and reliable.
The step 2. in preset deformation quantity determination process be:
2. -1, choose with step 1. in identical monocrystalline silicon piece, alusil alloy piece and molybdenum sheet;
2. -2, monocrystalline silicon piece, alusil alloy piece and molybdenum sheet are sequentially placed into graphite jig;
2. -3, the graphite jig equipped with monocrystalline silicon piece, alusil alloy piece and molybdenum sheet is put into high-temperature vacuum furnace, in vacuum Degree is higher than 3 × 10-3Pa, and temperature melts alusil alloy piece under conditions of 580~600 DEG C, monocrystalline silicon piece is attached to molybdenum sheet The upper thyristor chip for forming deformation;
2. -4, using the deformation quantity at the center of the thyristor chip of deformation as default deformation quantity.Here, in identical environment It is lower to determine default deformation quantity, it may be such that the thermal expansion deformation produced with reference to rear molybdenum sheet cancels each other with the deformation suppressed in advance, from And cause the intimate plane of thyristor chip finally obtained.
Offered on four side walls of the graphite jig for increasing heat conduction, reducing the graphite jig The lateral through aperture of internal-external temperature difference.
The step 1. middle alusil alloy piece silicon content be 11.7%.
The step 4. middle temperature condition be 580~590 DEG C.
Compared with prior art, the advantage of the invention is that:
1)Closed since the aluminium flake of high-purity that original work are metal binding agent is changed to the aluminium silicon that silicon content is 9.7%~13.7% Gold plaque, and the fusing point of alusil alloy piece is lower, if the fusing point for the alusil alloy piece that silicon content is 11.7% is only 577 DEG C, therefore energy Enough that combination temperature is reduced to 580~600 DEG C from original 700~800 DEG C, the reduction of combination temperature can greatly reduce knot Close the deformation of obtained thyristor chip.
2)Molybdenum sheet is pre-processed in advance, the center is produced the deformation of default deformation quantity, 3 are obtained if wanting to combine ~6 inches of thyristor chip, then it is 28~280 μm that can make the deformation quantity at the center of molybdenum sheet in advance, and makes the molybdenum sheet of deformation Concave surface face alusil alloy piece, so with reference to rear molybdenum sheet produce thermal expansion deformation cancel each other with the deformation suppressed in advance, So that the intimate plane of the thyristor chip finally obtained, the thyristor chip of intimate plane can greatly reduce its installation Silicon chip is pressed down the possibility split during use.
3)Lateral through aperture is set on each side wall of graphite jig, and the graphite jig of side wall hollow out can increase heat biography Lead, reduce the internal-external temperature difference of graphite jig, the precision and uniformity of combination temperature can be effectively improved, so as to effectively Avoid producing the cavity of Poor cohesion.
Brief description of the drawings
Fig. 1 places silicon chip, aluminium flake, the schematic diagram of molybdenum sheet for existing associated methods;
Fig. 2 is the structure diagram of the thyristor chip obtained using existing associated methods;
Fig. 3 places monocrystalline silicon piece, alusil alloy piece, the schematic diagram of molybdenum sheet for the method for the present invention;
Fig. 4 is the structure diagram of the thyristor chip obtained using the method for the present invention.
Embodiment
The present invention is described in further detail below in conjunction with attached drawing embodiment.
Embodiment one:
A kind of low temperature bonding processes for thyristor chip that the present embodiment proposes, it includes the following steps:
1. choose the monocrystalline silicon piece of high flatness, the alusil alloy piece that silicon content is 11.7%, molybdenum sheet, wherein, alusil alloy Piece is used as metal binding agent.
Punching press is carried out to molybdenum sheet as the mould using dimpling 2. being pre-processed to molybdenum sheet, produces the center default The deformation of deformation quantity.
Here, the determination process of default deformation quantity is:
2. -1, choose with step 1. in identical monocrystalline silicon piece, alusil alloy piece and molybdenum sheet.
2. -2, monocrystalline silicon piece, alusil alloy piece and molybdenum sheet are sequentially placed into graphite jig.
2. -3, the graphite jig equipped with monocrystalline silicon piece, alusil alloy piece and molybdenum sheet is put into high-temperature vacuum furnace, in vacuum Degree is higher than 3 × 10-3Pa, and temperature melts alusil alloy piece under conditions of 580 DEG C, monocrystalline silicon piece is attached to shape on molybdenum sheet Into the thyristor chip of deformation, the deformation quantity at the center of 3~6 inches of thyristor chip is 28~280 μm.
2. -4, using the deformation quantity at the center of the thyristor chip of deformation as default deformation quantity.
3. the molybdenum sheet of monocrystalline silicon piece, alusil alloy piece and deformation is sequentially placed into graphite jig, deformation is required when being put into Molybdenum sheet concave surface face alusil alloy piece, as shown in Figure 3.
4. the graphite jig of the molybdenum sheet equipped with monocrystalline silicon piece, alusil alloy piece and deformation is put into high-temperature vacuum furnace, Vacuum is higher than 3 × 10-3Pa, and temperature melts alusil alloy piece under conditions of 580 DEG C, monocrystalline silicon piece is attached to molybdenum sheet The upper thyristor chip for forming intimate plane, as shown in Figure 4.
In the present embodiment, in order to be sufficiently accurate it may be desired to step 2. the vacuum in -3 and step 4. in vacuum it is consistent, step 2. -3 With step 4. in vacuum it is the smaller the better.
Embodiment two:
A kind of low temperature bonding processes for thyristor chip that the present embodiment proposes, it includes the following steps:
1. choose the monocrystalline silicon piece of high flatness, the alusil alloy piece that silicon content is 9.7%, molybdenum sheet, wherein, alusil alloy Piece is used as metal binding agent.
Punching press is carried out to molybdenum sheet as the mould using dimpling 2. being pre-processed to molybdenum sheet, produces the center default The deformation of deformation quantity.
Here, the determination process of default deformation quantity is:
2. -1, choose with step 1. in identical monocrystalline silicon piece, alusil alloy piece and molybdenum sheet.
2. -2, monocrystalline silicon piece, alusil alloy piece and molybdenum sheet are sequentially placed into graphite jig.
2. -3, the graphite jig equipped with monocrystalline silicon piece, alusil alloy piece and molybdenum sheet is put into high-temperature vacuum furnace, in vacuum Degree is higher than 3 × 10-3Pa, and temperature melts alusil alloy piece under conditions of 590 DEG C, monocrystalline silicon piece is attached to shape on molybdenum sheet Into the thyristor chip of deformation, the deformation quantity at the center of 3~6 inches of thyristor chip is 28~280 μm.
2. -4, using the deformation quantity at the center of the thyristor chip of deformation as default deformation quantity.
3. the molybdenum sheet of monocrystalline silicon piece, alusil alloy piece and deformation is sequentially placed into graphite jig, deformation is required when being put into Molybdenum sheet concave surface face alusil alloy piece, as shown in Figure 3.
4. the graphite jig of the molybdenum sheet equipped with monocrystalline silicon piece, alusil alloy piece and deformation is put into high-temperature vacuum furnace, Vacuum is higher than 3 × 10-3Pa, and temperature melts alusil alloy piece under conditions of 590 DEG C, monocrystalline silicon piece is attached to molybdenum sheet The upper thyristor chip for forming intimate plane, as shown in Figure 4.
In the present embodiment, in order to be sufficiently accurate it may be desired to step 2. the vacuum in -3 and step 4. in vacuum it is consistent, step 2. -3 With step 4. in vacuum it is the smaller the better.
Embodiment three:
A kind of low temperature bonding processes for thyristor chip that the present embodiment proposes, it includes the following steps:
1. choose the monocrystalline silicon piece of high flatness, the alusil alloy piece that silicon content is 13.7%, molybdenum sheet, wherein, alusil alloy Piece is used as metal binding agent.
Punching press is carried out to molybdenum sheet as the mould using dimpling 2. being pre-processed to molybdenum sheet, produces the center default The deformation of deformation quantity.
Here, the determination process of default deformation quantity is:
2. -1, choose with step 1. in identical monocrystalline silicon piece, alusil alloy piece and molybdenum sheet.
2. -2, monocrystalline silicon piece, alusil alloy piece and molybdenum sheet are sequentially placed into graphite jig.
2. -3, the graphite jig equipped with monocrystalline silicon piece, alusil alloy piece and molybdenum sheet is put into high-temperature vacuum furnace, in vacuum Degree is higher than 3 × 10-3Pa, and temperature melts alusil alloy piece under conditions of 600 DEG C, monocrystalline silicon piece is attached to shape on molybdenum sheet Into the thyristor chip of deformation, the deformation quantity at the center of 3~6 inches of thyristor chip is 28~280 μm.
2. -4, using the deformation quantity at the center of the thyristor chip of deformation as default deformation quantity.
3. the molybdenum sheet of monocrystalline silicon piece, alusil alloy piece and deformation is sequentially placed into graphite jig, deformation is required when being put into Molybdenum sheet concave surface face alusil alloy piece, as shown in Figure 3.
4. the graphite jig of the molybdenum sheet equipped with monocrystalline silicon piece, alusil alloy piece and deformation is put into high-temperature vacuum furnace, Vacuum is higher than 3 × 10-3Pa, and temperature melts alusil alloy piece under conditions of 600 DEG C, monocrystalline silicon piece is attached to molybdenum sheet The upper thyristor chip for forming intimate plane, as shown in Figure 4.
In the present embodiment, in order to be sufficiently accurate it may be desired to step 2. the vacuum in -3 and step 4. in vacuum it is consistent, step 2. -3 With step 4. in vacuum it is the smaller the better.
Example IV:
A kind of low temperature bonding processes for thyristor chip that the present embodiment proposes, it includes the following steps:
1. choose the monocrystalline silicon piece of high flatness, the alusil alloy piece that silicon content is 11%, molybdenum sheet, wherein, alusil alloy piece As metal binding agent.
Punching press is carried out to molybdenum sheet as the mould using dimpling 2. being pre-processed to molybdenum sheet, produces the center default The deformation of deformation quantity.
Here, the determination process of default deformation quantity is:
2. -1, choose with step 1. in identical monocrystalline silicon piece, alusil alloy piece and molybdenum sheet.
2. -2, monocrystalline silicon piece, alusil alloy piece and molybdenum sheet are sequentially placed into graphite jig.
2. -3, the graphite jig equipped with monocrystalline silicon piece, alusil alloy piece and molybdenum sheet is put into high-temperature vacuum furnace, in vacuum Degree is higher than 3 × 10-3Pa, and temperature melts alusil alloy piece under conditions of 585 DEG C, monocrystalline silicon piece is attached to shape on molybdenum sheet Into the thyristor chip of deformation, the deformation quantity at the center of 3~6 inches of thyristor chip is 28~280 μm.
2. -4, using the deformation quantity at the center of the thyristor chip of deformation as default deformation quantity.
3. the molybdenum sheet of monocrystalline silicon piece, alusil alloy piece and deformation is sequentially placed into graphite jig, deformation is required when being put into Molybdenum sheet concave surface face alusil alloy piece, as shown in Figure 3.
4. the graphite jig of the molybdenum sheet equipped with monocrystalline silicon piece, alusil alloy piece and deformation is put into high-temperature vacuum furnace, Vacuum is higher than 3 × 10-3Pa, and temperature melts alusil alloy piece under conditions of 585 DEG C, monocrystalline silicon piece is attached to molybdenum sheet The upper thyristor chip for forming intimate plane, as shown in Figure 4.
In the present embodiment, in order to be sufficiently accurate it may be desired to step 2. the vacuum in -3 and step 4. in vacuum it is consistent, step 2. -3 With step 4. in vacuum it is the smaller the better.
Embodiment five:
A kind of low temperature bonding processes for thyristor chip that the present embodiment proposes, it includes the following steps:
1. choose the monocrystalline silicon piece of high flatness, the alusil alloy piece that silicon content is 12%, molybdenum sheet, wherein, alusil alloy piece As metal binding agent.
Punching press is carried out to molybdenum sheet as the mould using dimpling 2. being pre-processed to molybdenum sheet, produces the center default The deformation of deformation quantity.
Here, the determination process of default deformation quantity is:
2. -1, choose with step 1. in identical monocrystalline silicon piece, alusil alloy piece and molybdenum sheet.
2. -2, monocrystalline silicon piece, alusil alloy piece and molybdenum sheet are sequentially placed into graphite jig.
2. -3, the graphite jig equipped with monocrystalline silicon piece, alusil alloy piece and molybdenum sheet is put into high-temperature vacuum furnace, in vacuum Degree is higher than 3 × 10-3Pa, and temperature melts alusil alloy piece under conditions of 585 DEG C, monocrystalline silicon piece is attached to shape on molybdenum sheet Into the thyristor chip of deformation, the deformation quantity at the center of 3~6 inches of thyristor chip is 28~280 μm.
2. -4, using the deformation quantity at the center of the thyristor chip of deformation as default deformation quantity.
3. the molybdenum sheet of monocrystalline silicon piece, alusil alloy piece and deformation is sequentially placed into graphite jig, deformation is required when being put into Molybdenum sheet concave surface face alusil alloy piece, as shown in Figure 3.
4. the graphite jig of the molybdenum sheet equipped with monocrystalline silicon piece, alusil alloy piece and deformation is put into high-temperature vacuum furnace, Vacuum is higher than 3 × 10-3Pa, and temperature melts alusil alloy piece under conditions of 585 DEG C, monocrystalline silicon piece is attached to molybdenum sheet The upper thyristor chip for forming intimate plane, as shown in Figure 4.
In the present embodiment, in order to be sufficiently accurate it may be desired to step 2. the vacuum in -3 and step 4. in vacuum it is consistent, step 2. -3 With step 4. in vacuum it is the smaller the better.
The graphite jig into embodiment five of above-described embodiment one can directly use existing semienclosed cylindrical shape graphite Mould, just with this graphite jig, can produce the cavity of Poor cohesion;Can be on each side wall of existing graphite jig Uniformly open up multiple lateral through aperture, i.e., so that each side wall hollow out of graphite jig, hollow out shape can be rectangle or diamond shape etc., The graphite jig of side wall hollow out can increase heat conduction, reduce the internal-external temperature difference of graphite jig, can effectively improve combination The precision and uniformity of temperature, so as to be effectively prevented from producing the cavity of Poor cohesion.

Claims (4)

1. a kind of low temperature bonding processes of thyristor chip, it is characterised in that include the following steps:
1. choose the monocrystalline silicon piece of high flatness, the alusil alloy piece that silicon content is 9.7%~13.7%, molybdenum sheet, wherein, aluminium silicon Alloy sheet is used as metal binding agent;
2. being pre-processed to molybdenum sheet, the center is set to produce the deformation of default deformation quantity;
The step 2. in molybdenum sheet is pre-processed as the mould using dimpling to molybdenum sheet carry out punching press;
3. the molybdenum sheet of monocrystalline silicon piece, alusil alloy piece and deformation is sequentially placed into graphite jig, the molybdenum of deformation is required when being put into The concave surface face alusil alloy piece of piece;
4. the graphite jig of the molybdenum sheet equipped with monocrystalline silicon piece, alusil alloy piece and deformation is put into high-temperature vacuum furnace, in vacuum Degree is higher than 3 × 10-3Pa, and temperature melts alusil alloy piece under conditions of 580~600 DEG C, monocrystalline silicon piece is attached to molybdenum sheet The upper thyristor chip for forming intimate plane;
Offered on four side walls of the graphite jig for increasing heat conduction, reducing inside and outside the graphite jig The lateral through aperture of the temperature difference.
2. the low temperature bonding processes of a kind of thyristor chip according to claim 1, it is characterised in that the step is 2. In preset deformation quantity determination process be:
2. -1, choose with step 1. in identical monocrystalline silicon piece, alusil alloy piece and molybdenum sheet;
2. -2, monocrystalline silicon piece, alusil alloy piece and molybdenum sheet are sequentially placed into graphite jig;
2. -3, the graphite jig equipped with monocrystalline silicon piece, alusil alloy piece and molybdenum sheet is put into high-temperature vacuum furnace, in vacuum height In 3 × 10-3Pa, and temperature melts alusil alloy piece under conditions of 580~600 DEG C, monocrystalline silicon piece is attached to shape on molybdenum sheet Into the thyristor chip of deformation;
2. -4, using the deformation quantity at the center of the thyristor chip of deformation as default deformation quantity.
3. the low temperature bonding processes of a kind of thyristor chip according to claim 1, it is characterised in that the step is 1. The silicon content of middle alusil alloy piece is 11.7%.
4. the low temperature bonding processes of a kind of thyristor chip according to claim 3, it is characterised in that the step is 4. The condition of middle temperature is 580~590 DEG C.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4875613A (en) * 1987-04-03 1989-10-24 Bbc Brown Boveri Ag Apparatus for manufacturing a laminar bond
CN1595623A (en) * 2004-06-25 2005-03-16 沈首良 A method for preparing high power thyristor core
CN1723543B (en) * 2002-12-09 2010-04-28 原子能委员会 Method of producing a complex structure by assembling stressed structures
CN203367240U (en) * 2013-07-22 2013-12-25 沈首良 Structure for sintering and assembling diodes and thyristors with silicon wafer edge alloy wetting well

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6035823B2 (en) * 1980-12-17 1985-08-16 株式会社日立製作所 Manufacturing method for semiconductor devices
JPS6053036A (en) * 1983-09-02 1985-03-26 Mitsubishi Electric Corp Manufacture of semiconductor element
JPH10247670A (en) * 1997-03-03 1998-09-14 Ricoh Co Ltd Solder bump mounting method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4875613A (en) * 1987-04-03 1989-10-24 Bbc Brown Boveri Ag Apparatus for manufacturing a laminar bond
CN1723543B (en) * 2002-12-09 2010-04-28 原子能委员会 Method of producing a complex structure by assembling stressed structures
CN1595623A (en) * 2004-06-25 2005-03-16 沈首良 A method for preparing high power thyristor core
CN203367240U (en) * 2013-07-22 2013-12-25 沈首良 Structure for sintering and assembling diodes and thyristors with silicon wafer edge alloy wetting well

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