JP2013089865A - Substrate for mounting electronic element - Google Patents
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- JP2013089865A JP2013089865A JP2011230861A JP2011230861A JP2013089865A JP 2013089865 A JP2013089865 A JP 2013089865A JP 2011230861 A JP2011230861 A JP 2011230861A JP 2011230861 A JP2011230861 A JP 2011230861A JP 2013089865 A JP2013089865 A JP 2013089865A
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- 239000000758 substrate Substances 0.000 title claims abstract description 99
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 116
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 116
- 238000005219 brazing Methods 0.000 claims abstract description 73
- 229910000838 Al alloy Inorganic materials 0.000 claims abstract description 16
- 239000002245 particle Substances 0.000 claims abstract description 9
- 239000000463 material Substances 0.000 claims description 70
- 238000005096 rolling process Methods 0.000 claims description 23
- 230000017525 heat dissipation Effects 0.000 claims description 19
- 238000000137 annealing Methods 0.000 claims description 10
- 238000004519 manufacturing process Methods 0.000 claims description 7
- 150000002736 metal compounds Chemical class 0.000 claims description 2
- 239000013078 crystal Substances 0.000 abstract description 58
- 229910052751 metal Inorganic materials 0.000 abstract description 13
- 239000002184 metal Substances 0.000 abstract description 13
- 230000037303 wrinkles Effects 0.000 abstract description 9
- 239000000945 filler Substances 0.000 abstract description 7
- 238000001816 cooling Methods 0.000 description 11
- 239000011888 foil Substances 0.000 description 9
- 229910000765 intermetallic Inorganic materials 0.000 description 9
- 230000035882 stress Effects 0.000 description 9
- 230000000694 effects Effects 0.000 description 7
- 238000010438 heat treatment Methods 0.000 description 6
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 239000000919 ceramic Substances 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 238000005098 hot rolling Methods 0.000 description 4
- 238000005304 joining Methods 0.000 description 4
- 229910021364 Al-Si alloy Inorganic materials 0.000 description 3
- 238000005097 cold rolling Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 238000007670 refining Methods 0.000 description 3
- 229910018131 Al-Mn Inorganic materials 0.000 description 2
- 229910018461 Al—Mn Inorganic materials 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 238000010292 electrical insulation Methods 0.000 description 2
- 230000003628 erosive effect Effects 0.000 description 2
- 238000011156 evaluation Methods 0.000 description 2
- 238000012423 maintenance Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 229910018125 Al-Si Inorganic materials 0.000 description 1
- 229910018520 Al—Si Inorganic materials 0.000 description 1
- 229910018566 Al—Si—Mg Inorganic materials 0.000 description 1
- 229910000861 Mg alloy Inorganic materials 0.000 description 1
- 229910000914 Mn alloy Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 230000000712 assembly Effects 0.000 description 1
- 238000000429 assembly Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 229910001928 zirconium oxide Inorganic materials 0.000 description 1
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- Parts Printed On Printed Circuit Boards (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
本発明は、絶縁基板に電子素子を搭載するためのアルミニウム回路層がろう付けされた電子素子搭載用基板、およびその関連技術に関する。 The present invention relates to an electronic device mounting substrate in which an aluminum circuit layer for mounting an electronic device on an insulating substrate is brazed, and a related technology.
電子素子搭載用基板として、絶縁基板の一面側に金属回路層が接合したものが知られている。かかる基板において、絶縁基板は電気絶縁性が優れていることはもとより、熱伝導性が良く放熱性が優れているセラミックが用いられ、前記金属回路層は導電性が高くかつ前記絶縁基板と接合可能な金属として高純度アルミニウムが用いられ、これらはＡｌ−Ｓｉ系合金ろう材によってろう付される（特許文献１参照）。 As an electronic element mounting substrate, a substrate in which a metal circuit layer is bonded to one side of an insulating substrate is known. In such a substrate, the insulating substrate is not only excellent in electrical insulation, but also is made of ceramic having excellent heat conductivity and heat dissipation, and the metal circuit layer has high conductivity and can be joined to the insulating substrate. High-purity aluminum is used as a new metal, and these are brazed with an Al—Si alloy brazing material (see Patent Document 1).
また、前記絶縁基板の他方の面には応力緩和するための緩衝層を介してヒートシンクを積層されることもある。ヒートシンクは軽量性、強度維持、成形性、耐食性が要求されることから、Ａｌ−Ｍｎ系合金等のアルミニウム合金を用いることが一般的であり、電子素子の熱サイクルにおいて絶縁基板とヒートシンクとの間に発生する応力を緩和するために、緩衝層は高純度アルミニウムを用いるのが一般的である。前記絶縁基板と緩衝層とは、前記金属回路層の接合と同じく、Ａｌ−Ｓｉ系合金ろう材によってろう付けされる。 Further, a heat sink may be laminated on the other surface of the insulating substrate via a buffer layer for relaxing stress. Since heat sinks are required to have light weight, strength maintenance, formability, and corrosion resistance, it is common to use an aluminum alloy such as an Al-Mn alloy, and between an insulating substrate and a heat sink in the thermal cycle of an electronic device. In order to relieve the stress generated in the buffer layer, high-purity aluminum is generally used for the buffer layer. The insulating substrate and the buffer layer are brazed with an Al—Si alloy brazing material in the same manner as the joining of the metal circuit layer.
図３は、ろう付後の絶縁基板（11）とアルミニウム回路層（100）との接合界面の近傍を拡大して模式的に示した図である。図３に示すように、アルミニウム回路層（100）の表面を構成する結晶粒（101）（102）（103）（104）は必ずしも同じ高さで並んでいるのではなく不揃いの高さで並んでおり、隣接する結晶粒との間に段差が生じて絶縁基板（11）との間に隙間が生じる。結晶粒が大きくなると、前記隙間は絶縁基板（11）の表面に平行な方向の寸法が大きくなるだけでなく、前記段差（材料の積層方向の寸法）も大きくなることがわかっている。上述したように、絶縁基板（11）にろう付されるアルミニウム回路層（100）の材料は高純度アルミニウムであって、高純度アルミニウムは再結晶粒が粗大化する傾向があるので隣接する結晶粒との間に生じる段差も大きくなっている。つまりは、結晶粒径が大きいことにより、結晶粒径の細かいものと比較して段差による体積が多くなることとなる。このため、前記アルミニウム回路層（100）を絶縁基板（11）にろう付すると、絶縁基板（11）の表面からアルミニウム回路層（100）側に退いた結晶粒（101）（103）の部分にろう材溜まり（105）が生じて余剰ろう材が接合界面に残存することになる。 FIG. 3 is an enlarged view schematically showing the vicinity of the bonding interface between the insulating substrate (11) after brazing and the aluminum circuit layer (100). As shown in FIG. 3, the crystal grains (101) (102) (103) (104) constituting the surface of the aluminum circuit layer (100) are not necessarily arranged at the same height, but are arranged at irregular heights. Therefore, a step is generated between adjacent crystal grains, and a gap is generated between the insulating substrate (11). It has been found that as the crystal grains become larger, the gap not only increases in dimension in the direction parallel to the surface of the insulating substrate (11), but also increases in the step (dimension in the material stacking direction). As described above, the material of the aluminum circuit layer (100) to be brazed to the insulating substrate (11) is high-purity aluminum, and the high-purity aluminum tends to coarsen recrystallized grains. The level difference between the two is also large. In other words, the large crystal grain size increases the volume due to the step as compared with the fine crystal grain size. Therefore, when the aluminum circuit layer (100) is brazed to the insulating substrate (11), the crystal grains (101) (103) that have retreated from the surface of the insulating substrate (11) to the aluminum circuit layer (100) side are formed. A brazing material pool (105) is generated, and surplus brazing material remains at the joint interface.
また、Ａｌ−Ｓｉ系合金ろう材はアルミニウム回路層を構成する高純度アルミニウムよりも硬質であり、接合界面に硬いろう材溜まりが生じると冷熱サイクルにおいて応力が集中しやすくなるおそれがある。このため、電子素子搭載用基板の冷熱耐久性の向上を図るためにも接合界面に余剰ろう材が残存しないこと、あるいは残存する余剰ろう材量が少ないことが好ましい。 In addition, the Al—Si alloy brazing material is harder than the high-purity aluminum constituting the aluminum circuit layer, and if a brazing material pool is generated at the joint interface, stress may be easily concentrated in the thermal cycle. For this reason, in order to improve the thermal durability of the electronic element mounting substrate, it is preferable that no surplus brazing material remains at the bonding interface or that the surplus brazing material amount remaining is small.
さらに、冷熱サイクルにおいてアルミニウム回路層が変形して電子素子搭載面にしわによる凹凸が形成されることがあった。アルミニウム回路層と電子素子とのはんだ付部の接合信頼性を高め、回路基板の冷熱耐久性を向上させる手段の一つとしてしわの発生を抑制することが考えられる。 Furthermore, the aluminum circuit layer may be deformed in the cooling and heating cycle, and irregularities due to wrinkles may be formed on the electronic element mounting surface. It is conceivable to suppress the generation of wrinkles as one means for improving the bonding reliability of the soldered portion between the aluminum circuit layer and the electronic element and improving the thermal durability of the circuit board.
本発明は上述した背景技術に鑑み、絶縁基板にアルミニウム回路層がろう付された電子素子搭載用基板であって、絶縁基板とアルミニウム回路層との接合界面に余剰ろう材が残存せず、かつ冷熱サイクルにおいてアルミニウム回路層の電子素子搭載面の凹凸が抑制される電子素子搭載用基板の提供を目的とする。 In view of the background art described above, the present invention is an electronic element mounting substrate in which an aluminum circuit layer is brazed to an insulating substrate, and no excess brazing material remains at the bonding interface between the insulating substrate and the aluminum circuit layer, and An object of the present invention is to provide an electronic element mounting substrate in which unevenness of the electronic element mounting surface of the aluminum circuit layer is suppressed in a cooling and heating cycle.
即ち、本発明は、下記［１］〜［６］に記載の構成を有する。 That is, this invention has the structure as described in following [1]-[6].
［１］絶縁基板の少なくとも一方の面に電子素子を搭載するアルミニウム回路層がろう付された電子素子搭載用基板であって、
前記アルミニウム回路層は、ろう付後の結晶粒の平均粒径が１０〜５００μｍとなされ、かつ引張強さが４５Ｎ／ｍｍ２以上となされたアルミニウムまたはアルミニウム合金からなることを特徴とする電子素子搭載用基板。
[1] An electronic element mounting substrate in which an aluminum circuit layer for mounting an electronic element is brazed on at least one surface of an insulating substrate,
The aluminum circuit layer is made of aluminum or an aluminum alloy having an average grain size of 10 to 500 μm after brazing and a tensile strength of 45 N / mm 2 or more. Substrate.
［２］前記アルミニウム回路層はアルミニウム純度が９７．５〜９９．９質量％のアルミニウムからなる前項１に記載の電子素子搭載用基板
［３］前記アルミニウム回路層は少なくとも０．０１〜０．８質量％のＦｅを含有するアルミニウム合金からなる前項１に記載の電子素子搭載用基板。
[2] The substrate for mounting an electronic device as described in [1], wherein the aluminum circuit layer is made of aluminum having an aluminum purity of 97.5 to 99.9% by mass. [3] The aluminum circuit layer is at least 0.01 to 0.8. 2. The electronic device mounting substrate as described in 1 above, which is made of an aluminum alloy containing mass% Fe.
［４］前記アルミニウム回路層を構成するアルミニウムまたはアルミニウム合金は金属化合物の平均粒径が３μｍ以下となされている１〜３のいずれかに記載の電子素子搭載用基板。 [4] The electronic element mounting substrate according to any one of 1 to 3, wherein the aluminum or aluminum alloy constituting the aluminum circuit layer has an average particle size of a metal compound of 3 μm or less.
［５］前項１〜４のいずれかに記載の電子素子搭載用基板に用いるアルミニウム回路層用材料の製造方法であって、
材料塊に対して複数パスの圧延を行う間に、３３０〜４５０℃で１〜８時間の中間焼鈍を行い、仕上げ圧延の圧下率を１５〜４０％とすることを特徴とするアルミニウム回路層用材料の製造方法。
[5] A method for producing an aluminum circuit layer material used for the electronic element mounting substrate according to any one of 1 to 4,
For an aluminum circuit layer characterized by performing intermediate annealing for 1 to 8 hours at 330 to 450 ° C. during rolling of a plurality of passes on a material lump, and setting the rolling reduction of finish rolling to 15 to 40%. Material manufacturing method.
［６］前項１〜５のいずれかに記載の電子素子搭載用基板の絶縁基板の一方の面にアルミニウム回路層がろう付され、他方の面に緩衝層を介してヒートシンクが接合されていることを特徴とする放熱装置。 [6] An aluminum circuit layer is brazed to one surface of the insulating substrate of the electronic element mounting substrate according to any one of 1 to 5 above, and a heat sink is bonded to the other surface via a buffer layer. A heat dissipation device characterized by
上記［１］に記載の電子素子搭載用基板は、アルミニウム回路層が結晶粒の平均結晶粒径が１０〜５００μｍに微細化され、かつ引張強さが４５Ｎ／ｍｍ２以上であって高純度アルミニウムよりも強化されている。 The substrate for mounting an electronic device according to the above [1] is a high-purity aluminum in which the aluminum circuit layer is refined to have an average crystal grain size of 10 to 500 μm and a tensile strength of 45 N / mm 2 or more. More than strengthened.
前記アルミニウム回路層は結晶粒の微細化により、表面において隣接する結晶粒との間に生じる段差が小さいので、絶縁基板との接合界面に生じるろう材溜まりも小さくなる。あるいは、ろう材溜まりが発生しなくなる。また、結晶粒の微細化によって結晶粒界面積率が高くなるので、ろう材が結晶粒界に拡散し接合界面に残存するろう材が減少する。これらによって、接合界面に残存する余剰ろう材の量が抑えられ、あるいは余剰ろう材が残存しなくなる。また、接合界面にろう材溜まりとして残存する余剰ろう材を減らすことによって、冷熱サイクルにおけるろう材溜まりへの応力集中を防いで電子素子搭載用基板の冷熱耐久性を向上させることができる。 The aluminum circuit layer has a small level difference between adjacent crystal grains on the surface due to the refinement of crystal grains, so that the brazing material reservoir generated at the bonding interface with the insulating substrate is also reduced. Alternatively, no brazing material accumulation occurs. Further, since the crystal grain interface area ratio is increased by the refinement of crystal grains, the brazing material diffuses into the crystal grain boundary and the brazing material remaining at the joint interface decreases. As a result, the amount of surplus brazing material remaining at the bonding interface is suppressed, or surplus brazing material does not remain. Further, by reducing the excess brazing material remaining as a brazing material reservoir at the joining interface, it is possible to prevent stress concentration in the brazing material reservoir in the thermal cycle and to improve the thermal durability of the electronic element mounting substrate.
また、前記アルミニウム回路層の強化により、冷熱サイクルで絶縁基板との線膨張係数差に起因する電子素子搭載面のしわの発生が抑制される。ひいては、アルミニウム回路層に搭載された電子素子のはんだ付信頼性が高まり、電子素子を搭載した回路基板の冷熱耐久性が向上する。 Further, the strengthening of the aluminum circuit layer suppresses generation of wrinkles on the electronic element mounting surface due to a difference in linear expansion coefficient with the insulating substrate in a cooling / heating cycle. As a result, the soldering reliability of the electronic element mounted on the aluminum circuit layer is increased, and the cooling and heat durability of the circuit board on which the electronic element is mounted is improved.
上記［２］［３］に記載の電子素子搭載用基板によれば、規定された組成の材料を用いることによって、ろう付後の結晶粒の平均粒径が１０〜５００μｍであり、かつ４５Ｎ／ｍｍ２以上の引張強さを有するアルミニウム回路層を形成できる。 According to the electronic device mounting substrate described in [2] and [3] above, by using a material having a defined composition, the average grain size of the crystal grains after brazing is 10 to 500 μm, and 45 N / An aluminum circuit layer having a tensile strength of mm 2 or more can be formed.
上記［４］に記載の電子素子搭載基板によれば、アルミニウム回路層中の金属間化合物の平均粒径が３μｍ以下となされているため、結晶粒の平均粒径を１０〜５００μｍに制御することが容易である。 According to the electronic element mounting substrate described in [4] above, since the average particle size of the intermetallic compound in the aluminum circuit layer is 3 μm or less, the average particle size of the crystal grains is controlled to 10 to 500 μm. Is easy.
上記［５］に記載のアルミニウム回路層用材料の製造方法によれば、規定された条件で中間焼鈍を行い、かつ規定された圧下率で仕上げ圧延を行うことにより、ろう付後に結晶粒の平均粒径が１０〜５００μｍとなり、かつ４５Ｎ／ｍｍ２以上の引張強さを有する材料を作製することができる。 According to the method for producing a material for an aluminum circuit layer described in [5] above, by performing intermediate annealing under a specified condition and performing finish rolling at a specified reduction rate, the average grain size after brazing A material having a particle size of 10 to 500 μm and a tensile strength of 45 N / mm 2 or more can be produced.
上記［６］に記載の放熱装置によれば、電子素子搭載用基板のアルミニウム回路層の結晶粒が微細化されかつ強化されている。このため、絶縁基板とアルミニウム回路層との接合界面に残存する余剰ろう材の量が抑えられ、あるいは余剰ろう材が残存しなくなる。また、絶縁基板とアルミニウム回路層との接合界面にろう材溜まりとして残存する余剰ろう材を減らすことによって、冷熱サイクルにおけるろう材溜まりへの応力集中を防いで放熱装置の冷熱耐久性を向上させることができる。また、冷熱サイクルで絶縁基板とアルミニウム回路層との線膨張係数差に起因するしわの発生が抑制される。ひいては、アルミニウム回路層に搭載された電子素子のはんだ付信頼性が高まり、電子素子を搭載した回路基板を組み込んだ放熱装置の冷熱耐久性が向上する。 According to the heat dissipation device described in [6] above, the crystal grains of the aluminum circuit layer of the electronic element mounting substrate are refined and strengthened. For this reason, the amount of surplus brazing material remaining at the bonding interface between the insulating substrate and the aluminum circuit layer is suppressed, or surplus brazing material does not remain. In addition, by reducing the amount of brazing filler metal remaining at the bonding interface between the insulating substrate and the aluminum circuit layer, stress concentration on the brazing filler metal pool during the cooling / heating cycle is prevented, and the cooling durability of the heat dissipation device is improved. Can do. Moreover, generation | occurrence | production of the wrinkle resulting from the linear expansion coefficient difference of an insulated substrate and an aluminum circuit layer is suppressed by a thermal cycle. As a result, the soldering reliability of the electronic element mounted on the aluminum circuit layer is increased, and the cooling durability of the heat dissipation device incorporating the circuit board mounting the electronic element is improved.
図１は本発明の電子素子搭載用基板の一実施形態と、この電子素子搭載用基板を用いて作製する放熱装置の仮組物を、構成部材が積層する方向で切断した断面で示している。 FIG. 1 shows an embodiment of an electronic element mounting substrate according to the present invention and a temporary assembly of a heat dissipation device manufactured using the electronic element mounting substrate in a cross section cut in a direction in which constituent members are stacked. .
電子素子搭載用基板（1）は、絶縁基板（11）と、この絶縁基板（11）の一方の面に重ねられた電子素子搭載用のアルミニウム回路層（12）とにより構成されている。図１の仮組物においては、前記絶縁基板（11）とアルミニウム回路層（12）との間にこれらを接合するためのろう材箔（14）が配置されている。また、放熱装置（2）の仮組物は、前記電子素子搭載用基板（1）の絶縁基板（11）の他方の面に緩衝層（13）を介して複数の中空部を有するチューブ型のヒートシンク（16）を重ねたものであり、絶縁基板（11）と緩衝層（13）との間、および緩衝層（13）との間ヒートシンク（16）との間には接合用のろう材箔（15）（17）が配置されている。 The electronic element mounting substrate (1) is composed of an insulating substrate (11) and an aluminum circuit layer (12) for mounting the electronic element that is superimposed on one surface of the insulating substrate (11). In the temporary assembly shown in FIG. 1, a brazing material foil (14) for bonding them is disposed between the insulating substrate (11) and the aluminum circuit layer (12). The temporary assembly of the heat dissipation device (2) is a tube type having a plurality of hollow portions on the other surface of the insulating substrate (11) of the electronic element mounting substrate (1) via a buffer layer (13). It is a superposition of heat sink (16), brazing material foil between the insulating substrate (11) and the buffer layer (13), and between the buffer layer (13) and the heat sink (16) (15) (17) is arranged.
前記放熱装置（2）は前記仮組物を一括してろう付加熱され、その後アルミニウム回路層（12）上に電子素子(18)がはんだ付される。ろう付後の放熱装置（2）において、アルミニウム回路層（12）がろう付された絶縁基板（11）とヒートシンク（16）とは緩衝層（13）を介して熱的に結合され、電子素子（18）が発する熱はヒートシンク（16）に排熱される。 In the heat dissipating device (2), the temporary assembly is collectively heated by brazing, and then the electronic element (18) is soldered onto the aluminum circuit layer (12). In the heat dissipation device (2) after brazing, the insulating substrate (11) to which the aluminum circuit layer (12) is brazed and the heat sink (16) are thermally coupled via the buffer layer (13) to form an electronic device. The heat generated by (18) is exhausted to the heat sink (16).
前記電子素子搭載用基板（1）において、アルミニウム回路層（12）は結晶粒の平均粒径および引張強さが規定されたアルミニウムまたはアルミニウム合金からなる。 In the electronic device mounting substrate (1), the aluminum circuit layer (12) is made of aluminum or an aluminum alloy having an average crystal grain size and tensile strength.
前記アルミニウム回路層（12）は、ろう付後に結晶粒の平均粒径が１０〜５００μｍとなされ、高純度アルミニウムよりも微細化された結晶組織を有する。 The aluminum circuit layer (12) has an average grain size of 10 to 500 μm after brazing and has a crystal structure finer than that of high-purity aluminum.
図２は、ろう付後の絶縁基板（11）とアルミニウム回路層（12）との接合界面およびその近傍を拡大して模式的に示した断面図である。図２に示すように、アルミニウム回路層（12）の表面を構成する結晶粒（31）（32）（33）（34）（35）（36）が必ずしも同じ高さで並んではいなくても、結晶粒が微細化されていることで隣接する結晶粒との間に生じる段差（材料の積層方向の寸法）も小さくなり、絶縁基板（11）の表面からアルミニウム回路層（12）側に退いた結晶粒（32）（34）の部分に生じるろう材溜まり（37）も小さくなる。あるいは、段差が無くなってろう材溜まりが発生しなくなる。 FIG. 2 is an enlarged cross-sectional view schematically showing the bonding interface between the insulating substrate (11) after brazing and the aluminum circuit layer (12) and the vicinity thereof. As shown in FIG. 2, the crystal grains (31) (32) (33) (34) (35) (36) constituting the surface of the aluminum circuit layer (12) are not necessarily arranged at the same height. Since the crystal grains are miniaturized, the level difference between the adjacent crystal grains (dimensions in the material stacking direction) is also reduced, and the aluminum circuit layer (12) side is retracted from the surface of the insulating substrate (11). The brazing material reservoir (37) generated in the portions of the crystal grains (32) and (34) that have been reduced is also reduced. Or a level | step difference is lose | eliminated and a brazing material pool will not generate | occur | produce.
結晶粒が小さくなると隣接する結晶粒との間に生じる段差が小さくなる理由は、以下のとおりである。 The reason why the level difference between adjacent crystal grains becomes smaller as the crystal grains become smaller is as follows.
結晶方位の異なる結晶粒は方向によって線膨張係数が異なる。このため、結晶方位の異なる結晶粒が隣接していると、それらの結晶粒はろう付中に線膨張係数の差によって相互に回転力または変形力を受ける。さらに、ろう付中の材料に加わる荷重や摩擦力等は結晶粒を回転させる力または変形させる力となって作用する。そして、結晶粒の回転角度が同じであっても結晶粒が大きくなるほどずれは大きくなり、結晶粒が小さくなるほどずれは小さくなる。また変形力を受ける場合おいても、大きい結晶粒で変形力を受けることで粒界でのずれが大きくなり、小さい結晶粒の粒界ではずれが小さくなる。隣接する結晶粒の段差はこのようなずれによって生じるために、結晶粒が小さくなるほど段差が小さくなる。 Crystal grains having different crystal orientations have different linear expansion coefficients depending on directions. For this reason, when crystal grains having different crystal orientations are adjacent to each other, these crystal grains receive mutual rotational force or deformation force due to the difference in linear expansion coefficient during brazing. Furthermore, the load and frictional force applied to the material being brazed act as a force for rotating or deforming the crystal grains. And even if the rotation angle of the crystal grains is the same, the deviation becomes larger as the crystal grains become larger, and the deviation becomes smaller as the crystal grains become smaller. Even when receiving a deformation force, the displacement at the grain boundary increases by receiving the deformation force at a large crystal grain, and the displacement decreases at the grain boundary of a small crystal grain. Since a step between adjacent crystal grains is caused by such a shift, the step becomes smaller as the crystal grain becomes smaller.
従って、結晶粒が小さくなると、接合界面に残存する余剰ろう材の量が抑えられ、あるいは余剰ろう材が残存しなくなって、ろう材の使用量が抑えられる。また、結晶粒が細かいために結晶粒界面積率が高くなるので、結晶粒界に拡散するろう材量が増えることによっても絶縁基板（11）との接合界面に残存する余剰ろう材が減少する。 Therefore, when the crystal grains become small, the amount of surplus brazing material remaining at the bonding interface is suppressed, or the surplus brazing material does not remain and the amount of brazing material used is suppressed. In addition, since the crystal grain interface area ratio increases because the crystal grains are fine, the amount of surplus brazing filler metal remaining at the bonding interface with the insulating substrate (11) decreases even when the amount of brazing filler metal diffused into the crystal grain boundary increases. .
また、前記絶縁基板（11）とアルミニウム回路層（12）との接合界面にろう材溜まりとして残存する余剰ろう材を減らすことは、冷熱サイクルにおいてろう材溜まりへの応力集中を防ぐ上でも好ましいことであり、電子素子搭載用基板（1）の冷熱耐久性を向上させることができる。 In addition, it is preferable to reduce the excess brazing filler metal remaining as a brazing material reservoir at the bonding interface between the insulating substrate (11) and the aluminum circuit layer (12) in order to prevent stress concentration in the brazing filler metal reservoir in the cooling and heating cycle. Thus, the thermal durability of the electronic element mounting substrate (1) can be improved.
ろう付後のアルミニウム回路層（12）において結晶粒の平均粒径が５００μｍを超えると上記効果が少なく、平均粒径が１０μｍ未満ではろう付時にろう材による侵食が大きくなって接合性が低下するおそれがある。よって、本発明におけるアルミニウム回路層（12）のろう付後の結晶粒の平均粒径は１０〜５００μｍとする。好ましい結晶粒の平均粒径は４０〜４５０μｍである。前記結晶粒の平均粒径はろう付後、即ちろう付加熱を受けることによって達成される平均粒径であるから、ろう付前のアルミニウム回路層（12）においては必ずしも平均粒径が上記範囲内であるとは限らない。本発明はろう付条件を限定するものではないが、ろう付条件として５９０〜６２０℃で５〜３０分の加熱を推奨できる。 When the average grain size of the crystal grains exceeds 500 μm in the aluminum circuit layer (12) after brazing, the above effect is small, and when the average grain size is less than 10 μm, the erosion caused by the brazing material increases at the time of brazing and the bondability is lowered. There is a fear. Therefore, the average grain size of the crystal grains after brazing of the aluminum circuit layer (12) in the present invention is 10 to 500 μm. The average grain size of preferred crystal grains is 40 to 450 μm. Since the average grain size of the crystal grains is the average grain size achieved after brazing, that is, by receiving brazing heat, the average grain size is not necessarily within the above range in the aluminum circuit layer (12) before brazing. Not necessarily. Although this invention does not limit brazing conditions, the heating for 5 to 30 minutes at 590-620 degreeC can be recommended as brazing conditions.
前記アルミニウム回路層（12）は、結晶粒の平均粒径とともに引張強さが４５Ｎ／ｍｍ２以上に規定されている。４５Ｎ／ｍｍ２以上という引張強さは高純度アルミニウムよりも強度が高く、このため冷熱サイクルにおいて絶縁基板（11）とアルミニウム回路層（12）との線膨張係数差に起因して電子素子搭載面に発生するしわが抑制される。引張強さが４５Ｎ／ｍｍ２未満ではしわの発生を抑制する効果が少なく、５０Ｎ／ｍｍ２以上が好ましい。また、１５０Ｎ／ｍｍ２であれば十分に効果が得られるので、引張強さの好ましい範囲は５０〜１５０Ｎ／ｍｍ２であり、特に好ましい範囲はである６０〜１３０Ｎ／ｍｍ２である。 The aluminum circuit layer (12) has a tensile strength of 45 N / mm 2 or more together with an average grain size of crystal grains. The tensile strength of 45 N / mm 2 or higher is higher than that of high-purity aluminum. Therefore, the electronic device mounting surface is caused by the difference in linear expansion coefficient between the insulating substrate (11) and the aluminum circuit layer (12) in the thermal cycle. The wrinkles that occur are suppressed. When the tensile strength is less than 45 N / mm 2 , the effect of suppressing the generation of wrinkles is small, and 50 N / mm 2 or more is preferable. Further, since sufficient effects are obtained if 150 N / mm 2, the tensile strength of the preferred range is 50~150N / mm 2, a 60~130N / mm 2 is particularly preferred range.
前記アルミニウム回路層（12）における結晶粒の平均粒径および引張強さを制御する要因として、アルミニウム回路層（12）を構成する材料の化学組成、材料中の金属間化合物の粒径、材料の加工条件を挙げることができる。 As factors controlling the average grain size and tensile strength of the crystal grains in the aluminum circuit layer (12), the chemical composition of the material constituting the aluminum circuit layer (12), the grain size of the intermetallic compound in the material, Processing conditions can be mentioned.
前記アルミニウム回路層（12）を構成する材料の一つとして、アルミニウム純度が９７．５〜９９．９質量％のアルミニウムを推奨できる。アルミニウム純度が９９．９質量％を超えると結晶粒が粗大化するおそれがあり、アルミニウム純度が９７．５質量％未満では引張強さが高くなって応力緩和力が低下するおそれがある。特に好ましいアルミニウム純度は９７．５〜９９質量％である。また、もう一つの材料として、結晶粒を微細化する効果のあるＦｅを０．０１〜０．８質量％含有するアルミニウム合金を推奨できる。Ｆｅ濃度が０．０１質量％未満では結晶粒の微細化効果が少ない。一方、０．８質量％を添加すれば十分な結晶粒微細化効果が得られるので、０．８質量％を超えるＦｅの添加は不経済である。特に好ましいＦｅ濃度は０．１〜０．６質量％である。前記アルミニウム合金の残部はＡｌおよび不可避不純物であるが、少なくとも０．０１〜０．８質量％のＦｅを含有していれば結晶粒微細化効果が得られるので、アルミニウム純度が９７．５質量％以上であればＦｅ以外の不純物元素を含有することが許容される。 As one of the materials constituting the aluminum circuit layer (12), aluminum having an aluminum purity of 97.5 to 99.9% by mass can be recommended. If the aluminum purity exceeds 99.9% by mass, the crystal grains may be coarsened. If the aluminum purity is less than 97.5% by mass, the tensile strength may increase and the stress relaxation force may decrease. A particularly preferable aluminum purity is 97.5 to 99% by mass. As another material, an aluminum alloy containing 0.01 to 0.8% by mass of Fe having an effect of refining crystal grains can be recommended. When the Fe concentration is less than 0.01% by mass, the crystal grain refining effect is small. On the other hand, if 0.8% by mass is added, a sufficient crystal grain refining effect is obtained, so the addition of Fe exceeding 0.8% by mass is uneconomical. A particularly preferable Fe concentration is 0.1 to 0.6% by mass. The balance of the aluminum alloy is Al and inevitable impurities, but if it contains at least 0.01 to 0.8% by mass of Fe, a grain refinement effect can be obtained, so the aluminum purity is 97.5% by mass. If it is above, it is permitted to contain impurity elements other than Fe.
上述したアルミニウムおよびアルミニウム合金は、高い導電性および熱伝導性を有し、かつ絶縁基板（11）とのろう付性が良好であるから、絶縁基板（11）にろう付される材料としての条件を満たしている。 The above-mentioned aluminum and aluminum alloy have high conductivity and thermal conductivity, and have good brazing properties with the insulating substrate (11). Therefore, the conditions for the material to be brazed to the insulating substrate (11) Meet.
前記アルミニウム回路層（12）を構成する材料において、金属間化合物の平均粒径が３μｍ以下であることが好ましい。金属間化合物の平均粒径が３μｍを超えると結晶粒を所定の大きさに制御することが困難になる傾向があり、また大きな金属間化合物が絶縁基板（11）とアルミニウム回路層（12）との接合界面に多く存在する状態はろう付による接合信頼性を維持する上で好ましいことではない。このため、結晶粒制御の容易性および接合信頼性の観点から、金属間化合物の平均粒径は３μｍ以下が好ましい。特に好ましい金属間化合物の平均粒径は１μｍ以下である。 In the material constituting the aluminum circuit layer (12), the average particle size of the intermetallic compound is preferably 3 μm or less. If the average grain size of the intermetallic compound exceeds 3 μm, it tends to be difficult to control the crystal grains to a predetermined size, and a large intermetallic compound is formed between the insulating substrate (11) and the aluminum circuit layer (12). A state in which a large amount exists at the bonding interface is not preferable in maintaining the bonding reliability by brazing. For this reason, the average particle diameter of the intermetallic compound is preferably 3 μm or less from the viewpoint of ease of crystal grain control and bonding reliability. A particularly preferable average particle size of the intermetallic compound is 1 μm or less.
前記アルミニウム回路層（12）は薄板状であり、材料塊に対して熱間圧延、冷間圧延、仕上げ圧延の複数パスの圧延を行うことにより作製する。結晶粒の平均粒径を１０〜５００μｍの範囲に微細化しかつ４５Ｎ／ｍｍ２以上の引張強さを発現させ、かつ金属間化合物の平均粒径を3μm以下に制御するには、この作製工程において中間焼鈍条件および仕上げ圧延の圧下率を規定することが有効である。中間焼鈍は３３０〜４５０℃で１〜８時間保持することが好ましい。３３０℃未満または１時間未満の焼鈍では結晶粒が過度に微細化されるおそれがあり、４５０℃超または８時間超の焼鈍はエネルギーコストの点で不経済である。中間焼鈍の特に好ましい条件は３５０〜４２０℃で２〜６時間である。また、前記条件による中間焼鈍を行う時期は熱間圧延後もしくは仕上げ圧延前が好ましい。仕上げ圧延の圧下率は１５〜４０％が好ましい。１５％未満の圧下率では再結晶せずろう付時に侵食が大きくなるおそれがあり、４０％超の圧下率では結晶粒が過度に小さくなるおそれがある。特に好ましい圧下率は１５〜３０％である。仕上げ圧延は単パス、複数パスのどちらで行っても良く、仕上げ圧延を複数パスで行う場合の圧下率は合計の圧下率である。 The aluminum circuit layer (12) has a thin plate shape and is produced by rolling a plurality of passes of hot rolling, cold rolling, and finish rolling on the material lump. In order to refine the average grain size of the crystal grains in the range of 10 to 500 μm, develop a tensile strength of 45 N / mm 2 or more, and control the average grain size of the intermetallic compound to 3 μm or less, It is effective to define the intermediate annealing conditions and the rolling reduction of finish rolling. The intermediate annealing is preferably held at 330 to 450 ° C. for 1 to 8 hours. Annealing at less than 330 ° C. or less than 1 hour may excessively refine crystal grains, and annealing at more than 450 ° C. or more than 8 hours is uneconomical in terms of energy costs. Particularly preferable conditions for the intermediate annealing are 350 to 420 ° C. and 2 to 6 hours. Moreover, the time for performing the intermediate annealing under the above conditions is preferably after hot rolling or before finish rolling. The rolling reduction of finish rolling is preferably 15 to 40%. If the rolling reduction is less than 15%, recrystallization does not occur, and erosion may increase during brazing, and if the rolling reduction exceeds 40%, the crystal grains may become excessively small. A particularly preferred rolling reduction is 15 to 30%. The finish rolling may be performed by either a single pass or a plurality of passes, and the reduction rate when the finish rolling is performed by a plurality of passes is the total reduction rate.
前記電子素子搭載用基板（1）および放熱装置（2）を構成する他の部材の好ましい材料は以下のとおりである。 Preferred materials for the other members constituting the electronic element mounting substrate (1) and the heat dissipation device (2) are as follows.
絶縁基板（11）を構成する材料としては、窒化アルミニウム、酸化アルミニウム、窒化ケイ素、酸化ジルコニウム、炭化ケイ素等のセラミックを例示できる。これらのセラミックは電気絶縁性が優れていることはもとより、熱伝導性が良く放熱性が優れている点で推奨できる。 Examples of the material constituting the insulating substrate (11) include ceramics such as aluminum nitride, aluminum oxide, silicon nitride, zirconium oxide, and silicon carbide. These ceramics are recommended not only because of their excellent electrical insulation, but also because they have good thermal conductivity and excellent heat dissipation.
緩衝層（13）は、剛性の高いセラミック製の絶縁基板（11）とヒートシンク（16）との接合界面に発生する熱応力を緩和するための層であるから、前記アルミニウム回路層（12）と同等のアルミニウムまたはアルミニウム合金、あるいは高純度アルミニウムを使用することが好ましい。また、図１に示した緩衝層（13）は応力吸収空間として複数の円形貫通穴を有するパンチングメタルであるが、応力吸収空間の有無や形状は任意に設定することができる。 The buffer layer (13) is a layer for relieving the thermal stress generated at the bonding interface between the highly rigid ceramic insulating substrate (11) and the heat sink (16), and therefore the aluminum circuit layer (12) It is preferable to use equivalent aluminum or aluminum alloy or high purity aluminum. Moreover, although the buffer layer (13) shown in FIG. 1 is a punching metal having a plurality of circular through holes as a stress absorption space, the presence or absence and shape of the stress absorption space can be arbitrarily set.
ヒートシンク（16）を構成する金属は、軽量性、強度維持、成形性、耐食性に優れた材料を用いることが好ましく、これらの特性を有するものとしてＡｌ−Ｍｎ系合金等のアルミニウム合金を推奨できる。ヒートシンク（16）は緩衝層（13）側の外面がフラットであれば緩衝層（13）と広い面積でろう付して高い放熱性能が得られるので、緩衝層（13）側の面以外の外部形状や内部形状は問わない。ヒートシンクの他の形状として、平板、平板の他方の面にフィンをろう付したヒートシンク、平板の他方の面にフィンを立設したヒートシンク、中空部内にフィンを設けたチューブ型ヒートシンク等を例示できる。 The metal constituting the heat sink (16) is preferably a material excellent in lightness, strength maintenance, formability, and corrosion resistance, and an aluminum alloy such as an Al—Mn alloy can be recommended as having these characteristics. If the heat sink (16) has a flat outer surface on the buffer layer (13) side, it can be brazed to a large area with the buffer layer (13) to obtain high heat dissipation performance. There is no limitation on the shape or internal shape. Other shapes of the heat sink include a flat plate, a heat sink in which fins are brazed to the other surface of the flat plate, a heat sink in which fins are erected on the other surface of the flat plate, a tube heat sink in which fins are provided in the hollow portion, and the like.
前記ろう材箔（14）（15）（17）の材料は限定されないが、上述したアルミニウム回路層（12）、絶縁基板（11）、緩衝層（13）、ヒートシンク（16）の材料の接合に好適なろう材としてＡｌ−Ｓｉ系合金、Ａｌ−Ｓｉ−Ｍｇ系合金を推奨できる。 The material of the brazing foil (14), (15) and (17) is not limited, but for joining the materials of the aluminum circuit layer (12), insulating substrate (11), buffer layer (13) and heat sink (16) described above. As a suitable brazing material, an Al—Si based alloy and an Al—Si—Mg based alloy can be recommended.
図１の電子素子搭載用基板（1）は絶縁基板（11）の一方の面にのみアルミニウム回路層（12）を積層したものであるが、他方の面にもアルミニウム回路層をろう付し、絶縁基板（11）の両面に電子素子を搭載するように構成した電子素子搭載用基板も本発明に含まれる。両面にアルミニウム回路層をろう付する場合、少なくとも一方が本発明で規定する結晶粒の平均粒径および引張強さの条件を満たしていれば本発明に含まれる。また、前記絶縁基板（11）の一方の面にのみアルミニウム回路層（12）を積層した電子素子搭載用基板（1）において、他方の面に緩衝層（13）やヒートシンク（16）が積層されていることにも限定されない。 The electronic device mounting substrate (1) in FIG. 1 is obtained by laminating an aluminum circuit layer (12) only on one surface of an insulating substrate (11), but brazing the aluminum circuit layer on the other surface, An electronic element mounting substrate configured to mount electronic elements on both surfaces of the insulating substrate (11) is also included in the present invention. When brazing the aluminum circuit layer on both sides, it is included in the present invention if at least one of them satisfies the conditions of the average grain size and tensile strength of the crystal grains defined in the present invention. In the electronic device mounting substrate (1) in which the aluminum circuit layer (12) is laminated only on one surface of the insulating substrate (11), the buffer layer (13) and the heat sink (16) are laminated on the other surface. It is not limited to being.
図１に参照される積層構造の電子素子搭載用基板（1）を含む放熱装置（2）を、アルミニウム回路層および緩衝層の材料を変えて作製した。前記放熱装置（2）において積層した部材は、積層順に、アルミニウム回路層（12）、ろう材箔（14）、絶縁基板（11）、ろう材箔（15）、緩衝層（13）、ろう材箔（17）、ヒートシンク（16）である。使用した部材の詳細は以下のとおりである。 A heat dissipating device (2) including an electronic element mounting substrate (1) having a laminated structure referred to in FIG. 1 was produced by changing the materials of the aluminum circuit layer and the buffer layer. The members laminated in the heat dissipation device (2) are, in the order of lamination, an aluminum circuit layer (12), a brazing material foil (14), an insulating substrate (11), a brazing material foil (15), a buffer layer (13), a brazing material. The foil (17) and the heat sink (16). Details of the members used are as follows.
［アルミニウム回路層および緩衝層］
実施例１〜３において、アルミニウム回路層（12）および緩衝層（13）の材料として、表１に記載した濃度のＦｅを含み、残部がＡｌおよび不可避不純物からなるアルミニウム合金を用いた。実施例１〜３で異なるアルミニウム合金を用いたが、各実施例におけるアルミニウム回路層（12）および緩衝層（13）の材料は共通である。
[Aluminum circuit layer and buffer layer]
In Examples 1 to 3, the aluminum circuit layer (12) and the buffer layer (13) were made of an aluminum alloy containing Fe at the concentration shown in Table 1 with the balance being Al and inevitable impurities. Although different aluminum alloys were used in Examples 1 to 3, the materials of the aluminum circuit layer (12) and the buffer layer (13) in each example were common.
アルミニウム回路層（12）用材料として、材料塊に対し、熱間圧延、冷間圧延、仕上げ圧延を施し、厚さ０．６ｍｍの薄板を作製した。また、緩衝層（13）用材料として、材料塊に対し、熱間圧延、冷間圧延、仕上げ圧延を施し、厚さ１．６ｍｍの薄板を作製した。これらの薄板を作製する工程において、仕上げ圧延前で板厚が２．１３ｍｍのときに４２０℃×４時間の中間焼鈍を行い、仕上げ圧延を２５％の圧下率で実施した。 As a material for the aluminum circuit layer (12), hot rolling, cold rolling, and finish rolling were performed on the material lump to produce a thin plate having a thickness of 0.6 mm. Further, as a material for the buffer layer (13), the material lump was subjected to hot rolling, cold rolling, and finish rolling to produce a thin plate having a thickness of 1.6 mm. In the process of producing these thin plates, intermediate annealing was performed at 420 ° C. for 4 hours when the plate thickness was 2.13 mm before finish rolling, and finish rolling was performed at a reduction rate of 25%.
作製したアルミニウム回路層（12）用の薄板は２８ｍｍ×２８ｍｍに切断したものを放熱装置（2）の仮組みに使用した。また緩衝層（13）用の薄板は２８ｍｍ×２８ｍｍに切断し、さらに切削加工を施して直径２ｍｍの円形の１２個の貫通穴を形成したものを放熱装置（2）の仮組みに使用した。 The prepared thin plate for the aluminum circuit layer (12) was cut into 28 mm × 28 mm and used for the temporary assembly of the heat dissipation device (2). The thin plate for the buffer layer (13) was cut into 28 mm × 28 mm, and further cut to form 12 circular through holes with a diameter of 2 mm, which were used for temporary assembly of the heat dissipation device (2).
一方、比較例のアルミニウム回路層はおよび緩衝層は、Ｆｅを０．００３質量％を含有する高純度アルミニウムを材料に用いたことを除き、実施例１〜３と同じ工程で薄板を作製し、実施例１〜３と同じ形状の仮組み用部材に加工した。 On the other hand, the aluminum circuit layer of the comparative example and the buffer layer were prepared in the same process as in Examples 1 to 3, except that high-purity aluminum containing 0.003% by mass of Fe was used as a material. It processed into the member for temporary assembly of the same shape as Examples 1-3.
［他の部材］
前記アルミニウム回路層および緩衝層を除く部材は各例で共通のものを用いた。
[Other parts]
The members excluding the aluminum circuit layer and the buffer layer were the same in each example.
前記絶縁基板（11）は窒化アルミニウムからなる３０ｍｍ×３０ｍｍ×厚さ０．６ｍｍの平板である。前記ヒートシンク（16）はＡｌ−１質量％Ｍｎ合金からなる扁平多穴チューブである。前記ろう材箔（14）（15）（17）は厚さ３０μｍのＡｌ−１０質量％Ｓｉ−１質量％Ｍｇ合金箔である。 The insulating substrate (11) is a flat plate made of aluminum nitride and having a size of 30 mm × 30 mm × thickness 0.6 mm. The heat sink (16) is a flat multi-hole tube made of an Al-1 mass% Mn alloy. The brazing material foils (14), (15), and (17) are 30 μm thick Al-10 mass% Si-1 mass% Mg alloy foil.
［ろう付］
実施例１〜３および比較例の仮組物を７×１０−４Ｐａの真空中で６００℃×２０分で真空ろう付した。
[Brazing]
The temporary assemblies of Examples 1 to 3 and the comparative example were vacuum brazed in a vacuum of 7 × 10 −4 Pa at 600 ° C. for 20 minutes.
［評価］
ろう付した放熱装置（2）について、各例のアルミニウム回路層（12）の結晶粒の平均粒径、金属間化合物の平均粒径、引張強さを調べた。また、断面観察により、絶縁基板（11）とアルミニウム回路層（12）との接合界面における余剰ろう材（ろう材溜まり）の有無を調べた。
[Evaluation]
For the brazed heat dissipation device (2), the average grain size of the aluminum circuit layer (12) in each example, the average grain size of the intermetallic compound, and the tensile strength were examined. Moreover, the presence or absence of excess brazing material (brazing material pool) at the bonding interface between the insulating substrate (11) and the aluminum circuit layer (12) was examined by cross-sectional observation.
さらに、ろう付した放熱装置（2）に対して１２５℃と−４０℃の冷熱サイクル試験を２０００サイクル行い、冷熱サイクル試験後のアルミニウム回路層（12）の電子素子搭載面におけるしわの有無を調べた。 Furthermore, 2000 cycles of 125 ° C and -40 ° C cooling cycle tests were performed on the brazed heat dissipation device (2), and the presence of wrinkles on the electronic element mounting surface of the aluminum circuit layer (12) after the cooling cycle test was examined. It was.
これらの評価結果を表１に示す。 These evaluation results are shown in Table 1.
表１に示したように、アルミニウム回路層の材料として結晶粒の平均粒径および引張強さを所定範囲に制御することによって、絶縁基板との接合界面における余剰ろう材を無くし、冷熱サイクルおいて電子素子搭載面にしわが発生しないことを確認した。 As shown in Table 1, by controlling the average grain size and tensile strength of the crystal grains as a material of the aluminum circuit layer within a predetermined range, the surplus brazing material at the bonding interface with the insulating substrate is eliminated, and the cooling cycle is performed. It was confirmed that no wrinkles were generated on the electronic element mounting surface.
本発明の電子素子搭載基板は、絶縁基板の一方の面にアルミニウム回路層がろう付され、他方の面に緩衝層を介してヒートシンクがろう付された放熱装置の製造に好適に利用できる。 The electronic element mounting substrate of the present invention can be suitably used for manufacturing a heat dissipation device in which an aluminum circuit layer is brazed to one surface of an insulating substrate and a heat sink is brazed to the other surface via a buffer layer.
1…電子素子搭載用基板
2…放熱装置
11…絶縁基板
12…アルミニウム回路層
13…緩衝層
14、15、17…ろう材箔
18…電子素子
16…ヒートシンク
1 ... Electronic device mounting board
2… Heat dissipation device
11… Insulating substrate
12 ... Aluminum circuit layer
13 ... Buffer layer
14, 15, 17 ... brazing foil
18 ... Electronic element
16… heat sink
Claims (6)
前記アルミニウム回路層は、ろう付後の結晶粒の平均粒径が１０〜５００μｍとなされ、かつ引張強さが４５Ｎ／ｍｍ２以上となされたアルミニウムまたはアルミニウム合金からなることを特徴とする電子素子搭載用基板。 An electronic element mounting substrate in which an aluminum circuit layer for mounting an electronic element is brazed to at least one surface of an insulating substrate,
The aluminum circuit layer is made of aluminum or an aluminum alloy having an average grain size of 10 to 500 μm after brazing and a tensile strength of 45 N / mm 2 or more. Substrate.
材料塊に対して複数パスの圧延を行う間に、３３０〜４５０℃で１〜８時間の中間焼鈍を行い、仕上げ圧延の圧下率を１５〜４０％とすることを特徴とするアルミニウム回路層用材料の製造方法。 It is a manufacturing method of the material for aluminum circuit layers used for the electronic element mounting substrate in any one of Claims 1-4,
For an aluminum circuit layer characterized by performing intermediate annealing for 1 to 8 hours at 330 to 450 ° C. during rolling of a plurality of passes on a material lump, and setting the rolling reduction of finish rolling to 15 to 40%. Material manufacturing method.
An aluminum circuit layer is brazed to one surface of the insulating substrate of the electronic element mounting substrate according to any one of claims 1 to 5, and a heat sink is bonded to the other surface via a buffer layer. A heat dissipation device.
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| WO2016017679A1 (en) * | 2014-07-29 | 2016-02-04 | 電気化学工業株式会社 | Ceramic circuit board and method for producing same |
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| JP2017123373A (en) * | 2016-01-05 | 2017-07-13 | 昭和電工株式会社 | Insulating substrate and method for producing the same |
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| JP2016167502A (en) * | 2015-03-09 | 2016-09-15 | 三菱マテリアル株式会社 | Power module substrate with heat sink and power module |
| JP2017123373A (en) * | 2016-01-05 | 2017-07-13 | 昭和電工株式会社 | Insulating substrate and method for producing the same |
| US20210272865A1 (en) * | 2018-07-18 | 2021-09-02 | Mitsubishi Materials Corporation | Metal base substrate |
| JP2021150429A (en) * | 2020-03-18 | 2021-09-27 | 昭和電工株式会社 | Semiconductor cooling apparatus and manufacturing method therefor |
| WO2022230877A1 (en) * | 2021-04-27 | 2022-11-03 | 三菱マテリアル株式会社 | Heat sink, and heat sink integrated-type insulating circuit board |
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