JPH10247670A - Solder bump mounting method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a cooling method for reflow process by which residual stresses are made to about zero near the center of temperature change in a temperature cycle. SOLUTION: In a solder bump mounting method, a bump 3 is solidified after either a semiconductor 1 or a substrate 2 having the smaller coefficient of thermal expansion is cooled while expansion of the temperature of the substrate 2 or semiconductor 1 having the higher coefficient of thermal expansion is suppressed by lowering its temperature to a certain degree before the bump 3 solidifies, because a stress occurs in an ordinary reflow process when the semiconductor 1 and substrate 2 have different coefficients of thermal expansion. When the bump 3 is solidified in such a way, the stress applied to the bump 3 when the temperature of the bump 3 drops to a room temperature level become smaller. When the semiconductor 1 is connected to the substrate through the ordinary reflow process in the temperature cycle shown in Fig. (A), a stress is always applied to the bump 3 after the bump 3 is cooled as shown in Fig. (B) due to the difference in thermal expansion between the substrate 2 and the semiconductor 1 and the maximum stress also become larger, but, when the bump 3 is cooled in the above-mentioned manner, the stress becomes about zero near the center (Tic) of the temperature change as shown in Fig. (C).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to solder bump mounting, and more particularly, to a method of connecting solder bumps for connecting, for example, a semiconductor to a substrate.

[0002]

2. Description of the Related Art According to the invention described in Japanese Patent Application Laid-Open No. 5-343409 (a method for manufacturing solder bumps), a barrier metal film is formed on a surface of a semiconductor substrate including electrode pads, and a resist film is formed thereon. An opening is formed in the resist film on the electrode pad, and then an S is formed on the barrier metal film in the opening.
a first Pb-Sn solder film having a small n content and a second Pb- having a large Sn content and a slower oxidation rate than the solder film;
An Sn solder film is sequentially laminated, thereby improving a process (for example, a process of forming a spherical bump using a flux, a flux cleaning process, a face down bonding process, etc.) in which the Pb oxide film has an adverse effect, and a low reflow temperature. Thermal stress can be reduced by increasing the temperature.

Further, the invention described in Japanese Patent Application Laid-Open No. 6-613036 (chip carrier and its mounting structure) is to mount an LSI chip having connection terminals on the entire circuit surface face down on a carrier substrate and to mount the LSI chip face down. The gap between the substrate and the carrier substrate is completely filled with a sealant.
A heat spreader is provided on the back surface of the I chip to reduce thermal stress due to a difference in thermal expansion between the LSI and the carrier substrate, and to provide a mounting structure with high cooling efficiency.

As described above, in the face-down mounting using solder bumps, the semiconductor and the substrate are connected by a reflow process. However, the device temperature repeatedly changes due to heating at the time of connection or heat generated by the environment or operation, and the semiconductor and the substrate are repeatedly connected. The stress is applied to the bumps due to the difference in thermal expansion coefficient between the bumps.
In particular, since the temperature at the time of connection is a high temperature (solder solidification temperature), stress is applied even when cooled to room temperature, which leads to fatigue fracture of the solder material. To alleviate this stress, resin is filled or the bump height is increased.

[0005]

FIG. 13 is a view showing an example of a case where the semiconductor 1 and the substrate 2 are joined by solder bumps 3 in a reflow process, in a state where the solder bumps 3 are melted (FIG. 13A). In this case, no stress is applied, but when the solder solidifies and cools (FIG. 13B), stress is applied to the bumps 3 due to the difference in the coefficient of thermal expansion between the substrate 2 and the semiconductor 1.

As described above, when the solder is cooled from a high temperature state during solidification to room temperature, stress is generated even in a normal state. It is very difficult to do.

As described above, when a semiconductor and a substrate are connected by solder bumps in a reflow process, a temperature cycle is inevitably applied. Therefore, the present invention provides a method in which the residual stress becomes close to zero at a temperature near the center of the change. Another object of the present invention is to provide a cooling method for a reflow process and a method for removing residual stress after reflow.

[0008]

According to a first aspect of the present invention, in a connection process of mounting a semiconductor face down on a substrate via a solder pump electrode, the solder bump is connected to the semiconductor electrode and the substrate electrode by reflow. After that, while keeping either one of the semiconductor or the substrate in a high temperature state, only the other is cooled, and after the temperature is lowered to a certain extent, the whole is cooled.
It is intended to obtain a flip chip connection of solder bumps with little residual stress.

According to a second aspect of the present invention, in the first aspect of the present invention, when the substrate is a resin substrate, the substrate side is cooled while maintaining the semiconductor side at a solder melting temperature or higher, and the substrate temperature falls to a certain degree. After that, the whole is cooled and the solder pump is cured to obtain a connection, so that stress is reduced in joining the resin substrate and the semiconductor chip having a large difference in thermal expansion coefficient. .

According to a third aspect of the present invention, in the second aspect of the present invention, a heater collet capable of controlling the height is brought into close contact with the semiconductor side, and the temperature is controlled separately from the heater block below the substrate. By using a collet to control by a heating method on the semiconductor side, fine control is enabled.

A fourth aspect of the present invention is characterized in that, in the second aspect of the present invention, the semiconductor side is heated by irradiating a light beam from the back surface of the semiconductor, and the non-contact heating is performed by using the light beam. It is possible to join them efficiently.

According to a fifth aspect of the present invention, in the fourth aspect of the present invention, the irradiation point of the light beam is set at the four corners of the semiconductor, so that the time is delayed with respect to the bump on the outer peripheral portion where the stress increases. It is intended to be coagulated.

According to a sixth aspect of the present invention, in the second aspect of the present invention, the difference in expansion is minimized at the temperature at the center value of the temperature change expected due to the use environment, heat generation due to operation, and the like, as follows. Controlling the temperature of the semiconductor and the substrate side, that is, keeping the semiconductor side at or above the solder melting temperature, and increasing the substrate side temperature so that the ratio of substrate expansion is the same as the ratio of semiconductor expansion at the solder freezing point (melting point). Cooling down to a certain temperature, maintaining the temperature, cooling the semiconductor side, cooling down to the temperature at which the solder solidifies, and then cooling both to room temperature. This is to provide a connection that suppresses the generation of stress.

According to a seventh aspect of the present invention, an object in which a semiconductor is mounted face down on a substrate via a solder bump electrode by a normal reflow process is locally heated with a light beam, and the entire body is not heated. It is characterized in that the solder bumps are melted to relieve the stress, so that stress relieving can be performed later even on a product that has undergone a normal reflow process.

According to an eighth aspect of the present invention, in the seventh aspect of the present invention, the solder bump is irradiated with a light beam from the side of the mounted semiconductor to cause the solder bump to melt and harden in sequence, so that the residue generated on the bump is formed. It is characterized by removing stress,
Thus, only the solder bumps can be heated and melted without significantly increasing the entire temperature of the substrate and the semiconductor.

According to a ninth aspect of the present invention, in the eighth aspect of the present invention, the substrate on which the semiconductor is mounted is rotated and, at the same time, the rotation axis is horizontally moved, so that the bander bump is located at the focal position of the light beam. Are sequentially melted and solidified, so that the method of claim 8 can be performed efficiently and speedily.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION

(Inventions of Claims 1 and 2) If the semiconductor and the substrate have different coefficients of thermal expansion, stress is generated in a normal reflow process.
Before the solidification of the bump having a larger linear expansion coefficient, the temperature is lowered to some extent to suppress the expansion, and thereafter, the bump having a smaller linear expansion coefficient is cooled to solidify the bump. Then, the stress applied to the bumps when the temperature drops to the room temperature level decreases. When a resin substrate is used, Si
Since the coefficient of linear expansion of the chip and the normal substrate is nearly doubled for the resin substrate, the substrate side is cooled.

A change in the temperature of the device occurs due to a change in environment, heat generated by operation, or the like. For the sake of simplicity, assuming that the temperature cycles are as shown in FIG. 1 (A), if they are connected by a normal reflow process, after cooling, the difference in thermal expansion between the substrate and the semiconductor will always be as shown in FIG. Although stress is applied and the maximum stress is large, when cooled as described above, FIG.
As shown in (C), the stress becomes close to zero near the center of the temperature change (Tc).

(Invention of Claim 6) As shown in FIG. 2, in the reflow process, after the whole is heated to a temperature equal to or higher than the solder melting temperature, the substrate is cooled to the temperature Ta while maintaining the semiconductor at that temperature. . The temperature Ta is a temperature at which the substrate expansion at this temperature is equal to the expansion of the semiconductor at the solder solidification temperature (melting point). After cooling to temperature Ta,
After cooling the semiconductor and solidifying the solder, the joint is obtained,
Let the whole cool down.

As shown in FIG. 3, in a normal reflow process, as shown in FIG. 3 (A), when the temperature falls below the melting point of the solder during the cooling process, the bumps solidify, and the difference in expansion increases as the temperature decreases from that point. And stress is generated.
However, when the solder bumps are solidified and joined in a state where the substrate side is cooled as shown in FIG. 3B, the difference in expansion is reduced, and the generation of stress can be suppressed.

As shown in FIG. 4, when the semiconductor 1 is at a high temperature and the substrate 2 is at a temperature Ta, a temperature gradient is generated from the semiconductor 1 to the substrate 2. The intermediate point of the bump 3 is set to be near the melting point of the solder. The bump 3 is in a half-molten state and a half-solidified state.

(Invention of Claim 3) As shown in FIG. 5, according to the invention, a heater head 5 is brought into close contact with the semiconductor 1 side to heat it, while a block having good heat conductivity is provided under the substrate 2. Place 6 and let the heat escape.

(Invention of Claim 4) As shown in FIGS. 6 and 7, in the invention of Claim 4, a light beam 7 such as a laser is used for heating the backside of the semiconductor 1, and heating is performed in a non-contact manner. it can.

(Invention of Claim 5) In general, when considering the directions of expansion and contraction, the stress is larger at the outer peripheral portion of the chip as shown by the size of the arrow in FIG. Therefore, FIG.
As shown in FIG. 10, four corners (a, b, c,
Considering the heat transfer with d) as the heating point, FIG.
As shown in the figure, the outer peripheral bumps solidify later in time,
Relieves residual stress.

(Inventions of Claims 7, 8, and 9) In the invention of Claim 7, an object which has passed through a normal reflow process is locally heated later without increasing the overall temperature. The residual stress is released by melting the bump once. The invention of claim 8 is a method of irradiating, heating and melting solder bumps directly from the semiconductor side. Claim 9
As shown in FIG. 12, the invention of the present invention combines the movement of rotating the whole around the rotation axis 8 and the movement in the horizontal direction so that the irradiation bump is located at the focal position such as when condensing with a lens or the like, The focus is always on the bump.

[0026]

According to the first aspect of the present invention, in a connection process for mounting a semiconductor face down on a substrate via a solder pump electrode, after the solder bump is connected to the semiconductor electrode and the substrate electrode by reflow, the semiconductor Alternatively, while keeping one of the substrates at a high temperature, only the other is cooled, and after the temperature has decreased to a certain extent, the whole is cooled, so that flip-chip connection of solder bumps with little residual stress is obtained. Can be

According to a second aspect of the present invention, in the first aspect of the present invention, when the substrate is a resin substrate, the substrate side is cooled while maintaining the semiconductor side at a solder melting temperature or higher, and the substrate temperature drops to a certain degree. Thereafter, since the whole is cooled and the solder pump is hardened and connected, stress can be relaxed in joining the resin substrate and the semiconductor chip having a large difference in thermal expansion coefficient.

According to a third aspect of the present invention, in the second aspect of the present invention, a heater collet whose height can be controlled is brought into close contact with the semiconductor side, and the temperature is controlled separately from the heater block below the substrate. By performing control using a heater collet for heating, fine control becomes possible.

According to a fourth aspect of the present invention, in the second aspect of the present invention, the semiconductor side is heated by irradiating a light beam from the back surface of the semiconductor. Yes, it is efficient.

According to a fifth aspect of the present invention, in the fourth aspect of the present invention, the irradiation points of the light beam are set at the four corners of the semiconductor. Can be done.

According to a sixth aspect of the present invention, in the second aspect of the present invention, the semiconductor side is soldered so that the difference in expansion is minimized at a temperature at a center value of a temperature change expected due to a use environment, heat generation due to operation, and the like. While maintaining the melting temperature or higher, the ratio of the substrate expansion to the substrate side temperature is determined by the solder freezing point (melting point).
The semiconductor side was cooled down to a temperature that was the same as the ratio of semiconductor expansion in the above, and while maintaining that temperature, the semiconductor was cooled down to the temperature at which the solder solidified, and then both were cooled down to room temperature. In this temperature change, a connection that suppresses the occurrence of stress can be obtained.

According to a seventh aspect of the present invention, an object in which a semiconductor is mounted face down on a substrate via a solder bump electrode by a normal reflow process is locally heated with a light beam, and the whole is not heated. Since the solder bumps are melted to relieve the stress, it is possible to relieve the stress even after passing through the normal reflow process.

According to an eighth aspect of the present invention, in the seventh aspect of the present invention, the solder bump is irradiated from the side of the mounted semiconductor to cause melting and hardening in order, thereby removing the residual stress generated in the bump. Therefore, only the solder bumps can be heated and melted without significantly increasing the overall temperature of the substrate and the semiconductor.

According to a ninth aspect of the present invention, in the invention of the eighth aspect, the substrate on which the semiconductor is mounted is rotated and the rotation axis is horizontally moved at the same time, so that the bander bump is located at the focal position of the light beam. Are sequentially melted and solidified, so that the method of claim 8 can be performed efficiently and speedily.

[Brief description of the drawings]

FIG. 1 is a diagram showing an example of a temperature cycle for explaining the operation principle of the present invention.

FIG. 2 is a view for explaining a heating operation according to the invention of claim 6;

FIG. 3 is a diagram for explaining a thermal expansion operation according to the invention of claim 6;

FIG. 4 is a view showing a molten state of a bump according to the invention of claim 6;

FIG. 5 is a diagram showing one embodiment of the invention of claim 3;

FIG. 6 is a diagram showing an embodiment of the invention of claim 4;

FIG. 7 is a view showing another embodiment of the invention of claim 4;

FIG. 8 is a diagram for explaining the operation principle of the invention of claim 5;

FIG. 9 is a side view for explaining the heat method of the invention of claim 5;

FIG. 10 is a diagram showing an example of heat conduction according to the invention of claim 5;

FIG. 11 is a view for explaining a bump cooling order according to the invention of claim 5;

FIG. 12 is a diagram for explaining an embodiment of the invention according to claims 7, 8, and 9;

FIG. 13 is a diagram for explaining an example in which a semiconductor and a substrate are joined by solder bumps.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor, 2 ... Substrate, 3 ... Bump, 5 ... Heater head, 6 ... Heat transfer block, 7 ... Light beam, 8 ... Rotation axis.

Claims (9)

[Claims] In a connection process in which a semiconductor is mounted face down on a substrate via a solder pump electrode, after the connection between the semiconductor electrode and the substrate electrode is obtained by reflow by a solder bump, either the semiconductor or the substrate is connected. A solder bump mounting method characterized in that only the other is cooled while maintaining a high temperature state, and the whole is cooled after the temperature is lowered to some extent. 2. When the substrate is a resin substrate, the substrate side is cooled while maintaining the semiconductor side at a solder melting temperature or higher.
2. The solder bump mounting method according to claim 1, wherein after the substrate temperature has dropped to a certain degree, the whole is cooled and the solder pump is hardened to obtain a connection. 3. The solder bump mounting method according to claim 2, wherein a heater collet whose height can be controlled is brought into close contact with the semiconductor side, and the temperature is controlled separately from a heater block below the substrate. 4. The solder bump mounting method according to claim 2, wherein the semiconductor side is heated by irradiating a light beam from the back surface of the semiconductor. 5. The solder bump mounting method according to claim 4, wherein irradiation points of the light beam are set at four corners of the semiconductor. 6. At a temperature at a center value of a temperature change expected due to a use environment, heat due to operation, or the like, a semiconductor side is kept at a solder melting temperature or higher so that a difference in expansion is minimized. After cooling the temperature to a temperature at which the rate of substrate expansion is the same as the rate of semiconductor expansion at the solder freezing point (melting point), and while maintaining that temperature, cooling the semiconductor side and lowering to the temperature at which the solder solidifies, 3. The solder bump mounting method according to claim 2, wherein both are cooled to room temperature. 7. An object in which a semiconductor is mounted face down on a substrate via a solder bump electrode by a normal reflow process, locally heated by a light beam, and the solder bump is melted without heating the whole. A solder bump mounting method, which relieves stress. 8. The method according to claim 7, wherein a solder bump is irradiated from the side of the mounted semiconductor to cause melting and hardening to occur in order to remove residual stress generated in the bump. Solder bump mounting method. 9. The method according to claim 9, wherein the substrate on which the semiconductor is mounted is rotated, and at the same time, the rotation axis is horizontally moved so that the bander bump is located at the focal position of the light beam, and the bump is melted and solidified in order. 9. The solder bump mounting method according to claim 8, wherein: