CN105117168A - Information processing method and electronic equipment - Google Patents

Information processing method and electronic equipment Download PDF

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Publication number
CN105117168A
CN105117168A CN201510505390.2A CN201510505390A CN105117168A CN 105117168 A CN105117168 A CN 105117168A CN 201510505390 A CN201510505390 A CN 201510505390A CN 105117168 A CN105117168 A CN 105117168A
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data
storage cell
storage
write
storage block
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周光华
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Beijing legend core technology Co., Ltd.
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Lenovo Beijing Ltd
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Priority to CN201510505390.2A priority Critical patent/CN105117168A/en
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Abstract

The embodiment of the invention provides an information processing method and electronic equipment, which are used for achieving the technical effect of effectively using SSD (Solid State Drives) to store resources. The method comprises the following steps of: receiving first data to be written in at the first moment, and determining a first storage address to be written in of the first data; judging whether N storage units can be fully written by the first data, wherein the N is an positive integer; when the N storage units cannot be fully written by the first data, determining a second storage address different from the first storage address; and storing sporadic data by which the N storage units cannot be fully written in the first data into a second storage unit corresponding to the second address, so that one storage unit is fully written by the subsequent written data and the sporadic data together, wherein rest data of the first data is written into (N-1) first storage units corresponding to the first storage address.

Description

A kind of information processing method and electronic equipment
Technical field
The present invention relates to electronic technology field, particularly relate to a kind of information processing method and electronic equipment.
Background technology
SSD (solid state hard disc, SolidStateDrives) is a kind of storage medium being widely used in the fields such as military affairs, vehicle-mounted, industry control, video monitoring, network monitoring.SSD is formed primarily of flash memory particle, and each flash memory particle comprises multiple physical page.The physical page of flash memory particle by logical partitioning in different blocks.SSD also comprises SSD firmware, for managing SSD.
When upper layer application needs to write data in SSD, SSD firmware, first according to logical address and mapping relations, determines the physical address that logical address is corresponding and block corresponding to this physical address.Then the data in the block that will write are wiped.Data are write in last block after being erased.Each piece comprises multiple physical page.Physical page also can referred to as " page " or " page ".
Need successively according to the physical address of page during electronic equipment write data, write on the previous page full after jump to lower one page and continue to write.But the data volume of write data might not be the integral multiple of page just.The capacity of such as one page is 16K, and the data of write have 17K.After so front 16K writes full first page, the sporadic data of last 1K likely can be write second page separately.And then waste all the other 15K storage resources of second page.
So the mode storing data in prior art SSD wastes resource, reduce the storage efficiency of SSD.
Summary of the invention
The embodiment of the present application provides a kind of information processing method and electronic equipment, for realizing the technique effect effectively utilizing SSD storage resources.
First aspect, this application provides a kind of information processing method, comprising:
In the first data that the first reception is to be written, and determine the first memory address that described first data will write;
Judge whether described first data can write completely N number of storage cell; N is positive integer;
When described first data can not write completely described N number of storage cell time, determine the second memory address being different from described first memory address;
The sporadic data can not writing full N number of storage cell in described first data is stored in the second storage cell corresponding to described second address, jointly writes a full storage cell to make the data of follow-up write and described sporadic data; Wherein, N-1 the first storage cell that described first memory address of remainder data write of described first data is corresponding.
Optionally, after the sporadic data can not writing full N number of first storage cell in described first data is stored in the second storage cell corresponding to described second address, also comprise:
In the second data that the second reception is to be written; After being engraved in described first moment when described second;
Judge whether described sporadic data and all or part of of described second data can write a full described storage cell;
When described sporadic data and described second data all or part of can write a full described storage cell, from described second storage cell, read described sporadic data;
Three storage cell corresponding with all or part of write the 3rd memory address of described second data by described sporadic data.
Optionally, determine the second memory address being different from described first memory address, comprising:
From multiple storage block, determine that remaining the maximum storage block of erasable number of times is described first storage block; Wherein, each storage block comprises multiple storage cell;
Really, in described first storage block, meeting pre-conditioned storage cell is described second storage cell, using address corresponding for described second storage cell as described second memory address.
Optionally, before determining that remaining the maximum storage block of erasable number of times is described first storage block, also comprise:
Obtain the record sheet of the erasing times for recording described each storage block;
Travel through described record sheet;
Based on described each storage block flash memory grain type corresponding to described erasable number of times, and the described erasing times of described each storage block, determines the erasable number of times of described residue of described each storage block.
Optionally, described method also comprises:
When the flash memory grain type of solid hard disk SSD at least comprises the first kind and the Second Type different from the described first kind, judge described flash memory grain type is whether the erasable number of times of described residue of the storage block of the first kind is less than threshold value; Wherein, the described erasable number of times of the flash memory particle of the described first kind is less than the described erasable number of times of the flash memory particle of described Second Type;
When the erasable number of times of described residue of the storage block of the described first kind is less than described threshold value, the storage block of the described first kind is converted to the storage block of described Second Type.
Second aspect, this application provides a kind of electronic equipment, comprising:
Housing;
Solid hard disk SSD;
Receiving trap, is arranged on described surface of shell, in the first reception the first data to be written;
Processor, is arranged on described enclosure interior, is connected with described receiving trap and described SSD, for determining the first memory address that described first data will write; Judge whether described first data can write the N number of storage cell in completely described SSD; N is positive integer; When described first data can not write completely described N number of storage cell time, determine the second memory address being different from described first memory address; The sporadic data can not writing full N number of storage cell in described first data is stored in the second storage cell corresponding to described second address, jointly writes a full storage cell to make the data of follow-up write and described sporadic data.
Optionally, described receiving trap also for described processor after the sporadic data can not writing full N number of first storage cell in described first data is stored in the second storage cell corresponding to described second address, in the second data that the second reception is to be written; After being engraved in described first moment when described second;
Described processor is also for judging whether described sporadic data and all or part of of described second data can write a full described storage cell; When described sporadic data and described second data all or part of can write a full described storage cell, from described second storage cell, read described sporadic data; Three storage cell corresponding with all or part of write the 3rd memory address of described second data by described sporadic data.
Optionally, described processor is used for from multiple storage block, determines that remaining the maximum storage block of erasable number of times is described first storage block; Wherein, each storage block comprises multiple storage cell; Really, in described first storage block, meeting pre-conditioned storage cell is described second storage cell, using address corresponding for described second storage cell as described second memory address.
Optionally, described processor also for before determining that remaining the maximum storage block of erasable number of times is described first storage block, obtains the record sheet of the erasing times for recording described each storage block; Travel through described record sheet; Based on described each storage block flash memory grain type corresponding to described erasable number of times, and the described erasing times of described each storage block, determines the erasable number of times of described residue of described each storage block.
Optionally, described processor, also for when the flash memory grain type of described SSD at least comprises the first kind and the Second Type different from the described first kind, judges described flash memory grain type is whether the erasable number of times of described residue of the storage block of the first kind is less than threshold value; Wherein, the described erasable number of times of the flash memory particle of the described first kind is less than the described erasable number of times of the flash memory particle of described Second Type; When the erasable number of times of described residue of the storage block of the described first kind is less than described threshold value, the storage block of the described first kind is converted to the storage block of described Second Type.
The third aspect, this application provides a kind of electronic equipment, comprising:
First receiving element, in the first reception the first data to be written, and determines the first memory address that described first data will write;
First judging unit, for judging whether described first data can write completely N number of storage cell; N is positive integer;
First determining unit, for can not write when described first data completely described N number of storage cell time, determine the second memory address being different from described first memory address;
First response unit, for being stored in the second storage cell corresponding to described second address by the sporadic data can not writing full N number of storage cell in described first data, writes a full storage cell jointly to make the data of follow-up write and described sporadic data; Wherein, N-1 the first storage cell that described first memory address of remainder data write of described first data is corresponding.
Optionally, described electronic equipment also comprises:
Second receiving element, for after being stored in the second storage cell corresponding to described second address by the sporadic data can not writing full N number of first storage cell in described first data, in the second data that the second reception is to be written; After being engraved in described first moment when described second;
Second judging unit, for judging whether described sporadic data and all or part of of described second data can write a full described storage cell;
Reading unit, for when described sporadic data and described second data all or part of can write a full described storage cell, reads described sporadic data from described second storage cell;
3rd response unit, three storage cell corresponding with all or part of write the 3rd memory address of described second data by described sporadic data.
Optionally, described first determining unit is used for from multiple storage block, determines that remaining the maximum storage block of erasable number of times is described first storage block; Wherein, each storage block comprises multiple storage cell;
Really, in described first storage block, meeting pre-conditioned storage cell is described second storage cell, using address corresponding for described second storage cell as described second memory address.
Optionally, described first determining unit also for before determining that remaining the maximum storage block of erasable number of times is described first storage block, obtains the record sheet of the erasing times for recording described each storage block; Travel through described record sheet; Based on described each storage block flash memory grain type corresponding to described erasable number of times, and the described erasing times of described each storage block, determines the erasable number of times of described residue of described each storage block.
Optionally, described electronic equipment also comprises:
3rd judging unit, for when the flash memory grain type of solid hard disk SSD at least comprises the first kind and the Second Type different from the described first kind, judge described flash memory grain type is whether the erasable number of times of described residue of the storage block of the first kind is less than threshold value; Wherein, the described erasable number of times of the flash memory particle of the described first kind is less than the described erasable number of times of the flash memory particle of described Second Type;
Converting unit, when the erasable number of times of described residue for the storage block when the described first kind is less than described threshold value, converts the storage block of described Second Type to by the storage block of the described first kind.
Above-mentioned one or more technical scheme in the embodiment of the present application, at least has one or more technique effects following:
The embodiment of the present application, when the first reception is to the first data to be written, is that the first data determine the first memory address.Next, the embodiment of the present application as prior art directly by the first data write storage cell, but can't judge whether the first data can write completely N number of storage cell, and wherein N is positive integer.When the first data can not write completely N number of storage cell time, namely the first data only can write N-1 storage cell completely, and when after writing a front N-1 storage cell, remaining sporadic data cannot write full N number of storage cell, then determine the second memory address in addition, and sporadic data is write in second storage cell corresponding to the second memory address.Remainder data in first data is then still stored in N-1 corresponding to the first memory address the first storage cell.And then, when follow-up write data again time, sporadic data can be combined with the data of follow-up write and form the data enough writing a full storage cell, and jointly writes a storage cell with follow-up data further.So, just avoid sporadic data and may take separately a storage cell, and then cause the problem of the wasting of resources, achieve the technique effect effectively utilizing SSD storage resources.
Accompanying drawing explanation
Fig. 1 is the process flow diagram of information processing method in the embodiment of the present application;
Fig. 2 is the structural representation of an electronic equipment in the embodiment of the present application;
Fig. 3 is the structural representation of another electronic equipment in the embodiment of the present application.
Embodiment
The embodiment of the present application provides a kind of information processing method and electronic equipment, wastes the technical matters of resource for solving in prior art SSD the mode storing data, realizes the technique effect effectively utilizing SSD storage resources.
In order to solve the problems of the technologies described above, the technical scheme general thought that the application provides is as follows:
The embodiment of the present application, when the first reception is to the first data to be written, is that the first data determine the first memory address.Next, the embodiment of the present application as prior art directly by the first data write storage cell, but can't judge whether the first data can write completely N number of storage cell, and wherein N is positive integer.When the first data can not write completely N number of storage cell time, namely the first data only can write N-1 storage cell completely, and when after writing a front N-1 storage cell, remaining sporadic data cannot write full N number of storage cell, then determine the second memory address in addition, and sporadic data is write in second storage cell corresponding to the second memory address.Remainder data in first data is then still stored in N-1 corresponding to the first memory address the first storage cell.And then, when follow-up write data again time, sporadic data can be combined with the data of follow-up write and form the data enough writing a full storage cell, and jointly writes a storage cell with follow-up data further.So, just avoid sporadic data and may take separately a storage cell, and then cause the problem of the wasting of resources, achieve the technique effect effectively utilizing SSD storage resources.
Below by accompanying drawing and specific embodiment, technical solution of the present invention is described in detail, the specific features being to be understood that in the embodiment of the present application and embodiment is the detailed description to technical scheme, instead of the restriction to technical scheme, when not conflicting, the technical characteristic in the embodiment of the present application and embodiment can combine mutually.
Term "and/or" herein, being only a kind of incidence relation describing affiliated partner, can there are three kinds of relations in expression, and such as, A and/or B, can represent: individualism A, exists A and B simultaneously, these three kinds of situations of individualism B.In addition, character "/" herein, general expression forward-backward correlation is to the relation liking a kind of "or".
The application's first aspect provides a kind of information processing method, please refer to Fig. 1, comprises the steps:
S101: in the first data that the first reception is to be written, and determine the first memory address that described first data will write.
S102: judge whether described first data can write completely N number of storage cell.
S103: when described first data can not write completely described N number of storage cell time, determine the second memory address being different from described first memory address.
S104: the sporadic data can not writing full N number of storage cell in described first data is stored in the second storage cell corresponding to described second address.
Specifically, the first data to be written are received at the first moment T1 electronic equipment.First data can be the data that user inputs on an electronic device, and can be that another electronic equipment sends and next data, the application do concrete restriction yet.User, according to oneself needs and custom, selects the logical address of write first data, such as D dish, and E dish file is called the file of " English " or desktop etc.SSD firmware receives the first data of upper layer transport and the logical address of write the first data, and logically maps rule between address and SSD physical address, determines the first memory address that the first data will write.
The sporadic data can not writing a full storage cell in the first data occupies separately a storage cell and then waste resource, after determining the first memory address, in S102, will judge whether the first data can write completely N number of storage cell.Wherein, N is positive integer.First memory address can be the start address of N number of storage cell, also can be N number of storage cell start address and final position, can also be the reference position of N number of storage cell and the deviation post from reference position.The application those of ordinary skill in the field can be arranged according to actual, and the application does not do concrete restriction.
Specifically, in the embodiment of the present application, storage cell is physical page, and in this article, storage cell, physical page, the page or page all refer to identical.Storage cell is the base unit of electronic equipment read-write, namely electronic equipment read-write operation for be data in a storage cell.The space of each storage cell is fixing, such as 16K.Therefore, judge whether the first data can write completely N number of storage cell, be specially the integral multiple whether data volume judging the first data is the space of storage cell.In other words, if the data volume of the first data is N divided by the business in the space of storage cell, and there is no remainder, or remainder is 0, then represent that the first data can write completely N number of storage cell.If the data volume of the first data is N-1 divided by the business in the space of storage cell, and has remainder, or remainder is not 0, then represent that the first data can not write completely N number of storage cell, only can write a full N-1 storage cell.
For example, suppose that the data volume of the first data is 160K, the space of storage cell is 16K, then
160K÷16K=10。
So the first data can write full 10 storage cells.Now, N is 10.
Again for example, suppose that the data volume of the first data is 17K, the space of storage cell is 16K, then
17K÷16K=1…..1K。
So the first data can write full 1 storage cell, and after writing 1 storage cell, remaining last 1K data cannot write full next storage cell.Now, N is 2.
Further, when the first data can write completely N number of storage cell time, then according to the first memory address, the first data are write successively in N number of first storage cell corresponding to the first memory address.Such as 160K first data are above write 10 the first storage cells successively, be specially in the 1st the first storage cell and write 0K-15K first data, 16K-31K first data are write in 2nd the first storage cell, 32K-47K first data are write in 3rd the first storage cell,, in N number of first storage cell, write 144K-159K first data.
And when the first data can not write completely N number of storage cell time, perform S103, determine the second memory address being different from the first memory address.Another storage cell that second memory address is corresponding different from N number of first storage cell.In the embodiment of the present application, the storage cell that the second memory address is corresponding is the second storage cell.Second storage cell can not write the sporadic data of full N number of first storage cell for depositing, so that sporadic data waits for that follow-up data gathers enough the data volume in a storage cell space.Second memory address can be the start address of the second storage cell, can be the second storage cell start address and final position, can also be the reference position of the second storage cell and the deviation post from reference position etc.
Second storage cell is identical with the space of the first storage cell.Second storage cell with N number of first storage cell in same storage block, also in same storage block, may may not do concrete restriction to this application.In the embodiment of the present application, each storage block or block, comprise multiple storage cell, and such as a storage block comprises 256 storage cells, and the storage cell quantity that each storage block comprises is identical.
After determining the second memory address, perform S104: be stored in the second storage cell corresponding to described second address by the sporadic data that full N number of storage cell can not be write in described first data.
Specifically, in order to avoid sporadic data occupies N number of first storage cell separately, in the embodiment of the present application, sporadic data will be stored in the second storage cell.And then, when follow-up when writing data, follow-up data and sporadic data can be write jointly a full storage cell.So sporadic data would not occupy a storage cell by document, and then improves the resource utilization of SSD.
In addition, the remainder data in the first data except sporadic data is also by N-1 corresponding for write first address the first storage cell.
Conveniently be described said process, with the space of storage cell for 16K, the data volume of the first data is 17K is that example is described.Suppose the logical address come according to upper layer transport, determine that the first memory address is reference position 00:00, the first memory address points to the 1st storage cell of the 1st storage block.Determine by calculating, first data of 16K can not write full 2 memory pages, and only have front 16K can write a full memory page, last 1K data are sporadic data.So, determine the second memory address for 1K sporadic data further.Suppose that the second memory address is reference position 01:20, the second memory address points to the 20th storage cell of the 2nd storage block.Finally, according to the first memory address 00:00 and the second memory address 01:20, the 0-15K in the first data is write the 1st storage cell of the 1st storage block, the sporadic data of 16K is write the 20th storage cell of the 2nd storage block.
So, when follow-up write data, 16K will be gathered enough by the 1K data in the 20th storage cell of follow-up 15K data and the 2nd storage block, and then these 16K data are write a storage cell.
Just to how, the data of sporadic data and follow-up write are write a full storage cell jointly below to describe in detail.In the embodiment of the present application, after S104, also comprise:
In the second data that the second reception is to be written; After being engraved in described first moment when described second;
Judge whether described sporadic data and all or part of of described second data can write a full described storage cell;
When described sporadic data and described second data all or part of can write a full described storage cell, from described second storage cell, read described sporadic data;
Three storage cell corresponding with all or part of write the 3rd memory address of described second data by described sporadic data.
Specifically, the second moment T2 after tl, SSD firmware receives the second data of upper layer transport again.With the first data class seemingly, the data that the second data can input in the electronic device for user, also can be another electronic equipment send data, the application does not do concrete restriction.
After receiving the second data, in order to improve the resource utilization of SSD, SSD firmware will write a storage cell the whole of the second data with part together with sporadic data.Therefore, after receiving the second data, judge whether sporadic data and all or part of of the second data can write a full storage cell further.
Specifically, in order to judge whether sporadic data and all or part of of the second data can write a full storage cell, need the data volume of judgement second data, whether are more than or equal to the white space of the second storage cell.Store sporadic data in second storage cell, but sporadic data does not write full second storage cell, the space therefore not with data in the second storage cell is exactly the white space of the second storage cell.
When the data volume of the second data equals the white space of the second storage cell, then whole second data are just identical with the space of storage cell with the data volume sum of sporadic data.When the data volume of the second data is greater than the white space of the second storage cell, show that part second data are identical with the space of storage cell with the data volume sum of sporadic data.So when the data volume of the second data is more than or equal to the white space of the second storage cell, sporadic data and all or part of of the second data can write a full storage cell.
When sporadic data and the second data all or part of can write a full storage cell, sporadic data is read from the second storage cell, then by the 3rd corresponding with part or all of write the 3rd memory address of the second data for the sporadic data read out storage cell.
Specifically, the 3rd storage cell is identical with the space of the second storage cell with the first storage cell, can in same storage block with the first storage cell and the second storage cell, also can not in same storage block, and the application does not do concrete restriction.And the 3rd memory address, in the embodiment of the present application, can be physical address corresponding to logical address that the second data are specified for the user of upper layer transport, the physical address also can specified arbitrarily for SSD firmware.Because sporadic data is the last parts of the first data, therefore preferably, the 3rd memory address is the address of N number of first storage cell of sensing.And then when reading the first data successively according to physical address, after having read N-1 the first storage cell, having read next storage cell, just directly can read sporadic data, thus obtaining the first complete data.
Continue to use example above.In second data of T2 reception to 17K, SSD firmware judges that the 0-14K data in the second data can be that the sporadic data of 1K in the 20th storage cell of the 2nd storage block gathers enough 16K, and then writes a full storage cell.Suppose that the 3rd memory address is 00:01, point to the 2nd storage cell of the 1st storage block.So SSD firmware reads the sporadic data of 1K from the 20th storage cell of the 2nd storage block, then 1K sporadic data is write together with the 0-14K data of the second data the 2nd storage cell of the 1st storage block.
Seen from the above description, when T2 write the second data partly or entirely can write a full storage cell together with sporadic data time, sporadic data is read from the second storage cell, so by sporadic data and the second data partly or entirely together with write the 3rd storage cell.Thus, just avoid sporadic data and occupy separately a storage cell, improve the resource utilization of SSD.
Further, when the data volume of the second data is greater than the white space of the second storage cell, the part of the second data can write the 3rd storage cell together with sporadic data.If when the second remaining data can not write a full M storage cell (M is positive integer), still can process according to such scheme, just do not repeat to have repeated here.
When SSD is when determining the second memory address, the storage cell of a storage block can be selected arbitrarily as the second storage cell, and then using the address of the second storage cell as the second memory address.But the erasable number of times of flash memory particle is limited, if a certain storage block of repeated multiple times erasing, will bad block be caused, and then shorten the serviceable life of SSD.So, optionally, when S103 determines the second memory address, can be specific as follows:
From multiple storage block, determine that remaining the maximum storage block of erasable number of times is described first storage block; Wherein, each storage block comprises multiple storage cell;
Really, in described first storage block, meeting pre-conditioned storage cell is described second storage cell, using address corresponding for described second storage cell as described second memory address.
Specifically, SSD comprises multiple storage block, in order to the erasable number of times of residue of each storage block of equilibrium, certain block is avoided to be worn, in the embodiment of the present application, SSD will determine in multiple storage block, and remaining the maximum storage block of erasable number of times is the first storage block, and the second storage cell is a storage cell in the first storage block.
For example, suppose that SSD comprises 256 storage blocks, the erasable number of times of residue of the 2nd storage block is 501 times, and the erasable number of times of residue of all the other 255 storage blocks is 500 times, so just using the 2nd storage block as the first storage block.
Further, after determining the first storage block, SSD firmware erasing first storage block, is convenient to write sporadic data.
After determining the first storage block, also need in multiple storage cells of the first storage block, to determine the second storage cell further.In the embodiment of the present application, pre-conditioned storage cell will be met as the second storage cell.Specifically, pre-conditioned have multiple possibility, such as, first storage cell in the first storage block, or last storage cell in the first storage block.Or before determining the second storage cell, be again written with new data in the first storage block in erasing first storage block, so pre-conditioned can also be the storage cell that in the first storage block, first does not write data.In specific implementation process, for pre-conditioned, the application those of ordinary skill in the field can be arranged according to actual, and the application does not do concrete restriction.
When determine from the first storage block meet pre-conditioned storage cell as the second storage cell after, address corresponding to the second storage cell is exactly the second memory address.
Further, in order to determine the first storage block from multiple pieces, before determining that remaining the maximum storage block of erasable number of times is the first storage block, also comprise:
Obtain the record sheet of the erasing times for recording described each storage block;
Travel through described record sheet;
Based on described each storage block flash memory grain type corresponding to described erasable number of times, and the described erasing times of described each storage block, determines the erasable number of times of described residue of described each storage block.
Specifically, safeguard there is one for recording the record sheet of the erasing times of each storage block in the electronic device.This record sheet is dynamic, all can corresponding change during each SSD firmware erasing.In order to determine that the erasable number of times of the residue of which storage block in multiple storage block is maximum, SSD needs first to obtain record sheet.After obtaining record sheet, SSD firmware traversal record table, and then read the erasing times of each storage block.
Further, flash memory particle has three types, is respectively SLC (single layer cell, Single-LevelCell), MLC (multilevel-cell, Multi-LevelCell) and TLC (three-layer unit, Trinary-LevelCell).And the erasable number of times of often kind of flash memory particle is different, the erasable number of times of SLC is up to 10 6secondary, the erasable number of times of MLC has 3000 to 10000 times, and the erasable number of times of TLC only has 500 to 1000 times.
Therefore, when SSD is made up of above-mentioned two or three flash memory grain type, the erasable number of times that the erasable number of times of residue of each storage block is just specially the flash memory grain type of storage block corresponding deducts erasing times.
Be introduced for the 2nd storage block.Suppose that the flash memory grain type of the 2nd storage block is SLC, in this SSD, the erasable number of times of SLC is specially 10 6secondary, and the erasing times of the 2nd storage block is 999499 times, then determine that the erasable number of times of residue of the 2nd storage block is 501 times.Suppose that the flash memory grain type of the 2nd storage block is MLC, in this SSD, the erasable number of times of MLC is specially 3000 times, and the erasing times of the 2nd storage block is 2499 times, then determine that the erasable number of times of residue of the 2nd storage block is 501 times.Suppose that the flash memory grain type of the 2nd storage block is TLC, in this SSD, the erasable number of times of TLC is specially 1000 times, and the erasing times of the 2nd storage block is 499 times, then determine that the erasable number of times of residue of the 2nd storage block is 501 times.
By said process, SSD firmware just defines the second storage cell, and using the address of the second storage cell as the second memory address.
Optionally, in the embodiment of the present application, also comprise:
When the flash memory grain type of solid hard disk SSD at least comprises the first kind and the Second Type different from the described first kind, judge described flash memory grain type is whether the erasable number of times of described residue of the storage block of the first kind is less than threshold value; Wherein, the described erasable number of times of the flash memory particle of the described first kind is less than the described erasable number of times of the flash memory particle of described Second Type;
When the erasable number of times of described residue of the storage block of the described first kind is less than described threshold value, the storage block of the described first kind is converted to the storage block of described Second Type.
Specifically, the SSD in the embodiment of the present application comprises the flash memory particle of at least first kind and Second Type, and wherein the erasable number of times of the flash memory particle of the first kind is less than the erasable number of times of the flash memory particle of Second Type.Such as SSD comprises the flash memory particle of two types, and the such as first kind is MLC, and Second Type is SLC, or SSD comprises SLC, MLC and TLC tri-kinds of flash types.The application those of ordinary skill in the field can be arranged according to actual, and the application does not do concrete restriction.
Because the erasable number of times of SLC does many, MLC takes second place, the erasable least number of times of TLC, so the longest-lived of SLC, MLC takes second place, and the life-span of TLC is the shortest.In order to extend the life-span of SSD, in the embodiment of the present application, judge flash memory grain type is whether the erasable number of times of residue of the storage block of the first kind is less than threshold value.Threshold value is such as 20,10 or 50 etc.When the erasable number of times of residue of the storage block of the first kind is less than threshold value, in other words, when the erasable number of times of residue of the storage block of the first kind is less, in order to extend the life-span of SSD, the storage block of the first kind is converted to the storage block of Second Type.
Erasable number of times due to Second Type is greater than the erasable number of times of the first kind, so, after converting the first kind to Second Type, the erasable number of times of residue of storage block will be increased, extend the SSD life-span.
The such as first kind is MLC, and Second Type is SLC, and threshold value is 20.When the erasable number of times of residue of the storage block of MLC type is less than 20, convert MLC to SLC.
In specific implementation process, the flash memory particle of the first kind is converted to the flash memory particle of Second Type, specifically can the unnecessary control voltage end of flash memory particle of the invalid first kind.The control voltage end of such as SLC has 2, and the control voltage end of MLC has 4, so in order to convert MLC to SLC, and can invalid wherein two control voltage ends.Certainly, the application those of ordinary skill in the field can be arranged according to actual, and the application does not do concrete restriction.
Based on the inventive concept same with information processing method in previous embodiment, the application's second aspect also provides a kind of electronic equipment, as shown in Figure 2, comprising:
Housing 201;
SSD202;
Receiving trap 203, is arranged on housing 201 surface, in the first reception the first data to be written;
Processor 204, being arranged on housing 201 inner, being connected, for determining the first memory address that the first data will write with receiving trap 203 and SSD202; Judge whether the first data can write the N number of storage cell in full SSD202; N be positive integer when the first data can not write completely N number of storage cell time, determine the second memory address being different from the first memory address; The sporadic data can not writing full N number of storage cell in first data is stored in the second storage cell corresponding to the second address, jointly writes a full storage cell to make the data of follow-up write and sporadic data.
Further, receiving trap 203 also for the treatment of device 204 after the sporadic data can not writing full N number of first storage cell in the first data is stored in the second storage cell corresponding to the second address, in the second data that the second reception is to be written; After being engraved in for the first moment when second;
Processor 204 is also for judging whether sporadic data and all or part of of the second data can write a full storage cell; When sporadic data and the second data all or part of can write a full storage cell, from the second storage cell, read sporadic data; Three storage cell corresponding with all or part of write the 3rd memory address of the second data by sporadic data.
Specifically, in the embodiment of the present application, when determining the second memory address, processor 204, specifically for from multiple storage block, determines that remaining the maximum storage block of erasable number of times is the first storage block; Wherein, each storage block comprises multiple storage cell; In certain first storage block, meeting pre-conditioned storage cell is the second storage cell, using address corresponding for the second storage cell as the second memory address.
Further, for determining the second memory address, processor 204 also for before determining that remaining the maximum storage block of erasable number of times is the first storage block, obtains the record sheet of the erasing times for recording each storage block; Traversal record table; Based on each storage block flash memory grain type corresponding to erasable number of times, and the erasing times of each storage block, determines the erasable number of times of the residue of each storage block.
Optionally, processor 204, also for when the flash memory grain type of SSD202 at least comprises the first kind and the Second Type different from the first kind, judges flash memory grain type is whether the erasable number of times of residue of the storage block of the first kind is less than threshold value; Wherein, the erasable number of times of the flash memory particle of the first kind is less than the erasable number of times of the flash memory particle of Second Type; When the erasable number of times of residue of the storage block of the first kind is less than threshold value, the storage block of the first kind is converted to the storage block of Second Type.
Specifically, housing 201 is for the protection of electronic equipment.In specific implementation process, housing adopts organic material, plastics or makes at metal material, and the application does not do concrete restriction.
SSD202 is placed in housing.In the embodiment of the present application, the first storage cell, the second storage cell and the 3rd storage cell are the storage cell in SSD202.SSD202 comprises multiple storage block, and each storage block comprises the identical multiple storage cells of quantity.
Receiving trap 203 is such as keyboard, mouse etc., for receiving the data of user's input.In addition, receiving trap 203 can also be antenna, the antenna that such as wireless lan antenna, Bluetooth antenna or radio-frequency antenna etc. can connect with another electronic equipment, and then receives the data of another electronic equipment transmission by antenna.
Electronic equipment also comprises processor 204, for the read-write process of control SSD.Specifically, processor 204 can be specifically general central processing unit (CPU), can be that ASIC(Application Specific Integrated Circuit) is (English: ApplicationSpecificIntegratedCircuit, being called for short: ASIC), can be one or more integrated circuit performed for control program.In addition, in specific implementation process, processor 204 can also be the SSD firmware of SSD202, and the application does not do concrete restriction.
Further, electronic equipment can also comprise storer, and the quantity of storer can be one or more.Storer can comprise ROM (read-only memory) (English: ReadOnlyMemory, be called for short: ROM), random access memory (English: RandomAccessMemory, RAM) and magnetic disk memory be called for short:.
The various variation pattern of the information processing method in earlier figures 1 embodiment and instantiation are equally applicable to the electronic equipment of the present embodiment, by the aforementioned detailed description to information processing method, those skilled in the art clearly can know the implementation method of electronic equipment in the present embodiment, so succinct in order to instructions, be not described in detail in this.
Based on the inventive concept same with information processing method in previous embodiment, the application's third aspect also provides a kind of electronic equipment, as shown in Figure 3, comprising:
First receiving element 301, in the first reception the first data to be written, and determines the first memory address that the first data will write;
First judging unit 302, for judging whether the first data can write completely N number of storage cell; N is positive integer
First determining unit 303, for can not write when the first data completely N number of storage cell time, determine the second memory address being different from the first memory address;
First response unit 304, for being stored in the second storage cell corresponding to the second address by the sporadic data can not writing full N number of storage cell in the first data, writes a full storage cell jointly to make the data of follow-up write and sporadic data; Wherein, the remainder data of the first data writes N-1 corresponding to the first memory address the first storage cell.
Optionally, in the embodiment of the present application, electronic equipment also comprises:
Second receiving element, for after being stored in the second storage cell corresponding to the second address by the sporadic data can not writing full N number of first storage cell in the first data, in the second data that the second reception is to be written; After being engraved in for the first moment when second;
Second judging unit, for judging whether sporadic data and all or part of of the second data can write a full storage cell;
Reading unit, for when sporadic data and the second data all or part of can write a full storage cell, reads sporadic data from the second storage cell;
3rd response unit, three storage cell corresponding with all or part of write the 3rd memory address of the second data by sporadic data.
Specifically, when determining the second memory address, the first determining unit 303, for from multiple storage block, determines that remaining the maximum storage block of erasable number of times is the first storage block; Wherein, each storage block comprises multiple storage cell;
In certain first storage block, meeting pre-conditioned storage cell is the second storage cell, using address corresponding for the second storage cell as the second memory address.
Optionally, the first determining unit 303 also for before determining that remaining the maximum storage block of erasable number of times is the first storage block, obtains the record sheet of the erasing times for recording each storage block; Traversal record table; Based on each storage block flash memory grain type corresponding to erasable number of times, and the erasing times of each storage block, determines the erasable number of times of the residue of each storage block.
Optionally, in order to extend the SSD life-span, in the embodiment of the present application, electronic equipment also comprises:
3rd judging unit, for when the flash memory grain type of solid hard disk SSD at least comprises the first kind and the Second Type different from the first kind, judges flash memory grain type is whether the erasable number of times of residue of the storage block of the first kind is less than threshold value; Wherein, the erasable number of times of the flash memory particle of the first kind is less than the erasable number of times of the flash memory particle of Second Type;
Converting unit, when the erasable number of times of the residue for the storage block when the first kind is less than threshold value, converts the storage block of Second Type to by the storage block of the first kind.
The various variation pattern of the information processing method in earlier figures 1 embodiment and instantiation are equally applicable to the electronic equipment of the present embodiment, by the aforementioned detailed description to information processing method, those skilled in the art clearly can know the implementation method of electronic equipment in the present embodiment, so succinct in order to instructions, be not described in detail in this.
Above-mentioned one or more technical scheme in the embodiment of the present application, at least has one or more technique effects following:
The embodiment of the present application, when the first reception is to the first data to be written, is that the first data determine the first memory address.Next, the embodiment of the present application as prior art directly by the first data write storage cell, but can't judge whether the first data can write completely N number of storage cell, and wherein N is positive integer.When the first data can not write completely N number of storage cell time, namely the first data only can write N-1 storage cell completely, and when after writing a front N-1 storage cell, remaining sporadic data cannot write full N number of storage cell, then determine the second memory address in addition, and sporadic data is write in second storage cell corresponding to the second memory address.Remainder data in first data is then still stored in N-1 corresponding to the first memory address the first storage cell.And then, when follow-up write data again time, sporadic data can be combined with the data of follow-up write and form the data enough writing a full storage cell, and jointly writes a storage cell with follow-up data further.So, just avoid sporadic data and may take separately a storage cell, and then cause the problem of the wasting of resources, achieve the technique effect effectively utilizing SSD storage resources.
Those skilled in the art should understand, embodiments of the invention can be provided as method, system or computer program.Therefore, the present invention can adopt the form of complete hardware embodiment, completely software implementation or the embodiment in conjunction with software and hardware aspect.And the present invention can adopt in one or more form wherein including the upper computer program implemented of computer-usable storage medium (including but not limited to magnetic disk memory, CD-ROM, optical memory etc.) of computer usable program code.
The present invention describes with reference to according to the process flow diagram of the method for the embodiment of the present invention, equipment (system) and computer program and/or block scheme.Should understand can by the combination of the flow process in each flow process in computer program instructions realization flow figure and/or block scheme and/or square frame and process flow diagram and/or block scheme and/or square frame.These computer program instructions can being provided to the processor of multi-purpose computer, special purpose computer, Embedded Processor or other programmable data processing device to produce a machine, making the instruction performed by the processor of computing machine or other programmable data processing device produce device for realizing the function of specifying in process flow diagram flow process or multiple flow process and/or block scheme square frame or multiple square frame.
These computer program instructions also can be stored in can in the computer-readable memory that works in a specific way of vectoring computer or other programmable data processing device, the instruction making to be stored in this computer-readable memory produces the manufacture comprising command device, and this command device realizes the function of specifying in process flow diagram flow process or multiple flow process and/or block scheme square frame or multiple square frame.
These computer program instructions also can be loaded in computing machine or other programmable data processing device, make on computing machine or other programmable devices, to perform sequence of operations step to produce computer implemented process, thus the instruction performed on computing machine or other programmable devices is provided for the step realizing the function of specifying in process flow diagram flow process or multiple flow process and/or block scheme square frame or multiple square frame.
Specifically, the computer program instructions that a kind of information processing method in the embodiment of the present application is corresponding can be stored in CD, hard disk, on the storage mediums such as USB flash disk, when the computer program instructions corresponding with the first information processing method in storage medium is read by an electronic equipment or be performed, comprise the steps:
In the first data that the first reception is to be written, and determine the first memory address that described first data will write;
Judge whether described first data can write completely N number of storage cell; N is positive integer;
When described first data can not write completely described N number of storage cell time, determine the second memory address being different from described first memory address;
The sporadic data can not writing full N number of storage cell in described first data is stored in the second storage cell corresponding to described second address, jointly writes a full storage cell to make the data of follow-up write and described sporadic data; Wherein, N-1 the first storage cell that described first memory address of remainder data write of described first data is corresponding.
Optionally, other computer instruction is also stored in described storage medium, these computer instructions with step: being performed after the sporadic data can not writing full N number of first storage cell in described first data is stored in the second storage cell corresponding to described second address, comprising the steps: when being performed
In the second data that the second reception is to be written; After being engraved in described first moment when described second;
Judge whether described sporadic data and all or part of of described second data can write a full described storage cell;
When described sporadic data and described second data all or part of can write a full described storage cell, from described second storage cell, read described sporadic data;
Three storage cell corresponding with all or part of write the 3rd memory address of described second data by described sporadic data.
Optionally, what store in described storage medium determines to be different from the second memory address of described first memory address with step, and corresponding computer instruction, being specifically performed in process, specifically comprises the steps:
From multiple storage block, determine that remaining the maximum storage block of erasable number of times is described first storage block; Wherein, each storage block comprises multiple storage cell;
Really, in described first storage block, meeting pre-conditioned storage cell is described second storage cell, using address corresponding for described second storage cell as described second memory address.
Optionally, in described storage medium, also store other computer instruction, these computer instructions with step: being performed determining to remain before the maximum storage block of erasable number of times is described first storage block, comprising the steps: when being performed
Obtain the record sheet of the erasing times for recording described each storage block;
Travel through described record sheet;
Based on described each storage block flash memory grain type corresponding to described erasable number of times, and the described erasing times of described each storage block, determines the erasable number of times of described residue of described each storage block.
Optionally, also store other computer instruction in described storage medium, these computer instructions are performed, and comprise the steps: when being performed
When the flash memory grain type of solid hard disk SSD at least comprises the first kind and the Second Type different from the described first kind, judge described flash memory grain type is whether the erasable number of times of described residue of the storage block of the first kind is less than threshold value; Wherein, the described erasable number of times of the flash memory particle of the described first kind is less than the described erasable number of times of the flash memory particle of described Second Type;
When the erasable number of times of described residue of the storage block of the described first kind is less than described threshold value, the storage block of the described first kind is converted to the storage block of described Second Type.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.

Claims (11)

1. an information processing method, comprising:
In the first data that the first reception is to be written, and determine the first memory address that described first data will write;
Judge whether described first data can write completely N number of storage cell; N is positive integer;
When described first data can not write completely described N number of storage cell time, determine the second memory address being different from described first memory address;
The sporadic data can not writing full N number of storage cell in described first data is stored in the second storage cell corresponding to described second address, jointly writes a full storage cell to make the data of follow-up write and described sporadic data; Wherein, N-1 the first storage cell that described first memory address of remainder data write of described first data is corresponding.
2. the method for claim 1, is characterized in that, after being stored in the second storage cell corresponding to described second address by the sporadic data can not writing full N number of first storage cell in described first data, also comprises:
In the second data that the second reception is to be written; After being engraved in described first moment when described second;
Judge whether described sporadic data and all or part of of described second data can write a full described storage cell;
When described sporadic data and described second data all or part of can write a full described storage cell, from described second storage cell, read described sporadic data;
Three storage cell corresponding with all or part of write the 3rd memory address of described second data by described sporadic data.
3. as the method for claim 1 or 2, it is characterized in that, determine the second memory address being different from described first memory address, comprising:
From multiple storage block, determine that remaining the maximum storage block of erasable number of times is described first storage block; Wherein, each storage block comprises multiple storage cell;
Really, in described first storage block, meeting pre-conditioned storage cell is described second storage cell, using address corresponding for described second storage cell as described second memory address.
4. method as claimed in claim 3, is characterized in that, before determining that remaining the maximum storage block of erasable number of times is described first storage block, also comprise:
Obtain the record sheet of the erasing times for recording described each storage block;
Travel through described record sheet;
Based on described each storage block flash memory grain type corresponding to described erasable number of times, and the described erasing times of described each storage block, determines the erasable number of times of described residue of described each storage block.
5. method as claimed in claim 4, it is characterized in that, described method also comprises:
When the flash memory grain type of solid hard disk SSD at least comprises the first kind and the Second Type different from the described first kind, judge described flash memory grain type is whether the erasable number of times of described residue of the storage block of the first kind is less than threshold value; Wherein, the described erasable number of times of the flash memory particle of the described first kind is less than the described erasable number of times of the flash memory particle of described Second Type;
When the erasable number of times of described residue of the storage block of the described first kind is less than described threshold value, the storage block of the described first kind is converted to the storage block of described Second Type.
6. an electronic equipment, comprising:
Housing;
Solid hard disk SSD;
Receiving trap, is arranged on described surface of shell, in the first reception the first data to be written;
Processor, is arranged on described enclosure interior, is connected with described receiving trap and described SSD, for determining the first memory address that described first data will write; Judge whether described first data can write the N number of storage cell in completely described SSD; N is positive integer; When described first data can not write completely described N number of storage cell time, determine the second memory address being different from described first memory address; The sporadic data can not writing full N number of storage cell in described first data is stored in the second storage cell corresponding to described second address, jointly writes a full storage cell to make the data of follow-up write and described sporadic data.
7. electronic equipment as claimed in claim 6, it is characterized in that, described receiving trap also for described processor after the sporadic data can not writing full N number of first storage cell in described first data is stored in the second storage cell corresponding to described second address, in the second data that the second reception is to be written; After being engraved in described first moment when described second;
Described processor is also for judging whether described sporadic data and all or part of of described second data can write a full described storage cell; When described sporadic data and described second data all or part of can write a full described storage cell, from described second storage cell, read described sporadic data; Three storage cell corresponding with all or part of write the 3rd memory address of described second data by described sporadic data.
8. electronic equipment as claimed in claims 6 or 7, is characterized in that, described processor is used for from multiple storage block, determines that remaining the maximum storage block of erasable number of times is described first storage block; Wherein, each storage block comprises multiple storage cell; Really, in described first storage block, meeting pre-conditioned storage cell is described second storage cell, using address corresponding for described second storage cell as described second memory address.
9. electronic equipment as claimed in claim 8, it is characterized in that, described processor also for before determining that remaining the maximum storage block of erasable number of times is described first storage block, obtains the record sheet of the erasing times for recording described each storage block; Travel through described record sheet; Based on described each storage block flash memory grain type corresponding to described erasable number of times, and the described erasing times of described each storage block, determines the erasable number of times of described residue of described each storage block.
10. electronic equipment as claimed in claim 9, it is characterized in that, described processor, also for when the flash memory grain type of described SSD at least comprises the first kind and the Second Type different from the described first kind, judges described flash memory grain type is whether the erasable number of times of described residue of the storage block of the first kind is less than threshold value; Wherein, the described erasable number of times of the flash memory particle of the described first kind is less than the described erasable number of times of the flash memory particle of described Second Type; When the erasable number of times of described residue of the storage block of the described first kind is less than described threshold value, the storage block of the described first kind is converted to the storage block of described Second Type.
11. 1 kinds of electronic equipments, comprising:
First receiving element, in the first reception the first data to be written, and determines the first memory address that described first data will write;
First judging unit, for judging whether described first data can write completely N number of storage cell; N is positive integer;
First determining unit, for can not write when described first data completely described N number of storage cell time, determine the second memory address being different from described first memory address;
First response unit, for being stored in the second storage cell corresponding to described second address by the sporadic data can not writing full N number of storage cell in described first data, writes a full storage cell jointly to make the data of follow-up write and described sporadic data; Wherein, N-1 the first storage cell that described first memory address of remainder data write of described first data is corresponding.
CN201510505390.2A 2015-08-17 2015-08-17 Information processing method and electronic equipment Pending CN105117168A (en)

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