CN111435403B - Wear balancing method and device for flash memory system - Google Patents

Wear balancing method and device for flash memory system Download PDF

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CN111435403B
CN111435403B CN201811603675.XA CN201811603675A CN111435403B CN 111435403 B CN111435403 B CN 111435403B CN 201811603675 A CN201811603675 A CN 201811603675A CN 111435403 B CN111435403 B CN 111435403B
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lun
lun partition
partition
flash memory
memory system
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CN111435403A (en
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程晨
刘宁钟
唐瑶
叶联渲
成诚
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Sanechips Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • G06F3/0616Improving the reliability of storage systems in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0662Virtualisation aspects
    • G06F3/0665Virtualisation aspects at area level, e.g. provisioning of virtual or logical volumes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

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  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

A wear leveling method and apparatus are disclosed herein. The wear leveling method comprises the following steps: searching the physical blocks with the most and least erasing times in the LUN partition when detecting the operation affecting the abrasion balance of the logical unit number LUN partition of the flash memory system; estimating erasure frequency dispersion d of all physical blocks in the LUN partition according to erasure frequency a of the physical block with the least erasure frequency and erasure frequency b of the physical block with the most erasure frequency, and determining wear leveling treatment priority p of the LUN partition according to the erasure frequency dispersion d; dynamic wear balancing is carried out on the LUN partition of the flash memory system; and carrying out static wear balancing processing on the LUN partition according to the wear balancing processing priority p of the LUN partition and the idle state of the flash memory system. The technical scheme can improve the wear leveling efficiency of the flash memory system and improve the wear leveling effect.

Description

Wear balancing method and device for flash memory system
Technical Field
The present invention relates to the field of storage technologies, and in particular, to a wear leveling method and apparatus for a flash memory system.
Background
In recent years, with technological advances, NAND flash has great potential to overcome the shortcomings of conventional magnetic media. The use of flash memory has become ubiquitous in the recent past. Flash memory is widely used in daily smartphones, digital cameras and various multimedia devices. Flash is popular among these devices because it is compact, lightweight, impact resistant, and fast to read. The popularity of flash memory has also expanded from embedded devices to notebook computers, PCs and enterprise-level servers, flash-based SSDs (Solid STATE DISK, solid state drives) being widely regarded as future substitutes for magnetic disks. The drive power for using NAND flash based Solid State Drives (SSDs) in the enterprise market is stronger than ever before.
NAND flash has many advantages, however, the number of erasures per physical block of flash is limited, and when the limited number of erasures is exceeded (the maximum number of erasures for modern flash is typically around 10 ten thousand), the data stored therein will become unstable. And the data written in the method has spatial locality, namely most of access requests are limited to the access of physical blocks in a certain area. This can cause excessive local block erasures, which can lead to reduced flash life. At this time, a wear leveling algorithm is introduced to balance the number of erasures per block. Static wear leveling is one of the hot spots of research.
Static wear leveling is a process of exchanging data of a physical block with the largest number of erasures with data of a physical block with the smallest number of erasures by detecting the number of erasures of the physical block within a certain time range (usually a preset statistical time length). This operation requires traversing the change data of the number of erasures of all physical blocks within a certain time range, resulting in a large amount of computation, loss of computation performance, and consumption of a large amount of memory space to store the change data of the number of erasures of all physical blocks within a certain time range. Thus, static wear leveling can have an impact on the performance of the flash memory system during implementation.
Disclosure of Invention
The technical problem to be solved by the embodiment of the invention is to provide a wear leveling method and device for a flash memory system, which can improve the wear leveling efficiency of the flash memory system and improve the wear leveling effect.
The embodiment of the invention provides a wear balancing method of a flash memory system, which comprises the following steps:
Searching the physical blocks with the most and least erasing times in the LUN partition when detecting the operation affecting the abrasion balance of the logical unit number LUN partition of the flash memory system; estimating erasure frequency dispersion d of all physical blocks in the LUN partition according to erasure frequency a of the physical block with the least erasure frequency and erasure frequency b of the physical block with the most erasure frequency, and determining wear leveling treatment priority p of the LUN partition according to the erasure frequency dispersion d;
Dynamic wear balancing is carried out on the LUN partition of the flash memory system; and carrying out static wear balancing processing on the LUN partition according to the wear balancing processing priority p of the LUN partition and the idle state of the flash memory system.
The embodiment of the invention provides a wear leveling device of a flash memory system, which comprises:
The detection and calculation module is used for searching the physical block with the largest and smallest erasing times in the LUN partition when detecting the operation affecting the abrasion balance degree of the logical unit number LUN partition of the flash memory system; estimating erasure frequency dispersion d of all physical blocks in the LUN partition according to erasure frequency a of the physical block with the least erasure frequency and erasure frequency b of the physical block with the most erasure frequency, and determining wear leveling treatment priority p of the LUN partition according to the erasure frequency dispersion d;
The balancing processing module is used for carrying out dynamic wear balancing processing on the LUN partition of the flash memory system; and carrying out static wear balancing processing on the LUN partition according to the wear balancing processing priority p of the LUN partition and the idle state of the flash memory system.
The embodiment of the invention provides a wear leveling device of a flash memory system, which comprises:
The method comprises the steps of a memory, a processor and a wear leveling program of a flash memory system, wherein the wear leveling program of the flash memory system is stored in the memory and can run on the processor, and the wear leveling program of the flash memory system is executed by the processor to realize the wear leveling method of the flash memory system.
The embodiment of the invention provides a computer readable storage medium, wherein a wear leveling program of a flash memory system is stored in the computer readable storage medium, and the wear leveling program of the flash memory system realizes the steps of the wear leveling method of the flash memory system when being executed by a processor.
Compared with the related art, the wear leveling method and device for the flash memory system provided by the embodiment of the invention search the physical blocks with the most and least erasing times in the LUN partition when detecting the operation affecting the wear leveling degree of the Logical Unit Number (LUN) partition of the flash memory system, estimate the erasing times dispersion d of all the physical blocks in the LUN partition according to the erasing times a of the physical blocks with the least erasing times and the erasing times b of the physical blocks with the most erasing times, determine the wear leveling priority p of the LUN partition according to the erasing times dispersion d, perform dynamic wear leveling on the LUN partition of the flash memory system, and perform static wear leveling on the LUN partition according to the wear leveling priority p of the LUN partition and the idle state of the flash memory system. The embodiment of the invention can improve the wear balance efficiency of the flash memory system and improve the wear balance effect.
Drawings
FIG. 1 is a flow chart of a wear leveling method for a flash memory system according to embodiment 1 of the present invention;
FIG. 2 is a schematic diagram of a wear leveling device of a flash memory system according to embodiment 2 of the present invention;
FIG. 3 is a flow chart of a wear leveling method for a flash memory system according to example 1 of the present invention;
FIG. 4 is a schematic diagram of searching for a maximum erase count and a minimum erase count physical block using a red-black tree in example 1 of the present invention;
FIG. 5-a is a diagram showing the distribution of erase counts after 15000000 assignment tasks in the simulation experiment (I) of the present invention;
FIG. 5-b is a diagram showing the distribution of the number of erasures after 20000000 assignment in the simulation experiment (I) of the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present application more apparent, embodiments of the present application will be described in detail hereinafter with reference to the accompanying drawings. It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be arbitrarily combined with each other.
Example 1
As shown in fig. 1, an embodiment of the present invention provides a wear leveling method for a flash memory system, including:
Step S110, searching the physical block with the largest and smallest erasing times in the LUN partition when detecting the operation affecting the abrasion balance of the logical unit number LUN partition of the flash memory system; estimating erasure frequency dispersion d of all physical blocks in the LUN partition according to erasure frequency a of the physical block with the least erasure frequency and erasure frequency b of the physical block with the most erasure frequency, and determining wear leveling treatment priority p of the LUN partition according to the erasure frequency dispersion d;
Step S120, dynamic wear balancing processing is carried out on the LUN partition of the flash memory system; and carrying out static wear balancing processing on the LUN partition according to the wear balancing processing priority p of the LUN partition and the idle state of the flash memory system.
In one embodiment, the operation of affecting LUN partition wear leveling of a flash memory system includes at least one of: performing garbage collection on at least one physical block in the LUN partition; dynamic wear balancing treatment is carried out on the LUN partition; static wear balancing treatment is carried out on the LUN partition;
in one embodiment, the idle state of the flash memory system includes at least one of:
The duration that the flash memory system is in an idle state exceeds a first time threshold;
the duration that the flash memory system is in the idle state exceeds a second time threshold;
actively entering a background operation by the flash memory system;
the flash memory system is about to enter a power-off state;
wherein the first time threshold is less than the second time threshold;
for example, the first time threshold is a second level duration, and the second time threshold is a minute level duration;
In one embodiment, the dynamic wear leveling process includes:
When writing data, preferentially selecting an empty physical block with the least erasing times in the LUN partition as a target physical block for writing;
In one embodiment, the static wear leveling process includes: the data of the physical block with the most erasing times and the data of the physical block with the least erasing times in the LUN partition are exchanged;
When the flash memory system adopts an equalization strategy combining dynamic wear equalization and static wear equalization, the number of times of physical block erasure of the LUN partition can be regarded as meeting the uniform distribution, so that the operation can be simplified by utilizing the statistical characteristics of the uniform distribution.
In one embodiment, estimating the erasure frequency dispersion d of all physical blocks in the LUN partition according to the erasure frequency a of the physical block with the least erasure frequency and the erasure frequency b of the physical block with the most erasure frequency includes:
the average erase count c of all physical blocks in the LUN partition is calculated in the following manner:
c=(a+b)/2;
calculating the erasure frequency dispersion d of all physical blocks in the LUN partition by adopting the following mode:
d=m/c;
where m=max (c-a, b-c), max () is a function taking the maximum value.
In one embodiment, the searching for the physical blocks with the highest and lowest number of erasures in the LUN partition includes:
Ordering the physical blocks of the LUN partition according to the erasing times by utilizing a red-black tree data structure;
When searching, the physical blocks with the most and least erasing times are quickly indexed by using the principle of ordering red and black trees.
In one embodiment, the physical block erasure count dispersion d of a LUN partition has a certain correspondence with the wear leveling priority p of the LUN partition: when the dispersion d of the erasing times of the physical blocks of the LUN partition is changed from low to high, the wear balance priority p of the corresponding LUN partition is changed from low to high;
the level of the wear leveling priority p of the LUN partition is used for indicating the emergency degree of static wear leveling processing of the LUN partition.
In one embodiment, the wear leveling priority p of the LUN partition includes four values:
a value of 0, for indicating that the LUN partition does not need static wear leveling;
The value 1 is used for indicating that the LUN partition needs static wear balance, and the emergency degree is low;
A value 2, for indicating that the LUN partition needs static wear leveling, and having moderate emergency;
a value 3, which is used for indicating that the LUN partition needs static wear balance, and has high emergency degree;
in one embodiment, performing static wear leveling on the LUN partition according to the wear leveling priority p of the LUN partition and an idle state of the flash memory system includes performing at least one of:
When the wear leveling process priority p of the LUN partition indicates that the LUN partition needs static wear leveling and has high emergency degree, if the duration of the flash memory system in the idle state exceeds a first time threshold or is about to enter a power-off state, performing static wear leveling process on the LUN partition;
When the wear leveling treatment priority p of the LUN partition indicates that the LUN partition needs static wear leveling and the emergency degree is moderate, if the duration of the flash memory system actively entering the background operation or the flash memory system in the idle state exceeds a second time threshold, performing static wear leveling treatment on the LUN partition;
When the wear leveling process priority p of the LUN partition indicates that the LUN partition needs static wear leveling and has low emergency degree, if the flash memory system actively enters a background operation, the LUN partition is subjected to static wear leveling.
Example 2
As shown in fig. 2, a wear leveling device of a flash memory system includes:
The detection and calculation module 10 is used for searching the physical block with the largest and smallest erasing times in the LUN partition when detecting the operation affecting the abrasion balance of the logic unit number LUN partition of the flash memory system; estimating erasure frequency dispersion d of all physical blocks in the LUN partition according to erasure frequency a of the physical block with the least erasure frequency and erasure frequency b of the physical block with the most erasure frequency, and determining wear leveling treatment priority p of the LUN partition according to the erasure frequency dispersion d;
The balancing processing module 20 is used for carrying out dynamic wear balancing processing on the LUN partition of the flash memory system; and carrying out static wear balancing processing on the LUN partition according to the wear balancing processing priority p of the LUN partition and the idle state of the flash memory system.
In one embodiment, the operation of affecting LUN partition wear leveling of a flash memory system includes at least one of: performing garbage collection on at least one physical block in the LUN partition; dynamic wear balancing treatment is carried out on the LUN partition; static wear balancing treatment is carried out on the LUN partition;
in one embodiment, the idle state of the flash memory system includes at least one of:
The duration that the flash memory system is in an idle state exceeds a first time threshold;
the duration that the flash memory system is in the idle state exceeds a second time threshold;
actively entering a background operation by the flash memory system;
the flash memory system is about to enter a power-off state;
wherein the first time threshold is less than the second time threshold;
for example, the first time threshold is a second level duration, and the second time threshold is a minute level duration;
In one embodiment, the dynamic wear leveling process includes:
When writing data, preferentially selecting an empty physical block with the least erasing times in the LUN partition as a target physical block for writing;
in one embodiment, the static wear leveling process includes:
The data of the physical block with the most erasing times and the data of the physical block with the least erasing times in the LUN partition are exchanged;
In one embodiment, the detecting and calculating module is configured to estimate the erasure count dispersion d of all physical blocks in the LUN partition according to the erasure count a of the physical block with the least erasure count and the erasure count b of the physical block with the most erasure count by:
the average erase count c of all physical blocks in the LUN partition is calculated in the following manner:
c=(a+b)/2;
calculating the erasure frequency dispersion d of all physical blocks in the LUN partition by adopting the following mode:
d=m/c;
where m=max (c-a, b-c), max () is a function taking the maximum value.
In one embodiment, the detection and calculation module is configured to search the physical blocks with the greatest and least number of erasures in the LUN partition in the following manner:
Ordering the physical blocks of the LUN partition according to the erasing times by utilizing a red-black tree data structure;
When searching, the physical blocks with the most and least erasing times are quickly indexed by using the principle of ordering red and black trees.
In one embodiment, the physical block erasure count dispersion d of a LUN partition has a certain correspondence with the wear leveling priority p of the LUN partition: when the dispersion d of the erasing times of the physical blocks of the LUN partition is changed from low to high, the wear balance priority p of the corresponding LUN partition is changed from low to high;
the level of the wear leveling priority p of the LUN partition is used for indicating the emergency degree of static wear leveling processing of the LUN partition.
In one embodiment, the wear leveling priority p of the LUN partition includes four values:
a value of 0, for indicating that the LUN partition does not need static wear leveling;
The value 1 is used for indicating that the LUN partition needs static wear balance, and the emergency degree is low;
A value 2, for indicating that the LUN partition needs static wear leveling, and having moderate emergency;
a value 3, which is used for indicating that the LUN partition needs static wear balance, and has high emergency degree;
In one embodiment, the balancing processing module is configured to perform static wear leveling processing on the LUN partition according to the wear leveling priority p of the LUN partition and an idle state of the flash memory system in the following manner:
Performing at least one of the following:
When the wear leveling process priority p of the LUN partition indicates that the LUN partition needs static wear leveling and has high emergency degree, if the duration of the flash memory system in the idle state exceeds a first time threshold or is about to enter a power-off state, performing static wear leveling process on the LUN partition;
When the wear leveling treatment priority p of the LUN partition indicates that the LUN partition needs static wear leveling and the emergency degree is moderate, if the duration of the flash memory system actively entering the background operation or the flash memory system in the idle state exceeds a second time threshold, performing static wear leveling treatment on the LUN partition;
When the wear leveling process priority p of the LUN partition indicates that the LUN partition needs static wear leveling and has low emergency degree, if the flash memory system actively enters a background operation, the LUN partition is subjected to static wear leveling.
Example 3
The embodiment of the invention provides a wear leveling device of a flash memory system, which comprises:
the steps of the wear leveling method for a flash memory system in the above embodiment 1 are implemented when the wear leveling program for a flash memory system is executed by the processor.
Example 4
An embodiment of the present invention provides a computer readable storage medium, where a wear leveling program of a flash memory system is stored, where the wear leveling program of the flash memory system, when executed by a processor, implements the steps of the wear leveling method of the flash memory system in embodiment 1.
The wear leveling method of the present application is further described below by way of example.
Example 1
The method for balancing the abrasion of the flash memory system can improve the abrasion balancing efficiency of the flash memory system and improve the abrasion balancing effect.
The wear leveling method of the flash memory system of the present example may include the steps of:
Step S101, judging whether the operation affecting the LUN partition abrasion balance exists, if yes, executing step S102, otherwise, executing step S101;
Wherein the operation of affecting the LUN partition wear leveling of the flash memory system comprises at least one of: performing garbage collection on at least one physical block in the LUN partition; dynamic wear balancing treatment is carried out on the LUN partition; static wear balancing treatment is carried out on the LUN partition;
wherein, garbage collection operation means: the mechanism of merging valid pages (pages) in a physical Block (Block) into a new physical Block and erasing the old physical Block, leaving more free physical blocks.
Wherein the dynamic wear leveling process includes:
When writing data, preferentially selecting an empty physical block with the least erasing times in the LUN partition as a target physical block for writing;
wherein the static wear leveling process includes: the data of the physical block with the most erasing times and the data of the physical block with the least erasing times in the LUN partition are exchanged;
Step S102, searching a physical block with the largest erasing times and a physical block with the smallest erasing times by utilizing a red-black tree ordering principle;
As shown in fig. 4, physical blocks of the LUN partition are ordered according to the erasure times by using a red-black tree data structure, in the red-black tree, nodes represent physical blocks, node values represent the erasure times of the physical blocks, and when searching, the physical blocks with the most and least erasure times can be rapidly indexed by using a red-black tree ordering principle;
Step S103, determining the physical block erasure frequency dispersion d of the LUN partition according to the erasure frequency a of the physical block with the minimum erasure frequency and the erasure frequency b of the physical block with the maximum erasure frequency;
wherein d can be calculated using the following formula:
d=m/c;
Where c= (a+b)/2, m=max (c-a, b-c), max () is a maximum taking function.
Step S104, determining the wear leveling priority p of the LUN partition according to the physical block erasure frequency dispersion d of the LUN partition;
The physical block erasure frequency dispersion d of the LUN partition and the wear balance priority p of the LUN partition have a determined corresponding relation: when the dispersion d of the erasing times of the physical blocks of the LUN partition is changed from low to high, the wear balance priority p of the corresponding LUN partition is changed from low to high;
the level of the wear leveling priority p of the LUN partition is used for indicating the emergency degree of static wear leveling processing of the LUN partition.
In one embodiment, the physical block erase count dispersion d of a LUN partition has the following correspondence with the wear leveling priority p of the LUN partition:
Wherein e1 is a first threshold, e2 is a second threshold, e3 is a third threshold, and e1 < e2 < e3;
P=0, indicating that the LUN partition does not need static wear leveling;
p=1, indicating that LUN partitioning requires static wear leveling and has low urgency;
p=2, indicating that the LUN partition needs static wear leveling, and the urgency is moderate;
P=3, indicating that the LUN partition needs static wear leveling and has high urgency;
Step S105, storing the value of the wear leveling priority p of the LUN partition into a wear leveling priority array of the flash memory system, wherein the number of each element in the array corresponds to the area code of the LUN partition;
As shown in Table 1 below, the length of the wear-leveling priority array of the flash memory system is equal to the total number of LUN partitions, the number of the array is 1,2, N (N is the total number of LUN partitions of the flash memory system), and the number of the array is the area number corresponding to the LUN partition.
TABLE 1
Step S106, dynamic wear balancing processing is carried out on the LUN partition of the flash memory system; performing static wear balancing processing on the LUN partition according to the wear balancing processing priority p of the LUN partition and the idle state of the flash memory system; returning to step S101;
When the wear leveling process priority p of the LUN partition indicates that the LUN partition needs static wear leveling and has high emergency degree, if the duration of the flash memory system in the idle state exceeds a first time threshold or is about to enter a power-off state, performing static wear leveling process on the LUN partition;
When the wear leveling treatment priority p of the LUN partition indicates that the LUN partition needs static wear leveling and the emergency degree is moderate, if the duration of the flash memory system actively entering the background operation or the flash memory system in the idle state exceeds a second time threshold, performing static wear leveling treatment on the LUN partition;
when the wear leveling treatment priority p of the LUN partition indicates that the LUN partition needs static wear leveling and has low emergency degree, if the flash memory system actively enters a background operation, the LUN partition is subjected to static wear leveling treatment;
wherein the first time threshold is less than the second time threshold;
for example, the first time threshold is 5 seconds and the second time threshold is 5 minutes;
In the above example, the physical block with the largest erasure number and the physical block with the smallest erasure number are searched by the red-black tree, so that the searching speed is high. As shown in fig. 4, the complexity of the operation time is O (log), and N is the number of nodes (also the number of physical blocks) of the red-black tree, so that the overall and local search efficiency is improved. The red black tree can perform operations such as searching, inserting, deleting and the like according to the time complexity of O (log N), so that the physical block searching efficiency is optimized, and the speed of calculating the average value of the number of times of erasing the physical block of the LUN partition is increased.
In the above example, the average value c (c= (a+b)/2) of the erasing times a and b of the two physical blocks with the smallest and largest erasing times in the whole LUN partition is used as the average value of the erasing times of all the physical blocks in the LUN partition, which takes into account that the flash memory system uses a dynamic wear leveling mechanism.
Dynamic wear leveling is a method for dynamically adjusting wear of a physical block by controlling a target physical block to which data is written in a data writing process and depending on randomness of the written data. In short, the number of erasures of all physical blocks is ordered, and when data is written, the empty physical block with the least number of erasures in the LUN partition is preferentially selected as the target physical block. Under the dynamic wear leveling mechanism, the number of erasures for all physical blocks of a LUN partition can be considered to satisfy a uniform distribution U (a, b), where a is the minimum number of erasures for a physical block and b is the maximum number of erasures for a physical block. The statistical properties of uniform distribution can be utilized when calculating the average value of the erasing times of all physical blocks under the LUN partition: mathematical expectation of uniform distribution E (x) = (a+b)/2;
the following can verify whether the number of times of erasure of the LUN partition of the flash memory system adopting the dynamic wear leveling mechanism satisfies the uniform distribution through the simulation experiment (one).
Simulation experiment 1
(1) Emulation use case
The initial erase count of 20% of the physical blocks in the LUN partition is set to 0-100, and the initial erase count of 80% of the physical blocks is set to 150-200. The purpose of this arrangement is to test whether the number of erasures obeys the uniform distribution after a certain random write physical page period in the case that the initial number of erasures under dynamic wear leveling does not obey the uniform distribution.
(2) Simulation environment
Experimental environment: vs2010 standard C compiler;
Environmental variable: 2128 physical block/LUN, 256 pages/physical block;
And (3) garbage recovery: when the number of the idle physical blocks is lower than a threshold value, performing the operation of recovering the physical blocks;
wear leveling algorithm: the static wear balancing algorithm is combined with the dynamic wear balancing algorithm;
(3) Simulation purpose
And testing whether the erasing times of all physical blocks are subjected to uniform distribution or not under the strategy of combining a dynamic wear balancing algorithm and a static wear balancing algorithm in the operation process of the flash memory system. Whether the average of the maximum number of erasures and the minimum number of erasures of all physical blocks can be used as the average of all physical block erasures.
As shown in fig. 5-a, in the distribution of the number of erasures after performing 15000000 random writing of physical pages, each point of the horizontal axis corresponds to one physical block, and there are 2100 physical blocks in total, and the vertical axis is the number of erasures per physical block.
As shown in fig. 5-b, the distribution of the number of erasures after performing 20000000 times of random writing of physical pages corresponds to one physical block at each point of the horizontal axis, and total 2100 physical blocks are provided, and the vertical axis is the number of erasures per physical block.
(4) Analysis of experimental results
As can be seen from the simulation experiment results, the erasing times of the physical block have the following characteristics in different periods of flash memory operation:
in different historical periods, the erasing times of the physical blocks basically obey the balanced distribution, so that the erasing times of all the physical blocks can be considered to obey a uniform distribution U (a, b) under the condition that the flash memory system is subjected to dynamic wear balance and static wear balance, wherein a is the minimum erasing times, and b is the maximum erasing times.
Thus, this evenly distributed mathematical expectation can be substituted when calculating the average of the number of erasures for all physical blocks. In the red-black tree, both physical block nodes can be found under the O (log N) time complexity, that is, only the time complexity of 2*O (log N) is needed in total, and if the calculation is performed by adopting the conventional method, the time of the O (N) time complexity is needed at least. Therefore, the calculation of the average value of the erasing times of all the physical blocks is simplified, and the running time and the storage space of the system can be remarkably saved.
The effect of the wear leveling scheme of example 1 described above was verified by simulation experiment (two) below.
(1) Simulation purpose
The purpose of this simulation is to compare the difference in wear leveling effect of the flash memory system as a whole before and after the addition of the algorithm of example 1.
(2) Emulation use case
80% Of logical address accesses are limited to 20% of logical addresses, so that the operation effect of the technical scheme of the application in a practical environment can be tested.
(3) Simulation environment
Experimental environment: vs2010 standard C compiler;
Environmental variable: 2128 physical block/LUN, 256 pages/physical block;
And (3) garbage recovery: when the number of the idle physical blocks is lower than a threshold value, performing the operation of recovering the physical blocks;
wear leveling algorithm: the static wear balancing algorithm is combined with the dynamic wear balancing algorithm;
(4) Experimental result data:
5000 ten thousand random write physical page operations were performed and the experimental results are shown in table 2 below.
TABLE 2
Using the algorithm of example 1, the average erase count after wear leveling, c1, was calculated using the following formula:
c1 = (a+b)/2, where a is the number of times of erasing of the physical block with the minimum number of times of erasing after 5000 ten thousand times of random write physical page operations, and b is the number of times of erasing of the physical block with the maximum number of times of erasing after 5000 ten thousand times of random write physical page operations;
The average erasing times c2 after wear equalization is calculated by adopting the traditional static wear method by adopting the following formula:
Wherein x i is the number of erasures of the ith physical block after 5000 ten thousand random write physical page operations, and N is the total number of physical blocks.
Using the algorithm of example 1, the erasure number dispersion d1 after wear leveling was calculated using the following formula:
d1=m/c1;
m=max (c 1-a, b-c 1), max () is a function taking the maximum value.
By adopting a traditional static abrasion method, the erasure frequency dispersion d2 after abrasion equalization is calculated by adopting the following formula:
wherein x i is the number of erasing times of the ith physical block after 5000 ten-thousand random write physical page operations are performed, N is the total number of physical blocks, and c2 is the average number of erasing times after a traditional static wear method is adopted.
(5) Analysis of experimental results
As can be seen from table 2 above, since dynamic wear leveling and static wear leveling are combined in the flash memory system, the calculation can be simplified by uniform distribution when calculating the dispersion of the number of erasures after wear leveling, and the maximum number of erasures and the minimum number of erasures for searching the physical block by introducing the red-black tree structure after using the algorithm of example 1, the flash memory system has a reduced running time of 16.2%, and the additional number of erasures introduced by static wear leveling has a reduced wear leveling effect of 4.9% compared with the conventional static wear leveling algorithm, which is slightly advantageous over the conventional algorithm.
Those of ordinary skill in the art will appreciate that all or some of the steps, systems, functional modules/units in the apparatus, and methods disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between the functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed cooperatively by several physical components. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes both volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as known to those skilled in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by a computer. Furthermore, as is well known to those of ordinary skill in the art, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media.
It is to be understood that various other embodiments of the present invention may be made by those skilled in the art without departing from the spirit and scope of the invention, and that various changes and modifications may be made in accordance with the invention without departing from the scope of the invention as defined in the following claims.

Claims (8)

1. A wear leveling method for a flash memory system, comprising:
Searching the physical blocks with the most and least erasing times in the LUN partition when detecting the operation affecting the abrasion balance of the logical unit number LUN partition of the flash memory system; estimating erasure frequency dispersion d of all physical blocks in the LUN partition according to erasure frequency a of the physical block with the least erasure frequency and erasure frequency b of the physical block with the most erasure frequency, and determining wear leveling treatment priority p of the LUN partition according to the erasure frequency dispersion d;
The physical block erasure frequency dispersion d of the LUN partition and the wear balance priority p of the LUN partition have a determined corresponding relation: when the dispersion d of the erasing times of the physical blocks of the LUN partition is changed from low to high, the wear balance priority p of the corresponding LUN partition is changed from low to high; the level of the wear balance priority p of the LUN partition is used for indicating the emergency degree of static wear balance treatment of the LUN partition;
Dynamic wear balancing is carried out on the LUN partition of the flash memory system; performing static wear balancing processing on the LUN partition according to the wear balancing processing priority p of the LUN partition and the idle state of the flash memory system;
The estimating the erasure frequency dispersion d of all the physical blocks in the LUN partition according to the erasure frequency a of the physical block with the least erasure frequency and the erasure frequency b of the physical block with the most erasure frequency comprises:
the average erase count c of all physical blocks in the LUN partition is calculated in the following manner:
c=(a+b)/2;
calculating the erasure frequency dispersion d of all physical blocks in the LUN partition by adopting the following mode:
d=m/c;
where m=max (c-a, b-c), max () is a function taking the maximum value.
2. The method of claim 1, wherein:
the operation of affecting the LUN partition wear leveling of the flash memory system includes at least one of:
performing garbage collection on at least one physical block in the LUN partition;
dynamic wear balancing treatment is carried out on the LUN partition;
And carrying out static wear balancing treatment on the LUN partition.
3. The method of claim 1, wherein:
The searching the physical blocks with the most and least erasing times in the LUN partition comprises the following steps:
Ordering the physical blocks of the LUN partition according to the erasing times by utilizing a red-black tree data structure;
When searching, the physical blocks with the most and least erasing times are quickly indexed by using the principle of ordering red and black trees.
4. The method of claim 1, wherein:
performing static wear leveling processing on the LUN partition according to the wear leveling processing priority p of the LUN partition and the idle state of the flash memory system, wherein the static wear leveling processing comprises at least one of the following processing:
When the wear leveling process priority p of the LUN partition indicates that the LUN partition needs static wear leveling and has high emergency degree, if the duration of the flash memory system in the idle state exceeds a first time threshold or is about to enter a power-off state, performing static wear leveling process on the LUN partition;
When the wear leveling treatment priority p of the LUN partition indicates that the LUN partition needs static wear leveling and the emergency degree is moderate, if the duration of the flash memory system actively entering the background operation or the flash memory system in the idle state exceeds a second time threshold, performing static wear leveling treatment on the LUN partition;
when the wear leveling treatment priority p of the LUN partition indicates that the LUN partition needs static wear leveling and has low emergency degree, if the flash memory system actively enters a background operation, the LUN partition is subjected to static wear leveling treatment;
wherein the first time threshold is less than the second time threshold.
5. The method of any one of claims 1-4, wherein:
the dynamic wear leveling process includes: when writing data, preferentially selecting an empty physical block with the least erasing times in the LUN partition as a target physical block for writing;
the static wear leveling process includes: and exchanging the data of the physical block with the most erasing times with the data of the physical block with the least erasing times in the LUN partition.
6. A wear leveling apparatus for a flash memory system, comprising:
The detection and calculation module is used for searching the physical block with the largest and smallest erasing times in the LUN partition when detecting the operation affecting the abrasion balance degree of the logical unit number LUN partition of the flash memory system; estimating erasure frequency dispersion d of all physical blocks in the LUN partition according to erasure frequency a of the physical block with the least erasure frequency and erasure frequency b of the physical block with the most erasure frequency, and determining wear leveling treatment priority p of the LUN partition according to the erasure frequency dispersion d;
The physical block erasure frequency dispersion d of the LUN partition and the wear balance priority p of the LUN partition have a determined corresponding relation: when the dispersion d of the erasing times of the physical blocks of the LUN partition is changed from low to high, the wear balance priority p of the corresponding LUN partition is changed from low to high; the level of the wear balance priority p of the LUN partition is used for indicating the emergency degree of static wear balance treatment of the LUN partition;
The balancing processing module is used for carrying out dynamic wear balancing processing on the LUN partition of the flash memory system; performing static wear balancing processing on the LUN partition according to the wear balancing processing priority p of the LUN partition and the idle state of the flash memory system;
The estimating the erasure frequency dispersion d of all the physical blocks in the LUN partition according to the erasure frequency a of the physical block with the least erasure frequency and the erasure frequency b of the physical block with the most erasure frequency comprises:
the average erase count c of all physical blocks in the LUN partition is calculated in the following manner:
c=(a+b)/2;
calculating the erasure frequency dispersion d of all physical blocks in the LUN partition by adopting the following mode:
d=m/c;
where m=max (c-a, b-c), max () is a function taking the maximum value.
7. A wear leveling apparatus for a flash memory system, comprising:
Memory, a processor and a wear leveling program of a flash memory system stored on the memory and executable on the processor, which when executed by the processor, implements the steps of the wear leveling method of a flash memory system according to any of the preceding claims 1-5.
8. A computer readable storage medium having stored thereon a wear leveling program of a flash memory system, which when executed by a processor, implements the steps of the wear leveling method of a flash memory system of any of the preceding claims 1-5.
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