CN111435403A - Wear leveling method and device for flash memory system - Google Patents
Wear leveling method and device for flash memory system Download PDFInfo
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Abstract
The wear leveling method comprises the steps of searching physical blocks with the largest and the smallest erasing times in a L UN partition when an operation affecting the wear leveling degree of a logic unit number L UN partition of a flash memory system is detected, estimating the erasing time dispersion d of all the physical blocks in the L UN partition according to the erasing times a of the physical block with the smallest erasing times and the erasing times b of the physical block with the largest erasing times, determining the wear leveling priority p of the L UN partition according to the erasing time dispersion d, carrying out dynamic wear leveling on a L UN partition of the flash memory system, and carrying out static wear leveling on an L UN partition according to the wear leveling priority p of the L UN partition and the idle state of the flash memory system.
Description
Technical Field
The present invention relates to the field of storage technologies, and in particular, to a wear leveling method and apparatus for a flash memory system.
Background
In recent years, with the technological progress, NAND flash memory has great potential to overcome the shortcomings of conventional magnetic media. The use of flash memory has become ubiquitous in the near future. Flash memory is widely used in everyday smart phones, digital cameras and various multimedia devices. Flash memory is popular in these devices because of its small size, light weight, high shock resistance, and high read speed. The popularity of flash memory also extends from embedded devices to notebook computers, PCs and enterprise-class servers, and flash-based SSDs (Solid State disks) are widely considered as future replacements for magnetic disks. The driving force to use NAND flash based Solid State Disks (SSDs) in the enterprise market is stronger than ever before.
NAND flash memory has many advantages, however, the number of times each physical block of flash memory is erased is limited, and when the limited number of times is exceeded (the maximum number of times that modern flash memory is erased is typically about 10 ten thousand), the data stored therein will become unstable. And generally, written data has spatial locality, that is, most access requests are limited to access of a physical block in a certain area. This time causes the number of partial block erases to be too large, which leads to a reduction in the life of the flash memory. At this time, a wear leveling algorithm is introduced to balance the number of erasures per block. Static wear leveling is also a hot spot of one of the studies.
Static wear leveling is a process of exchanging data of a physical block with the largest erase count and data of a physical block with the smallest erase count with each other by detecting the erase count of the physical block within a certain time range (usually a preset statistical time duration). This operation requires traversing the erase count variation data of all physical blocks within a certain time range, resulting in a large number of calculations, loss of calculation performance, and a large amount of memory space required to store the erase count variation data of all physical blocks within a certain time range. Therefore, static wear leveling can have an impact on the performance of the flash memory system during implementation.
Disclosure of Invention
The technical problem to be solved by the embodiments of the present invention is to provide a wear leveling method and device for a flash memory system, which can improve wear leveling efficiency of the flash memory system and improve wear leveling effect.
The embodiment of the invention provides a wear leveling method of a flash memory system, which comprises the following steps:
estimating erase count dispersion d of all physical blocks in the L UN partition according to the erase count a of the physical block with the smallest erase count and the erase count b of the physical block with the largest erase count, and determining the wear leveling processing priority p of the L UN partition according to the erase count dispersion d;
and performing static wear leveling on the L UN partition according to the wear leveling priority p of the L UN partition and the idle state of the flash memory system.
An embodiment of the present invention provides a wear leveling apparatus for a flash memory system, including:
the detection and calculation module is used for searching physical blocks with the largest and the smallest erasing times in the L UN partition when detecting the operation of influencing the abrasion balance degree of a logical unit number L UN partition of the flash memory system, estimating the dispersion degree d of the erasing times of all the physical blocks in the L UN partition according to the erasing times a of the physical block with the smallest erasing times and the erasing times b of the physical block with the largest erasing times, and determining the abrasion balance processing priority p of the L UN partition according to the dispersion degree d of the erasing times;
the balancing processing module is used for carrying out dynamic wear balancing processing on L UN partitions of the flash memory system and carrying out static wear balancing processing on L UN partitions according to the wear balancing processing priority p of the L UN partitions and the idle state of the flash memory system.
An embodiment of the present invention provides a wear leveling apparatus for a flash memory system, including:
the wear leveling method comprises a memory, a processor and a wear leveling program of the flash memory system, wherein the wear leveling program of the flash memory system is stored on the memory and can run on the processor, and the wear leveling program of the flash memory system realizes the steps of the wear leveling method of the flash memory system when being executed by the processor.
The embodiment of the invention provides a computer-readable storage medium, wherein a wear leveling program of a flash memory system is stored on the computer-readable storage medium, and the wear leveling program of the flash memory system realizes the steps of the wear leveling method of the flash memory system when being executed by a processor.
Compared with the related art, the wear leveling method and the wear leveling device for the flash memory system provided by the embodiment of the invention have the advantages that when the operation affecting the wear leveling degree of the logical unit number L UN partition of the flash memory system is detected, the physical blocks with the largest and the smallest erasing times in the L UN partition are searched, the erasing time dispersion d of all the physical blocks in the L UN partition is estimated according to the erasing time a of the physical block with the smallest erasing time and the erasing time b of the physical block with the largest erasing time, the wear leveling priority p of the L UN partition is determined according to the erasing time dispersion d, the dynamic wear leveling processing is carried out on the L UN partition of the flash memory system, and the static wear leveling processing is carried out on the L UN partition according to the wear leveling priority p of the L UN partition and the idle state of the flash memory system.
Drawings
Fig. 1 is a flowchart of a wear leveling method for a flash memory system according to embodiment 1 of the present invention;
fig. 2 is a schematic diagram of a wear leveling apparatus of a flash memory system according to embodiment 2 of the present invention;
FIG. 3 is a flow chart of a wear leveling method for a flash memory system according to example 1 of the present invention;
FIG. 4 is a diagram illustrating a physical block search for maximum erasure and minimum erasure using a red-black tree in example 1 of the present invention;
FIG. 5-a is a diagram illustrating the distribution of erase counts after 15000000 allocation tasks performed in simulation experiment (I) of the present invention;
FIG. 5-b is a diagram illustrating the distribution of erase counts after 20000000 allocation tasks in simulation experiment (I) of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the embodiments and features of the embodiments in the present application may be arbitrarily combined with each other without conflict.
Example 1
As shown in fig. 1, an embodiment of the present invention provides a wear leveling method for a flash memory system, including:
step S110, when detecting the operation of influencing the abrasion balance degree of a logic unit number L UN partition of the flash memory system, searching the physical blocks with the largest erasing times and the smallest erasing times in the L UN partition, estimating the dispersion degree d of the erasing times of all the physical blocks in the L UN partition according to the erasing times a of the physical block with the smallest erasing times and the erasing times b of the physical block with the largest erasing times, and determining the abrasion balance processing priority level p of the L UN partition according to the dispersion degree d of the erasing times;
and S120, carrying out dynamic wear leveling on L UN partitions of the flash memory system, and carrying out static wear leveling on L UN partitions according to the wear leveling priority p of the L UN partitions and the idle state of the flash memory system.
In one embodiment, the operations affecting the wear leveling of the L UN partition of the flash memory system include at least one of garbage collecting at least one physical block in the L UN partition, performing dynamic wear leveling on the L UN partition, performing static wear leveling on the L UN partition;
in one embodiment, the idle state of the flash memory system includes at least one of:
the time length of the flash memory system in the idle state exceeds a first time threshold;
the time length of the flash memory system in the idle state exceeds a second time threshold;
the flash memory system actively enters background operation;
the flash memory system is about to enter a power-off state;
wherein the first time threshold is less than the second time threshold;
for example, the first time threshold is a second-level duration, and the second time threshold is a minute-level duration;
in one embodiment, the dynamic wear leveling process comprises:
when data is written, an empty physical block with the minimum erasing times in the L UN partition is preferentially selected as a target physical block to be written;
in one embodiment, the static wear leveling process includes interchanging data of a physical block with the largest number of erasures and data of a physical block with the smallest number of erasures in the L UN partition;
when the flash memory system adopts a balance strategy combining dynamic wear leveling and static wear leveling, the physical block erasing times of the L UN partition can be regarded as satisfying uniform distribution, so that the operation can be simplified by utilizing the statistical characteristics of the uniform distribution.
In one embodiment, estimating the dispersion d of the erase times of all the physical blocks in the L UN partition according to the erase times a of the physical block with the smallest erase times and the erase times b of the physical block with the largest erase times includes:
the average number of erasures c for all physical blocks in the L UN partition is calculated in the following manner:
c＝(a+b)/2；
calculating the dispersion d of the erasing times of all the physical blocks in the L UN partition by adopting the following method:
d＝m/c；
where m is max (c-a, b-c), and max () is a max function.
In one embodiment, the searching L UN partitions for physical blocks with the most and least erasures includes:
sorting the L UN partitioned physical blocks by erasure number using a red-black tree data structure;
during searching, the physical blocks with the largest and the smallest erasing times are quickly indexed by utilizing the red and black tree sorting principle.
In one embodiment, the dispersion d of the physical block erasing times of the L UN partition and the wear leveling priority p of the L UN partition have a determined corresponding relationship, namely when the dispersion d of the physical block erasing times of the L UN partition changes from low to high, the wear leveling priority p of the corresponding L UN partition changes from low to high;
the level of the wear-leveling priority p of the L UN partition is used for indicating the urgency of the L UN partition to perform static wear-leveling.
In one embodiment, the wear leveling priority p of the L UN partition includes the following four values:
a value of 0 indicating that the L UN partition does not need to be statically wear leveled;
a value of 1 indicating that the L UN partition needs static wear leveling with low urgency;
a value of 2 indicating that the L UN partition needs static wear leveling, medium urgency;
a value of 3, which indicates that the L UN partition needs static wear leveling and has a high urgency;
in one embodiment, performing static wear leveling on the L UN partition according to the wear leveling priority p of the L UN partition and an idle state of a flash memory system includes performing at least one of:
when the wear leveling priority p of the L UN partition indicates that the L UN partition needs static wear leveling and has high urgency, if the duration of the idle state of the flash memory system exceeds a first time threshold or is about to enter a power-off state, performing static wear leveling on the L UN partition;
when the wear leveling priority p of the L UN partition indicates that the L UN partition needs to be statically wear leveled and has moderate urgency, if the duration of the flash memory system actively entering background operation or the flash memory system being in an idle state exceeds a second time threshold, statically wear leveling the L UN partition;
when the wear-leveling priority p of the L UN partition indicates that static wear-leveling is required for the L UN partition and the urgency level is low, if the flash memory system actively enters a background operation, static wear-leveling is performed on the L UN partition.
Example 2
As shown in fig. 2, a wear leveling apparatus of a flash memory system includes:
the detection and calculation module 10 is used for searching the physical blocks with the largest and the smallest erasing times in the L UN partition when detecting the operation of influencing the abrasion balance degree of the logic unit number L UN partition of the flash memory system, estimating the dispersion degree d of the erasing times of all the physical blocks in the L UN partition according to the erasing times a of the physical block with the smallest erasing times and the erasing times b of the physical block with the largest erasing times, and determining the abrasion balance processing priority level p of the L UN partition according to the dispersion degree d of the erasing times;
the equalizing processing module 20 is used for performing dynamic wear equalizing processing on L UN partitions of the flash memory system and performing static wear equalizing processing on L UN partitions according to the wear equalizing processing priority p of the L UN partitions and the idle state of the flash memory system.
In one embodiment, the operations affecting the wear leveling of the L UN partition of the flash memory system include at least one of garbage collecting at least one physical block in the L UN partition, performing dynamic wear leveling on the L UN partition, performing static wear leveling on the L UN partition;
in one embodiment, the idle state of the flash memory system includes at least one of:
the time length of the flash memory system in the idle state exceeds a first time threshold;
the time length of the flash memory system in the idle state exceeds a second time threshold;
the flash memory system actively enters background operation;
the flash memory system is about to enter a power-off state;
wherein the first time threshold is less than the second time threshold;
for example, the first time threshold is a second-level duration, and the second time threshold is a minute-level duration;
in one embodiment, the dynamic wear leveling process comprises:
when data is written, an empty physical block with the minimum erasing times in the L UN partition is preferentially selected as a target physical block to be written;
in one embodiment, the static wear leveling process comprises:
exchanging data of a physical block with the largest erasing times and data of a physical block with the smallest erasing times in the L UN partition;
in one embodiment, the detecting and calculating module is configured to estimate the erase count dispersion d of all physical blocks in the L UN partition according to the erase count a of the physical block with the smallest erase count and the erase count b of the physical block with the largest erase count by:
the average number of erasures c for all physical blocks in the L UN partition is calculated in the following manner:
c＝(a+b)/2；
calculating the dispersion d of the erasing times of all the physical blocks in the L UN partition by adopting the following method:
d＝m/c；
where m is max (c-a, b-c), and max () is a max function.
In one embodiment, the detection and computation module is configured to search the L UN partition for the physical blocks with the most and least erasures in the partition by:
sorting the L UN partitioned physical blocks by erasure number using a red-black tree data structure;
during searching, the physical blocks with the largest and the smallest erasing times are quickly indexed by utilizing the red and black tree sorting principle.
In one embodiment, the dispersion d of the physical block erasing times of the L UN partition and the wear leveling priority p of the L UN partition have a determined corresponding relationship, namely when the dispersion d of the physical block erasing times of the L UN partition changes from low to high, the wear leveling priority p of the corresponding L UN partition changes from low to high;
the level of the wear-leveling priority p of the L UN partition is used for indicating the urgency of the L UN partition to perform static wear-leveling.
In one embodiment, the wear leveling priority p of the L UN partition includes the following four values:
a value of 0 indicating that the L UN partition does not need to be statically wear leveled;
a value of 1 indicating that the L UN partition needs static wear leveling with low urgency;
a value of 2 indicating that the L UN partition needs static wear leveling, medium urgency;
a value of 3, which indicates that the L UN partition needs static wear leveling and has a high urgency;
in one embodiment, the balancing module is configured to perform static wear leveling on the L UN partition according to the wear leveling priority p of the L UN partition and an idle state of the flash memory system in the following manner:
performing at least one of:
when the wear leveling priority p of the L UN partition indicates that the L UN partition needs static wear leveling and has high urgency, if the duration of the idle state of the flash memory system exceeds a first time threshold or is about to enter a power-off state, performing static wear leveling on the L UN partition;
when the wear leveling priority p of the L UN partition indicates that the L UN partition needs to be statically wear leveled and has moderate urgency, if the duration of the flash memory system actively entering background operation or the flash memory system being in an idle state exceeds a second time threshold, statically wear leveling the L UN partition;
when the wear-leveling priority p of the L UN partition indicates that static wear-leveling is required for the L UN partition and the urgency level is low, if the flash memory system actively enters a background operation, static wear-leveling is performed on the L UN partition.
Example 3
An embodiment of the present invention provides a wear leveling apparatus for a flash memory system, including:
a memory, a processor, and a wear leveling program of a flash memory system stored on the memory and operable on the processor, wherein the wear leveling program of the flash memory system, when executed by the processor, implements the steps of the wear leveling method of the flash memory system described in embodiment 1 above.
Example 4
An embodiment of the present invention provides a computer-readable storage medium, where a wear leveling program of a flash memory system is stored on the computer-readable storage medium, and when the wear leveling program of the flash memory system is executed by a processor, the steps of the wear leveling method of the flash memory system in embodiment 1 above are implemented.
The wear leveling method of the present application is further illustrated by way of example.
Example 1
The present example provides a method for wear leveling of a flash memory system, which can improve wear leveling efficiency and wear leveling effect of the flash memory system.
The wear leveling method of the flash memory system of the present example may include the steps of:
step S101, judging whether an operation influencing the L UN partition wear balance degree exists, if so, executing step S102, otherwise, executing step S101;
the operation of influencing the wear leveling degree of the L UN partition of the flash memory system comprises at least one of garbage collection of at least one physical block in the L UN partition, dynamic wear leveling of the L UN partition, static wear leveling of the L UN partition;
wherein, the garbage recycling operation means: and merging the effective pages (pages) in the physical Block (Block) into a new physical Block, and erasing the old physical Block to leave more free physical blocks.
Wherein the dynamic wear leveling process comprises:
when data is written, an empty physical block with the minimum erasing times in the L UN partition is preferentially selected as a target physical block to be written;
the static wear leveling process comprises the steps of exchanging data of a physical block with the largest erasing times and data of a physical block with the smallest erasing times in the L UN partition;
step S102, searching the physical block with the maximum erasing times and the physical block with the minimum erasing times by using a red and black tree sorting principle;
as shown in fig. 4, sorting the physical blocks of the L UN partition according to the number of erasures by using a red-black tree data structure, where in a red-black tree, a node represents a physical block, and a node value represents the number of erasures of the physical block, and during searching, the physical blocks with the largest and the smallest number of erasures can be quickly indexed by using a red-black tree sorting principle;
step S103, determining the dispersion d of the erasing times of the physical blocks of the L UN partition according to the erasing times a of the physical block with the minimum erasing times and the erasing times b of the physical block with the maximum erasing times;
wherein d can be calculated by the following formula:
d＝m/c；
where c is (a + b)/2, m is max (c-a, b-c), and max () is a max function.
Step S104, determining the wear leveling priority p of the L UN partition according to the dispersion d of the times of erasing the physical blocks of the L UN partition;
the dispersion d of the physical block erasing times of the L UN partition and the wear leveling priority p of the L UN partition have a determined corresponding relationship, wherein when the dispersion d of the physical block erasing times of the L UN partition changes from low to high, the wear leveling priority p corresponding to the L UN partition changes from low to high;
the level of the wear-leveling priority p of the L UN partition is used for indicating the urgency of the L UN partition to perform static wear-leveling.
In one embodiment, the dispersion d of the physical block erasure times of the L UN partition and the wear leveling priority p of the L UN partition have the following correspondence:
wherein e1 is the first threshold, e2 is the second threshold, e3 is the third threshold, and e1 < e2 < e 3;
p-0, meaning L UN partitions do not need static wear leveling;
p is 1, which means L UN partition needs static wear leveling and the urgency is low;
p is 2, which means L UN partition needs static wear leveling and the urgency is medium;
p is 3, which means L UN partition needs static wear leveling and the urgency is high;
step S105, storing the value of the wear leveling priority p of the L UN partition into a flash memory system wear leveling priority array, wherein the number of each element in the array corresponds to the area number of the L UN partition;
as shown in table 1 below, the length of the wear-leveling priority array of the flash memory system is equal to the total number of L UN partitions, and the numbers of the arrays are 1, 2, ·, N (N is the total number of L UN partitions of the flash memory system), and the numbers of the arrays correspond to the area numbers of L UN partitions.
TABLE 1
Step S106, carrying out dynamic wear leveling processing on L UN partitions of the flash memory system, carrying out static wear leveling processing on L UN partitions according to the wear leveling processing priority p of the L UN partitions and the idle state of the flash memory system, and returning to the step S101;
when the wear leveling priority p of the L UN partition indicates that the L UN partition needs static wear leveling and has high urgency, if the duration of the idle state of the flash memory system exceeds a first time threshold or is about to enter a power-off state, the L UN partition is subjected to static wear leveling;
when the wear leveling priority p of the L UN partition indicates that the L UN partition needs to be statically wear leveled and has moderate urgency, if the duration of the flash memory system actively entering background operation or the flash memory system being in an idle state exceeds a second time threshold, statically wear leveling the L UN partition;
when the wear leveling priority p of the L UN partition indicates that the L UN partition needs static wear leveling and has low urgency, if the flash memory system actively enters a background operation, the L UN partition is subjected to static wear leveling;
wherein the first time threshold is less than the second time threshold;
for example, the first time threshold is 5 seconds, and the second time threshold is 5 minutes;
as shown in FIG. 4, the complexity of each operation time is O (L ogN), N is the number of nodes of the red-black tree (also is the number of physical blocks), so that the overall and local search efficiency is improved.
In the above example, taking the average value c (a + b)/2 of the erase times a and b of the two physical blocks with the minimum and maximum erase times in the entire L UN partition as the average value of the erase times of all the physical blocks in the L UN partition, a dynamic wear leveling mechanism is used in consideration of the flash memory system.
Under the dynamic wear leveling mechanism, L UN partition can be regarded as satisfying uniform distribution U (a, b), wherein a is the minimum erasing times of the physical blocks, and b is the maximum erasing times of the physical blocks;
it can be verified by simulation experiment (one) whether the erase times of the L UN partition of the flash memory system adopting the dynamic wear leveling mechanism satisfy the uniform distribution.
Simulation experiment 1
(1) Simulation use case
The initial erase count of 20% of the physical blocks in the L UN partition is set to 0-100 and the initial erase count of 80% of the physical blocks is set to 150-200. this is done to test whether the erase count is uniformly distributed after a certain random write physical page period if the initial erase count is not uniformly distributed under dynamic wear leveling.
(2) Simulation environment
The experimental environment is as follows: a vs2010 standard C compiler;
2128 physical block/L UN, 256 pages/physical block;
and (3) garbage recovery: when the number of the idle physical blocks is lower than a threshold value, carrying out the operation of recovering the physical blocks;
and (3) wear leveling algorithm: combining a static wear leveling algorithm and a dynamic wear leveling algorithm;
(3) simulation purpose
And testing whether the erasing times of all the physical blocks are subjected to uniform distribution or not in the running process of the flash memory system under the strategy of combining a dynamic wear leveling algorithm and a static wear leveling algorithm. Whether the average of the maximum erase times and the minimum erase times of all physical blocks can be used as the average of the erase times of all physical blocks.
As shown in fig. 5-a, the distribution of the number of times of erasing after the 15000000 random write physical page task is performed, each point on the horizontal axis in the figure corresponds to one physical block, there are 2100 physical blocks in total, and the vertical axis is the number of times of erasing per physical block.
As shown in fig. 5-b, the distribution of the number of times of erasing after 20000000 tasks of randomly writing physical pages is shown, where each point on the horizontal axis corresponds to one physical block, there are 2100 physical blocks in total, and the vertical axis is the number of times of erasing per physical block.
(4) Analysis of Experimental results
From the above simulation experiment results, it can be seen that the erase times of the physical block have the following characteristics in different operating periods of the flash memory:
in different historical periods, the erasing times of the physical blocks basically obey the balanced distribution, so that the erasing times of all the physical blocks obey a uniform distribution U (a, b) under the condition that the flash memory system performs dynamic wear leveling and static wear leveling, wherein a is the minimum erasing time, and b is the maximum erasing time.
Therefore, the mathematical expectation of this even distribution may be substituted in calculating the average of the erase times of all physical blocks. In the red and black tree, the two physical block nodes can be found under the o (logn) time complexity, that is, the total time complexity is only 2 × o (logn), and if the calculation is performed by using the conventional method, the time with the o (n) time complexity is at least needed. Therefore, the calculation of the average value of the erasing times of all the physical blocks is simplified, and the system running time and the storage space can be obviously saved.
The effect of the wear leveling scheme of example 1 above is verified by a simulation experiment (two) below.
(1) Simulation purpose
The purpose of this simulation is to compare the difference in the wear leveling effect of the flash memory system before and after the flash memory system is added to the algorithm of example 1.
(2) Simulation use case
80% of the access of the logical addresses is limited to 20% of the logical addresses, so that the operation effect of the technical scheme in the practical environment can be tested.
(3) Simulation environment
The experimental environment is as follows: a vs2010 standard C compiler;
2128 physical block/L UN, 256 pages/physical block;
and (3) garbage recovery: when the number of the idle physical blocks is lower than a threshold value, carrying out the operation of recovering the physical blocks;
and (3) wear leveling algorithm: combining a static wear leveling algorithm and a dynamic wear leveling algorithm;
(4) experimental result data:
5000 ten thousand random physical page write operations were performed and the experimental results are shown in table 2 below.
TABLE 2
Using the algorithm of example 1, the average number of erase times after wear leveling, c1, was calculated using the following equation:
c1 is (a + b)/2, where a is the erase count of the physical block with the minimum erase count after 5000 ten thousand random write physical page operations are performed, and b is the erase count of the physical block with the maximum erase count after 5000 ten thousand random write physical page operations are performed;
by adopting the traditional static wear method, the average erasing times c2 after wear leveling is calculated by adopting the following formula:
wherein x isiIs the number of times of erasing the ith physical block after 5000 ten thousand random write physical page operations are performed, and N is the total number of physical blocks.
With the algorithm of example 1, the dispersion d1 of the number of times of erasure after wear leveling is calculated using the following formula:
d1＝m/c1；
m is max (c1-a, b-c1), and max () is a max function.
By adopting a traditional static wear method, the dispersion d2 of the number of times of erasing after wear leveling is calculated by adopting the following formula:
wherein x isiIs the number of times of erasing the ith physical block after 5000 ten thousand random write physical page operations are performed, N is the total number of physical blocksNumber, c2, is the average number of erasures after the conventional static wear method.
(5) Analysis of Experimental results
As can be seen from table 2 above, since dynamic wear leveling and static wear leveling are combined in the flash memory system, the calculation can be simplified by uniform distribution when calculating the dispersion of the erase times after wear leveling, and after the algorithm of example 1 is used, the maximum erase times and the minimum erase times of the physical block are searched by introducing the red-black tree structure, the flash memory system reduces the running time by 16.2%, and the additional erase times introduced by static wear leveling are reduced by 4.9% compared with the conventional static wear leveling algorithm, and the wear leveling effect of the algorithm of example 1 is slightly superior to that of the conventional algorithm.
It will be understood by those of ordinary skill in the art that all or some of the steps of the methods, systems, functional modules/units in the devices disclosed above may be implemented as software, firmware, hardware, and suitable combinations thereof. In a hardware implementation, the division between functional modules/units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as is well known to those of ordinary skill in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer. In addition, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to those skilled in the art.
It should be noted that the present invention can be embodied in other specific forms, and various changes and modifications can be made by those skilled in the art without departing from the spirit and scope of the invention.
Claims (10)
1. A wear leveling method for a flash memory system, comprising:
estimating erase count dispersion d of all physical blocks in the L UN partition according to the erase count a of the physical block with the smallest erase count and the erase count b of the physical block with the largest erase count, and determining the wear leveling processing priority p of the L UN partition according to the erase count dispersion d;
and performing static wear leveling on the L UN partition according to the wear leveling priority p of the L UN partition and the idle state of the flash memory system.
2. The method of claim 1 or 2, wherein:
the operation of affecting the L UN partition wear leveling of the flash memory system includes at least one of:
garbage collecting at least one physical block in L UN partition;
carrying out dynamic wear leveling on the L UN partition;
the L UN partition is subjected to static wear leveling.
3. The method of claim 1, wherein:
estimating dispersion d of the erasing times of all the physical blocks in the L UN partition according to the erasing times a of the physical block with the least erasing times and the erasing times b of the physical block with the most erasing times, including:
the average number of erasures c for all physical blocks in the L UN partition is calculated in the following manner:
c＝(a+b)/2；
calculating the dispersion d of the erasing times of all the physical blocks in the L UN partition by adopting the following method:
d＝m/c；
where m is max (c-a, b-c), and max () is a max function.
4. The method of claim 1, wherein:
the searching for the physical block with the largest and smallest erasing times in the L UN partition includes:
sorting the L UN partitioned physical blocks by erasure number using a red-black tree data structure;
during searching, the physical blocks with the largest and the smallest erasing times are quickly indexed by utilizing the red and black tree sorting principle.
5. The method of claim 1, wherein:
l the dispersion d of the times of erasing the physical block of the UN partition has a definite corresponding relation with the wear leveling priority p of the L UN partition, when the dispersion d of the times of erasing the physical block of the L UN partition changes from low to high, the wear leveling priority p of the corresponding L UN partition changes from low to high;
the level of the wear-leveling priority p of the L UN partition is used for indicating the urgency of the L UN partition to perform static wear-leveling.
6. The method of claim 5, wherein:
performing static wear leveling on the L UN partition according to the wear leveling priority p of the L UN partition and an idle state of a flash memory system, wherein the static wear leveling includes performing at least one of the following:
when the wear leveling priority p of the L UN partition indicates that the L UN partition needs static wear leveling and has high urgency, if the duration of the idle state of the flash memory system exceeds a first time threshold or is about to enter a power-off state, performing static wear leveling on the L UN partition;
when the wear leveling priority p of the L UN partition indicates that the L UN partition needs to be statically wear leveled and has moderate urgency, if the duration of the flash memory system actively entering background operation or the flash memory system being in an idle state exceeds a second time threshold, statically wear leveling the L UN partition;
when the wear leveling priority p of the L UN partition indicates that the L UN partition needs static wear leveling and has low urgency, if the flash memory system actively enters a background operation, the L UN partition is subjected to static wear leveling;
wherein the first time threshold is less than the second time threshold.
7. The method of any one of claims 1-6, wherein:
the dynamic wear leveling process includes:
when data is written, an empty physical block with the minimum erasing times in the L UN partition is preferentially selected as a target physical block to be written;
the static wear leveling process includes exchanging data of a physical block with the largest number of erasures and data of a physical block with the smallest number of erasures in the L UN partition.
8. A wear leveling apparatus of a flash memory system, comprising:
the detection and calculation module is used for searching physical blocks with the largest and the smallest erasing times in the L UN partition when detecting the operation of influencing the abrasion balance degree of a logical unit number L UN partition of the flash memory system, estimating the dispersion degree d of the erasing times of all the physical blocks in the L UN partition according to the erasing times a of the physical block with the smallest erasing times and the erasing times b of the physical block with the largest erasing times, and determining the abrasion balance processing priority p of the L UN partition according to the dispersion degree d of the erasing times;
the balancing processing module is used for carrying out dynamic wear balancing processing on L UN partitions of the flash memory system and carrying out static wear balancing processing on L UN partitions according to the wear balancing processing priority p of the L UN partitions and the idle state of the flash memory system.
9. A wear leveling apparatus of a flash memory system, comprising:
memory, a processor and a wear leveling program of a flash memory system stored on the memory and executable on the processor, which when executed by the processor implements the steps of the wear leveling method of a flash memory system of any of the preceding claims 1-7.
10. A computer readable storage medium having stored thereon a wear leveling program of a flash memory system, which when executed by a processor implements the steps of the wear leveling method of the flash memory system of any of claims 1-7.
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