CN105099158A - Soft start circuit with quick response characteristic - Google Patents

Abstract

The invention belongs to the technical field of electronic circuits, and specifically relates to a soft start circuit with quick response characteristic. The circuit charges an RC (Resistor-Capacitor) parallel structure by adopting step current; the charging circuit comprises a current source I1, a current source I2, an off-chip capacitor C, a resistor R1, a resistor R2, a comparator and a switching tube MN; the voltage drop generated on the resistor R1 by the current source I1 is input to the negative input end of the comparator, the voltage drop generated on the resistor R2 by the current source I2 is input to the negative input end of the comparator, and the resistor R2 is connected in parallel with the off-chip soft start capacitor and connected with the drain of the MN1; the voltage drop V1 generated on the resistor R1 by the current source I1 is input to the positive input end of the comparator as a voltage reference point of the soft start circuit; the current source I2 charges the off-chip capacitor C, and the voltage V2 on the capacitor is input to the negative input end of the comparator; and the soft start process ends when the comparator outputs a high soft start identification signal, and a chip enters a normal working state.

Description

A kind of soft starting circuit with fast response characteristic

Technical field

The invention belongs to electronic circuit technology field, relate to a kind of soft starting circuit with fast response characteristic specifically.

Background technology

In switch power technology field, soft starting circuit is very important module, can be applicable in DC-DCBUCK converter, and its effect is that anti-locking system occurs surge current due to during system electrification for system provides the process slowly powered on.

Traditional soft starting circuit common structure as shown in Figure 1, comprises comparator SS_COMP1, the outer electric capacity C of sheet, and mirror current source I1.

Suppose that electric capacity presses initial condition to charge from zero point, the voltage on t electric capacity is determined by following formula:

V _{ss_in}C _ss＝t×I _ss

I _ssfor current source I1 output current;

As the charging voltage V on electric capacity _{ss_in}when equaling soft-start reference voltage SS_REF, soft start terminates:

$V_{SS\_IN}=t\×\frac{I_{ss}}{C_{ss}}=SS\_REF$

Therefore obtaining total soft start (Tss) time is:

$T_{ss}=t_{|V_{SS\_IN}=SS\_REF}=SS\_REF\×\frac{C_{ss}}{I_{ss}}$

Electric current is directly to capacitor charging, can ensure that the charging interval is the fastest, but after soft start terminates (VSS_IN=SS_REF), electric current can continue to capacitor charging until the voltage on electric capacity is close to 5V (mirror current source is close to linear zone).If after chip failure, NMOS tube MN1 grid control signal makes MN1 conducting discharge to soft start capacitor, until VSS_IN=SS_REF, soft start comparator overturns again.Namely require that the voltage on soft start capacitor discharges into 0.8V soft start marking signal from 5V and just can change, therefore there is the system closing response time longer, bring the potential safety issue under fault occurrences.

Summary of the invention

To be solved by this invention, be exactly for the problems referred to above, propose a kind of soft starting circuit with fast response characteristic.

For achieving the above object, the present invention adopts following technical scheme:

As shown in Figure 2, a kind of soft starting circuit with fast response characteristic, comprises the first current source I1, the second current source I2, comparator, electric capacity C, NMOS tube MN, the first resistance R1, the second resistance R2 and the 3rd resistance R3; One termination power of the first current source I1, its other end is by ground connection after the first resistance R1; The tie point of the first current source I1 and the first resistance R1 connects the negative input of comparator; One termination power of the second current source I2, the positive input of its another termination comparator and the drain electrode of NMOS tube MN; The output of comparator is soft start id signal; The grid of NMOS tube MN connects external control signal, its source ground; The tie point of the second current source I2 and comparator positive input is by ground connection after the second resistance R2; In parallel with the second resistance R2 after electric capacity C connects with the 3rd resistance R3, and electric capacity C is connected with the tie point of the second resistance R2 with the second current source I2, the 3rd resistance R3 ground connection.

The technical scheme that the present invention is total, the present invention adopts step current to the charging of RC parallel-connection structure, and charging circuit comprises current source I1, current source I2, sheet outer electric capacity C, resistance R1, resistance R2, comparator COMP, switching tube MN, the negative input of the pressure drop input comparator COMP that current source I1 on resistance, R1 produces, the negative input of the pressure drop input comparator COMP that current source I2 on resistance, R2 produces, resistance R2 and the outer soft start capacitor of sheet are in parallel, and are connected with the drain electrode of MN1; Wherein current source I1 produces pressure drop V1 on resistance R1, as the positive input of the reference point input comparator COMP of soft starting circuit voltage; Current source I2 charges to the outer electric capacity C of sheet, the negative input of the voltage V2 input comparator COMP on electric capacity; It is that height then indicates that soft start-up process terminates that comparator exports soft start id signal SS_FLAG, and chip enters normal operating conditions.

Beneficial effect of the present invention is, is applicable to the soft starting circuit of DC-DC converter, while the effective soft start-up process of guarantee, respond the ability turning off chip when having chip failure fast, and circuit is simple, and soft-start time is easy to control.

Accompanying drawing explanation

Fig. 1 is prior art soft starting circuit schematic diagram;

Fig. 2 is soft start circuit structure schematic diagram of the present invention;

Fig. 3 is soft starting circuit kernel model schematic diagram of the present invention;

Fig. 4 is that the soft start voltage of soft starting circuit of the present invention changes oscillogram in time;

Fig. 5 is the soft start turn-off response schematic diagram of soft starting circuit of the present invention.

Embodiment

As shown in Figure 2, a kind of soft starting circuit with fast response characteristic of the present invention, comprises the first current source I1, the second current source I2, comparator, electric capacity C, NMOS tube MN, the first resistance R1, the second resistance R2 and the 3rd resistance R3; One termination power of the first current source I1, its other end is by ground connection after the first resistance R1; The tie point of the first current source I1 and the first resistance R1 connects the negative input of comparator; One termination power of the second current source I2, the positive input of its another termination comparator and the drain electrode of NMOS tube MN; The output of comparator is soft start id signal; The grid of NMOS tube MN connects external control signal, its source ground; The tie point of the second current source I2 and comparator positive input is by ground connection after the second resistance R2; In parallel with the second resistance R2 after electric capacity C connects with the 3rd resistance R3, and electric capacity C is connected with the tie point of the second resistance R2 with the second current source I2, the 3rd resistance R3 ground connection.

Operation principle of the present invention is:

The core circuit of structure of the present invention can be equivalent to the charge model of Fig. 3.After soft start-up process starts, the voltage on t electric capacity C is:

$V_2\left(t\right)=I_2{R}_2(1-e^{-\frac{t}{R_{2}C}})\mathrm{\ϵ}\left(t\right),t\≥0,$

Calculating for simplifying, considering t>0 situation, ε (t)=1, and getting approximation relation:

t＝τ,V ₂(t)＝0.63I ₂R ₂

t＝2τ,V ₂(t)＝0.86I ₂R ₂

t＝3τ,V ₂(t)＝0.95I ₂R ₂

t＝4τ,V ₂(t)＝0.98I ₂R ₂

t＝5τ,V ₂(t)＝0.99I ₂R ₂

Wherein, τ=R ₂c, I ₂r ₂represent the steady state voltage value on electric capacity.

Charge total time M τ (M=1,2,3,4,5) and the voltage KI on electric capacity is obtained from above approximation relation ₂r ₂the one-to-one relationship of (K=0.63,0.85,0.95,0.98,0.99)

Formula is obtained again by V2=V1=I1R1:

KI ₂r ₂=I ₁r ₁, because I1=I2, then KR ₂=R ₁.

Therefore, if the ratio R of R2 and R1 ₂/ R ₁=K determines, then the total time M τ that charges also determines.Above analytic explanation soft-start time is determined jointly by the resistance ratio of RC time constant and R1 and R2.Then soft-start time sets by plug-in capacitor C, realizes soft-start time adjustable function.

Above-mentioned analysis achieves normal soft start-up process, consider when chip run into fault need restart time, zero need be discharged into soft start capacitor, soft start marking signal is dragged down, wait chip start next time.Therefore the turn-off response speed of the replacement time effects system of soft start.Now analyze and soft start-up process is exited to capacitor discharge.

First the discharge process of analysis conventional soft start structure, in Fig. 1, after soft start terminates, charging voltage VSS_IN ≈ 5V, when chip breaks down, NMOS tube grid control signal SS_RESET=1, MN1 conducting, MN1 is first operated in saturation region, VSS_IN reduces, when being operated in linear zone after VSS_IN-VTH<5V, when VSS_IN discharges into VSS_IN<SS_REF, soft start id signal SS_FLAG overturns, then Δ V=5-0.8=4.2V in discharge process.

In Fig. 2, the steady state voltage on electric capacity remains I ₂r ₂, by V2=I2R>V1, until chip run into fault need turn off time, first SS_RESET signal be height, trigger switch pipe MN1 opens, and soft start capacitor C is discharged by switching tube MN1.Switching tube MN1 conducting moment, VGS1=5V, VDS1 ≈ 0.8V, then VGS1-Vth>VDS1, MN1 are operated in linear zone, and the electric current flowing through switching tube is:

$I_1\&ap;{\mathrm{\&mu;C}}_{OX}{\left(\frac{W}{L}\right)}_1(V_{GS1}-V_{TH})V_{DS1}$

Discharge process, VDS1 continues to reduce, and therefore VGS1-Vth>VDS1, MN1 always work in linear zone, until V2<V1, soft start marking signal drags down, and indicates that soft starting circuit resets, and waits for that chip is opened next time.In this process, the voltage variety on electric capacity is Δ V=V ₂-V ₁≈ 0.83-0.80=0.03V.

Wherein μ is channel carrier mobility; COX is the gate oxide capacitance of unit area; W/L is MOS breadth length ratio, under be designated as indication for metal-oxide-semiconductor; VGS1 is that the gate source voltage of metal-oxide-semiconductor is poor; VTH is the threshold voltage of NMOS tube.

Road from the above analysis, in soft start circuit structure of the present invention, when chip turns off, the tension discharge on electric capacity can drag down soft start marking signal to VSS<SS_REF, waits for chip enable next time.Turn off soft start marking signal from receiving chip to reset, the voltage change range on soft start capacitor is very little, and therefore discharge time is very short, then substantially increase the turn-off response speed of chip.

By the soft starting circuit of above-mentioned design, while the effective soft start-up process of guarantee, improve the turn-off response time of chip, and circuit structure is simple, soft-start time is controlled.

Soft start circuit structure proposed by the invention, illustrated by SPECTRE emulation, the resistance R1 in sheet and R2 ratio determine the relation between soft-start time and RC parallel-connection structure time constant RC; Therefore, after integrated circuit (IC) design is packaged, the soft-start time of chip is only determined by the electric capacity outside sheet.After soft-start time terminates, comparator output logic SS_FLAG is high, as Fig. 4.Work as chip failure, when needing to restart, SS_RESET logic control switch pipe MN1 opens, discharge to soft start capacitor C, until during V2=V1, drag down SS_FLAG, as can be seen from Figure 5, from reception reset signal, to drag down the response time to soft start marking signal be 10ns, and response speed is very fast, improves the fail safe of chip under failure condition.

Claims (1)

1. there is a soft starting circuit for fast response characteristic, comprise the first current source I1, the second current source I2, comparator, electric capacity C, NMOS tube MN, the first resistance R1, the second resistance R2 and the 3rd resistance R3; One termination power of the first current source I1, its other end is by ground connection after the first resistance R1; The tie point of the first current source I1 and the first resistance R1 connects the negative input of comparator; One termination power of the second current source I2, the positive input of its another termination comparator and the drain electrode of NMOS tube MN; The output of comparator is soft start id signal; The grid of NMOS tube MN connects external control signal, its source ground; The tie point of the second current source I2 and comparator positive input is by ground connection after the second resistance R2; In parallel with the second resistance R2 after electric capacity C connects with the 3rd resistance R3, and electric capacity C is connected with the tie point of the second resistance R2 with the second current source I2, the 3rd resistance R3 ground connection.