CN109980911B - Self-adaptive selection soft start circuit and method thereof - Google Patents
Self-adaptive selection soft start circuit and method thereof Download PDFInfo
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- CN109980911B CN109980911B CN201910246873.3A CN201910246873A CN109980911B CN 109980911 B CN109980911 B CN 109980911B CN 201910246873 A CN201910246873 A CN 201910246873A CN 109980911 B CN109980911 B CN 109980911B
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- soft start
- nmos transistor
- charging capacitor
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- bias current
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/36—Means for starting or stopping converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
Abstract
The invention relates to the field of integrated circuits, and discloses a soft start circuit capable of self-adaptive selection and a method thereof. The circuit comprises a charging capacitor inside a chip, a second bias current, an operational amplifier circuit only having a pull-down function, a first bias current and a comparator, and further comprises or does not comprise the charging capacitor arranged outside the chip, the second bias current is connected with the charging capacitor for charging, if the charging capacitor is included, the first bias current is connected with the charging capacitor outside the chip for charging, a voltage point between the second bias current and the charging capacitor is connected to a positive input end of the operational amplifier circuit after being connected with voltage, a negative input end of the operational amplifier circuit is connected with an input end of the comparator and the first bias current, and after an input end of the comparator is compared with preset reference voltage, an output signal indicates that the selective capacitor or the charging capacitor completes soft start. The scheme is based on that the operational amplifier only with the pull-down capability compares internal and external soft start voltages in real time, so that the circuit can adaptively select a slower one as a start mode.
Description
Technical Field
The present invention relates to the field of integrated circuits, and more particularly, to a soft start circuit capable of adaptive selection and a method thereof.
Background
When the DC-DC circuit is started, in order to prevent the output end from overshooting, a soft start function needs to be added to the circuit. The soft start time is generally obtained by charging a capacitor with a fixed current, and the soft start time can be adjusted according to application requirements by adjusting the values of the capacitor and the current, wherein T ═ V ═refC)/I. The capacitor of the soft start circuit can be integrated in the chip, so that the periphery of the chip is simpler and more convenient to use, but the defect is that the soft start time is fixed and cannot be adjusted. The capacitor of the soft start circuit can be arranged outside the chip through the PIN PIN, so that the soft start time can be set by adjusting the capacitor. However, the external soft start increases the complexity of the periphery of the chip, and may cause the circuit to be unable to start normally due to factors such as PIN cold solder. Therefore, when the external soft start is arranged, a soft start capacitor is integrated in the chip to serve as a bottom protection. When the coreWhen the chip is internally and externally provided with soft start capacitors, whether internal soft start or external soft start is selected needs to be judged before use, and inconvenience is brought to design and use of a circuit.
In summary, the single soft start function disposed inside or outside the chip can limit the application due to its limitation, and cannot satisfy applications with different requirements. The traditional circuit compatible with the on-chip and off-chip soft start needs to manually select a starting mode before starting or select the starting mode in the circuit through complex judgment logic, so that the problems of high cost, high design complexity and the like are solved.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: in view of the above problems, an adaptive soft start circuit and method thereof are provided.
The technical scheme adopted by the invention is as follows: a soft start circuit capable of self-adaptive selection comprises a charging capacitor Cint inside a chip, a second bias current, an operational amplifier circuit only with a pull-down function, a first bias current and a comparator, and further comprises or does not comprise a charging capacitor Cout arranged outside the chip, wherein the second bias current is connected with the charging capacitor Cint for charging, if the charging capacitor Cout comprises the charging capacitor Cout, the first bias current is connected with the charging capacitor Cout outside the chip for charging, a voltage point D between the second bias current and the charging capacitor Cint is connected to a positive input end of the operational amplifier circuit after being connected with voltage, a negative input end of the operational amplifier circuit is connected with an input end of the comparator and the first bias current, and after the input end of the comparator is compared with preset reference voltage, an output signal indicates that the selection capacitor Cint or the charging capacitor Cout completes soft start.
Further, when the input signal reaches the reference voltage, the method for indicating the soft start by the output signal of the comparator comprises the following steps: if the soft start time of the charging capacitor Cout outside the chip is less than the preset soft start time of the charging capacitor Cint inside the chip, or no external soft start capacitor is set, the circuit automatically selects the charging capacitor Cint inside the chip as the soft start capacitor; and if the set soft start time of the charging capacitor Cout outside the chip is longer than the preset internal soft start time, selecting the charging capacitor Cout outside the chip as the soft start capacitor.
Further, the operational amplifier circuit comprises a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, and a bias current, wherein the bias current is connected to the source electrodes of the first PMOS transistor and the second PMOS transistor, the gates of the first PMOS transistor and the second PMOS transistor are respectively a negative input end and a positive input end of the operational amplifier circuit, the drain electrodes of the first PMOS transistor and the second PMOS transistor are respectively connected to the drain electrodes of the first NMOS transistor and the second NMOS transistor, the gates of the first NMOS transistor and the second NMOS transistor are connected to each other, the source electrodes of the first NMOS transistor and the second NMOS transistor are grounded, the drain electrode of the second NMOS transistor is connected to the gate electrode of the third NMOS transistor, and the drain electrode and the source electrode of the third NMOS transistor are respectively connected to the input end of the comparator and the ground.
Furthermore, the operational amplifier circuit further comprises a third resistor and a fourth resistor, the third resistor is connected with the grid electrode and the drain electrode of the first NMOS tube in parallel, and the fourth resistor is connected with the grid electrode and the drain electrode of the second NMOS tube in parallel.
Furthermore, the soft start circuit capable of self-adaptive selection further comprises a fourth NMOS tube and a fifth NMOS tube, the fourth NMOS tube and the fifth NMOS tube are switch tubes, the grid electrodes of the fourth NMOS tube and the fifth NMOS tube are connected with a logic control signal control switch, two ends of the drain electrode and two ends of the source electrode of the fourth NMOS tube are connected in parallel with the charging capacitor Cint, and two ends of the drain electrode and two ends of the source electrode of the fifth NMOS tube are connected in parallel with the charging capacitor Cout.
Further, when the charging capacitor Cout arranged outside the chip is included, the self-adaptive selection soft start circuit further includes a first resistor and a second resistor, the first resistor is connected between the first bias current and the charging capacitor Cout, one end of the second resistor is connected with the grid electrode of the fifth NMOS transistor, and the other end of the second resistor is connected with the charging capacitor Cout and the first resistor.
Further, the charging capacitor Cout outside the chip is connected with the inside of the chip through a chip pin.
Compared with the prior art, the beneficial effects of adopting the technical scheme are as follows: by adopting the technical scheme of the invention, the soft start voltage inside the chip and the soft start voltage outside the chip are compared in real time based on the operational amplifier only with the pull-down capability, so that the circuit can adaptively select a slower one as a start mode. The scheme can be compatible with internal and external soft start at the same time, and the starting mode can be selected in a self-adaptive mode without human intervention when the circuit is started.
Drawings
Fig. 1 is a schematic structural diagram of a soft start circuit capable of adaptive selection according to the present invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
The adaptively selectable soft start circuit shown in fig. 1, with the dotted line inside representing the chip inside and the dotted line outside the box representing the chip outside. The chip inside and the chip outside of the structure are connected through a chip PIN SS _ PIN. Specifically comprises a charging capacitor Cint inside the chip and a second bias current I2Operational amplifier circuit with pull-down function only, first bias current I1And a comparator Comp, with or without a charge capacitor Cout arranged outside the chip, said second bias current I2The internal charging capacitor Cint is connected for charging, and the first bias current I is obtained if the charging capacitor Cout is included1A charging capacitor Cout connected to the outside of the chip for charging, and the second bias current I2And a voltage point D between the charging capacitor Cint and the charging capacitor Cint is connected to the positive input end of the operational amplifier circuit after being connected with a voltage Buffer, and the negative input end of the operational amplifier circuit is connected with the input end of the comparator Comp and the first bias current I1The input terminal of the comparator Comp is connected to a predetermined reference voltage VrefAfter comparison, when the soft start voltage SS reaches a preset value VrefAnd then, the output signal SS _ OK indicates that the selective capacitor Cint or the charging capacitor Cout completes soft start, so that the automatic selection of the soft start capacitor is realized, and the automatic adjustment can be carried out according to different application conditions.
As a preferred embodiment, the operational amplifier circuit added in the invention is an operational amplifier with only pull-down capability, and comprises a first PMOS tube MP1, a second PMOS tube MP2, a first NMOS tube MN1, a second NMOS tube MN2, a third NMOS tube MN3 and a biasCurrent IbiasSaid bias current IbiasThe source electrodes of the first PMOS transistor MP1 and the second PMOS transistor MP2 are connected, the gates of the first PMOS transistor M1 and the second PMOS transistor MP2 are respectively a negative input end and a positive input end of the operational amplifier circuit, the drains of the first PMOS transistor MP1 and the second PMOS transistor MP2 are respectively connected with the drains of the first NMOS transistor MN1 and the second NMOS transistor MN2, the gates of the first NMOS transistor MN1 and the second NMOS transistor MN2 are connected, the source electrodes of the first NMOS transistor MN1 and the second NMOS transistor MN2 are grounded, the drain electrode of the second NMOS transistor MN2 is connected with the gate electrode of the third NMOS transistor MN3, and the drain electrode and the source electrode of the third NMOS transistor MN3 are respectively connected with the input end of the comparator Comp and the ground.
As a preferred embodiment, the operational amplifier circuit further includes a third resistor R3 and a fourth resistor R4, the third resistor R3 is connected in parallel with the gate and the drain of the first NMOS transistor MN1, and the fourth resistor R4 is connected in parallel with the gate and the drain of the second NMOS transistor MN 2. The third resistor R3 and the fourth resistor R4 are used for adjusting the stability of the loop.
As a preferred embodiment, the soft start circuit capable of adaptive selection further includes a fourth NMOS transistor MN4 and a fifth NMOS transistor MN5, the fourth NMOS transistor MN4 and the fifth NMOS transistor MN5 are switching transistors, and gates of the fourth NMOS transistor and the fifth NMOS transistor are connected to a logic control signal VcontroAnd when the circuit is ready to be powered on, the fourth NMOS tube MN4 and the fifth NMOS tube MN5 are in a turn-off state to charge the charging capacitor.
As a preferred embodiment, when the charging capacitor Cout disposed outside the chip is included, the adaptively selected soft start circuit further includes a first resistor R1 and a second resistor R2, and the first resistor R1 is connected to the first bias current I1And between the charging capacitor Cout, one end of the second resistor R2 is connected to the gate of the fifth NMOS transistor MN5, and the other end is connected to the charging capacitor Cout and the first resistor R1. The first resistor R1 and the second resistor R2 are for electrostatic protection.
The circuit function is described below in several possible cases.
1) No capacitor C is arranged outside the chipout: at this time, the negative input end (point A) of the operational amplifier is biased by a bias current I1And (5) drawing high. Current I2To internal soft start capacitor CintCharging to gradually increase the voltage at the voltage point D. And the voltage at the point D reaches the positive input end (B) of the operational amplifier after passing through the voltage buffer. Since the point a is pulled up to be close to VDD, the point B voltage is lower than the point a, and the point C potential is high, MN3 pulls down the point a voltage, so that the point a voltage follows the point B voltage. At this time, the soft start voltage SS follows the point B (the point B follows the point D), that is, the soft start time is a default value preset by the internal capacitor:
TSS＝(Vref·Cint)/I2
2) a capacitor C is arranged outside the chipout: at this time, the bias current I1Through PIN SS _ PIN to capacitor CoutCharging to gradually increase the voltage at point A and simultaneously, charging the capacitor I2Also in the internal soft start capacitor CintCharging, and gradually increasing the voltage at the point B after the voltage Buffer. If the voltage at point a rises faster than the voltage at point B, i.e., the voltage at point B is lower than the voltage at point a, similar to the case of 1), MN3 will pull down point a by loop regulation, causing the voltage at point a to follow the voltage at point B. At this time, the soft start voltage SS follows the point B (the point B follows the point D), that is, the soft start time is a default value preset by the internal capacitor:
TSS＝(Vref·Cint)/I2
3) a capacitor C is arranged outside the chipoutAnd the voltage at point a rises slower than the voltage at point B: at this time, the potential at point C is low, MN3 is turned off, and the voltage at point B does not affect the soft-start voltage SS. In this case, the soft start time is determined by the external capacitor CoutThe value of (a) determines that the user can customize the soft start time:
TSS＝(Vref·Cout)/I1
the above situations are possible to occur under different application conditions, the circuit works in what mode, manual setting is not needed after the circuit is powered on, and the circuit can adaptively and selectively select the starting mode according to the working environment.
The invention is not limited to the foregoing embodiments. The invention extends to any novel feature or any novel combination of features disclosed in this specification and any novel method or process steps or any novel combination of features disclosed. Those skilled in the art to which the invention pertains will appreciate that insubstantial changes or modifications can be made without departing from the spirit of the invention as defined by the appended claims.
Claims (6)
1. A soft start circuit capable of self-adapting selection is characterized by comprising a charging capacitor Cint inside a chip, a second bias current, an operational amplifier circuit only with a pull-down function, a first bias current and a comparator, and further comprising or not comprising a charging capacitor Cout arranged outside the chip, wherein the second bias current is connected with the charging capacitor Cint for charging, if the charging capacitor Cout is included, the first bias current is connected to the charging capacitor Cout outside the chip for charging, a voltage point D between the second bias current and the charging capacitor Cint is connected to the positive input terminal of the operational amplifier circuit after being connected with a voltage, the negative input end of the operational amplifier circuit is connected with the input end of the comparator and the first bias current, after the positive input end of the comparator is compared with the preset reference voltage input by the negative input end of the comparator, the output signal indicates that the charging capacitor Cint or the charging capacitor Cout is selected to complete soft start;
when the input signal of the positive input end of the comparator reaches the reference voltage, the method for indicating the soft start by the output signal of the comparator comprises the following steps: if the soft start time of the charging capacitor Cout outside the chip is less than the preset soft start time of the charging capacitor Cint inside the chip, or no external soft start capacitor is set, the circuit automatically selects the charging capacitor Cint inside the chip as the soft start capacitor; and if the set soft start time of the charging capacitor Cout outside the chip is longer than the preset internal soft start time, selecting the charging capacitor Cout outside the chip as the soft start capacitor.
2. The adaptive-selection soft start circuit of claim 1, wherein the operational amplifier circuit comprises a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, and a bias current, the bias current connects the sources of the first PMOS transistor and the second PMOS transistor, the gates of the first PMOS transistor and the second PMOS transistor are respectively a negative input terminal and a positive input terminal of the operational amplifier circuit, the drains of the first PMOS transistor and the second PMOS transistor are respectively connected to the drains of the first NMOS transistor and the second NMOS transistor, the gates of the first NMOS transistor and the second NMOS transistor are connected to each other, the sources of the first NMOS transistor and the second NMOS transistor are grounded, the drain of the second NMOS transistor is connected to the gate of the third NMOS transistor, and the drain and the source of the third NMOS transistor are respectively connected to the positive input terminal of the comparator and the ground.
3. The adaptively selectable soft start circuit as set forth in claim 2, wherein said op-amp circuit further comprises a third resistor connected in parallel with the gate and drain of the first NMOS transistor and a fourth resistor connected in parallel with the gate and drain of the second NMOS transistor.
4. The adaptively selectable soft start circuit as claimed in claim 3, further comprising a fourth NMOS transistor and a fifth NMOS transistor, wherein the fourth NMOS transistor and the fifth NMOS transistor are switching transistors, gates of the fourth NMOS transistor and the fifth NMOS transistor are connected to the logic control signal, both ends of a drain and a source of the fourth NMOS transistor are connected in parallel to the charging capacitor Cint, and both ends of a drain and a source of the fifth NMOS transistor are connected in parallel to the charging capacitor Cout.
5. The adaptively selectable soft start circuit as claimed in claim 4, wherein when the soft start circuit includes a charging capacitor Cout disposed outside the chip, the adaptively selectable soft start circuit further includes a first resistor and a second resistor, the first resistor is connected between the first bias current and the charging capacitor Cout, one end of the second resistor is connected to the drain of the fifth NMOS transistor, and the other end of the second resistor is connected to the charging capacitor Cout and the first resistor.
6. An adaptively selectable soft start circuit as in claim 1 or 5, wherein said chip external charging capacitor Cout is connected to the chip internal through a chip pin.
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| CN110568892B (en) * | 2019-10-09 | 2021-05-07 | 南京市智凌芯电子科技有限公司 | Band gap reference circuit |
| CN112564471B (en) * | 2020-11-27 | 2022-06-07 | 国创移动能源创新中心(江苏)有限公司 | Working sequence control circuit in two-stage conversion circuit and method thereof |
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Denomination of invention: An adaptive soft start circuit and its method Effective date of registration: 20201010 Granted publication date: 20200407 Pledgee: Chengdu SME financing Company Limited by Guarantee Pledgor: CHENGDU YICHONG WIRELESS POWER TECHNOLOGY Co.,Ltd. Registration number: Y2020980006682 |
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