CN105098015A - Semiconductor layer surface roughening method and formation method for LED structure with roughened surface - Google Patents

Semiconductor layer surface roughening method and formation method for LED structure with roughened surface Download PDF

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Publication number
CN105098015A
CN105098015A CN201410220151.8A CN201410220151A CN105098015A CN 105098015 A CN105098015 A CN 105098015A CN 201410220151 A CN201410220151 A CN 201410220151A CN 105098015 A CN105098015 A CN 105098015A
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semiconductor layer
alloy
metal
described
characterized
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CN201410220151.8A
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张�杰
彭遥
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惠州比亚迪实业有限公司
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Abstract

The invention provides a semiconductor layer surface roughening method. The semiconductor layer surface roughening method comprises steps: a semiconductor layer is provided, and the semiconductor layer is a nitride semiconductor layer; a solid metal or alloy film is formed on the semiconductor layer; annealing is carried out for preset time at a preset temperature higher than the melting point of the metal or the alloy thus the metal or alloy film is liquefied into a plurality of metal or alloy liquid drops, then the temperature is lowered to a temperature lower than the melting point of the metal or the alloy, thus the plurality of metal or alloy liquid drops are condensed into a plurality of metal or alloy island-shaped projections; the plurality of metal or alloy island-shaped projections are employed as a mask layer, and a concave-convex structure is etched on the layer top surface of the semiconductor and a roughed surface is formed; the plurality of metal or alloy island-shaped projections are removed. The semiconductor layer surface roughening method is advantageous in that the uniformity is good, and the method is stable and reliable. The invention also provides a formation method for an LED structure with a roughened surface.

Description

Semiconductor layer surface method of roughening and there is the LED structure formation method of surface coarsening

Technical field

The invention belongs to technical field of semiconductors, be specifically related to a kind of semiconductor layer surface method of roughening and there is the LED structure formation method of surface coarsening.

Background technology

Research shows, carries out alligatoring can improve its external quantum efficiency to the surface of GaN base LED chip, increases the light efficiency of chip.Existing common process is Nano microsphere mask etching method, and its process is: first difference deposit epitaxial layers on process for sapphire-based bottom material: be followed successively by resilient coating from top to bottom, N-type GaN layer, MQW luminescent layer, P type GaN layer; Secondly in P type GaN layer, spin coating is mixed with the dispersant of even microballoon, as shown in Figure 1a; Then form alligatoring with lithographic technique, wherein Nano microsphere effect stops ICP etching, and all the other are not etched away by the place that nanoparticle covers, as shown in Figure 1 b; Finally surperficial mask cover layer is removed, final formation P type GaN alligatoring structure.

In the method, owing to can occur to pile up or uneven phenomenon when Nano microsphere is blended in dispersant, directly cause follow-up alligatoring etching process wayward, etch the alligatoring structure distribution obtained uneven, volume production poor stability.Particularly, it is more shallow that nanosphere piles up the more narrow and deep degree in groove interval that formed in follow-up alligatoring etching process of comparatively intensive region, and nanosphere piles up that groove interval that the region of comparatively evacuating formed in follow-up alligatoring etching process is wider and the degree of depth is darker.

Summary of the invention

The present invention is intended to overcome that etching of the prior art is uneven, the shortcoming of poor stability.For this reason, the object of the invention is to propose a kind of uniform, reliable semiconductor layer surface method of roughening, and propose the LED structure formation method with surface coarsening.

In view of this, first aspect present invention proposes a kind of semiconductor layer surface method of roughening, comprises the following steps: provide semiconductor layer, and described semiconductor layer is nitride semiconductor layer; Solid-state metal or alloy film is formed in described semiconductor layer; To anneal under the preset temperature higher than described metal or alloy fusing point Preset Time, multiple metal or alloy drop is turned to make described metal or alloy film liquid, then, below the fusing point being cooled to described metal or alloy, be that multiple metal or alloy island is protruding to make described multiple metal or alloy Drop Condensation; Protruding for mask layer with described multiple metal or alloy island, go out concaveconvex structure to form coarse surface at the top etch of described semiconductor layer; Remove described multiple metal or alloy island protruding.

As from the foregoing, the semiconductor layer surface method of roughening of the embodiment of the present invention at least tool have the following advantages: the droplet size that (1) is formed due to surface tension of liquid is similar to, is evenly distributed, and makes the coarse surface good evenness in the in-plane direction finally obtained.(2) owing to not having the impact of the dispersant in traditional handicraft, degree of depth during ICP etching can accurately control, and makes the coarse surface roughness in vertical direction that finally obtains controlled.(3) simple, good stability.

According to one embodiment of present invention, the material of described metal or alloy is: gold, silver, copper, aluminium, tin, zinc, argentalium alloy, albronze, red brass or silver-colored ashbury metal.

According to one embodiment of present invention, the thickness of described metal or alloy film is 0.2-5nm.

According to one embodiment of present invention, described preset temperature is higher than the fusing point 10-50 DEG C of described metal or alloy.

According to one embodiment of present invention, described Preset Time is 10-100min.

According to one embodiment of present invention, described metal or alloy film is formed by sputtering or evaporation.

According to one embodiment of present invention, described concaveconvex structure is gone out by ICP dry etching.

According to one embodiment of present invention, the roughness of described coarse surface is 6-600nm.

According to one embodiment of present invention, described multiple metal or alloy island is removed by wet-chemical etching protruding.

In view of this, second aspect present invention proposes a kind of LED structure formation method with surface coarsening, it is characterized in that, comprises the following steps: provide substrate; The first doping type semiconductor layer is formed in described substrate; Multiple quantum well layer is formed in described first doping type semiconductor layer; Electronic barrier layer is formed on described multiple quantum well layer; The second doping type semiconductor layer is formed on described electronic barrier layer; The semiconductor layer surface method of roughening mentioned above top to described second doping type semiconductor layer is adopted to carry out surface coarsening; Form the first electrode and the second electrode.

As from the foregoing, the LED structure formation method with surface coarsening of the embodiment of the present invention, coarse surface uniformity is wherein good, and roughness is controlled, thus can improve chip external quantum efficiency better, improves LED chip light efficiency.

Additional aspect of the present invention and advantage will part provide in the following description, and part will become obvious from the following description, or be recognized by practice of the present invention.

Accompanying drawing explanation

Above-mentioned and/or additional aspect of the present invention and advantage will become obvious and easy understand from accompanying drawing below combining to the description of embodiment, wherein:

Fig. 1 a and Fig. 1 b is the schematic diagram that existing Nano microsphere mask etching method realizes method for coarsening surface.

Fig. 2 is the flow chart of the semiconductor layer surface method of roughening of the embodiment of the present invention.

Fig. 3 a to Fig. 3 d is the flow chart of the semiconductor layer surface method of roughening of the embodiment of the present invention.

Fig. 4 is the flow chart with the LED structure formation method of surface coarsening of the embodiment of the present invention.

Fig. 5 a to Fig. 5 f is the process schematic with the LED structure formation method of surface coarsening of the embodiment of the present invention.

Embodiment

Be described below in detail embodiments of the invention, the example of described embodiment is shown in the drawings, and wherein same or similar label represents same or similar element or has element that is identical or similar functions from start to finish.Be exemplary below by the embodiment be described with reference to the drawings, be intended to for explaining the present invention, and can not limitation of the present invention be interpreted as.

In describing the invention, it will be appreciated that, term " thickness ", " on ", D score, " top ", the orientation of the instruction such as " end " or position relationship be based on orientation shown in the drawings or position relationship, only the present invention for convenience of description and simplified characterization, instead of indicate or imply that the device of indication or element must have specific orientation, with specific azimuth configuration and operation, therefore can not be interpreted as limitation of the present invention.

In addition, term " first ", " second " only for describing object, and can not be interpreted as instruction or hint relative importance or imply the quantity indicating indicated technical characteristic.Thus, be limited with " first ", the feature of " second " can express or impliedly comprise one or more these features.In describing the invention, the implication of " multiple " is two or more, unless otherwise expressly limited specifically.

In the present invention, unless otherwise clearly defined and limited, the term such as term " installation ", " being connected ", " connection ", " fixing " should be interpreted broadly, and such as, can be fixedly connected with, also can be removably connect, or connect integratedly; Can be mechanical connection, also can be electrical connection; Can be directly be connected, also indirectly can be connected by intermediary, can be the connection of two element internals.For the ordinary skill in the art, above-mentioned term concrete meaning in the present invention can be understood as the case may be.

First aspect present invention proposes a kind of semiconductor layer surface method of roughening, as shown in Figure 2, can comprise the following steps:

S11. provide semiconductor layer, described semiconductor layer is nitride semiconductor layer, forms solid-state metal or alloy film in semiconductor layer.

The material of semiconductor layer can be the multiple nitride-based semiconductor of GaN, InGaN, AlGaN etc., and can be also the IV race semiconductors such as Si, Ge or SiGe, technical staff can select as required flexibly.Metal or alloy film can be formed in semiconductor layer by modes such as sputtering or evaporations.The material of metal or alloy film can be gold, silver, copper, aluminium, tin, zinc, argentalium alloy, albronze, red brass or silver-colored ashbury metal etc.The material of above-mentioned metal or alloy be selected in reason be following reason one of at least: a. fusing point is less than the maximum temperature of annealing furnace equipment; B. cost is cheap, is easy to obtain; C. sputtering or evaporation film-forming is easy to; D. stable in physicochemical property; E. the later stage is easy to be removed.Solid-state metal or alloy film thickness is about 0.2-5nm, preferred 0.5-2nm.Film is blocked up or cross Bao Douhui and cause being difficult in subsequent step forming equally distributed solid-state island structure.As shown in Figure 3 a, 1 represents semiconductor layer to semiconductor structure now, and 2 represent solid-state metal or alloy film.

S12. to anneal under the preset temperature higher than described metal or alloy fusing point Preset Time, multiple metal or alloy drop is turned to make metal or alloy film liquid, then, below the fusing point being cooled to metal or alloy, be that multiple metal or alloy island is protruding to make multiple metal or alloy Drop Condensation.

After carrying out annealing operation, solid-state film undergoes phase transition, and is liquefied as that multiple size is approximate, equally distributed drop because of surface tension of liquid.Under subsequently temperature being reduced to fusing point, it is protruding that drop is just condensed into solid-state island.Normally, the diameter of island projection is 0.3-1.5 μm.As shown in Figure 3 b, wherein 3 represent that metal or alloy island is protruding to semiconductor structure now.

It should be noted that, preset temperature needs to be strict controlled in the temperature range of fusing point 10-50 DEG C higher than described metal or alloy.Temperature is too low, and the metal or alloy film of solid is difficult to be liquefied as metal or alloy drop.Temperature is too high, likely causes some alloy generation Segregations, or causes vaporization phenomenon.Preset Time is 10-100min, preferred 30-60min.In the too short likely annealing furnace of annealing time, local temperature not yet reaches preset temperature, has failed liquefaction process.Annealing time is long likely produces harmful effect to the semiconductor layer of non-refractory.

S13. protruding for mask layer with multiple metal or alloy island, go out concaveconvex structure to form coarse surface at the top etch of semiconductor layer.

Can ICP(InductivelyCoupledPlasma be passed through, reaction coupled plasma) top etch that is dry-etched in semiconductor layer 1 goes out concaveconvex structure, defines coarse surface.Wherein be not etched by the semiconductor portions that metal or alloy island protruding 3 covers, the semiconductor portions exposed between metal or alloy island projection 3 is etched.Because ICP dry etch process is ripe, therefore by the degree of depth controlling the power of etching, the time controls the concaveconvex structure etched, the roughness of coarse surface that is can be controlled.In one embodiment of the invention, the roughness of this coarse surface is 6-600nm.Semiconductor structure now as shown in Figure 3 c.

S14. multiple metal or alloy island is removed protruding.

The structure immersion that step S14 can be obtained has height to metal or alloy material and semi-conducting material and corrodes in the corrosive liquid of Selection radio, namely removes multiple metal or alloy island projection 3 by wet-chemical etching.Semiconductor structure now as shown in Figure 3 d.

As from the foregoing, the semiconductor layer surface method of roughening of the embodiment of the present invention at least tool have the following advantages: the droplet size that (1) is formed due to surface tension of liquid is similar to, is evenly distributed, and makes the coarse surface good evenness in the in-plane direction finally obtained.(2) owing to not having the impact of the dispersant in traditional handicraft, degree of depth during ICP etching can accurately control, and makes the coarse surface roughness in vertical direction that finally obtains controlled.(3) simple, good stability.

Second aspect present invention proposes a kind of LED structure formation method with surface coarsening, as shown in Figure 4, can comprise the following steps:

S21. substrate is provided;

S22. the first doping type semiconductor layer is formed in substrate;

S23. multiple quantum well layer is formed in the first doping type semiconductor layer;

S24. on multiple quantum well layer, electronic barrier layer is formed;

S25. on electronic barrier layer, form the second doping type semiconductor layer;

S26. the disclosed top of semiconductor surface method of roughening to the second doping type semiconductor layer is above adopted to carry out surface coarsening;

S27. the first electrode and the second electrode is formed.

It should be noted that, the known technology being chosen as those skilled in the art of the material of each layer in LED structure, can select as required flexibly.Those skilled in the art can also add following optional step as required to improve the illumination effect of LED structure further: form resilient coating, form intrinsic nitride semiconductor layer, form current-diffusion layer etc.This is also the known technology of those skilled in the art, does not repeat herein.

As from the foregoing, the LED structure formation method with surface coarsening of the embodiment of the present invention, coarse surface uniformity is wherein good, and roughness is controlled, thus can improve chip external quantum efficiency better, improves LED chip light efficiency.

For making those skilled in the art understand the LED structure formation method with surface coarsening of the present invention better, applicant's composition graphs 5a to Fig. 5 f introduces a specific embodiment.

1. take sapphire as substrate 100, deposit conventional structure epitaxial loayer on the substrate 100 by MOCVD technique.Epitaxial loayer is followed successively by nitride buffer layer (Bufferlayer) 200, n-layer (N-GaN) 300, multiple quantum well layer (MQW) 400, electronic barrier layer (EBL) 500 and p-type layer (P-GaN) 600.As shown in Figure 5 a.

2. pair deposition terminate after epitaxial wafer carry out preliminary treatment, first soak 10 minutes in 40 DEG C of acetone, after soak 15 minutes in 60 DEG C of isopropyl alcohols, then use deionized water rinsing 20 minutes, stand-by after dry.

3. pretreated epitaxial wafer is put into evaporator, select high-purity silver (purity 99.999%) to carry out evaporation, obtain the Ag films 700 that thickness is 0.5-2nm.As shown in Figure 5 b.

4. the epitaxial wafer after plated film is put into heat-treating machine, regulate the temperature of heat-treating machine to fusing point 10-50 DEG C (silver point is 960 DEG C, then heat treated temperature of annealing is 970-1010 DEG C) being greater than Ag films.Maintain this default annealing temperature 40 minutes, be then down to room temperature and take out.Because annealing stage is molten into liquid metallic surface tension force effect, epitaxial wafer surface will form silver-colored island projection 800, the diameter 0.3-1.5um of silver-colored island projection 800.As shown in Figure 5 c.

5., after epitaxial wafer surface forms silver-colored island projection 800, epitaxial wafer is put into the alligatoring etching that ICP carries out p-type layer 600.Etching gas uses chlorine and boron chloride, and flow is respectively 5sccm and 3sccm, radio-frequency power 20W, etch period 10-60 second.Can obtain that there is the p-type layer 600 that roughness is about the alligatoring structure of 200nm.As fig 5d.

6. the epitaxial wafer after surface coarsening is entered chloroazotic acid 1 minute, remained on surface ag material is corroded removal.Use deionized water rinsing dry after 10 minutes again.As depicted in fig. 5e.

7. carry out the processing procedure of conventional die.First ICP dry etching goes out PN step, then makes the current-diffusion layer 900 of ITO material on p-type layer 600 surface, finally produces P electrode 1000, N electrode 1100 and surface passivation layer 1200, completes the LED structure manufacture with surface coarsening.As shown in figure 5f.

In the description of this specification, specific features, structure, material or feature that the description of reference term " embodiment ", " some embodiments ", " example ", " concrete example " or " some examples " etc. means to describe in conjunction with this embodiment or example are contained at least one embodiment of the present invention or example.In this manual, identical embodiment or example are not necessarily referred to the schematic representation of above-mentioned term.And the specific features of description, structure, material or feature can combine in an appropriate manner in any one or more embodiment or example.

Although illustrate and describe embodiments of the invention above, be understandable that, above-described embodiment is exemplary, can not be interpreted as limitation of the present invention, those of ordinary skill in the art can change above-described embodiment within the scope of the invention when not departing from principle of the present invention and aim, revising, replacing and modification.

Claims (10)

1. a semiconductor layer surface method of roughening, is characterized in that, comprises the following steps:
There is provided semiconductor layer, described semiconductor layer is nitride semiconductor layer;
Solid-state metal or alloy film is formed in described semiconductor layer;
To anneal under the preset temperature higher than described metal or alloy fusing point Preset Time, multiple metal or alloy drop is turned to make described metal or alloy film liquid, then, below the fusing point being cooled to described metal or alloy, be that multiple metal or alloy island is protruding to make described multiple metal or alloy Drop Condensation;
Protruding for mask layer with described multiple metal or alloy island, go out concaveconvex structure to form coarse surface at the top etch of described semiconductor layer;
Remove described multiple metal or alloy island protruding.
2. semiconductor layer surface method of roughening according to claim 1, is characterized in that, the material of described metal or alloy is: gold, silver, copper, aluminium, tin, zinc, argentalium alloy, albronze, red brass or silver-colored ashbury metal.
3. semiconductor layer surface method of roughening according to claim 1, is characterized in that, the thickness of described metal or alloy film is 0.2-5nm.
4. semiconductor layer surface method of roughening according to claim 1, is characterized in that, described preset temperature is higher than the fusing point 10-50 DEG C of described metal or alloy.
5. semiconductor layer surface method of roughening according to claim 1, is characterized in that, described Preset Time is 10-100min.
6. semiconductor layer surface method of roughening according to claim 1, is characterized in that, forms described metal or alloy film by sputtering or evaporation.
7. semiconductor layer surface method of roughening according to claim 1, is characterized in that, goes out described concaveconvex structure by ICP dry etching.
8. semiconductor layer surface method of roughening according to claim 1, is characterized in that, the roughness of described coarse surface is 6-600nm.
9. semiconductor layer surface method of roughening according to claim 1, is characterized in that, removes described multiple metal or alloy island protruding by wet-chemical etching.
10. one kind has the LED structure formation method of surface coarsening, it is characterized in that, comprises the following steps:
Substrate is provided;
The first doping type semiconductor layer is formed in described substrate;
Multiple quantum well layer is formed in described first doping type semiconductor layer;
Electronic barrier layer is formed on described multiple quantum well layer;
The second doping type semiconductor layer is formed on described electronic barrier layer;
The top of method to described second doping type semiconductor layer according to any one of claim 1-9 is adopted to carry out surface coarsening;
Form the first electrode and the second electrode.
CN201410220151.8A 2014-05-23 2014-05-23 Semiconductor layer surface roughening method and formation method for LED structure with roughened surface CN105098015A (en)

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