CN105097440B - A kind of deep silicon etching method - Google Patents
A kind of deep silicon etching method Download PDFInfo
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- CN105097440B CN105097440B CN201410221761.XA CN201410221761A CN105097440B CN 105097440 B CN105097440 B CN 105097440B CN 201410221761 A CN201410221761 A CN 201410221761A CN 105097440 B CN105097440 B CN 105097440B
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Abstract
The invention provides a kind of deep silicon etching method, the lithographic method comprises the following steps：Anisotropic etch step; the first reacting gas is provided to perform etching silicon material layer under action of plasma; and it is etched to certain depth; to expose an etching interface; the etching interface includes side wall; first reacting gas includes etching gas and side wall protective gas, and the side wall protective gas is used to compensate the corrasion of the etching gas to the side wall in a lateral direction；Side wall protects step, there is provided the second reacting gas, under action of plasma, forms side wall protective layer in the side wall of the etching interface, is attached to the sidewall surfaces of the etching interface, second reacting gas includes side wall protective gas；Anisotropic etch step described in alternate cycles and side wall protection step, reach target depth until etching into.Etch rate of the present invention is fast, and obtained deep silicon hole or groove pattern are good, and depth is deep, will not produce the problem of waveform or taper is presented in side wall.
Description
Technical field
The present invention relates to field of semiconductor manufacture, more particularly to a kind of deep silicon etching method.
Background technology
Etching technics refers to use chemical solution or corrosive gas or plasma during semiconductor devices is manufactured
Remove wafer in or crystal column surface film layer in unwanted part technique.The method generally mainly performed etching with chemical solution
For wet etching, the method that corrosive gas or plasma perform etching is used as dry etching.At present, circuit diagram can be made
Deformation obtains finer dry etching and obtains more and more extensive use.
In wet etching, isotropic etching is carried out with the chemical reaction of strong acid, also may be used even if the part being covered by the mask
To be etched.On the contrary, dry etching reactive ion etching, wherein, with the aggressive chemistry gas of the halogen of such as plasma state
Body and plasma state ion perform etching.Therefore, dry etching can realize what is only performed etching in a vertical direction on wafer
Anisotropic etching, so, dry etching is applied to require high-precision hand work, for example, suitable for very large-scale integrated
Circuit (VLSI) technique.
Traditional plasma treatment appts include the reaction chamber for importing processing gas, be configured with the reaction chamber by
The parallel plate electrode of a pair of upper electrodes and lower electrode composition.While processing gas is imported in reaction chamber,
Apply high frequency voltage on lower electrode, high-frequency electric field is formed between electrode, processing gas is formed in the presence of high-frequency electric field
Plasma.
The deep silicon hole etching of prior art mainly includes manufacture silicon hole or groove.Wherein, in the figure from photoresist
Shape is transferred in the graphic procedure of hard mask, it is ensured that the figure being transferred on hard mask, which will not deform, will ensure etching
Side wall etching will not occur during hard mask, will not also ultimately cause size offset.For enough etch rates, also
Deep silicon hole etching is avoided to turn into isotropy etching (isotropic etch).In the higher and higher trend of device required precision
Under, above-mentioned two requirement generally can not be taken into account.The problem of generally occurring within includes side wall in etching and arc wheel profile occurs so that
There is very big critical size skew (CD shift) in line size defined in line size and mask obtained by etching.
Therefore, a kind of deep silicon hole etching mechanism is needed in the industry, can ensure etch topography, and can enough keeps higher etching
Speed.
The content of the invention
For the above mentioned problem in background technology, the present invention proposes a kind of deep silicon etching method.
The invention provides a kind of deep silicon etching method, wherein, the lithographic method comprises the following steps：
Anisotropic etch step, there is provided the first reacting gas performs etching under action of plasma to silicon material layer,
And certain depth is etched to, to expose an etching interface, the etching interface includes side wall, and first reacting gas includes carving
Gas and side wall protective gas are lost, the side wall protective gas is used to compensate the etching gas to the side wall in a lateral direction
Corrasion；
Side wall protects step, there is provided the second reacting gas, under action of plasma, in the side wall shape of the etching interface
Into side wall protective layer, the sidewall surfaces of the etching interface are attached to, second reacting gas includes side wall protective gas；
Anisotropic etch step described in alternate cycles and side wall protection step, reach target depth until etching into.
Further, the execution time ratio of anisotropic etch step and side wall the protection step is more than 5:1.
Further, the execution time ratio of anisotropic etch step and side wall the protection step is more than 5:1, it is less than
20:1。
Further, the etching gas that first reacting gas includes are SF6.
Further, the side wall protective gas that first reacting gas includes includes C4F8, O2, SiF4.
Further, the ratio of the etching gas in first reacting gas and side wall protective gas is 4:1 to 2:1..
Further, the side wall protective gas that first reacting gas includes includes C4F8 or O2.
Further, mask layer or photoresist layer are additionally provided with above the silicon material layer.
Further, anisotropic etch step described in alternate cycles and side wall protection step, reach target until etching into
Depth is to form silicon hole or groove.
Further, the lithographic method is carried out in inductive type plasma etch chamber room.
Silicon hole/silicon trench depth depth obtained by the deep silicon etching method of the present invention is performed, and it is horizontal from top to bottom
All reached unanimity to width, the problem of side wall presentation waveform of prior art or side wall presentation taper do not occur.Also,
The present invention maintains higher etching speed while silicon hole/silicon trench pattern is taken into account.
Brief description of the drawings
Fig. 1 is the structural representation of inductive type plasma process chamber；
Fig. 2 is the pattern schematic diagram of the non-Bosch deep silicon etching via/trench of prior art；
Fig. 3 a~3c are the processing step flow charts of the Bosch deep silicon etching via/trench of prior art；
Fig. 4 a~4d are the processing step flow charts according to the deep silicon etching method of a specific embodiment of the invention；
Fig. 5 is that the pattern of the via/trench according to manufactured by the deep silicon etching method of a specific embodiment of the invention shows
It is intended to.
Embodiment
Below in conjunction with accompanying drawing, the embodiment of the present invention is illustrated.
Deep hole silicon etching is usually to be carried out in inductive type plasma etch chamber room.Fig. 1 is inductive type etc.
The structural representation of gas ions processing chamber housing.Inductance coupling plasma processing device 100 includes metal sidewall 102 and insulated top
Plate 104, an airtight vacuum sealing housing is formed, and vacuumized by vacuum pumping pump (not shown).The insulation top plate 104
Only as an example, other top plate patterns can also be used, such as dome shape, the metal top plate with insulating materials window
Deng.Pedestal 106 includes an electrostatic chuck (not shown), and pending substrate W is placed on the electrostatic chuck.Bias power quilt
It is applied on the electrostatic chuck, to produce the chucking power to substrate W.The radio-frequency power of radio-frequency power supply 108, which is applied to, to be located at
On the radio-frequency power emitter to insulate on top plate 104.Wherein, in the present embodiment, the RF transmitter includes radio frequency
Coil 110.Processing gas is supplied in reaction chamber from source of the gas by pipeline, to light and maintain plasma, so as in substrate W
Upper progress deep silicon etching processing procedure.Preferably, processing gas enters chamber from gas inlet 112.
The deep silicon etching mechanism of prior art generally includes two kinds, one is common deep silicon etching, that is, non-Bosch
(Non-Bosch process) deep silicon etching.Fig. 2 is the pattern signal of the non-Bosch deep silicon etching via/trench of prior art
Figure.Non- Bosch deep silicon etching is to be passed through reacting gas and side wall protective gas simultaneously, is protected so as to perform etching simultaneously with side wall
Step.Step is protected with side wall due to performing etching simultaneously, the etching speed of non-Bosch deep silicon etching quickly, and is not in
Wavy pattern is presented in the side wall of Bosch processing procedure.But the shortcomings that non-Bosch deep silicon etching, is also fairly obvious, as shown in Fig. 2
It is that mask performs etching to silicon base 204 with mask layer 202, and cone can be presented in the silicon hole or silicon trench 200 being eventually fabricated
Shape, the opening of upper part is larger, as extending vertically for silicon hole or silicon trench, opening are less and less.
The deep silicon etching mechanism of prior art it is another with it is more be Bosch technique, Bosch technique (Bosch
Process etch step and side wall protection step) are switchably individually implemented, etch step and side wall protection step are implemented in circulation
To reach etching depth.Fig. 3 is the processing step flow chart of the Bosch deep silicon etching via/trench of prior art, such as Fig. 3 a institutes
Show, etch step is first carried out, be mask with mask layer 302, silicon substrate 304 is performed etching, to obtain opening 306.Connect down
To perform side wall protection step, as shown in Figure 3 b, protected in the side wall deposition side wall of the top of mask layer 302 and etching interface
Layer 308.Then proceed to perform etch step, form the deeper etching interface of depth as shown in Figure 3 c, as shown in Figure 3 c, Bosch is carved
Etching method can form wavy pattern in the side wall of etching interface, and the deep hole (silicon hole or silicon trench) eventually formed also can
It is wavy pattern, also, its etching efficiency is also very low.
In order to solve the above problems, the present invention proposes a kind of deep silicon etching method.Fig. 4 a~4d are according to the present invention one
The processing step flow chart of the deep silicon etching method of individual specific embodiment.4a~4d is to depth provided by the invention below in conjunction with the accompanying drawings
Silicon etching method describes in detail, and it comprises the following steps.
As shown in fig. 4 a, anisotropic etch step is first carried out, there is provided the first reacting gas is under action of plasma
Silicon material layer 404 is performed etching, and is etched to certain depth, to expose an etching interface 406, the etching interface 406 is wrapped
Include side wall 404a.Wherein, first reacting gas includes etching gas and side wall protective gas, and etching gas are used for silicon material
The bed of material is etched to desired depth, and side wall protective gas is done on the side wall 404a in etching interface 406 simultaneously during etching
Side wall protective layer.Because side wall protective gas and etching gas act on simultaneously, therefore the side wall protective layer on side wall 404a
It can not remain in this step, because it can be etched, attack falls, nevertheless, in side wall 404a in this step
On side wall protective layer still neutralized active force in corrasion transverse direction, taken into account etching speed again.
As shown in Figure 4 b, side wall protection step is then performed, there is provided the second reacting gas, under action of plasma,
The side wall of the etching interface 406 forms side wall protective layer 408, is attached to the side wall 406a surfaces in the etching face of circle 406.Its
In, second reacting gas includes side wall protective gas.Side wall protective layer 408 can be to the horizontal stroke for the etching interface being ready for
Protected and compensated to diffusion tendency, a upper anisotropic will not be destroyed when next step performs anisotropic etch step
It the depth that etch step is ready for, can also continue to down extend, thus be not in the etch topography that prior art occurs
The problem of taper is presented.
As illustrated in fig. 4 c, second of anisotropic etch step is continued executing with, there is provided the first reacting gas is in plasma
Silicon material layer 404 is continued further to perform etching under effect, and is etched to certain deeper depth.Wherein, described first
Reacting gas includes etching gas and side wall protective gas, and etching gas are used to continue silicon material layer 404 being etched to pre- depthkeeping
Degree, side wall protective gas continue to do side wall protective layer on the side wall 404a in etching interface 406 simultaneously during etching.
In this step, the side wall protective layer 408 that the one before side wall protection step is deposited can be etched away simultaneously, but be compensate for etching and made
Used in the lateral etching spreading trend for the depth being ready for.Side wall in this step with stylish formation on side wall 404a is protected
Layer can still be responsible for neutralizing the active force in the transverse direction for the depth that corrasion is etched in this step, and take into account etching speed
Degree.
As shown in figure 4d, second of side wall protection step is continued executing with, there is provided the second reacting gas, in action of plasma
Under, side wall protective layer 408 ' is formed in the side wall of the etching interface 406, is attached to the side wall 406a in the etching face of circle 406
Surface.Wherein, second reacting gas includes side wall protective gas.Anisotropic etch step described in following alternate cycles
Step is protected with side wall, reaches target depth until etching into.
Further, the anisotropic etch step and side wall protection step as described above alternately, both
It is more than 5 to perform time ratio：1.The present invention sets more time in anisotropic etch step, can so keep etching speed
Rate, and because anisotropic etch step also has side wall protective effect while carries out, so also ensure that silicon to a certain extent
The pattern of through hole/silicon trench will not produce taper, therefore can perform more time.
Preferably, the execution time ratio of anisotropic etch step and side wall the protection step is more than 5：1, it is small
In 20:1.E.g., including 6:1、7.2:1、9:1、12:1、13.5:1、18:1 etc..
Further, the etching gas that first reacting gas includes are SF6.
Further, the side wall protective gas that first reacting gas includes includes C4F8, O2, SiF4.
Further, the ratio of the etching gas in first reacting gas and side wall protective gas is 4:1 to 2:1,
Such as 3.8:1、3.2:1、2.35:1、2.58:1 etc..
Further, the side wall protective gas that first reacting gas includes includes C4F8 or O2.
Further, mask layer or photoresist layer are additionally provided with above the silicon material layer, for as mask to silicon
Material layer performs etching, so as to form silicon hole or silicon trench
Further, anisotropic etch step described in alternate cycles and side wall protection step, reach target until etching into
Depth is to form silicon hole or groove 400.
Fig. 5 is that the pattern of the via/trench according to manufactured by the deep silicon etching method of a specific embodiment of the invention shows
It is intended to.As shown in figure 5, the depth of silicon hole/silicon trench 400 obtained by performing deep silicon etching method of the invention is deep, and its
Transverse width all reaches unanimity from top to bottom, and waveform is presented for the side wall for prior art do not occur or taper is presented in side wall
Problem.Also, the present invention maintains higher etching speed while silicon hole/400 pattern of silicon trench is taken into account.
Although present disclosure is discussed in detail by above preferred embodiment, but it should be appreciated that above-mentioned
Description is not considered as limitation of the present invention.After those skilled in the art have read the above, for the present invention's
A variety of modifications and substitutions all will be apparent.Therefore, protection scope of the present invention should be limited to the appended claims.
In addition, any reference in claim should not be considered as to the involved claim of limitation；The word of " comprising " one is not excluded for
Unlisted device or step in other claims or specification；The words such as " first ", " second " are only used for representing title, and
It is not offered as any specific order.
Claims (7)
- A kind of 1. deep silicon etching method, it is characterised in that the lithographic method comprises the following steps：Anisotropic etch step, there is provided the first reacting gas performs etching under action of plasma to silicon material layer, and carves Erosion is to certain depth, and to expose an etching interface, the etching interface includes side wall, and first reacting gas includes etching gas Body and side wall protective gas, the side wall protective gas are used to compensate the quarter of the etching gas to the side wall in a lateral direction Erosion acts on；Side wall protects step, there is provided the second reacting gas, under action of plasma, side is formed in the side wall of the etching interface Wall protective layer, is attached to the sidewall surfaces of the etching interface, and second reacting gas includes side wall protective gas；Anisotropic etch step described in alternate cycles and side wall protection step, reach target depth until etching into, described non-etc. The execution time ratio of tropism etch step and side wall protection step is more than 5:1,The etching gas that first reacting gas includes are SF6, etching gas and side wall protection in first reacting gas The ratio of gas is 4:1 to 2:1.
- 2. lithographic method according to claim 1, it is characterised in that anisotropic etch step and side wall the protection step Rapid execution time ratio is more than 5:1, less than 20:1.
- 3. lithographic method according to claim 1, it is characterised in that the side wall protection gas that first reacting gas includes Body includes C4F8、O2、SiF4。
- 4. lithographic method according to claim 1, it is characterised in that the side wall protection gas that second reacting gas includes Body includes C4F8Or O2。
- 5. lithographic method according to claim 1, it is characterised in that be additionally provided with above the silicon material layer mask layer or Person's photoresist layer.
- 6. lithographic method according to claim 1, it is characterised in that anisotropic etch step and side described in alternate cycles Wall protects step, reaches target depth until etching into form silicon hole or groove.
- 7. lithographic method according to claim 1, it is characterised in that the lithographic method is in inductive type plasma Carried out in etching cavity.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410221761.XA CN105097440B (en) | 2014-05-23 | 2014-05-23 | A kind of deep silicon etching method |
| TW103143959A TWI570803B (en) | 2014-05-23 | 2014-12-16 | A deep silicon etch method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410221761.XA CN105097440B (en) | 2014-05-23 | 2014-05-23 | A kind of deep silicon etching method |
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| CN105097440A CN105097440A (en) | 2015-11-25 |
| CN105097440B true CN105097440B (en) | 2018-02-09 |
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| CN201410221761.XA Active CN105097440B (en) | 2014-05-23 | 2014-05-23 | A kind of deep silicon etching method |
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| WO2020215183A1 (en) * | 2019-04-22 | 2020-10-29 | Applied Materials, Inc. | Methods for etching a material layer for semiconductor applications |
| CN114477077A (en) * | 2022-02-11 | 2022-05-13 | 丹东华顺电子有限公司 | Silicon deep groove etching method |
| CN116598254B (en) * | 2023-07-19 | 2023-09-29 | 粤芯半导体技术股份有限公司 | Method for forming deep trench isolation structure |
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| US4450042A (en) * | 1982-07-06 | 1984-05-22 | Texas Instruments Incorporated | Plasma etch chemistry for anisotropic etching of silicon |
| EP0414372A3 (en) * | 1989-07-21 | 1991-04-24 | Sony Corporation | Dry etching methods |
| CN101948494B (en) * | 2010-09-14 | 2012-11-21 | 河北华荣制药有限公司 | Method for extracting cobamamide |
| US9159574B2 (en) * | 2012-08-27 | 2015-10-13 | Applied Materials, Inc. | Method of silicon etch for trench sidewall smoothing |
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| Publication number | Publication date |
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| TWI570803B (en) | 2017-02-11 |
| CN105097440A (en) | 2015-11-25 |
| TW201545232A (en) | 2015-12-01 |
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Address after: 201201 No. 188 Taihua Road, Jinqiao Export Processing Zone, Pudong New Area, Shanghai Patentee after: Medium and Micro Semiconductor Equipment (Shanghai) Co., Ltd. Address before: 201201 No. 188 Taihua Road, Jinqiao Export Processing Zone, Pudong New Area, Shanghai Patentee before: Advanced Micro-Fabrication Equipment (Shanghai) Inc. |
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