CN104991184A - On-chip tri-state signal detecting apparatus and detecting method thereof - Google Patents
On-chip tri-state signal detecting apparatus and detecting method thereof Download PDFInfo
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Abstract
The invention relates to an on-chip tri-state signal detecting apparatus and a detecting method thereof. The detecting apparatus comprises a first current source, a second current source, a first switch, a second switch, a threshold comparing unit and a digital control unit. The first current source is connected with the first end of the first switch. The second end of the first switch is connected with the first end of the second switch. The second end of the second switch is connected with the second current source. The digital control unit controls the closing and/or opening of the first switch and the second switch to form two different topology structures. On the basis of one of the two different topology structures, the first input end of the threshold comparing unit receives a voltage related to a tri-state input signal. The second input end of the threshold comparing unit receives a reference voltage. The related voltage and the reference voltage are compared. Then the digital control unit detects the input signal state on the basis of the comparison result. The detecting apparatus which has the characteristics of low detection power consumption and high detecting result reliability can be widely used in the chip interface signal on-chip detecting field.
Description
Technical field
The present invention relates to digital integrated circuit field, particularly relate to chip interface input field.
Background technology
Ternary signal (Tri-State or T/S) comprises high level, low level, high-impedance state (also known as forbidding state) three kinds of signal conditions.The device possessing these three kinds of signal conditions is called triple gate.
In the input control of chip, usually adopt ternary signal to carry out control chip pin, to realize more configurable state, thus more can effectively utilize the pin resource of the limited chip of number.At present, it is accessed to by measured signal on the high resistance measurement string internal node between power supply and ground that ternary signal detection method adopts usually, by comparing other node voltage values in this high resistance measurement string, and realize the identification of status input signal according to different testing result combination.
This kind realizes the detection of ternary signal by detecting high resistance measurement string builtin voltage, directly can cause two comparatively distinct issues: one, on sheet, high resistance measurement string is understood the chip area of consumes considerable or produces larger static angle stability; Two, the scope restriction to input voltage of this kind of detection method is comparatively large, is difficult to cover the digital integrated circuit under various processes.
Summary of the invention
The present invention proposes ternary signal pick-up unit and detection method thereof on a kind of chip slapper of overcoming the above problems.
In first aspect, the invention provides a kind of ternary signal pick-up unit.This pick-up unit comprises the first current source, the second current source, the first switch, second switch, threshold value comparing unit, digital control unit.This first current source is connected with this first switch first end, and this first switch second end is connected with this second switch first end, and this second switch second end is connected with this second current source.This digital control unit controls this first switch, this second switch closed and/or disconnects, to form two kinds of different topological structures.Based in described topological structure, this threshold value comparing unit first input end receives the voltage relevant to tri-state input signal.This threshold value comparing unit second input end receives reference voltage, and the magnitude relationship between more described input signal associated voltage and described reference voltage, so that described digital control unit detects described status input signal based on this comparative result.
In second aspect, the invention provides a kind of ternary signal detection method.First the method receives tri-state input signal.Then the voltage relevant to described tri-state input signal is obtained based on different topological structures; Wherein, described topological structure comprise be connected the first current source, the first switch and/or the second current source, the second switch that are connected, and by closed and/or disconnect this first switch, second switch mode realizes described different topology structure.And then comparison reference voltage and described with tri-state input signal associated voltage magnitude relationship.Last based on described comparative result, detect described tri-state input signal state.
On chip slapper of the present invention, ternary signal pick-up unit is low in energy consumption, and testing result reliability is high.And ternary signal pick-up unit power supply voltage range is wide on chip slapper of the present invention, can extensively be covered in the digital integrated circuit of various processes.In addition, when the high voltage of ternary signal is with when testing circuit supply voltage differs larger on chip slapper, the accuracy of ternary signal testing result and the low-power consumption of circuit can still be ensured.
Accompanying drawing explanation
By being described preferred embodiment referring to accompanying drawing, advantage of the present invention will become more apparent and easy to understand.
Fig. 1 is the ternary signal pick-up unit framework map of one embodiment of the invention;
Fig. 2 is the topological structure schematic diagram that the digital control unit of one embodiment of the invention is produced by gauge tap;
Fig. 3 is the different topology structural representation corresponding in varying input signal situation of one embodiment of the invention;
Fig. 4 is the ternary signal detection method process flow diagram of one embodiment of the invention.
Embodiment
For making the object, technical solutions and advantages of the present invention more obvious, below in conjunction with specific embodiment, and with reference to accompanying drawing, the present invention is described in more detail.
Fig. 1 is the ternary signal pick-up unit framework map of one embodiment of the invention.This ternary signal pick-up unit comprises resistance R, current source Iup, K switch u, current source Idn, K switch d, threshold value comparing unit 110, reference voltage generation unit 120, digital control unit 130.
In Fig. 1, resistance R one end is connected to tri-state input signal, and the other end is connected to chip pin Vin and holds, and using the input end of Vin end as this threshold value comparing unit 110; This another input end of threshold value comparing unit 110 is connected to the output terminal of this reference voltage generation unit 120, this threshold value comparing unit 110 output terminal is connected to this digital control unit 130 input end, and using the output terminal of this digital control unit 130 as this ternary signal pick-up unit output terminal.In addition, this digital control unit 130 also controls this reference voltage generation unit 120 and generates corresponding reference voltage, namely generates low level reference voltage or high level reference voltage.
It should be noted that, this tri-state input signal comprises high level, low level, high-impedance state three kinds of states; Wherein, high level signal voltage span is wide, and between the ceiling voltage that its span is this testing circuit adopts device can bear to minimum reference voltage.Therefore, this testing circuit can extensively be covered in the digital integrated circuit under various processes.
In an example, this reference voltage generation unit 120 is resistance bleeder circuit or band-gap reference circuit.
Preferably, this resistance R resistance size is relevant with the high level reference voltage level in this reference voltage generation unit 120.
In Fig. 1, this current source Iup one end is connected to power supply, and the other end is connected to K switch u, and this current source Iup current direction is for flow to K switch u by power supply.This K switch d one end is connected to K switch u, and the other end is connected to current source Idn.This current source Idn ground connection, and this current source Idn current direction be by K switch d to local to.Preferably, above-mentioned supply voltage span is comparatively wide, extensively can be covered to the digital integrated circuit under various processes.
The closed and disconnected of this digital control unit 130 gauge tap Ku and K switch d, and then closed, the disconnection relation different according to this K switch u, K switch d, current source Iup, current source Idn and chip pin Vin are held and constitutes different topological structures (see Fig. 2), to realize treating pouring into and pulling out electric current of detection port (i.e. tri-state input signal port).Under different topological structures, chip pin Vin voltage and the high level reference voltage that reference voltage generation unit 120 produces, low level reference voltage relation are different.Therefore, according to different topological structures, this threshold value comparing unit 110 compares (specific algorithm will be elaborated in following content and Fig. 3) this Vin voltage and this high level reference voltage or low level reference voltage, then this comparative result is sent to digital control unit 130.This digital control unit 130 calculates this input signal to be measured (i.e. tri-state input signal) state according to this comparative result that it obtains.
In an example, the power consumption of this tri-state testing circuit is by detecting electric current and detection time characterizes, therefore by arranging suitable detection electric current and detection time, to realize the object reducing power consumption.Preferably, this digital control unit 130 arranges suitable little detection electric current and/shorter detection time, to reduce power consumption.Further, in testing process, the same state value of repeated detection, and detect this same state value at interval of certain hour, choose the more result of occurrence number and be characterized by this digital control unit 130 Output rusults, so both ensure that the accuracy of testing result again reduces power consumption simultaneously.
Fig. 2 is the topological structure schematic diagram that the digital control unit of one embodiment of the invention is produced by gauge tap.
As digital control unit 130 control circuit internal gating K switch u and cut-off switch Kd, form detection architecture I in Fig. 2.In this structure I, K switch u one end is connected with current source Iup, and the other end is connected with resistance R, and using this tie point as chip pin Vin end points (it characterizes with Vinu); This resistance other end access input signal, this current source Iup connects power supply, and this current source Iup current direction is to this K switch u direction by this power supply direction.
As digital control unit 130 control circuit internal gating K switch d and cut-off switch Ku, form detection architecture II in Fig. 2.In this structure I I, K switch d one end is connected with current source Idn, and the other end is connected with resistance R, and using this tie point as chip pin Vin end points (it characterizes with Vind); This resistance other end access input signal, this current source Idn ground connection, and this current source Idn current direction be by this K switch d direction to this place to.
Fig. 3 is the different topology structural representation corresponding in varying input signal situation of one embodiment of the invention.
Digital control unit 130 control circuit internal switch Ku and Kd, formed respectively and detect topological structure I and topological structure II, and then the relation obtained between Vin point voltage (Vinu and Vind) and high level reference voltage, low level reference voltage, elaborate below.
Figure (a) for tri-state input signal be the situation of high level voltage:
Compared with high level reference voltage by Vinu by structure I, due to putting high level voltage value and the unknown of testing circuit supply voltage relation, therefore comparative result is indefinite, namely this high-level input voltage both can higher than high level reference voltage, can lower than high level reference voltage, but this kind of situation does not affect the judgement to status input signal, marks, as the x in table 1 by special symbol to this comparative result; Therefore, even if when the high level voltage of tri-state input signal differs larger with this testing circuit supply voltage, the accuracy detected still can be ensured;
Compared with low level reference voltage by Vind by structure I I, draw higher than low level reference voltage; The judgement of status input signal is characterized by following table 1.
| Structure I Compare Logic result | Structure I I Compare Logic result | Judge the state of input signal |
| X | 1 (> low level reference voltage) | High level voltage |
| 0 (< high level reference voltage) | 0 (< low level reference voltage) | Low level voltage |
| 1 (> high level reference voltage) | 0 (< low level reference voltage) | High resistant |
Table 1
Figure (b) for tri-state input signal be low level situation:
Compared with high level reference voltage by Vinu by structure I, draw lower than high level reference voltage;
Compared with low level reference voltage by Vind by structure I I, draw lower than low level reference voltage; The judgement of status input signal is characterized by upper table 1.
Figure (c) for tri-state input signal be the situation of high resistant:
Compared with high level reference voltage by Vinu by structure I, draw higher than high level reference voltage;
Compared with low level reference voltage by Vind by structure I I, draw lower than low level reference voltage; The judgement of status input signal is characterized by upper table 1.
It should be noted that, in tri-state input signal detects, both can be as described above, first compared with high level reference voltage by Vinu by structure I, then compared with low level reference voltage by Vind by structure I I; Also first can be compared with low level reference voltage by Vind by structure I I, then be compared with high level reference voltage by Vinu by structure I, the latter's embodiment repeats no more.
As can be seen here, in above-mentioned tri-state input signal detects, by choosing suitable high level reference voltage (as 0.8 times of supply voltage value), low level reference voltage (as 0.4 volt, 0.5 volt or 0.6 volt), and based on the combination of table 1 and structure I, structure I I, digital control unit 130 can identify status input signal, achieve the insensitive detection of input signal high level voltage, thus reach the object that on the chip slapper to wide input voltage range, ternary signal detects.
Fig. 4 is the ternary signal detection method process flow diagram of one embodiment of the invention.
In step 410, receive tri-state input signal, comprise high level signal, low level signal, high resistant signal.
In step 420, obtain the voltage (Vind or Vinu) relevant to described tri-state input signal based on different topological structures (concrete topological structure is see Fig. 2).Wherein, described topological structure comprise be connected the first current source, the first switch and/or the second current source, second switch and the resistance that are connected, and by closed and/or disconnect this first switch, second switch mode realizes described different topology structure.
In step 430, comparison reference voltage and described with tri-state input signal associated voltage magnitude relationship.
In step 440, based on described comparative result, detect described tri-state input signal state.
It should be noted last that, above embodiment is only in order to illustrate technical scheme of the present invention and unrestricted, although with reference to preferred embodiment to invention has been detailed description, those of ordinary skill in the art is to be understood that, can modify to technical scheme of the present invention or equivalent replacement, and not depart from the spirit and scope of technical solution of the present invention.
Claims (12)
1. a ternary signal pick-up unit, this pick-up unit comprises the first current source, the second current source, the first switch, second switch, threshold value comparing unit, digital control unit;
This first current source is connected with this first switch first end, and this first switch second end is connected with this second switch first end, and this second switch second end is connected with this second current source;
This digital control unit controls this first switch, this second switch closed and/or disconnects, to form two kinds of different topological structures;
Based in described topological structure, this threshold value comparing unit first input end receives the voltage relevant to tri-state input signal; This threshold value comparing unit second input end receives reference voltage, and the magnitude relationship between more described associated voltage and described reference voltage, so that described digital control unit detects described status input signal based on this comparative result.
2. a kind of ternary signal pick-up unit as claimed in claim 1, it is characterized in that, described pick-up unit comprises reference voltage generation unit, and this reference voltage generation unit produces high level reference voltage and low level reference voltage.
3. as claim the 2 a kind of ternary signal pick-up units stated, it is characterized in that, one that controls that described reference voltage generation unit produces in described high level reference voltage, low level reference voltage by described digital control unit.
4. as claim the 2 a kind of ternary signal pick-up units stated, it is characterized in that, described reference voltage generation unit is resistance bleeder circuit or band-gap reference circuit.
5. as claim the 1 a kind of ternary signal pick-up unit stated, it is characterized in that, described pick-up unit comprises resistance, this resistance one end is connected to described tri-state input signal, and the other end is connected to the tie point between described threshold value comparing unit first input end and described first switch, second switch.
6. a kind of ternary signal pick-up unit as claimed in claim 5, is characterized in that, described first current source is connected with power supply, and the current direction of this first current source is from this power supply direction to described first switch direction.
7. a kind of ternary signal pick-up unit as claimed in claim 6, is characterized in that, described resistance, the first current source, the first switch and annexation thereof form the one in described two kinds of topological structures.
8. a kind of ternary signal pick-up unit as claimed in claim 5, is characterized in that, described second current source ground connection, and the current direction of this second current source be by described second switch direction to described place to.
9. a kind of ternary signal pick-up unit as claimed in claim 8, is characterized in that, described resistance, the second current source, second switch and annexation thereof form the one in described two kinds of topological structures.
10. a kind of ternary signal pick-up unit as claimed in claim 1, is characterized in that, the high level signal voltage span in described tri-state input signal is that this testing circuit adopts between the ceiling voltage that can bear of device to low level reference voltage.
11. a kind of ternary signal pick-up units as claimed in claim 1, is characterized in that, by arranging little detection electric current and/or short detection time reduces power consumption.
12. 1 kinds of ternary signal detection methods, comprising:
Step a, receives tri-state input signal;
Step b, obtains the voltage relevant to described tri-state input signal based on different topological structures; Wherein, described topological structure comprise be connected the first current source, the first switch and/or the second current source, the second switch that are connected, and by closed and/or disconnect this first switch, second switch mode realizes described different topology structure;
Step c, comparison reference voltage and described with tri-state input signal associated voltage magnitude relationship;
Steps d, based on described comparative result, detects described tri-state input signal state.
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| CN106199297A (en) * | 2016-09-10 | 2016-12-07 | 苏州创必成电子科技有限公司 | Input data validity testing circuit |
| CN106226685A (en) * | 2016-09-10 | 2016-12-14 | 苏州创必成电子科技有限公司 | Multi input data mode parallel detection circuit with on-off control |
| CN107994895A (en) * | 2017-12-18 | 2018-05-04 | 上海艾为电子技术股份有限公司 | A kind of tri-state mode decision circuitry |
| CN109239583A (en) * | 2018-10-22 | 2019-01-18 | 上海艾为电子技术股份有限公司 | Detect the circuit of pin floating state |
| CN109239584A (en) * | 2018-10-22 | 2019-01-18 | 上海艾为电子技术股份有限公司 | Detect the circuit of pin floating state |
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| CN109239584A (en) * | 2018-10-22 | 2019-01-18 | 上海艾为电子技术股份有限公司 | Detect the circuit of pin floating state |
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Effective date of registration: 20210420 Address after: No.1, floor 4, building 10, No.303, group 3, liangfengding village, Zhengxing Town, Tianfu New District, Chengdu, Sichuan 610000 Patentee after: Sichuan Yichong Technology Co.,Ltd. Address before: 300457, room 2701-1, building 2, TEDA service outsourcing park, TEDA 19, Xin Huan Xi Road, Tanggu District, Tianjin Patentee before: INTERNATIONAL GREEN CHIP (TIANJIN) Co.,Ltd. |