CN103019876A - Error recovery circuit facing CPU (Central Processing Unit) streamline - Google Patents
Error recovery circuit facing CPU (Central Processing Unit) streamline Download PDFInfo
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Abstract
The invention discloses an error recovery circuit facing a CPU (Central Processing Unit) streamline. The error recovery circuit facing the CPU streamline comprises on-chip monitoring circuits (1), an error signal statistic module (2), a voltage frequency control module (3), an error recovery control module (4), a local error recovery module (5) and a global error recovery module (6), wherein each on-chip monitoring circuit (1) is integrated on the each-stage streamline end of the previous N-1-stage streamlines of a CPU kernel in an N-stage streamline structure; so that the time sequence information of each clock period of a working circuit is monitored; and N is a positive integer which is more than or equal to three and less than twenty. With the adoption of the error recovery circuit facing the CPU streamline, the on-line time sequence monitoring on the CPU kernel having the N-stage streamline is provided for the seeking of a lowest possible working voltage of the circuit and the reduction of working voltage allowance reserved for the circuit during a designing stage; and therefore, the circuit power consumption is decreased greatly and the energy efficiency of the circuit is improved reliably.
Description
Technical field
The present invention relates to a kind of wrong restoring circuit towards the CPU streamline, be specifically related to a kind ofly based on fault monitoring on the sheet, use and according to the switchable wrong restoring circuit of monitoring result, belong to the integrated circuit (IC) design field towards the CPU streamline.
Background technology
Along with constantly dwindling of transistor size, number of transistors integrated on the unit area sharply increases, and the power problems of integrated circuit becomes and function, area Consideration of equal importance.Be intended to reduce dynamic electric voltage frequency adjustment (DVFS) technology of circuit power consumption, because of its effect significantly, become gradually important Low-power Technology.
The dynamic electric voltage frequency adjustment depends on the monitoring to main circuit duty and performance.System-level monitoring means mainly is sensor, this method can reflect system's present behavior to a certain extent, but the sheet external monitor often depends on the precision of sensor, and is difficult to select reliable monitoring point, thereby is difficult to truly reflect the actual conditions of chip internal each several part.Can reflect more truly the variation of chip internal global parameter in the method for chip internal insertion essential elements and replicated critical path, but because these copies and residing interior environment of essential elements and path and incomplete same, to local parameter, variation such as local noise, technological fluctuation is also insensitive, thereby they reflect neither circuit truth, greatly affected the effect of voltage-regulation.
Monitoring method is inserted observation circuit on the sheet by the end in System on Chip/SoC main circuit critical path on the sheet, the working condition of Real-Time Monitoring circuit is summed up as the impact of the factors such as process deviation, mains fluctuations, temperature variation, noise the variation of observation circuit time-delay characteristics on the sheet on the critical path.When lower voltage the critical voltage of mistake can occur when following to circuit, logic sequential will occur in violation of rules and regulations in the sheet, and these sequential will produce corresponding rub-out signal, as the adjusting foundation of operating voltage adjustment module in violation of rules and regulations by monitoring circuit monitors on the sheet.On the sheet the method for monitoring can the Real-Time Monitoring main circuit the level of makeing mistakes when work, the reflection overall situation and local dip are on the true impact of circuit, simultaneously by introducing error correction mechanisms, can further discharge the main circuit design stage is to overcome the voltage margin that the adverse effects such as process deviation, operating voltage fluctuation, temperature variation, neighbourhood noise are reserved, operating voltage is regulated dynamically, thereby make power consumption reach optimum.
Based on the dynamic electric voltage frequency adjustment technology of monitoring on the sheet, condition of work with circuit, be summed up as the timing variations of circuit such as the variation of temperature, technique, noise etc., by the timing variations of monitoring means Real-Time Monitoring circuit working on the sheet, instruct circuit dynamically to regulate running parameter.Only finding the minimum operating voltage point that satisfies system performance, is voltage or frequency surplus that worst case (Worst Case) is reserved in the time of could reducing circuit design as much as possible, to obtain maximum power consumption income.
When the minimum voltage point of searching system work dynamically any time, can allow system produce the risk of makeing mistakes, therefore certain fault recovering mechanism must be set, when makeing mistakes in system, can help it from error condition, to recover.Realize that both at home and abroad this wrong mode of recovering mainly contains two kinds: original place mistake reset mode and upper strata mistake reset mode.
Original place mistake reset mode is after monitoring means monitors the sequential mistake on the sheet of circuit, uses the method for gated clock, and the clock signal of circuit is suspended one-period, replaces rub-out signal output with correct signal during this period.The mistake of streamline generations at different levels can be resumed within a clock period of suspending in the same cycle, but must suspend immediately respectively clock signal after makeing mistakes for the mistake that produces in the different cycles recovers.Monitoring means complex structure on the sheet of this wrong reset mode, the power consumption of monitoring means itself is higher; And when for conditions of work such as operating voltage, frequency and temperature circuit frequently being made mistakes, to each clock period of makeing mistakes, cpu clock all will suspend the recovery that one-period is waited for rub-out signal, cost when therefore recovering is higher, has greatly affected the throughput of system and reduced the power consumption effect not remarkable.
Upper strata mistake reset mode is multiplex in the design of pipeline organization, also must be by means of monitoring means on the sheet, different from the original place recovery is, this reset mode all is summed up as a mistake with the mistake that produces in all same cycles, and after monitoring means on the sheet monitors the sequential mistake, do not correct mistakes immediately, but the operations at different levels that do not make mistakes in the wait streamline are complete, wait for that namely that one-level operation make mistakes carries out to the afterbody with streamline, then recover mistake by re-executing the instruction that makes mistakes.When re-executing the instruction that makes mistakes, the instruction of this instruction back is also re-executing, therefore the upper strata reset mode can be finished by a recovery operation pipeline cycle (is referred to fill the periodicity that the flowing full waterline will spend, be N cycle, N is pipeline series) middle vicious recovery.This reset mode once recovers to expend N cycle, and when the system mistake rate is very high, when a plurality of wrong generation arranged in the same pipeline cycle, these mistakes can be recovered be restored by a upper strata.Therefore when the system mistake rate was higher, upper strata mistake reset mode was less on the impact of system throughput, reduced the better effects if of power consumption; But when the system mistake rate was low, the cost during recovery was higher, reduced the power consumption DeGrain.
A kind of above at present the reset mode of dynamic electric voltage frequency adjustment circuit is just solely used in the dual mode, but its system applies has larger limitation, for the application that need in wider frequency range, work, the variation of error rate is larger, and single wrong reset mode is difficult to make the throughput of system and power consumption to reach optimization.
Summary of the invention
Goal of the invention: the object of the invention is to the limitation for wrong reset mode in the monitoring system on the existing sheet, a kind of wrong restoring circuit towards the CPU streamline is provided, can be in monitoring circuit monitors on the sheet after the circuit sequence mistake, according to the system requirements of circuit and the duty wrong reset mode of selective system dynamically, can between original place mistake reset mode and two kinds of wrong reset modes of upper strata mistake reset mode, switch flexibly.
Technical scheme: the wrong restoring circuit towards the CPU streamline of the present invention comprises that observation circuit on the sheet, rub-out signal statistical module, electric voltage frequency control module, mistake are recovered control module, the original place mistake recovers module and the upper strata mistake is recovered module.
It is terminal that described upper observation circuit is integrated in each level production line of front N-1 level production line of the CPU core with N stage pipeline structure, the time sequence information of each clock period of monitoring circuit, and wherein N is more than or equal to 3 and less than 20 positive integer; Described upper observation circuit sent the rub-out signal that monitors into described rub-out signal statistical module.
One section interior rub-out signal quantity of clock period of described rub-out signal statistical module counts accounts for the number percent of total periodicity, is error rate R
Error
Rising and the reduction of described electric voltage frequency control module control system operating voltage and frequency, the precision of while regulating and controlling, described electric voltage frequency control module and described error statistics module are respectively with system state and error rate R
ErrorSend into the described wrong control module of recovering; Described electric voltage frequency control module is carried out the adjusting of system works voltage and frequency according to the described wrong corresponding control signal of recovering in the control module.
Described wrong the recovery has the compare threshold T that sets in the control module
ThresholdAnd according to threshold ratio select mechanism the result, determine that selecting signal to be input to the original place mistake original place mistake reset mode recovers module or select signal to be input to upper strata mistake recovery module upper strata mistake reset mode, Dynamic Selection original place mistake reset mode or upper strata mistake reset mode, and the electric voltage frequency conditioning signal delivered to described electric voltage frequency control module, the adjusting of guidance system state realizes the dynamic switching of two kinds of wrong reset modes of difference.
Comprise the main latch circuit in the described upper observation circuit, produce circuit, original place error correcting selector switch, metastable state observation circuit and rub-out signal integrated circuit from latch circuit, shadow latch circuit, rub-out signal; By respectively input signal being sampled at rising edge clock and negative edge, with the sampled result contrast, whether decision circuitry sequential occurs in violation of rules and regulations, realizes simultaneously the data replacement function when the original place mistake is recovered.Wherein the data input pin of observation circuit links to each other on the input end of main latch circuit and shadow latch circuit and the sheet; The original place of the original place of main latch circuit data-signal to be recovered and shadow latch circuit is recovered data-signal and is connected to original place error correcting selector switch input end, and the original place mistake is recovered another input end that the control signal input end is connected to original place error correcting selector switch; The original place of original place error correcting selector switch is recovered data output signal and is connected to from latch circuit; Be connected respectively to data output end, metastable state observation circuit input end, rub-out signal generation circuit input end from the output signal of latch circuit; The delay sampling data output signal of shadow latch circuit is connected to another input end that rub-out signal produces circuit; Rub-out signal produces circuit generation sequential monitoring rub-out signal and is input to rub-out signal integrated circuit input end; The metastable state monitoring rub-out signal that the metastable state observation circuit produces is input to another input end of rub-out signal integrated circuit; The rub-out signal integrated circuit is output as the rub-out signal output terminal of observation circuit.
Described upper observation circuit comprises two input ports and two output ports, is respectively data input pin, original place mistake recovery control signal input end, data output end and rub-out signal output terminal.The data-signal output terminal of the previous stage streamline of observation circuit institute insertion position links to each other on data input pin and the sheet; The original place mistake is recovered the control signal input end and is linked to each other with the original place mistake recovery control signal output terminal that the original place mistake is recovered module; The data-signal input end of a rear level production line of observation circuit institute insertion position links to each other on data output end and the sheet; The rub-out signal output terminal transmits the integrated circuit input end with a rub-out signal and links to each other.Rub-out signal transmission integrated circuit is inputted by N-1 register and N-2 individual two or door alternately connects to form, and is used for the rub-out signal of streamline generations at different levels also finally is integrated into a rub-out signal with instruction to the rear class transmission; Input end of two inputs or door connects the register output terminal, and the rub-out signal output terminal of observation circuit links to each other on another input end and the sheet.
Described rub-out signal statistical module comprises two counters, calculates respectively the periodicity of CPU work and the quantity of rub-out signal.
The described wrong control module of recovering has three input ends and three output terminals, is respectively error rate input end, system state input end, compare threshold input end and electric voltage frequency conditioning signal output terminal, original place mistake reset mode selection signal output part, upper strata mistake reset mode selection signal output part; Wherein, error rate input end, system state input end, compare threshold input end are connected respectively to an eight bit register input end, the error rate input end is connected to register one, and the system state input end is connected to register two, and the compare threshold input end is connected to register three; The output terminal of register one and register two is connected respectively to the data input pin of 8 totalizers, and the carry input of totalizer sets to 0; Totalizer be connected to the data input pin of a comparer with output terminal, the output terminal of register three is connected to another data input pin of comparer; Other three input ends of comparer set to 0; Comparer greater than with equal output terminal be connected to one or, or the output of door is connected to the selecting side of a MUX MUX1; Comparer is connected to another MUX MUX2 less than output terminal; " 1 " termination high level of MUX MUX1 and MUX MUX2, " 0 " termination low level; The output signal of MUX MUX1 is that original place mistake reset mode is selected signal, and the output signal of MUX MUX2 is that upper strata mistake reset mode is selected signal; Error rate input end, system state input end, original place mistake reset mode select signal and upper strata mistake reset mode to select signal to be also connected to simultaneously a state machine, and state machine is output as the electric voltage frequency conditioning signal.
Described wrong recovery control module produces corresponding electric voltage frequency control signal and is input to described electric voltage frequency control module when mistake is recovered, comprise clock control signal and voltage control signal in the electric voltage frequency control signal, the original place replacement that clock control signal comes re-executing of matched orders or data by regulating clock frequency and phase place, voltage control signal comes the original place of re-executing of matched orders or data to replace by the operating voltage of regulating system, clock control signal and voltage control signal cooperatively interact, when system does not have the sequential mistake, rising frequency or reduction voltage, when rub-out signal appears in system, boosted voltage in the time of reducing work frequency reaches the purpose that recovery system sequential mistake makes system work simultaneously under the lower power consumption condition.
It is comparison comparative parameter T that described threshold ratio is selected mechanism
RefWith compare threshold T
ThresholdSize, comparative parameter T
RefBy formula T
Ref=R
Error+ V
Temp/ V
Max+ F
Temp/ F
MaxObtain.Compare threshold is the boundary value of selecting, comparative parameter T
RefComprise the arithmetic sum (annotating: to the match of three material impact factors, form the combined influence result) of three numerical value, be respectively error rate, operating voltage ratio and frequency of operation ratio.Wherein, error rate is the interior error rate of certain clock period of system of rub-out signal statistical module counts, operating voltage is than the ratio that is the maximum working voltage of the work at present voltage of circuit and circuit, and frequency of operation is than the ratio that is the maximum operation frequency of the work at present frequency of circuit and circuit.
Described threshold ratio selects mechanism to set up by following process:
At first, find out compare threshold.In the design phase of circuit, regulative mode according to the circuit power administration module, calculate certain arithmetic sum of regulating error rate, operating voltage ratio and the frequency of operation ratio of each working point of circuit under the step-length, be comparative parameter, and adopt respectively upper strata mistake reset mode and original place mistake reset mode to carry out mistake and recover, obtain two kinds of power consumption incomes under the wrong reset mode.Find out upper strata mistake reset mode power consumption income greater than the working point of original place mistake reset mode power consumption income, the comparative parameter under this working point is compare threshold.Set compare threshold, by programmable mode the compare threshold of finding out is set to wrong the recovery in the control module, as the standard of comparison of selecting wrong reset mode.
Secondly, select wrong reset mode.By programmable way with compare threshold T
ThresholdBe set to wrong the recovery in the control module, mistake is recovered control module by with comparative parameter and set compare threshold comparison, if comparative parameter is more than or equal to compare threshold then select upper strata mistake reset mode, if comparative parameter is less than compare threshold then select original place mistake reset mode.As comparative parameter T
RefSurpass compare threshold T
ThresholdThe time, the power consumption income of upper strata mistake reset mode is higher.As comparative parameter T
RefLess than compare threshold T
ThresholdThe time, the power consumption income of original place mistake reset mode is higher.The wrong control module of recovering can produce corresponding electric voltage frequency control signal according to corresponding wrong reset mode simultaneously, and electric voltage frequency control module regulating system operating voltage and frequency reach the effect of power consumption optimum to corresponding value.
The present invention compared with prior art, its beneficial effect is:
1, the invention provides online sequential monitoring to CPU core with N level production line, seek the minimum possibility operating voltage of circuit, reducing in the design phase is the operating voltage surplus that circuit is reserved, thus the decrease circuit power consumption, and ground improves the efficiency of circuit.
2, the invention provides two kinds of different error recovery methods, a kind of is original place mistake reset mode, another kind is upper strata mistake reset mode, thereby can be according to the system requirements of circuit and the duty wrong reset mode of selective system flexibly, and in two kinds of restoration methods, switch dynamically.When circuit working during at wider operating frequency range, the present invention recovers than single original place mistake or upper strata mistake reset mode is applicable to more application scenario, throughput is higher, the income of power-dissipation-reduced is higher, overcome the little limitation of the upper strata mistake reset mode scope of application, solved the problem that the system applies occasion of single wrong reset mode in wider operating frequency range limited to, throughput is low and the power consumption income is undesirable.
3, the present invention is provided with threshold ratio and selects mechanism, is used for selecting in the switching of two kinds of reset modes.Compare threshold is the boundary value of selecting, and three important factor in order are considered, and namely resultant fault rate, operating voltage ratio and frequency of operation are converted to final switching threshold than three's impact.Can consider like this duty of circuit, thereby better decision circuitry is carried out the low-power consumption effect which kind of wrong reset mode just can reach the best.
Description of drawings
Fig. 1 is structured flowchart of the present invention;
Fig. 2 is the structured flowchart of wrong restoring circuit among the present invention;
Fig. 3 is the wrong circuit diagram that recovers control module among the present invention;
Fig. 4 is the structured flowchart of observation circuit on the sheet among the present invention;
Fig. 5 is the process flow diagram that threshold ratio of the present invention selects mechanism to set up;
Fig. 6 is comparative parameter T
RefFunction curve diagram (annotate: wherein, horizontal ordinate is error rate, and ordinate is comparative parameter);
Fig. 7 comprises that for recovering efficient Erecovery(the original place mistake is recovered efficient Erecovery_local and the upper strata mistake is recovered efficient Erecovery_global) to comparing parameter T
RefFunction curve diagram (annotate: wherein, horizontal ordinate is comparative parameter, and ordinate is for recovering efficient).
Embodiment
The below is elaborated to technical solution of the present invention, but protection scope of the present invention is not limited to described embodiment.
Embodiment 1: as shown in Figure 1, the present invention is towards the wrong restoring circuit of CPU streamline, comprise that observation circuit 1 on the sheet, rub-out signal statistical module 2, electric voltage frequency control module 3, mistake are recovered control module 4, the original place mistake recovers module 5 and the upper strata mistake is recovered module 6, observation circuit 1 is integrated in each level production line of front N-1 level production line of the CPU core with N stage pipeline structure terminal (wherein N is greater than 3 and less than 20 positive integer) on the sheet, the time sequence information of each clock period of monitoring circuit, the generation error signal; And for the N level production line that does not add monitoring means on the sheet, need when design, to guarantee to make it be difficult for makeing mistakes by the loose of its sequential.
The concrete composition structure of mistake restoring circuit as shown in Figure 2, observation circuit 1 is delivered to rub-out signal statistical module 2 with the rub-out signal that monitors on the sheet, the error rate that the rub-out signal statistical module monitored in 2 certain clock period of statistics, comprise two counters, calculate respectively the quantity of CPU work week issue and rub-out signal; The error rate of rub-out signal statistical module 2 statistics and the system state (operating voltage and frequency of operation) of electric voltage frequency control module 3 are delivered to the wrong control module 4 of recovering, the corresponding control signal that electric voltage frequency control module 3 is recovered in the control module 4 according to mistake is carried out the adjusting of system works voltage and frequency, simultaneously the precision of regulating and controlling.Mistake recovers in the control module 4 the compare threshold T that sets is arranged
Threshold, and select machine-processed result to select to select signal to deliver to the original place mistake original place mistake reset mode according to threshold ratio and recover module 5 or select signal to deliver to upper strata mistake recovery module 6 upper strata mistake reset mode.Simultaneously, mistake recovery control module 4 is delivered to the electric voltage frequency conditioning signal of system in the electric voltage frequency control module 3, to realize the dynamic adjustments of working state of system.
On the sheet connected mode of observation circuit in streamline as shown in Figure 1, the data-signal output terminal of the previous stage streamline of observation circuit institute insertion position links to each other on data input pin and the sheet; The original place mistake is recovered the control signal input end and is linked to each other with the original place mistake recovery control signal output terminal that the original place mistake is recovered module; The data-signal input end of a rear level production line of observation circuit institute insertion position links to each other on data output end and the sheet; The rub-out signal output terminal transmits the integrated circuit input end with a rub-out signal and links to each other.Rub-out signal transmission integrated circuit is inputted by N-1 register and N-2 individual two or door alternately connects to form, and is used for the rub-out signal of streamline generations at different levels also finally is integrated into a rub-out signal with instruction to the rear class transmission; Input end of two inputs or door connects the register output terminal, and the rub-out signal output terminal of observation circuit links to each other on another input end and the sheet.
The circuit diagram of mistake recovery control module as shown in Figure 3, have three input ends and three output terminals, be respectively error rate input end, system state input end, compare threshold input end and electric voltage frequency conditioning signal output terminal, original place mistake reset mode selection signal output part, upper strata mistake reset mode selection signal output part.Wherein, error rate input end, system state input end, compare threshold input end are connected respectively to an eight bit register input end, the error rate input end is connected to register one, and the system state input end is connected to register two, and the compare threshold input end is connected to register three; The output terminal of register one and register two is connected respectively to the data input pin of 8 totalizers, and the carry input of totalizer sets to 0; Totalizer be connected to the data input pin of a comparer with output terminal, the output terminal of register three is connected to another data input pin of comparer; Other three input ends of comparer set to 0; Comparer greater than with equal output terminal be connected to one or, or the output of door is connected to the selecting side of a MUX (MUX1); Comparer is connected to another MUX (MUX2) less than output terminal; " 1 " termination high level of MUX1 and MUX2, " 0 " termination low level; The output signal of MUX1 is that original place mistake reset mode is selected signal, and the output signal of MUX2 is that upper strata mistake reset mode is selected signal; Error rate input end, system state input end, original place mistake reset mode select signal and upper strata mistake reset mode to select signal to be also connected to simultaneously a state machine, and state machine is output as the electric voltage frequency conditioning signal.
The mistake recovery is selected module 4 to comprise threshold ratio and is selected mechanism, and formation voltage frequency adjustment signal instructs 3 pairs of working state of system dynamic adjustments of electric voltage frequency control module; Mistake recovery control module 4 can produce corresponding electric voltage frequency conditioning signal and be input to the electric voltage frequency control module when mistake is recovered, comprise clock control signal and voltage control signal in the electric voltage frequency control signal, the original place replacement that clock control signal comes re-executing of matched orders or data by regulating clock frequency and phase place, voltage control signal comes the original place of re-executing of matched orders or data to replace by the operating voltage of regulating system, clock control signal and voltage control signal cooperatively interact, when system does not have the sequential mistake, rise the high-frequency voltage that reduces simultaneously, when rub-out signal appears in system, boosted voltage in the time of reducing work frequency reaches the purpose that works under simultaneously lower power consumption of the recovery system sequential mistake condition.
When selecting original place mistake reset mode, electric voltage frequency control module 3 can be delivered to the Clock gating signal original place mistake and recover module 5, the clock signal of interlock circuit is stopped a bat, the original place mistake is recovered module 5 original place mistake recovery control signal is delivered to observation circuit 1 on the sheet, finishes correct signal the original place of rub-out signal is replaced.When selecting upper strata mistake reset mode, the upper strata mistake is recovered module 6 the pipeline flush signal is delivered to streamline interlock circuit module, and cooperates other control modules to finish upper strata mistake recovery.
As shown in Figure 5, the threshold ratio in the mistake recovery control module 4 selects mechanism to set up by following process:
At first, find out compare threshold T
ThresholdIn the design phase of circuit, suppose that the step-length of the dynamic electric voltage adjusting of circuit is V
Step, the step-length of the dynamic voltage scaling of circuit is F
Step, the minimum that the dynamic electric voltage of circuit is regulated is V
Min, maximum working voltage is V
Max, the minimum frequency of operation of the dynamic voltage scaling of circuit is F
Min, maximum operation frequency is F
MaxThe working point of circuit dynamic adjustments is respectively V
Min+ n*V
StepOr F
Min+ k*F
Step, wherein, 0≤n≤(V
Max-V
Min)/V
Step, 0≤k≤(F
Max-F
Min)/F
Step, and n, k is integer.Compare threshold T
ThresholdComprise error rate R
Error, operating voltage compares V
Temp/ V
MaxCompare F with frequency of operation
Temp/ F
Max, wherein, the work at present voltage V of circuit
Temp=V
Min+ i*V
Step, the work at present frequency F of circuit
Temp=F
Min+ j*F
Step, 0≤i≤(V
Max-V
Min)/V
Step, 0≤j≤(F
Max-F
Min)/F
Step, and i, j is integer.Comparative parameter T is calculated respectively in each working point in the circuit dynamic adjustments
Ref=R
Error+ V
Temp/ V
Max+ F
Temp/ F
MaxValue.Because error rate R
ErrorCompare V with operating voltage
Temp/ V
MaxThe relation of being inversely proportional to compares F with frequency of operation
Temp/ F
MaxProportional, formula T
Ref=R
Error+ V
Temp/ V
Max+ F
Temp/ F
MaxCan be rewritten as T
Ref=R
Error+ m/R
Error+ n*R
Error, wherein, m, n are the constant greater than 0, so T
RefFor error rate R
ErrorFunction curve in first quartile, have minimum point, as shown in Figure 6.At circuit design stage, circuit working is when different working points, use upper strata mistake reset mode and original place mistake reset mode to go the restoring circuit duty in each working point respectively, measure simultaneously the recovery efficient when using this two kinds of reset modes, wherein original place mistake recovery efficient is E
Recovery_local, it is E that the upper strata mistake is recovered efficient
Recovery_globalThe efficient that is restored E
Recovery(be respectively the original place mistake and recover efficient E
Recovery_localRecover efficient E with the upper strata mistake
Recovery_global) and comparative parameter T
RefRelation curve, recover efficient E
RecoveryWith comparative parameter T
RefLinear, as shown in Figure 7.As comparative parameter T
RefWhen surpassing some values, the power consumption income of upper strata mistake reset mode is higher.Work as T
RefDuring less than this numerical value, the power consumption income of original place mistake reset mode is higher.This value is compare threshold T
Threshold
Select relatively threshold value T
ThresholdAfter, by programmable mode with the compare threshold T that finds out
ThresholdBe set to wrong the recovery in the control module 4, as the standard of comparison of selecting wrong reset mode.Circuit is in a single day given, this compare threshold T
ThresholdFixing, need not change in the course of the work.
Secondly, select wrong reset mode.Because can upgrading, rub-out signal statistical module 2 and 3 each clock period of power management module are delivered to the wrong error rate R that recovers control module 4
Error, operating voltage compares V
Temp/ V
MaxCompare F with frequency of operation
Temp/ F
Max, mistake is recovered 4 each clock period of control module can calculate current comparative parameter T
RefValue, and the comparative parameter T during with the circuit work at present
RefWith set compare threshold T
ThresholdRelatively.If comparative parameter T
RefGreater than compare threshold T
Threshold, then the wrong control module 4 of recovering selects signal to deliver to upper strata reset mode module 6 upper strata mistake reset mode, selects upper strata mistake reset mode; If comparative parameter T
RefLess than compare threshold T
Threshold, then the wrong control module 4 of recovering selects signal to deliver to original place mistake recovery module 5 original place mistake reset mode, selects original place mistake reset mode.Mistake is recovered control module 4 according to compare threshold T
ThresholdSelect corresponding wrong reset mode, can produce corresponding voltage control signal and frequency control signal according to corresponding wrong reset mode simultaneously, power management module 3 regulating system operating voltage reach the effect of power consumption optimum to corresponding value.
The present invention by comparing to select suitable wrong reset mode with set compare threshold, obtains maximum power consumption income according to error rate and the system state of circuit.
As mentioned above, although the specific preferred embodiment of reference has represented and has explained the present invention that it shall not be construed as the restriction to the present invention self.Under the spirit and scope of the present invention prerequisite that does not break away from the claims definition, can make in the form and details various variations to it.
Claims (7)
1. wrong restoring circuit towards the CPU streamline, comprise that observation circuit on the sheet (1), rub-out signal statistical module (2), electric voltage frequency control module (3), mistake are recovered control module (4), the original place mistake recovers module (5) and the upper strata mistake is recovered module (6), it is characterized in that:
It is terminal that described upper observation circuit (1) is integrated in each level production line of front N-1 level production line of the CPU core with N stage pipeline structure, the time sequence information of each clock period of monitoring circuit, and wherein N is more than or equal to 3 and less than 20 positive integer; Described upper observation circuit (1) sent the rub-out signal that monitors into described rub-out signal statistical module (2);
One section interior rub-out signal quantity of clock period of described rub-out signal statistical module (2) statistics accounts for the number percent of total periodicity, is error rate R
Error
Rising and the reduction of described electric voltage frequency control module (3) control system operating voltage and frequency, the precision of while regulating and controlling, described electric voltage frequency control module (3) and described error statistics module (2) are respectively with system state and error rate R
ErrorSend into the described wrong control module (4) of recovering; Described electric voltage frequency control module (3) is carried out the adjusting of system works voltage and frequency according to the described wrong corresponding control signal of recovering in the control module (4);
Described wrong the recovery has the compare threshold T that sets in the control module (4)
ThresholdAnd according to threshold ratio select mechanism the result, determine that selecting signal to be input to the original place mistake original place mistake reset mode recovers module (5) or select signal to be input to upper strata mistake recovery module (6) upper strata mistake reset mode, Dynamic Selection original place mistake reset mode or upper strata mistake reset mode, and the electric voltage frequency conditioning signal delivered to described electric voltage frequency control module (3), the adjusting of guidance system state realizes the dynamic switching of two kinds of wrong reset modes of difference.
2. the wrong restoring circuit towards the CPU streamline according to claim 1 is characterized in that: go up observation circuit (1) for described and comprise the main latch circuit, produce circuit, original place error correcting selector switch, metastable state observation circuit and rub-out signal integrated circuit from latch circuit, shadow latch circuit, rub-out signal; By respectively input signal being sampled at rising edge clock and negative edge, with the sampled result contrast, whether decision circuitry sequential occurs in violation of rules and regulations, realizes simultaneously the data replacement function when the original place mistake is recovered; Wherein the data input pin of observation circuit links to each other on the input end of main latch circuit and shadow latch circuit and the sheet; The original place of the original place of main latch circuit data-signal to be recovered and shadow latch circuit is recovered data-signal and is connected to original place error correcting selector switch input end, and the original place mistake is recovered another input end that the control signal input end is connected to original place error correcting selector switch; The original place of original place error correcting selector switch is recovered data output signal and is connected to from latch circuit; Be connected respectively to data output end, metastable state observation circuit input end, rub-out signal generation circuit input end from the output signal of latch circuit; The delay sampling data output signal of shadow latch circuit is connected to another input end that rub-out signal produces circuit; Rub-out signal produces circuit generation sequential monitoring rub-out signal and is input to rub-out signal integrated circuit input end; The metastable state monitoring rub-out signal that the metastable state observation circuit produces is input to another input end of rub-out signal integrated circuit; The rub-out signal integrated circuit is output as the rub-out signal output terminal of observation circuit.
3. the wrong restoring circuit towards the CPU streamline according to claim 2, it is characterized in that: described upper observation circuit (1) comprises two input ports and two output ports, is respectively data input pin, original place mistake recovery control signal input end, data output end and rub-out signal output terminal; The data-signal output terminal of the previous stage streamline of observation circuit institute insertion position links to each other on data input pin and the sheet; The original place mistake is recovered the control signal input end and is linked to each other with the original place mistake recovery control signal output terminal that the original place mistake is recovered module; The data-signal input end of a rear level production line of observation circuit institute insertion position links to each other on data output end and the sheet; The rub-out signal output terminal transmits the integrated circuit input end with a rub-out signal and links to each other; Rub-out signal transmission integrated circuit is inputted by N-1 register and N-2 individual two or door alternately connects to form, and is used for the rub-out signal of streamline generations at different levels also finally is integrated into a rub-out signal with instruction to the rear class transmission; Input end of two inputs or door connects the register output terminal, and the rub-out signal output terminal of observation circuit links to each other on another input end and the sheet.
4. the wrong restoring circuit towards the CPU streamline according to claim 1, it is characterized in that: described rub-out signal statistical module (2) comprises two counters, calculates respectively the periodicity of CPU work and the quantity of rub-out signal.
5. the wrong restoring circuit towards the CPU streamline according to claim 1, it is characterized in that: the described wrong control module (4) of recovering has three input ends and three output terminals, is respectively error rate input end, system state input end, compare threshold input end and electric voltage frequency conditioning signal output terminal, original place mistake reset mode selection signal output part, upper strata mistake reset mode selection signal output part; Wherein, error rate input end, system state input end, compare threshold input end are connected respectively to an eight bit register input end, the error rate input end is connected to register one, and the system state input end is connected to register two, and the compare threshold input end is connected to register three;
The output terminal of register one and register two is connected respectively to the data input pin of 8 totalizers, and the carry input of totalizer sets to 0; Totalizer be connected to the data input pin of a comparer with output terminal, the output terminal of register three is connected to another data input pin of comparer; Other three input ends of comparer set to 0; Comparer greater than with equal output terminal be connected to one or, or the output of door is connected to the selecting side of a MUX (MUX1); Comparer is connected to another MUX (MUX2) less than output terminal; " 1 " termination high level of MUX (MUX1) and MUX (MUX2), " 0 " termination low level; The output signal of MUX (MUX1) is that original place mistake reset mode is selected signal, and the output signal of MUX (MUX2) is that upper strata mistake reset mode is selected signal; Error rate input end, system state input end, original place mistake reset mode select signal and upper strata mistake reset mode to select signal to be also connected to simultaneously a state machine, and state machine is output as the electric voltage frequency conditioning signal.
6. the wrong restoring circuit towards the CPU streamline according to claim 1, it is characterized in that: described wrong recovery control module (4) produces corresponding electric voltage frequency control signal and is input to described electric voltage frequency control module (3) when mistake is recovered, comprise clock control signal and voltage control signal in the electric voltage frequency control signal, the original place replacement that clock control signal comes re-executing of matched orders or data by regulating clock frequency and phase place, voltage control signal comes the original place of re-executing of matched orders or data to replace by the operating voltage of regulating system, clock control signal and voltage control signal cooperatively interact, when system does not have the sequential mistake, rising frequency or reduction voltage, when rub-out signal appears in system, boosted voltage in the time of reducing work frequency reaches the purpose that recovery system sequential mistake makes system work simultaneously under the lower power consumption condition.
7. the wrong restoring circuit towards the CPU streamline according to claim 1, it is characterized in that: it is comparison comparative parameter T that described threshold ratio is selected mechanism
RefWith compare threshold T
ThresholdSize, comparative parameter T
RefBy formula T
Ref=R
Error+ V
Temp/ V
Max+ F
Temp/ F
MaxObtain.
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| CN201210574735.6A CN103019876B (en) | 2012-12-26 | 2012-12-26 | Error recovery circuit facing CPU (Central Processing Unit) streamline |
| PCT/CN2013/082643 WO2014032610A1 (en) | 2012-09-03 | 2013-08-30 | Error recovery circuit facing cpu assembly line |
| US14/442,071 US9600382B2 (en) | 2012-09-03 | 2013-08-30 | Error recovery circuit oriented to CPU pipeline |
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