CN104966693A - Three-dimensional integrated power system of embedded composite heat dissipating structure and preparation method thereof - Google Patents
Three-dimensional integrated power system of embedded composite heat dissipating structure and preparation method thereof Download PDFInfo
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- CN104966693A CN104966693A CN201510296250.9A CN201510296250A CN104966693A CN 104966693 A CN104966693 A CN 104966693A CN 201510296250 A CN201510296250 A CN 201510296250A CN 104966693 A CN104966693 A CN 104966693A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
Abstract
The invention discloses a three-dimensional integrated power system of an embedded composite cooling structure and a preparation method thereof. The three-dimensional integrated power system comprises a heat sink (1). A high voltage power device layer (2) is disposed above the heat sink (1). A low voltage device and transformer device layer (3) is disposed above the high voltage power device layer (2). The preparation method comprises a first step of preparing the low voltage device and transformer device layer (3); a second step of preparing the high voltage power device layer and making heat dissipating through holes embedded in chip layers; a third step of stacking the chip layers of the high voltage power device layer (2); and a fourth step of stacking the high voltage power device layer (2) onto the heat sink (1) and then stacking the low voltage device and transformer device layer (3) onto the high voltage power device layer (2) to form the three-dimensional integrated power system of the embedded composite heat dissipating structure. The invention solves the heat dissipating problems of a three-dimensional integrated power system, and has the advantages of high integration, large power capacity and the like.
Description
Technical field
The invention belongs to three-dimensional integrated power systems heat dissipation technology, particularly relate to a kind of three-dimensional integrated power systems and preparation method of embedded composite radiating structure.
Background technology
Along with power electronic technology is integrated, intelligent to power system, the improving constantly of reliability requirement; for (the Power System on a Chip of power system on the monolithic sheet that integrated level is very high; be called for short PSoC); namely senser element and control circuit, signal processing circuit, interface circuit, power device etc. are integrated on same chip; make it have according to the output of load request fine adjustment and the intelligent function carrying out self-protection according to the situation such as overheated, overvoltage, overcurrent, its superiority is self-evident.And the key realizing monolithic intelligent power integrated system is intelligent power integrated technology that is interconnected based on HLV compatible IC, high-low pressure, high and low voltage isolation technology.At present, for silica-based smart power device, ripe BCD(Bipolar, CMOS, DMOS) technique solves high and low pressure process compatible problem substantially, but the high and low pressure isolation structure in BCD technique limits the development of power system on high power capacity and high power density.And large based on the integrated technology difficulty of the power system of novel semiconductor material (as: SiC, GaN etc.), process costs is high.Since nineteen sixty-five, the founder G.Moore of Intel Company delivers Moore's Law so far, and the scale of integrated circuit follows this rule substantially to be increased.Predict 2016, by the integrated circuit of batch production 22nm, the characteristic size of transistor is close to nanoscale.Known from physical knowledge, in such size magnitude, quantum effect can play a role, and the relevant issues of current quantum effect are not solved; And after integrated technique size narrows down to deep sub-micron level, the performance of integrated circuit is occupied an leading position by device and is changed interconnection line into and occupy an leading position; Along with the arriving in multi-media network epoch, people are to the pursuit of Large Copacity, multi-functional, High performance electronics, and the series of problems such as the signal delay that traditional integrated technology causes, power consumption increase become increasingly conspicuous.Three-dimensional integration technology is acknowledged as the developing direction of following integrated technology, is the strong guarantee that Moore's Law remains valid.Three-dimensional is integrated is a kind of system-level architecture method, it adopts stacked transistors or chip or module in vertical direction, make integrated more device count on unit are chip, and the integrated sharpest edges of 3D are the multifunction systems that can realize highly heterogeneousization, namely the device of difference in functionality, different materials or different process can be produced in after in different chip layer stacking formation performance system of optimizing again.But the device density more integrated in unit are than conventional two-dimensional chip due to three-dimensional chip is larger, and has higher interconnection density, and the multiple-level stack of active device makes power dissipation density rise rapidly; Heat conductivility again due to the dielectric layer between stack layer is low, becomes the bottleneck of three-dimensional chip internal heat dissipating passage.And the power loss of the high power transistor under the high pressure in power system and big current condition of work is more outstanding, the consumed power of power transistor can change heat into makes tube core generate heat, junction temperature raises, if can not in time, effective by this thermal release, the service behaviour of device will be had influence on, thus reduce the reliability of system works, even damage device.
Summary of the invention
The technical problem to be solved in the present invention: three-dimensional integrated power systems and preparation method that a kind of embedded composite radiating structure is provided, larger with the device density solving existing three-dimensional chip more integrated in unit are than conventional two-dimensional chip, and there is higher interconnection density, the multiple-level stack of active device makes power dissipation density rise rapidly; Thermal conductivity again due to the dielectric layer between stack layer is very low, become the bottleneck of three-dimensional chip internal heat dissipating passage, the power loss of the high power transistor under the high pressure in power system and big current condition of work is more outstanding, the consumed power of power transistor can change heat into makes tube core generate heat, junction temperature raises, if can not in time, effectively by this thermal release, will have influence on the service behaviour of device, thus reduce the reliability of system works, even damage the problems such as device.
Technical solution of the present invention:
A three-dimensional integrated power systems for embedded composite radiating structure, it comprises fin, is High voltage power device layer above fin, is low-voltage device and sensor component layer above High voltage power device layer.
Described High voltage power device layer and low-voltage device and sensor component layer include the chip layer of more than a slice or a slice, are connected between each chip layer of High voltage power device layer and low-voltage device and sensor component layer by through-silicon-via.
Each power cell periphery in each chip layer of High voltage power device layer is evenly provided with thermal vias, is perfused with metal material as packing material in thermal vias.。
Thermal vias, the power cell size and shape of each chip layer correspondence position of High voltage power device layer are consistent.
The preparation method of the three-dimensional integrated power systems of described embedded composite radiating structure, it comprises the steps:
Low-voltage device in step 1, control circuit, protective circuit and testing circuit by power system and senser element are integrated in the chip layer of more than a slice or a slice, chip layer are piled up and form low-voltage device and sensor component layer;
Step 2, the High voltage power device in power system to be integrated in the chip layer of more than a slice or a slice, and at the reserved bore position in power cell periphery of each chip layer;
Step 3, adopt plasma etching method holes drilled through at reserved bore position place, each power cell periphery, insulating medium layer is generated in through-holes with low temperature chemical vapor deposition process, barrier layer is formed in through-holes again by sputtering technology, finally by galvanoplastic, via metal core is filled complete, formed and embed thermal vias;
Step 4, with Chemical Physics glossing, polishing is carried out to the upper and lower surface of high-power chip layer embedding thermal vias, to expose embedding the upper and lower metal joint face of thermal vias and smooth, finally adopt low-temperature bonding technology by stacking in vertical direction for each chip layer of each high-power, form High voltage power device layer;
Step 5, by stacking for High voltage power device layer on a heat sink after, low-voltage device and sensor component layer are stacked on High voltage power device layer, form the three-dimensional integrated power systems of embedded composite radiating structure.
Beneficial effect of the present invention:
Technical solution of the present invention does not need the process compatible problem considering power system mesolow device and high voltage power device, low-voltage device and high voltage power device is taked to separate, be integrated in different chip layer, make the integrated level of system higher, power capacity is larger; By embedding thermal vias in high-voltage device chip layer inside, the heat that high tension apparatus power consumption is changed is diffused rapidly on fin, realizes quick heat radiating, and the stability of system and reliability are improved; The invention solves prior art larger due to the three-dimensional chip device density more integrated in unit are than conventional two-dimensional chip, and have higher interconnection density, the multiple-level stack of active device makes power dissipation density rise rapidly; Again because the dielectric layer thermal conductivity between stack layer is low, become the bottleneck of three-dimensional chip internal heat dissipating passage, the power loss of the high power transistor under the high pressure in power system and big current condition of work is more outstanding, the consumed power of power transistor can change heat into makes tube core generate heat, junction temperature raises, if can not in time, effectively by this thermal release, will have influence on the service behaviour of device, thus reduce the reliability of system works, even damage the problems such as device.
accompanying drawing illustrates:
Fig. 1 is structural representation of the present invention;
Fig. 2 is High voltage power device Rotating fields cross-sectional schematic of the present invention;
Fig. 3 is High voltage power device layer schematic top plan view of the present invention.
embodiment:
A three-dimensional integrated power systems (see figure 1) for embedded composite radiating structure, it comprises fin 1, is High voltage power device layer 2 above fin 1, is low-voltage device and sensor component layer 3 above High voltage power device layer 2.
Described High voltage power device layer 2 and low-voltage device and sensor component layer 3 include the chip layer of more than a slice or a slice, are connected between each chip layer of High voltage power device layer 2 and low-voltage device and sensor component layer 3 by through-silicon-via.The present invention no longer considers the high and low pressure compatibling problem in conventional silica-based BCD technique, and high voltage power device, low-voltage device and the senser element in power system is separately produced in different chip layer, connection is between layers completed again by through-silicon-via, interconnection wiring is shortened in a large number, and systematic function reaches optimization.
Each power cell 5 periphery in each chip layer of High voltage power device layer 2 is evenly provided with thermal vias 4, due to high-voltage great-current device, in planar chip, area occupied can up to 2/3 of whole chip area, in order to improve integrated level and the power capacity of chip, the distribution of high-voltage great-current device is produced in multiple chip layer by the present invention, and each chip layer at power device place embeds the thermal resistance that thermal vias reduces heat diffusion path, the heat allowing power device dissipation power produce is diffused into the bottom of three-dimensional chip quickly.
Metal material is perfused with as packing material in thermal vias 4, described metal material is high heat conductivity metal material, in each chip layer of High voltage power device layer, insert thermal vias, thermal vias packing material selects the metal of high heat conductance to reduce the thermal resistance of heat dissipation channel.
The power transistor be formed in parallel by a large amount of power device cellular 7 in power system may be partitioned into many power cells, in each power cell, contained cellular number can not be identical, determined by the temperature field of chip layer, in chip, the power cell of temperature lower position is more containing cellular number, and the power cell of temperature higher position is less containing cellular number; Then multiple thermal vias is inserted equably in each power cell periphery, the thermal vias number of each power cell periphery is determined by the maximum diffipation power of power cell, in a word, ensure that the temperature on the power device chip layer after embedding composite radiating technology is basically identical as far as possible.For the ease of stacking, the power cell of power device layer each chip correspondence position and the size of thermal vias, shape are consistent.The power device Rotating fields vertical view embedded after composite radiating technology is shown in Fig. 3.
The preparation method of the three-dimensional integrated power systems of described embedded composite radiating structure, it comprises the steps:
Low-voltage device in step 1, control circuit, protective circuit and testing circuit by power system and senser element are integrated in the chip layer of more than a slice or a slice, chip layer are piled up and form low-voltage device and sensor component layer 3;
Step 2, the High voltage power device in power system to be integrated in the chip layer of more than a slice or a slice, and at the reserved bore position in power cell periphery of each chip layer;
Step 3, adopt plasma etching method holes drilled through at reserved bore position place, each power cell periphery, insulating medium layer 6 is generated in through-holes with low temperature chemical vapor deposition process, barrier layer is formed in through-holes again by sputtering technology, finally by galvanoplastic, via metal core is filled complete, form embedded-type heat-dissipating through hole;
Step 4, carry out polishing with the upper and lower surface of Chemical Physics glossing to the high-power chip layer forming embedded-type heat-dissipating through hole, the upper and lower metal joint face of thermal vias to be exposed and smooth, finally adopt low-temperature bonding technology by stacking in vertical direction for each chip layer of each high-power, form High voltage power device layer 2;
Step 5, High voltage power device layer 2 to be stacked on after on fin 1, low-voltage device and sensor component layer 3 to be stacked on High voltage power device layer 2, to form the three-dimensional integrated power systems of embedded composite radiating structure.
Wherein the thermal conductivity of the number of thermal vias, breadth depth ratio and filled with metal determines the thermal resistance of heat dissipation channel.Owing to being make thermal vias in the blank space of chip layer, therefore making the technique of thermal vias and all adopt low temperature process.The thermal stress that the distance of thermal vias and power cell is caused by layers of material coefficient of thermal expansion mismatch in thermal vias determines.
Claims (5)
1. the three-dimensional integrated power systems of an embedded composite radiating structure, it comprises fin (1), it is characterized in that: fin (1) top is High voltage power device layer (2), and High voltage power device layer (2) top is low-voltage device and sensor component layer (3).
2. the three-dimensional integrated power systems of a kind of embedded composite radiating structure according to claim 1, it is characterized in that: described High voltage power device layer (2) and low-voltage device and sensor component layer (3) include the chip layer of more than a slice or a slice, are connected between each chip layer of High voltage power device layer (2) and low-voltage device and sensor component layer (3) by through-silicon-via.
3. the three-dimensional integrated power systems of a kind of embedded composite radiating structure according to claim 1, it is characterized in that: each power cell periphery in each chip layer of High voltage power device layer (2) is evenly provided with thermal vias (4), and thermal vias is perfused with metal material as packing material in (4).
4. the three-dimensional integrated power systems of a kind of embedded composite radiating structure according to claim 1, is characterized in that: thermal vias (4), power cell (5) size and shape of each chip layer correspondence position of High voltage power device layer (2) are consistent.
5. the preparation method of the three-dimensional integrated power systems of embedded composite radiating structure as described in claim 1-4, it comprises the steps:
Low-voltage device in step 1, control circuit, protective circuit and testing circuit by power system and senser element are integrated in the chip layer of more than a slice or a slice, chip layer are piled up and form low-voltage device and sensor component layer (3);
Step 2, the High voltage power device in power system to be integrated in the chip layer of more than a slice or a slice, and at the reserved bore position in power cell periphery of each chip layer;
Step 3, adopt plasma etching method holes drilled through at reserved bore position place, each power cell periphery, insulating medium layer is generated in through-holes with low temperature chemical vapor deposition process, barrier layer is formed in through-holes again by sputtering technology, finally by galvanoplastic, via metal core is filled complete, formed and embed thermal vias;
Step 4, with Chemical Physics glossing, polishing is carried out to the upper and lower surface of high-power chip layer embedding thermal vias, to expose embedding the upper and lower metal joint face of thermal vias and smooth, finally adopt low-temperature bonding technology by stacking in vertical direction for each chip layer of each high-power, form High voltage power device layer (2);
Step 5, High voltage power device layer (2) is stacked on fin (1) upper after, low-voltage device and sensor component layer (3) are stacked on High voltage power device layer (2), form the three-dimensional integrated power systems of embedded composite radiating structure.
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Cited By (6)
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| CN106098687A (en) * | 2016-08-03 | 2016-11-09 | 贵州大学 | A kind of three-dimensional power VDMOSFET device and integrated approach thereof |
| CN107990277A (en) * | 2017-12-25 | 2018-05-04 | 上海小糸车灯有限公司 | Car light reflecting LED module system and vehicle lamp assembly |
| WO2019128353A1 (en) * | 2017-12-25 | 2019-07-04 | 华域视觉科技(上海)有限公司 | Vehicle light reflective-type led module system and vehicle light assembly |
| CN110137147A (en) * | 2019-07-02 | 2019-08-16 | 贵州大学 | Nested type pipe radiating network structure based on lower thick upper thin type TSV |
| CN110516382A (en) * | 2019-08-30 | 2019-11-29 | 贵州大学 | A kind of three-dimensionally integrated system Thermal desorption method based on silicon clear opening |
| CN111128980A (en) * | 2019-12-04 | 2020-05-08 | 珠海欧比特宇航科技股份有限公司 | Heat dissipation processing method for three-dimensional packaging internal device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106098687A (en) * | 2016-08-03 | 2016-11-09 | 贵州大学 | A kind of three-dimensional power VDMOSFET device and integrated approach thereof |
| CN107990277A (en) * | 2017-12-25 | 2018-05-04 | 上海小糸车灯有限公司 | Car light reflecting LED module system and vehicle lamp assembly |
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| CN110137147A (en) * | 2019-07-02 | 2019-08-16 | 贵州大学 | Nested type pipe radiating network structure based on lower thick upper thin type TSV |
| CN110516382A (en) * | 2019-08-30 | 2019-11-29 | 贵州大学 | A kind of three-dimensionally integrated system Thermal desorption method based on silicon clear opening |
| CN110516382B (en) * | 2019-08-30 | 2022-08-12 | 贵州大学 | Thermal analysis method of three-dimensional integrated system based on silicon through hole |
| CN111128980A (en) * | 2019-12-04 | 2020-05-08 | 珠海欧比特宇航科技股份有限公司 | Heat dissipation processing method for three-dimensional packaging internal device |
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