CN104952716A - Forming method for semiconductor structure - Google Patents
Forming method for semiconductor structure Download PDFInfo
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- CN104952716A CN104952716A CN201410113838.1A CN201410113838A CN104952716A CN 104952716 A CN104952716 A CN 104952716A CN 201410113838 A CN201410113838 A CN 201410113838A CN 104952716 A CN104952716 A CN 104952716A
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Abstract
A forming method for a semiconductor structure includes providing a semiconductor substrate having a first zone on which a plurality projecting first gate structures are formed, wherein first grooves are arranged between adjacent first gate structures; performing hydrophobic treatment on the surfaces of the side walls of the first grooves so as to enable the first grooves to have hydrophobic side walls; forming first medium layers in the first grooves by adopting mobility chemical vapor deposition technique, wherein a reactant adopted by the mobility chemical vapor deposition technique is a hydrotropic substance and air gaps are formed in the first medium layers with the effect of the hydrophobic side walls. By adopting the method provided by the invention, dielectric coefficient of the first medium layers can be reduced and stray capacitance between the adjacent first gate structures is reduced.
Description
Technical field
The present invention relates to technical field of semiconductors, particularly a kind of formation method of semiconductor structure.
Background technology
In existing integrated circuit and field of semiconductor manufacture, transistor is one of a kind of primary element forming semiconductor device, is therefore widely used.Integrated along with integrated circuit, and the microminiaturization of semiconductor device, the performance of transistor is remarkable all the more for the impact of integrated circuit.In the factor affecting transistor performance, the parasitic gate electric capacity of transistor can produce larger impact to the performance of transistor.
The grid of transistor adopts the electric conducting material such as polysilicon or metal to make, and fills insulating dielectric materials, make to form parasitic capacitance between neighboring gates, affect the performance of transistor between neighboring gates.And, the metal plug being positioned at described insulating dielectric materials also can be formed on the source-drain electrode surface of transistor, isolated by insulating dielectric materials between described metal plug and grid, between described grid and metal plug, also can form parasitic capacitance, affect the performance of transistor.
Along with the raising of chip integration, dimensions of semiconductor devices reduces, and the distance between neighboring gates reduces, thus makes the parasitic capacitance of grid become large, affects the performance of transistor further.
The performance of existing transistor needs further to be improved.
Summary of the invention
The problem that the present invention solves is to provide the formation method of general semiconductor structure, improves the performance of transistor.
For solving the problem, the invention provides a kind of formation method of semiconductor structure, comprising: provide Semiconductor substrate, described Semiconductor substrate has first area, described first area is formed with the first grid structure of some projections, between adjacent first grid structure, there is the first groove; Hydrophobic treatment is carried out to the first recess sidewall surface, makes the first groove have hydrophobicity sidewall; Adopt mobility chemical vapor deposition method to form first medium layer in described first groove, the reactant that described mobility chemical vapor deposition method adopts is hydroaropic substance, makes to have air-gap in described first medium layer.
Optionally, described Semiconductor substrate also comprises second area, described second area is formed with the second grid structure of some projections, has the second groove between adjacent second grid structure.
Optionally, also comprise and hydrophilic treated is carried out to the second recess sidewall surface on described second area, make the second groove have hydrophily sidewall; Adopt mobility chemical vapor deposition method to form second dielectric layer in described second groove, in described second dielectric layer, there is no air-gap.
Optionally, before hydrophilic treated is carried out to the second recess sidewall, also comprise: while hydrophobic treatment is carried out to the first recess sidewall surface, hydrophobic treatment is carried out to the second recess sidewall surface; Then in the second groove, first medium layer is formed while forming first medium layer in the first groove; Remove the first medium layer in described second groove.
Optionally, hydrophobic treatment is being carried out to the sidewall surfaces of described first groove, after hydrophilic treated is carried out to the second recess sidewall surface, forming described first medium layer and second dielectric layer simultaneously.
Optionally, wet treatment is adopted to carry out described hydrophobic treatment.
Optionally, the solution of described wet treatment is hydrofluoric acid solution, and in described hydrofluoric acid solution, the volume range of deionized water and hydrofluoric acid is 50: 1 ~ 1000: 1
Optionally, the method for described hydrophobic treatment is form hydrophobic layer on the first recess sidewall surface.
Optionally, described hydrophobic layer material is silicon.
Optionally, described hydrophobic layer thickness is 1nm ~ 2nm.
Optionally, wet treatment is adopted to carry out described hydrophilic treated.
Optionally, the solution that described hydrophilic treated adopts is NH
4oH and H
2o
2mixed aqueous solution.
Optionally, NH
4oH and H
2o
2concentration ratio be 1:0.5 ~ 1:2.
Optionally, the solution that described hydrophilic treated adopts is HCl and H
2o
2mixed aqueous solution.
Optionally, HCl and H
2o
2concentration ratio be 1:0.5 ~ 1:2.
Optionally, the diameter range of described air-gap is 2nm ~ 20nm.
Optionally, the reactant that described mobility chemical vapor deposition method adopts comprises one or more in silane, disilane, methyl-monosilane, dimethylsilane, trimethyl silane, tetramethylsilane, tetraethoxysilane, triethoxysilane, octamethylcy-clotetrasiloxane, tetramethyl disiloxane, tetramethyl-ring tetrasiloxane, trimethylsilyl amine, dimethyl silanyl amine.
Optionally, described mobility chemical vapor deposition method also comprises: make described reactant at O
2, O
3, NO, H
2o steam, N
2, carry out annealing in process under one or more gases in He, Ar and at least there is in described gas a kind of gas containing O, the temperature of described annealing in process is 200 DEG C ~ 1200 DEG C.
Optionally, described first grid structure comprises: the first grid dielectric layer being positioned at semiconductor substrate surface, the first grid being positioned at first grid dielectric layer surface, be positioned at the first side wall of first grid dielectric layer and first grid sidewall surfaces; Described second grid structure comprises: the second gate dielectric layer being positioned at semiconductor substrate surface, the second grid being positioned at second gate dielectric layer surface, be positioned at the second side wall of second gate dielectric layer and second grid sidewall surfaces.
The formation method of semiconductor structure according to claim 19, is characterized in that, the material of described first side wall and the second side wall is silicon nitride.
Compared with prior art, technical scheme of the present invention has the following advantages:
In technical scheme of the present invention, described Semiconductor substrate has first area, between the adjacent first grid structure in first area, there is the first groove, after hydrophobicity process is carried out to the first recess sidewall surface, described first groove is made to have hydrophobicity sidewall, mobility chemical vapor deposition method is adopted to form first medium layer again in described first groove, the reactant adopted due to described mobility chemical vapor deposition method is hydroaropic substance, and the sidewall surfaces of described first groove has hydrophobicity, so described hydrophily reactant can be subject to surface tension effects in the process of filling first groove, bubble small in a large number can be formed between described hydrophilic reactant and the sidewall surfaces of the first groove, make to remain gas between the sidewall of reactant and the first groove.Carry out in the process of annealing in process after the full described reactant of filling, on the one hand, between reactant and the first recess sidewall, bubble is subject to the impact of annealing temperature, reactant can be entered into, and multiple micro-bubble contacts and can form the larger bubble of diameter, described reactant is made to form larger bubble; On the other hand, solidify to form in the process of first medium layer at reactant, described reaction produce become gaseous by-product, and described gaseous by-product is also easy forms bubble in reactant.Because described reactant has larger viscosity, the quantity of above-mentioned bubble is more, and bubble may contact with each other the larger bubble of formation in motion process, so the movement rate in reactant is less, along with the carrying out of annealing process, reactant solidify to form first medium layer gradually, because number of bubbles is more, part bubble moves to reaction-ure surface and disappears in annealing process, and part bubble is then cured in first medium layer, forms air-gap.The dielectric coefficient of described air-gap is lower, can the average dielectric coefficient of lower described first medium layer, thus reduces the parasitic capacitance between the adjacent first grid on first area, thus improves the performance of the semiconductor device formed.
Further, described Semiconductor substrate also has second area, has the second groove, carry out hydrophilic treated to the sidewall surfaces of described second groove between the adjacent second grid structure on described second area, makes described second groove have hydrophily sidewall.Flowable chemical vapor deposition method is adopted to form second dielectric layer in the second groove.Reactant due to described mobility chemical vapor deposition method is hydroaropic substance, and described second groove has hydrophily inwall after hydrophilic treated, so under surface tension effects, contact-making surface between described hydrophilic reactant and the hydrophily inwall of the second groove is fitted completely, small bubble can not be there is, there is higher interface quality.Carry out after populated described reactant in the process of annealing in process, although reactant can produce certain gaseous by-product in the curing process, and in described reactant, form the bubble of some, but due to the gas foam negligible amounts that described gaseous by-product produces, compared with formation first medium layer, number of bubbles in reactant obviously declines, so before described reactant solidify to form second dielectric layer, bubble in reactant can be overflowed completely from reactant, makes to there is not air-gap in the final second dielectric layer formed.The described second medium layer material that there is not air-gap is dense, can avoid adjacent second grid applies comparatively high working voltage time, the problem such as to puncture between adjacent second grid.
Accompanying drawing explanation
Fig. 1 to Fig. 4 is the structural representation of the forming process of the semiconductor structure of one embodiment of the present of invention;
Fig. 5 to Fig. 7 is the structural representation of the forming process of the semiconductor structure of an alternative embodiment of the invention.
Embodiment
As described in the background art, in existing integrated circuit, between the grid of adjacent transistor and between grid and metal plug distance is less, so can form larger parasitic capacitance.
Operating rate and the parasitic capacitance of the device in the nucleus of integrated circuit are inversely proportional to, and described nucleus can be the device such as processor, memory.Parasitic capacitance is larger, and the operating rate of device is lower, and described nucleus is the sensitizing range of parasitic capacitance, and the device general work voltage of nucleus is lower, not high to the consistency requirements of the dielectric layer between neighboring gates.And in the outer peripheral areas of integrated circuit, such as, inputing or outputing transistor, parasitic capacitance is less for the performance impact of transistor, and described outer peripheral areas is the de-militarized zone of parasitic capacitance.
The parasitic capacitance between the grid of transistor and metal plug can be reduced by the dielectric coefficient reducing the insulating dielectric materials between neighboring gates.Such as, adopt dielectric layer between low-K dielectric materials forming layers, but due to low-K dielectric material more loose, adhesiveness is poor, the isolation of interlayer dielectric layer may be caused poor, cause the problems such as element leakage.
In the present embodiment, a kind of formation method of semiconductor structure is provided, the first medium layer with air-gap can be formed between the grid of the sensitizing range of parasitic capacitance, and the second dielectric layer without air-gap is formed at de-militarized zone, thus reduce the parasitic capacitance of sensitizing range, improve the performance of semiconductor structure.
For enabling above-mentioned purpose of the present invention, feature and advantage more become apparent, and are described in detail specific embodiments of the invention below in conjunction with accompanying drawing.
Please refer to Fig. 1, provide Semiconductor substrate 100, described Semiconductor substrate 100 has first area I, described first area I is formed with the first grid structure of some projections.
The material of described Semiconductor substrate 100 comprises the semi-conducting materials such as silicon, germanium, SiGe, GaAs, and described Semiconductor substrate 100 can be body material also can be that composite construction is as silicon-on-insulator.Those skilled in the art can select the type of described Semiconductor substrate 100 according to the semiconductor device that Semiconductor substrate 100 is formed, therefore the type of described Semiconductor substrate should not limit the scope of the invention.In the present embodiment, described Semiconductor substrate 100 is crystalline silicon.
Described first grid structure comprises: the first side wall 103 of be positioned at the first grid dielectric layer 101 on Semiconductor substrate 100 surface, be positioned at the first grid 102 on first grid dielectric layer 101 surface, be positioned at first grid dielectric layer 101 and first grid 102 sidewall surfaces, has the first groove 110 between adjacent first grid structure.
In the present embodiment, described Semiconductor substrate 100 also has second area II, described second area II is formed with the second grid structure of some projections.Described second grid structure comprises: the second side wall 203 of be positioned at the second gate dielectric layer 201 on Semiconductor substrate 100 surface, be positioned at the second grid 202 on second gate dielectric layer 201 surface, be positioned at second gate dielectric layer 201 and second grid 202 sidewall surfaces, has the second groove 210 between adjacent second grid structure.
The material of described first grid dielectric layer 101 and second gate dielectric layer 102 can comprise one or more in silica, hafnium oxide, zirconia, silicon hafnium oxide, aluminium silicon hafnium oxide, and the material of described first grid 102 and second grid 202 can comprise one or more in polysilicon, titanium, tantalum, titanium nitride, tantalum nitride, tungsten, tungsten nitride.The material of described first side wall 103 and the second side wall 203 is silicon nitride or silica, and in the present embodiment, the material of described first side wall 103 and the second side wall 104 is silicon nitride.
Described first grid structure and second grid structure can be that before adopting, grid technique forms the grid structure formed in transistor, also can be that grid technique forms the dummy gate structure formed in the process of transistor after employing.
Also be formed with the first source electrode being positioned at first grid structure both sides and the first drain electrode (not shown) in first area I in described Semiconductor substrate 100, be also formed with the second source electrode and the second drain electrode (not shown) that are positioned at second grid structure both sides at second area II.
Please refer to Fig. 2, Fig. 1 be please refer to described first groove 110() sidewall surfaces carry out hydrophobic treatment, described first groove 110 is made to have hydrophobicity sidewall, then mobility chemical vapor deposition method is adopted to form first medium layer 300 in described first groove 110, the reactant that described mobility chemical vapor deposition method adopts is hydroaropic substance, under the effect of described hydrophobicity sidewall, make, in described first medium layer 300, there is air-gap 301.
In the present embodiment, hydrophobic treatment is carried out to the sidewall surfaces of the sidewall (please refer to Fig. 1) of described second groove 210 simultaneously, further, form first medium layer 300 in the first groove 110 while, in described second groove 210, described first medium layer 300 is also formed.
The method of described hydrophobic treatment can be wet treatment, makes the first groove 210, second groove 210 sidewall surfaces form hydrophobic group or chemical bond, make the first groove 210, second groove 210 sidewall surfaces have hydrophobicity by solution cleaning.In the present embodiment, the solution that described wet treatment adopts is hydrofluoric acid solution, and wherein the volume range of deionized water and hydrofluoric acid is 50: 1 ~ 1000: 1.Described hydrofluoric acid solution can form Si-H chemical bond on the second side wall 203 surface of the first side wall 103, second groove 210 sidewall of the sidewall of the first groove 110, and described Si-H chemical bond has more stable chemical property, cannot again with H
2o molecule forms hydrogen bond, so make described first side wall 103 and the second side wall 203 surface have hydrophobicity.
In the present embodiment, carry out in the process of hydrophobic treatment at employing wet processing to the first groove 110, second groove 210, Semiconductor substrate 100 surface also can be subject to the process of the solution of described wet processing, the lower surface of described first groove 110 and the second groove 210 is made also to have hydrophobicity, so in the present embodiment, described hydrophobic treatment can make the whole inwall of the first groove 110 and the second groove 210 all have hydrophobicity.
In other embodiments of the invention, also can form hydrophobic layer at described first groove 110 and the second groove 210 inner wall surface, to make described first groove 110 and the second groove 210, there is hydrophobicity inwall.Described hydrophobic layer can be silicon layer.
Making after described first groove 110 and the second groove 120 have hydrophobicity inwall, mobility chemical vapor deposition method is adopted to form first medium layer 300 in described first groove 110, and in the present embodiment, in described second groove 210, also form described first medium layer 300 simultaneously.The reactant that described mobility chemical vapor deposition method adopts is hydroaropic substance, under the effect of described hydrophobicity sidewall, makes to have air-gap 301 in described first medium layer 300.
The reactant of described mobility chemical vapor deposition method comprises the one in silane, disilane, methyl-monosilane, dimethylsilane, trimethyl silane, tetramethylsilane, tetraethoxysilane, triethoxysilane, octamethylcy-clotetrasiloxane, tetramethyl disiloxane, tetramethyl-ring tetrasiloxane, trimethylsilyl amine, dimethyl silanyl amine.Described reactant is the material with certain fluidity and viscosity higher, has higher filling capacity for the groove that depth-to-width ratio is higher, can be that described reactant fills described first groove 110 and the second groove 210 by techniques such as spin coatings.
Described mobility chemical vapor deposition method also comprises: make described reactant at O
2, O
3, NO, H
2o steam, N
2, carry out annealing in process under one or more gases in He, Ar and at least there is in described gas a kind of gas containing O, the temperature of described annealing in process is 200 DEG C ~ 1200 DEG C.Described reactant is finally made to form silica in annealing process, as first medium layer 300.In other embodiments of the invention, described mobility chemical vapor deposition method also can adopt other hydrophilic reactants, forms the material of other dielectric materials as first medium layer 300.
The reactant adopted due to described mobility chemical vapor deposition method is hydroaropic substance, described reactant is in the process of filling first groove 110 and the second groove 210, because the inner wall surface of described first groove 110 and the second groove 210 has hydrophobicity, described under surface tension effects, described hydrophilic reactant and bubble small in a large number can be formed between the first groove 110 and the inner wall surface of the second groove 210, make reactant and remain gas between the first groove 110 and the second groove 210 inwall, this gas can be environmental gas when filling reactant in described first groove 110 and the second groove 210.
Carry out in the process of annealing in process after the full described reactant of filling, on the one hand, between reactant and the first groove 110, second groove 210 inside, bubble is subject to the impact of annealing temperature, reactant can be entered into, and multiple micro-bubble contacts and can form the larger bubble of diameter, described reactant is made to form larger bubble; On the other hand, in the process of annealing in oxygen-containing gas atmosphere, described reactant can react with oxygen-containing gas, oxygen element and the described reactant with mobility form the silica material that the formation of chemical bond such as-Si-H-,-Si-N-,-Si-H-N-in Si-O-Si key substituted reactant solidifies, and described reactant and oxygen-containing gas reaction can form N
2, NH
3, NO, NO
2etc. gaseous by-product, described gaseous by-product is also easy forms bubble in reactant.Because described reactant has larger viscosity, the quantity of above-mentioned bubble is more, and bubble may contact with each other the larger bubble of formation in motion process, so the movement rate in reactant is less, along with the carrying out of annealing process, reactant solidify to form first medium layer gradually, because number of bubbles is more, part bubble moves to reaction-ure surface and disappears in annealing process, and part bubble is then cured in first medium layer 300, forms air-gap 301.Described air-gap 301 is ball or elliposoidal, and the diameter of described air-gap 301 is 2nm ~ 20nm.
Be gas in described air-gap 301, there is lower dielectric coefficient, the average dielectric coefficient of first medium layer 300 can be reduced, thus the parasitic capacitance reduced in the core devices in the I of first area between adjacent first grid 102, avoid because parasitic capacitance is excessive and affect the performance of semiconductor device.
Please refer to Fig. 3, the first medium layer 300(removed in the second groove 210 on second area II please refer to Fig. 2), and hydrophilic treated is carried out to the sidewall surfaces of described second groove 210, make described second groove 210 have hydrophily sidewall.
In the present embodiment, because described second area II is for the formation of chip periphery device, parasitic capacitance is not too large to the performance impact of described peripheral components, and, due to the transistor of peripheral circuit, such as input and output voltage etc., general work voltage is higher, the dielectric layer between neighboring gates is needed to have higher density, when applying high voltage to avoid being applied to, the problem such as to puncture between neighboring gates, so, in the present embodiment, described second area II forms the second dielectric layer without air-gap, to meet the requirement of peripheral circuit transistor to dielectric layer.
In the present embodiment, formed in the first groove 110 and the second groove 210 after there is the first medium layer 300 of air-gap, adopt wet-etching technology, remove the first medium layer 300 in the second groove 210 on second area II.When removing the first medium layer on described second area II, described first area I forms mask layer, to protect the first medium layer 300 on described first area I injury-free.Described mask layer can be the mask materials such as photoresist.The etching solution that described wet-etching technology adopts can be hydrofluoric acid solution.Follow-up on second area II, form second dielectric layer time, the mask layer on described first area I can also protect first medium layer 300 on described first area I and first grid structure.
After removing the first medium layer 300 in the second groove 210 on second area II, hydrophilic treated is carried out to the sidewall surfaces of described second groove 210, form hydrophilic radical or chemical bond in the sidewall surfaces of described second groove 210, make described second groove 210 have hydrophily sidewall.
Adopt wet treatment to carry out described hydrophilic treated, the solution that described hydrophilic treated adopts can be the solution with oxidation.In the present embodiment, the solution that described hydrophilic treated adopts is NH
4oH and H
2o
2mixed aqueous solution, wherein, NH
4oH and H
2o
2concentration ratio be 1:0.5 ~ 1:2.In other embodiments of the invention, the solution that described hydrophilic treated adopts can also be HCl and H
2o
2mixed aqueous solution, wherein, HCl and H
2o
2concentration ratio be 1:0.5 ~ 1:2.The solution of described hydrophilic treated has certain oxidizability, can be oxidized at the sidewall of the second groove 210 and lower surface, natural oxidizing layer is formed in the inner wall surface of described second groove 210, due to the effect of chemical polarity, make the second groove 210 inner wall surface form Si-OH key, because hydroxyl (-OH) is hydrophilic radical, be easy to adsorbed water molecule, form hydrogen bond, thus make the inner wall surface of described second groove 210 have hydrophily.
Further, in the solution of described hydrophily process, the concentration of oxidant can not be too high, such as, in the present embodiment H
2o
2concentration, avoid the inner wall surface of the second groove 210 being formed thicker oxide layer and affecting the performance of the transistor of formation.
Please refer to Fig. 4, adopt mobility chemical vapor deposition method to please refer to Fig. 3 at described second groove 210() in formation second dielectric layer 400, there is no air-gap in described second dielectric layer 400.
The reactant of described mobility chemical vapor deposition method comprises the one in silane, disilane, methyl-monosilane, dimethylsilane, trimethyl silane, tetramethylsilane, tetraethoxysilane, triethoxysilane, octamethylcy-clotetrasiloxane, tetramethyl disiloxane, tetramethyl-ring tetrasiloxane, trimethylsilyl amine, dimethyl silanyl amine.Described reactant is the material with certain fluidity and viscosity higher, can be that described reactant fills described secondth groove 210 by techniques such as spin coatings.
Described mobility chemical vapor deposition method also comprises: make described reactant at O
2, O
3, NO, H
2o steam, N
2, carry out annealing in process under one or more gases in He, Ar and at least there is in described gas a kind of gas containing O, the temperature of described annealing in process is 200 DEG C ~ 1200 DEG C.Described reactant is finally made to form silica in annealing process, as second dielectric layer 400.In other embodiments of the invention, described mobility chemical vapor deposition method also can adopt other hydrophilic reactants, forms the material of other dielectric materials as second dielectric layer 400.
Reactant due to described mobility chemical vapor deposition method is hydroaropic substance, and described second groove 210 has hydrophily inwall after hydrophilic treated, so under surface tension effects, contact-making surface between the hydrophily inwall of described hydrophilic reactant and the second groove 210 is fitted completely, small bubble can not be there is, there is higher interface quality.Carry out after populated described reactant in the process of annealing in process, although reactant and anneal gas reaction can produce certain gaseous by-product, and in described reactant, form the bubble of some, but due to the gas foam negligible amounts that described gaseous by-product produces, compared with formation first medium layer 300, number of bubbles in reactant obviously declines, so before described reactant solidify to form second dielectric layer 400, bubble in reactant can be overflowed completely from reactant, make to there is not air-gap in the final second dielectric layer 400 formed.
In other embodiments of the invention, also only after the first groove 110 inner wall surface carries out hydrophobic treatment, first medium layer 300 can be formed in the first groove 110, in the second groove 210, form second dielectric layer 400 simultaneously.
In other embodiments of the invention, another kind is also provided in the first groove, to form first medium layer, in the second groove, form the method for second dielectric layer.
Please refer to Fig. 5, form hydrophobic layer 500 at described first groove 110 and the second groove 210 inner wall surface.
Adopt chemical vapor deposition method or atom layer deposition process to form described hydrophobic layer 500, in the present embodiment, the material of described hydrophobic layer 500 is silicon.In the present embodiment, adopt chemical vapor deposition method to form described hydrophobic layer 500, concrete, the silicon source gas that described chemical vapor deposition method adopts is SiH
4or SiH
2cl
2deng silicon-containing compound, adopt H
2as carrier gas, reaction temperature is 600 DEG C ~ 1100 DEG C, and pressure is that 1 holder ~ 500 are held in the palm, and wherein the flow of silicon source gas is 1sccm ~ 1000sccm, H
2flow be 0.1slm ~ 50slm.Hydrophobic layer 500 surface that depositing operation is formed has hydrogen bond, and chemical property is comparatively stable, can not adsorbed water molecule, so described hydrophobic layer 500 surface has hydrophobicity, makes the first groove 110 and the second groove 210 have hydrophobicity inwall.
The thickness of described hydrophobic layer 500 is 1nm ~ 2nm, the dielectric coefficient of described hydrophobic layer 500 material is higher, but because the thickness of described hydrophobic layer 500 is lower, so the dielectric coefficient of the second dielectric layer formed in the first medium layer formed in the first groove 110 of follow-up formation, the second groove 210 is not affected substantially.
Please refer to Fig. 6, hydrophilic treated carried out to described second groove 210 inner wall surface, makes the hydrophobic layer 500(on described second area II please refer to Fig. 5) become hydrophilic layer 500a.
Before hydrophilic treated is carried out to the hydrophobic layer 500 of the second groove 210 inwall on described second area II; described first area I forms protective layer; described protective layer can protect hydrophobic layer 500 on described first area I by the impact of hydrophilic treated, and the material of described protective layer can be the material that photoresist etc. is suitable.
Described hydrophilic treated can adopt the method identical with previous embodiment, adopts described second groove 210 of solution cleaning with oxidation, makes the hydrophobic layer 500 on described second area II become hydrophilic layer 500a, described in there is oxidation solution can be NH
4oH and H
2o
2mixed aqueous solution or HCl and H
2o
2mixed aqueous solution.Described hydrophilic treated can make hydrophobic layer 500 surface form natural oxidizing layer, thus make hydrophobic layer 500a surface form Si-OH key, because hydroxyl (-OH) is hydrophilic radical, be easy to adsorbed water molecule, form hydrogen bond, thus make the hydrophobic layer 500 of the inner wall surface of described second groove 210 become hydrophilic layer 500a.
Please refer to Fig. 7, adopt flowable chemical vapor deposition method to please refer to Fig. 6 at described first groove 110() in formation there is the first medium layer 300 of air-gap 301, please refer to Fig. 6 at the second groove 210() in formation not there is the second dielectric layer 400 of air-gap.
The reactant of described flowable chemical vapor deposition method comprises the one in silane, disilane, methyl-monosilane, dimethylsilane, trimethyl silane, tetramethylsilane, tetraethoxysilane, triethoxysilane, octamethylcy-clotetrasiloxane, tetramethyl disiloxane, tetramethyl-ring tetrasiloxane, trimethylsilyl amine, dimethyl silanyl amine.Described reactant is the material with certain fluidity and viscosity higher, can be that described reactant fills full described first groove 110, second groove 210 by techniques such as spin coatings.
Described mobility chemical vapor deposition method also comprises: make described reactant at O
2, O
3, NO, H
2o steam, N
2, carry out annealing in process under one or more gases in He, Ar and at least there is in described gas a kind of gas containing O, the temperature of described annealing in process is 200 DEG C ~ 1200 DEG C.Finally make described reactant solidify to form silica in annealing process, form first medium layer 300 in the first groove 110 on the I of first area, in the second groove 210, form second dielectric layer 400.Described reactant is hydroaropic substance, because the inner wall surface of described first groove 110 has hydrophobic layer 500, so can be formed with air-gap 301 in the first medium layer 300 formed in described first groove 110; And described second groove 210 inner wall surface has hydrophilic layer 500a, so air-gap 301 can not be formed in the second dielectric layer 400 formed in described second groove 210.
In other embodiments of the invention, also the inner wall surface of the first groove 110 only on the I of first area hydrophobic layer 500 can be formed, described first groove 110 is made to have hydrophobicity inwall, and the inner wall surface portion of the second groove 110 is processed, or directly hydrophily process is carried out to the second groove 210 inner wall surface, and then in described first groove 110, form the first medium layer 300 with air-gap 301, in the second groove 210, form second dielectric layer 400.In other embodiments of the invention, described first medium layer 300 and second dielectric layer 400 also can separately be formed.
In sum, in embodiments of the invention, described Semiconductor substrate has first area, after hydrophobicity process is carried out on the first recess sidewall surface between the adjacent first grid structure in first area, described first groove is made to have hydrophobicity sidewall, mobility chemical vapor deposition method is adopted to form first medium layer again in described first groove, the reactant adopted due to described mobility chemical vapor deposition method is hydroaropic substance, described hydrophily reactant is in the process of filling first groove, because the sidewall surfaces of described first groove has hydrophobicity, described under surface tension effects, bubble small in a large number can be formed between described hydrophilic reactant and the sidewall surfaces of the first groove, make to remain gas between the sidewall of reactant and the first groove.Carry out in the process of annealing in process after the full described reactant of filling, on the one hand, between reactant and the first recess sidewall, bubble is subject to the impact of annealing temperature, reactant can be entered into, and multiple micro-bubble contacts and can form the larger bubble of diameter, described reactant is made to form larger bubble; On the other hand, in the process of annealing in oxygen-containing gas atmosphere, described reactant can react with oxygen-containing gas, oxygen element and the described reactant with mobility form the silica material that the formation of chemical bond such as-Si-H-,-Si-N-,-Si-H-N-in Si-O-Si key substituted reactant solidifies, and described reactant and oxygen-containing gas reaction can form N
2, NH
3, NO, NO
2etc. gaseous by-product, described gaseous by-product is also easy forms bubble in reactant.Because described reactant has larger viscosity, the quantity of above-mentioned bubble is more, and bubble may contact with each other the larger bubble of formation in motion process, so the movement rate in reactant is less, along with the carrying out of annealing process, reactant solidify to form first medium layer gradually, because number of bubbles is more, part bubble moves to reaction-ure surface and disappears in annealing process, and part bubble is then cured in first medium layer, forms air-gap.The dielectric coefficient of described air-gap is lower, can the average dielectric coefficient of lower described first medium layer, thus reduces the parasitic capacitance between the adjacent first grid on first area, thus improves the performance of the semiconductor device formed.
Further, described Semiconductor substrate also has second area, has the second groove, carry out hydrophilic treated to the sidewall surfaces of described second groove between the adjacent second grid structure on described second area, makes described second groove have hydrophily sidewall.Flowable chemical vapor deposition method is adopted to form second dielectric layer in the second groove.Reactant due to described mobility chemical vapor deposition method is hydroaropic substance, and described second groove has hydrophily inwall after hydrophilic treated, so under surface tension effects, contact-making surface between described hydrophilic reactant and the hydrophily inwall of the second groove is fitted completely, small bubble can not be there is, there is higher interface quality.Carry out after populated described reactant in the process of annealing in process, although reactant and anneal gas reaction can produce certain gaseous by-product, and in described reactant, form the bubble of some, but due to the gas foam negligible amounts that described gaseous by-product produces, compared with formation first medium layer, number of bubbles in reactant obviously declines, so before described reactant solidify to form second dielectric layer, bubble in reactant can be overflowed completely from reactant, makes to there is not air-gap in the final second dielectric layer formed.The described second medium layer material that there is not air-gap is dense, can avoid neighboring gates applies comparatively high working voltage time, the problem such as to puncture between neighboring gates.
So the formation method of the semiconductor structure in the present embodiment can be formed in zones of different has the first medium layer of low-k and the second dielectric layer of high-compactness, meets the requirement of device to parasitic capacitance of zones of different simultaneously.
Although the present invention discloses as above, the present invention is not defined in this.Any those skilled in the art, without departing from the spirit and scope of the present invention, all can make various changes or modifications, and therefore protection scope of the present invention should be as the criterion with claim limited range.
Claims (20)
1. a formation method for semiconductor structure, is characterized in that, comprising:
There is provided Semiconductor substrate, described Semiconductor substrate has first area, described first area is formed with the first grid structure of some projections, has the first groove between adjacent first grid structure;
Hydrophobic treatment is carried out to the first recess sidewall surface, makes the first groove have hydrophobicity sidewall;
Adopt mobility chemical vapor deposition method to form first medium layer in described first groove, the reactant that described mobility chemical vapor deposition method adopts is hydroaropic substance, has air-gap in described first medium layer.
2. the formation method of semiconductor structure according to claim 1, is characterized in that, described Semiconductor substrate also comprises second area, described second area is formed with the second grid structure of some projections, has the second groove between adjacent second grid structure.
3. the formation method of semiconductor structure according to claim 2, is characterized in that, also comprise: carry out hydrophilic treated to the second recess sidewall surface on described second area, make the second groove have hydrophily sidewall; Adopt mobility chemical vapor deposition method to form second dielectric layer in described second groove, in described second dielectric layer, there is no air-gap.
4. the formation method of semiconductor structure according to claim 3, it is characterized in that, before hydrophilic treated is carried out to the second recess sidewall, also comprise: while hydrophobic treatment is carried out to the first recess sidewall surface, hydrophobic treatment is carried out to the second recess sidewall surface; Then in the second groove, first medium layer is formed while forming first medium layer in the first groove; Remove the first medium layer in described second groove.
5. the formation method of semiconductor structure according to claim 3, it is characterized in that, hydrophobic treatment is being carried out to the sidewall surfaces of described first groove, after hydrophilic treated is carried out to the second recess sidewall surface, is forming described first medium layer and second dielectric layer simultaneously.
6. the formation method of semiconductor structure according to claim 1, is characterized in that, adopts wet treatment to carry out described hydrophobic treatment.
7. the formation method of semiconductor structure according to claim 6, is characterized in that, the solution of described wet treatment is hydrofluoric acid solution, and in described hydrofluoric acid solution, the volume range of deionized water and hydrofluoric acid is 50: 1 ~ 1000: 1.
8. the formation method of semiconductor structure according to claim 1, is characterized in that, the method for described hydrophobic treatment is form hydrophobic layer on the first recess sidewall surface.
9. the formation method of semiconductor structure according to claim 8, is characterized in that, described hydrophobic layer material is silicon.
10. the formation method of semiconductor structure according to claim 8, is characterized in that, described hydrophobic layer thickness is 1nm ~ 2nm.
The formation method of 11. semiconductor structures according to claim 3, is characterized in that, adopts wet treatment to carry out described hydrophilic treated.
The formation method of 12. semiconductor structures according to claim 11, is characterized in that, the solution that described hydrophilic treated adopts is NH
4oH and H
2o
2mixed aqueous solution.
The formation method of 13. semiconductor structures according to claim 12, is characterized in that, NH
4oH and H
2o
2concentration ratio be 1:0.5 ~ 1:2.
The formation method of 14. semiconductor structures according to claim 11, is characterized in that, the solution that described hydrophilic treated adopts is HCl and H
2o
2mixed aqueous solution.
The formation method of 15. semiconductor structures according to claim 14, is characterized in that, HCl and H
2o
2concentration ratio be 1:0.5 ~ 1:2.
The formation method of 16. semiconductor structures according to claim 1, is characterized in that, the diameter range of described air-gap is 2nm ~ 20nm.
The formation method of 17. semiconductor structures according to claim 1, it is characterized in that, the reactant that described mobility chemical vapor deposition method adopts comprises one or more in silane, disilane, methyl-monosilane, dimethylsilane, trimethyl silane, tetramethylsilane, tetraethoxysilane, triethoxysilane, octamethylcy-clotetrasiloxane, tetramethyl disiloxane, tetramethyl-ring tetrasiloxane, trimethylsilyl amine, dimethyl silanyl amine.
The formation method of 18. semiconductor structures according to claim 17, is characterized in that, described mobility chemical vapor deposition method also comprises: make described reactant at O
2, O
3, NO, H
2o steam, N
2, carry out annealing in process under one or more gases in He, Ar, and at least have a kind of gas containing O in described gas, the temperature of described annealing in process is 200 DEG C ~ 1200 DEG C.
The formation method of 19. semiconductor structures according to claim 2, it is characterized in that, described first grid structure comprises: the first grid dielectric layer being positioned at semiconductor substrate surface, the first grid being positioned at first grid dielectric layer surface, be positioned at the first side wall of first grid dielectric layer and first grid sidewall surfaces; Described second grid structure comprises: the second gate dielectric layer being positioned at semiconductor substrate surface, the second grid being positioned at second gate dielectric layer surface, be positioned at the second side wall of second gate dielectric layer and second grid sidewall surfaces.
The formation method of 20. semiconductor structures according to claim 19, is characterized in that, the material of described first side wall and the second side wall is silicon nitride.
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| US20050121794A1 (en) * | 1997-10-09 | 2005-06-09 | Werner Juengling | Semiconductor constructions |
| US20020130396A1 (en) * | 2001-03-14 | 2002-09-19 | Hawker Craig Jon | Nitrogen-containing polymers as porogens in the preparation of highly porous, low dielectric constant materials |
| CN101465318A (en) * | 2007-12-21 | 2009-06-24 | 东部高科股份有限公司 | Method for manufacturing a semiconductor device |
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