CN104951401B - 排序加速处理器、方法、系统和指令 - Google Patents

排序加速处理器、方法、系统和指令 Download PDF

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CN104951401B
CN104951401B CN201510090544.6A CN201510090544A CN104951401B CN 104951401 B CN104951401 B CN 104951401B CN 201510090544 A CN201510090544 A CN 201510090544A CN 104951401 B CN104951401 B CN 104951401B
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CN104951401A (zh
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S·格伦
V·克拉斯诺夫
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Intel Corp
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Intel Corp
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/06—Arrangements for sorting, selecting, merging, or comparing data on individual record carriers
    • G06F7/08—Sorting, i.e. grouping record carriers in numerical or other ordered sequence according to the classification of at least some of the information they carry
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/22—Arrangements for sorting or merging computer data on continuous record carriers, e.g. tape, drum, disc
    • G06F7/24—Sorting, i.e. extracting data from one or more carriers, rearranging the data in numerical or other ordered sequence, and rerecording the sorted data on the original carrier or on a different carrier or set of carriers sorting methods in general
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/22—Arrangements for sorting or merging computer data on continuous record carriers, e.g. tape, drum, disc
    • G06F7/36—Combined merging and sorting
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30196—Instruction operation extension or modification using decoder, e.g. decoder per instruction set, adaptable or programmable decoders

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
CN201510090544.6A 2014-03-28 2015-02-28 排序加速处理器、方法、系统和指令 Active CN104951401B (zh)

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US14/229,811 2014-03-28
US14/229,811 US9766888B2 (en) 2014-03-28 2014-03-28 Processor instruction to store indexes of source data elements in positions representing a sorted order of the source data elements

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US (2) US9766888B2 (enExample)
JP (2) JP6163171B2 (enExample)
KR (1) KR101787819B1 (enExample)
CN (2) CN104951401B (enExample)
DE (1) DE102015002215A1 (enExample)
GB (1) GB2524617B (enExample)
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Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11461096B2 (en) 2019-05-24 2022-10-04 Texas Instruments Incorporated Method and apparatus for vector sorting using vector permutation logic
US9606803B2 (en) 2013-07-15 2017-03-28 Texas Instruments Incorporated Highly integrated scalable, flexible DSP megamodule architecture
US10198264B2 (en) * 2015-12-15 2019-02-05 Intel Corporation Sorting data and merging sorted data in an instruction set architecture
US10007519B2 (en) * 2015-12-22 2018-06-26 Intel IP Corporation Instructions and logic for vector bit field compression and expansion
US9996361B2 (en) * 2015-12-23 2018-06-12 Intel Corporation Byte and nibble sort instructions that produce sorted destination register and destination index mapping
GB2548600B (en) * 2016-03-23 2018-05-09 Advanced Risc Mach Ltd Vector predication instruction
US11204764B2 (en) * 2016-03-31 2021-12-21 Intel Corporation Processors, methods, systems, and instructions to Partition a source packed data into lanes
EP4418136A3 (en) 2016-10-20 2024-11-20 INTEL Corporation Systems, apparatuses, and methods for fused multiply add
EP3526665B1 (en) 2016-11-14 2020-07-15 Google LLC Sorting for data-parallel computing devices
US10515302B2 (en) * 2016-12-08 2019-12-24 Via Alliance Semiconductor Co., Ltd. Neural network unit with mixed data and weight size computation capability
US20190102181A1 (en) * 2017-09-29 2019-04-04 Intel Corporation Apparatus and method for shifting and extracting packed data elements
US11176084B2 (en) * 2017-11-09 2021-11-16 International Business Machines Corporation SIMD instruction sorting pre-sorted source register's data elements into a first ascending order destination register and a second descending destination register
WO2019114842A1 (zh) 2017-12-14 2019-06-20 北京中科寒武纪科技有限公司 一种集成电路芯片装置
CN109961134B (zh) * 2017-12-14 2020-06-23 中科寒武纪科技股份有限公司 集成电路芯片装置及相关产品
US10768896B2 (en) * 2017-12-21 2020-09-08 Intel Corporation Apparatus and method for processing fractional reciprocal operations
US10534881B2 (en) 2018-04-10 2020-01-14 Advanced Micro Devices, Inc. Method of debugging a processor
US20200050452A1 (en) * 2018-08-11 2020-02-13 Intel Corporation Systems, apparatuses, and methods for generating an index by sort order and reordering elements based on sort order
US10691412B2 (en) 2018-08-31 2020-06-23 International Business Machines Corporation Parallel sort accelerator sharing first level processor cache
US10579332B1 (en) 2018-08-31 2020-03-03 International Business Machines Corporation Hardware sort accelerator sharing first level processor cache
US10725738B2 (en) 2018-08-31 2020-07-28 International Business Machines Corporation Adaptive sort accelerator sharing first level processor cache
US10922080B2 (en) * 2018-09-29 2021-02-16 Intel Corporation Systems and methods for performing vector max/min instructions that also generate index values
JP6687700B2 (ja) * 2018-10-05 2020-04-28 楽天株式会社 情報処理装置、情報処理方法およびプログラム
US11163564B1 (en) * 2018-10-08 2021-11-02 Verisilicon Microelectronics (Shanghai) Co., Ltd. Vector compare and store instruction that stores index values to memory
US10831503B2 (en) * 2018-11-06 2020-11-10 International Business Machines Corporation Saving and restoring machine state between multiple executions of an instruction
US10831502B2 (en) 2018-11-06 2020-11-10 International Business Machines Corporation Migration of partially completed instructions
US10831478B2 (en) * 2018-11-06 2020-11-10 International Business Machines Corporation Sort and merge instruction for a general-purpose processor
US12393399B2 (en) 2018-11-06 2025-08-19 International Business Machines Corporation Controlling storage accesses for merge operations
CN111240682B (zh) * 2018-11-28 2024-11-08 深圳市中兴微电子技术有限公司 一种指令数据的处理方法及装置、设备、存储介质
US20220129270A1 (en) * 2020-10-23 2022-04-28 Marvell Asia Pte Ltd Method and system for topk operation
US11593106B1 (en) 2021-09-24 2023-02-28 Apple Inc. Circuits and methods for vector sorting in a microprocessor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101208658A (zh) * 2005-04-08 2008-06-25 艾色拉公司 数据访问和置换单元
US7962718B2 (en) * 2007-10-12 2011-06-14 Freescale Semiconductor, Inc. Methods for performing extended table lookups using SIMD vector permutation instructions that support out-of-range index values
CN104094182A (zh) * 2011-12-23 2014-10-08 英特尔公司 掩码置换指令的装置和方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0731588B2 (ja) 1984-12-12 1995-04-10 株式会社日立製作所 ベクトル処理装置
US5907842A (en) 1995-12-20 1999-05-25 Intel Corporation Method of sorting numbers to obtain maxima/minima values with ordering
US6036350A (en) 1995-12-20 2000-03-14 Intel Corporation Method of sorting signed numbers and solving absolute differences using packed instructions
US6041404A (en) 1998-03-31 2000-03-21 Intel Corporation Dual function system and method for shuffling packed data elements
US6636167B1 (en) 2000-10-31 2003-10-21 Intel Corporation Method of generating Huffman code length information
US7155601B2 (en) 2001-02-14 2006-12-26 Intel Corporation Multi-element operand sub-portion shuffle instruction execution
US7725678B2 (en) 2005-02-17 2010-05-25 Texas Instruments Incorporated Method and apparatus for producing an index vector for use in performing a vector permute operation
US7536532B2 (en) * 2006-09-27 2009-05-19 International Business Machines Corporation Merge operations of data arrays based on SIMD instructions
US20080104374A1 (en) 2006-10-31 2008-05-01 Motorola, Inc. Hardware sorter
US7908283B2 (en) 2007-08-29 2011-03-15 Red Hat, Inc. Finding superlatives in an unordered list
US20130212354A1 (en) * 2009-09-20 2013-08-15 Tibet MIMAR Method for efficient data array sorting in a programmable processor
DE102009047389A1 (de) 2009-12-02 2011-06-09 Robert Bosch Gmbh Verbindung zwischen einem ersten Bauteil und einem zweiten Bauteil
KR101662769B1 (ko) 2010-03-09 2016-10-05 삼성전자주식회사 고속 정렬 장치 및 방법
US8838935B2 (en) 2010-09-24 2014-09-16 Intel Corporation Apparatus, method, and system for implementing micro page tables
US8812516B2 (en) 2011-10-18 2014-08-19 Qualcomm Incorporated Determining top N or bottom N data values and positions
CN104011644B (zh) 2011-12-22 2017-12-08 英特尔公司 用于产生按照数值顺序的相差恒定跨度的整数的序列的处理器、方法、系统和指令

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101208658A (zh) * 2005-04-08 2008-06-25 艾色拉公司 数据访问和置换单元
US7962718B2 (en) * 2007-10-12 2011-06-14 Freescale Semiconductor, Inc. Methods for performing extended table lookups using SIMD vector permutation instructions that support out-of-range index values
CN104094182A (zh) * 2011-12-23 2014-10-08 英特尔公司 掩码置换指令的装置和方法

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JP2015191659A (ja) 2015-11-02
KR20150112781A (ko) 2015-10-07
CN104951401A (zh) 2015-09-30
GB2524617A (en) 2015-09-30
GB201500857D0 (en) 2015-03-04
JP6163171B2 (ja) 2017-07-12
TWI587215B (zh) 2017-06-11
TW201602904A (zh) 2016-01-16
DE102015002215A1 (de) 2015-10-01
US20180004520A1 (en) 2018-01-04
US9766888B2 (en) 2017-09-19
US20150277912A1 (en) 2015-10-01
JP2017157244A (ja) 2017-09-07
GB2524617B (en) 2017-09-27
KR101787819B1 (ko) 2017-10-18
CN109240744A (zh) 2019-01-18

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