CN104934291B - A kind of method for handling abnormal chip - Google Patents
A kind of method for handling abnormal chip Download PDFInfo
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- CN104934291B CN104934291B CN201410105748.8A CN201410105748A CN104934291B CN 104934291 B CN104934291 B CN 104934291B CN 201410105748 A CN201410105748 A CN 201410105748A CN 104934291 B CN104934291 B CN 104934291B
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- 230000002159 abnormal effect Effects 0.000 title claims abstract description 77
- 238000000034 method Methods 0.000 title claims abstract description 51
- 239000004642 Polyimide Substances 0.000 claims abstract description 99
- 229920001721 polyimide Polymers 0.000 claims abstract description 99
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 41
- 238000005530 etching Methods 0.000 claims abstract description 40
- 238000012545 processing Methods 0.000 claims abstract description 36
- 238000011161 development Methods 0.000 claims abstract description 9
- 239000004065 semiconductor Substances 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 12
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 11
- 239000004952 Polyamide Substances 0.000 claims description 7
- 229920002647 polyamide Polymers 0.000 claims description 7
- 230000008569 process Effects 0.000 claims description 7
- 238000005516 engineering process Methods 0.000 claims description 6
- 238000001039 wet etching Methods 0.000 claims description 5
- 239000007788 liquid Substances 0.000 claims description 4
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 238000004140 cleaning Methods 0.000 abstract description 9
- 230000008859 change Effects 0.000 abstract description 6
- 230000000694 effects Effects 0.000 abstract description 6
- 238000004519 manufacturing process Methods 0.000 abstract description 6
- 208000027418 Wounds and injury Diseases 0.000 abstract description 3
- 230000004888 barrier function Effects 0.000 abstract description 3
- 208000014674 injury Diseases 0.000 abstract description 3
- 238000012913 prioritisation Methods 0.000 description 9
- 239000007789 gas Substances 0.000 description 8
- 229960002050 hydrofluoric acid Drugs 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 150000002466 imines Chemical class 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000004377 microelectronic Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 239000011241 protective layer Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 238000004528 spin coating Methods 0.000 description 3
- 238000001312 dry etching Methods 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 239000009798 Shen-Fu Substances 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 150000001412 amines Chemical class 0.000 description 1
- 230000001458 anti-acid effect Effects 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 239000008367 deionised water Substances 0.000 description 1
- 229910021641 deionized water Inorganic materials 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 238000011010 flushing procedure Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 150000003949 imides Chemical class 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
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- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Drying Of Semiconductors (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
Abstract
The present invention provides a kind of method for handling abnormal chip, and the method for the abnormal chip of processing includes at least the step of removing wafer surface cured polyimides, which includes at least：There is provided has the abnormal chip of protection zone, formed with cured polyimides on the protection zone；Positive photoresist is applied on the abnormal chip and polyimide surface；The positive photoresist is exposed by the first mask plate, the polyimides on the protection zone is exposed after development；The polyimides of the exposure is removed using etching technics etching；Remove the positive photoresist.The mode for removing polyimides is changed to etch by the present invention by traditional cleaning, and the cured polyimides of abnormal wafer surface can be fallen with thorough cleaning；Positive photoresist plays barrier effect in etching processing, and protection chip surface is injury-free, carries out reworked processing so as to fulfill to the abnormal chip after polyimide curing, avoids wafer scrap；And the present invention need not change manufacturing process and bench structure, industrial cost is low.
Description
Technical field
The present invention relates to technical field of manufacturing semiconductors, is related to a kind of method for handling abnormal chip, more particularly to one
The method that kind removes the cured polyimides of abnormal wafer surface.
Background technology
Polyimides（Polyimide）It is widely used, is being made in microelectronics industry with the performance that its is excellent
Make the passivation protection that can be used as all kinds of devices in industry and inter-level dielectric etc..Protective layer of the polyimides as microelectronic component,
A- particles can be shielded, the soft error of abatement device, reduces influence of the environment to device, can improve microelectronic component and resist badly
The ability of environment.Polyimides or a kind of negative photoresist, itself had not only played photoresist but also is dielectric material, was preparing
Without applying extra photoresist in polyimide surface during polyimide covercoat, process is substantially reduced.
In integrated circuit fabrication process, can firmly it be attached to after polyimide curing shaping on device, to device
Play a protective role, still, chip can usually be found various abnormal conditions, for example go out during test after the completion of preliminary manufacture
Existing electrical property is abnormal, residual particles are too many etc..Once exception occurs in chip, then need to carry out reworked processing to abnormal chip.
The first step of reworked processing is to remove the protective layer polyimides of abnormal wafer surface, but the polyamides after curing
Imines has the characteristics such as antiacid anticorrosive high temperature resistant, and good with the adhesiveness of chip, causes the polyamides after curing molding sub-
Amine is difficult to remove.Until current chip abnormality processing is still the problem of industry, chip is done over again, and success rate is very low, and scrappage reaches
More than 95%, enterprises' loss is serious, and cost increases substantially.
In the prior art if it find that chip can be carried out by the way that polyimides is cleaned multiple times extremely after polyimide curing
Reworked processing, but the polyimides that the chip after doing over again still has large area remains, and carries out by force after technique is cleaned multiple times, on chip
Polyimides residual still receives on a small quantity, but chip surface can be serious due to cleaning damage, and abnormal chip can still be scrapped.
Therefore it provides a kind of method that method of the abnormal chip of improved processing especially removes polyimides is this area
Technical staff needs the problem solved.
The content of the invention
In view of the foregoing deficiencies of prior art, it is an object of the invention to provide a kind of side for handling abnormal chip
Method, is not thorough for solving to remove when cleaning in the prior art removes abnormal wafer surface cured polyimides, removes polyamides
The problem of abnormal wafer surface causes abnormal wafer scrap is damaged during imines.
In order to achieve the above objects and other related objects, the present invention provides a kind of method for handling abnormal chip, the place
The method of the abnormal chip of reason includes at least the step of removing wafer surface cured polyimides, which includes at least：
There is provided has the abnormal chip of protection zone, formed with cured polyimides on the protection zone；
Positive photoresist is applied on the abnormal chip and polyimide surface；
The positive photoresist is exposed by the first mask plate, the polyamides on the protection zone is exposed after development
Imines；
The polyimides of the exposure is removed using etching technics etching；
Remove the positive photoresist.
A kind of prioritization scheme of the method for the abnormal chip of processing as the present invention, the exception chip are served as a contrast including semiconductor
Bottom and the circuit structure for being formed in the semiconductor substrate surface.
A kind of prioritization scheme of the method for the abnormal chip of processing as the present invention, forms cured on the protection zone
The step of polyimides, includes：
First, the coating polyimide on the semiconductor substrate structure；Secondly, by the second mask plate to the polyamides
Imines is exposed, and the polyimides is formed on the protection zone of semiconductor substrate structure after development；Finally, on protection zone
Polyimides carry out baking-curing.
A kind of prioritization scheme of the method for the abnormal chip of processing as the present invention, first mask plate and the second mask
Plate is same mask plate.
A kind of prioritization scheme of the method for the abnormal chip of processing as the present invention, the thickness range of the polyimides are
10~90 μm.
A kind of prioritization scheme of the method for the abnormal chip of processing as the present invention, the model of the positive photoresist
PFI58 or AR89.
A kind of prioritization scheme of the method for the abnormal chip of processing as the present invention, using dry or wet etch technique pair
The polyimides performs etching.
As a kind of prioritization scheme of the method for the abnormal chip of processing of the present invention, etched using wet-etching technology described in
Polyimides, etching liquid use hydrofluoric acid.
As a kind of prioritization scheme of the method for the abnormal chip of processing of the present invention, etched using dry etch process described in
Polyimides, the gas of etching use fluoro-gas.
A kind of prioritization scheme of the method for the abnormal chip of processing as the present invention, the fluoro-gas is CF4、CHF3Or
C3F8。
As described above, the method for the abnormal chip of the processing of the present invention, including remove the cured polyimides of wafer surface
Step, the step include at least：There is provided has the abnormal chip of protection zone, sub- formed with cured polyamides on the protection zone
Amine；Positive photoresist is applied on the abnormal chip and polyimide surface；By the first mask plate to the positive-tone photo
Glue is exposed and develops, and exposes the polyimides on the protection zone；The exposure is removed using etching technics etching
Polyimides；Remove the positive photoresist.The mode for removing polyimides is changed to etch by the present invention by traditional cleaning, can
The cured polyimides of abnormal wafer surface is fallen with thorough cleaning；Positive photoresist plays barrier effect in etching processing, protects
Shield chip surface is injury-free, carries out reworked processing so as to fulfill to the abnormal chip after polyimide curing, avoids chip report
It is useless；And the present invention need not change manufacturing process and bench structure, industrial cost is low.
Brief description of the drawings
Fig. 1 is the process flow diagram of the method for the abnormal chip of present invention processing.
Fig. 2~Fig. 4 is the structure diagram that cured polyimides is formed in the method for the abnormal chip of present invention processing.
Fig. 5~Fig. 9 is to remove cured polyimides schematic diagram in the method for the abnormal chip of present invention processing.
Component label instructions
1 abnormal chip
11 Semiconductor substrates
12 circuit structures
2 polyimides
3 second mask plates
4 positive photoresists
5 first mask plates
Embodiment
Illustrate embodiments of the present invention below by way of specific instantiation, those skilled in the art can be by this specification
Disclosed content understands other advantages and effect of the present invention easily.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also be based on different viewpoints with application, without departing from
Various modifications or alterations are carried out under the spirit of the present invention.
Refer to attached drawing.It should be noted that only explanation is of the invention in a schematic way for the diagram provided in the present embodiment
Basic conception, only the display component related with the present invention rather than component count, shape during according to actual implementation in schema then
Shape and size are drawn, and kenel, quantity and the ratio of each component can be a kind of random change during its actual implementation, and its component cloth
Office's kenel may also be increasingly complex.
The present invention provides a kind of method for handling abnormal chip, as shown in Figure 1, the method for the abnormal chip of the processing includes
The step of removing wafer surface cured polyimides, which includes at least：
First, there is provided there is the abnormal chip of protection zone, formed with cured polyimides on the protection zone；
Secondly, positive photoresist is applied on the abnormal chip and polyimide surface；
Then, the positive photoresist is exposed by the first mask plate, is exposed after development on the protection zone
Polyimides；
Then, the polyimides of the exposure is removed using etching technics etching；
Finally, the positive photoresist is removed.
The method for specifically describing the abnormal chip of processing of the present invention below in conjunction with the accompanying drawings.
Step 1 is first carried out, asks Shenfu Fig. 4, there is provided there is the abnormal chip 1 of protection zone, on the protection zone formed with
Cured polyimides 2.
The exception chip 1 includes Semiconductor substrate 11 and the circuit structure for being formed in 11 surface of Semiconductor substrate
12.Wherein, the Semiconductor substrate 11 can be silicon substrate or silicon-on-insulator（SOI）, in the present embodiment, the semiconductor lining
Bottom 11 is preferably silicon substrate.The circuit structure 12 is that subsequent growth has the function of certain device on the silicon substrate 11
Structure, such as, source electrode, drain electrode, grid and metal interconnecting wires etc. are included in circuit structure.According to the needs of actual wafer,
Some circuit structures need to be protected, it is necessary to which those circuit structures protected are defined as protecting in its surface making polyimides 2
Protect area.
Fig. 2~Fig. 4 is referred to, is specially in the step of formation polyimides 2 on the protection zone：
First in abnormal 1 coating polyimide 2 of chip, as shown in Fig. 2, the polyimides 2 covers whole chip 1
Surface；Then the polyimides 2 is exposed by the second mask plate 3, as shown in Figure 3；Due to the polyimides 2
Body is that therefore, the polyimides 2 being exposed will not be dissolved by the developing as a kind of negative photoresist, described poly- after development
Acid imide 2 is formed on the protection zone of abnormal chip 1, as shown in Figure 4；Finally, the polyimides 2 on protection zone is toasted
It is allowed to cure, the polyimides 2 after curing has very strong adhesiveness with chip, it is possible to achieve the protection to circuit structure.
It should be noted that the polyimides 2 itself can be used as a kind of negative photoresist, therefore, on protection zone
It is not required extra photoresist just can directly be patterned to polyimides 2 when making polyimides 2, reduces process, saves
Cost.
The thickness of the polyimides 2 formed on the protection zone is in 10~90 μ ms, in the present embodiment, the thickness
Degree can be 60 μm.
Secondly step 2 is performed, positive photoresist is applied on the abnormal chip and polyimide surface.
The abnormal chip 1 that surface has formed 2 protective layer of polyimides is being examined by technical staff by various detection means
Measure after exception, it is necessary to carry out reworked processing, the polyimides 2 that will be cured removes, with the internal structure to abnormal chip 1
Repaired.
Specifically, positive photoresist 4 is applied on abnormal 2 surface of chip 1 and polyimides by the way of spin coating,
Structure after spin coating positive photoresist 4 is as shown in Figure 5.The model of the positive photoresist 4 of spin coating can be PFI58 or AR89.
In the present embodiment, using model AR89.Positive photoresist 4.
Then step 3 is performed, the positive photoresist is exposed by the first mask plate, institute is exposed after development
State the polyimides on protection zone.
Attached drawing 6 and attached drawing 7 are referred to, the first mask plate 5 and the second mask plate 3 in step 1 used in the step can
To be same mask plate, as shown in Figure 6.The positive photoresist 4 on abnormal 1 protection zone of chip is exposed by the mask plate
Light, the positive photoresist 4 of exposure remove after developing solution dissolution, are follow-up so as to expose the polyimides 2 on protection zone
Polyimides 2 on etching protection zone is prepared.
Then step 4 is performed, the polyimides of the exposure is removed using etching technics etching.
The positive photoresist 2 not being dissolved by the developing in above-mentioned steps three is covered in the area beyond abnormal 1 protection zone of chip
Domain, carry out polyimides 2 etch when from barrier effect, can be conducive to protect to avoid damage of the etching technics to wafer surface
Hold wafer surface characteristics.
The polyimides 2 can be removed to etch using dry etching or wet-etching technology.
In one embodiment, the polyimides 2 is performed etching using wet-etching technology, the etching liquid used is hydrogen
Fluoric acid, etch period is in the range of tens seconds.Specifically, the etching technics is molten as wet etching using diluted hydrofluoric acid
Liquid, the concentration range of the hydrofluoric acid solution is 45：1~55:1；The temperature performed etching is in the range of 20~30 DEG C；Wet method is carved
The time of erosion is in the range of 8~15 seconds.More specifically, the concentration of the hydrofluoric acid solution is preferably 50:1；The temperature of etching
Preferably 23 DEG C；The time of etching is preferably 10 seconds.
In another embodiment, the polyimides 2 is performed etching using dry etch process, it is specifically, described dry
Method etching is carried out in etching reaction intracavitary, and using etching gas, the fluoro-gas can be CF for fluorine-containing gas4Or CHF3
Or C3F8.The range of flow of the etching gas is 50~100sccm, and the time for carrying out dry etching is about tens seconds.More have
Body, the flow of the etching gas is preferably 80sccm.
It should also be noted that, specifically adopted, it is necessary to the abnormal progress of chip 1 cleaning step after the etching technics
The abnormal chip 1 is rinsed with deionized water, the time of flushing is 5~10 minutes, then the abnormal chip 1 is carried out
Drying.
Structure after the polyimides 2 of etching removal protection zone is as shown in Figure 8.
Step 5 is finally performed, removes the positive photoresist.
The positive photoresist 4 can be removed by the method for ashing or chemistry.In the present embodiment, using cineration technics
The positive photoresist 4 is removed, as shown in Figure 9.
In conclusion the present invention provides a kind of method for handling abnormal chip, this method includes removal wafer surface and consolidates
The step of polyimides of change, include at least：There is provided has the abnormal chip of protection zone, formed with cured on the protection zone
Polyimides；Positive photoresist is applied on the abnormal chip and polyimide surface；By the first mask plate to it is described just
Property photoresist is exposed and develops, and exposes the polyimides on the protection zone；Using described in etching technics etching removal
Exposed polyimides；Remove the positive photoresist.The mode for removing polyimides is changed to by the present invention by traditional cleaning
Etching, can fall the cured polyimides of abnormal wafer surface with thorough cleaning；Positive photoresist plays stop in etching processing
Effect, protection chip surface is injury-free, carries out reworked processing so as to fulfill to the abnormal chip after polyimide curing, avoids
Wafer scrap；And the present invention need not change manufacturing process and bench structure, industrial cost is low.
So the present invention effectively overcomes various shortcoming of the prior art and has high industrial utilization.
The above-described embodiments merely illustrate the principles and effects of the present invention, not for the limitation present invention.It is any ripe
Know the personage of this technology all can carry out modifications and changes under the spirit and scope without prejudice to the present invention to above-described embodiment.Cause
This, those of ordinary skill in the art is complete without departing from disclosed spirit and institute under technological thought such as
Into all equivalent modifications or change, should by the present invention claim be covered.
Claims (8)
- A kind of 1. method for handling abnormal chip, it is characterised in that the method for the abnormal chip of processing is brilliant including at least removing The step of polyimides of piece surface cure, the step include at least：Abnormal chip with protection zone is provided, is provided with using the exposure of the second mask plate, development and dries on the protection zone The roasting cured polyimides formed, wherein, the polyimides also serves as a kind of negative photoresist；Positive photoresist is applied on the abnormal chip and polyimide surface；The positive photoresist is exposed by the first mask plate, the polyamides exposed after development on the protection zone is sub- Amine, first mask plate are identical mask plate with second mask plate；The polyimides of the exposure is removed using etching technics etching；Remove the positive photoresist.
- 2. the method for the abnormal chip of processing according to claim 1, it is characterised in that：The exception chip includes semiconductor Substrate and the circuit structure for being formed in the semiconductor substrate surface.
- 3. the method for the abnormal chip of processing according to claim 1, it is characterised in that：Formed and cured on the protection zone Polyimides the step of include：First, in the surface coating polyimide of the abnormal chip；Secondly, by the second mask plate to the polyimides into Row exposure, the polyimides is formed on the protection zone of abnormal chip after development；Finally, to the polyimides on protection zone into Row baking-curing.
- 4. the method for the abnormal chip of processing according to claim 1, it is characterised in that：The thickness of the cured polyimides It is 10~90 μm to spend scope.
- 5. the method for the abnormal chip of processing according to claim 1, it is characterised in that：Using dry or wet etch technique The polyimides is performed etching.
- 6. the method for the abnormal chip of processing according to claim 5, it is characterised in that：Institute is etched using wet-etching technology Polyimides is stated, etching liquid uses hydrofluoric acid.
- 7. the method for the abnormal chip of processing according to claim 5, it is characterised in that：Institute is etched using dry etch process Polyimides is stated, the gas of etching uses fluoro-gas.
- 8. according to the method for the abnormal chip of processing described in claim 7, it is characterised in that：The fluoro-gas is CF4、CHF3Or C3F8。
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| CN201410105748.8A CN104934291B (en) | 2014-03-20 | 2014-03-20 | A kind of method for handling abnormal chip |
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| CN201410105748.8A CN104934291B (en) | 2014-03-20 | 2014-03-20 | A kind of method for handling abnormal chip |
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| CN104934291B true CN104934291B (en) | 2018-05-04 |
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| CN106128939B (en) * | 2016-08-01 | 2018-10-26 | 上海华虹宏力半导体制造有限公司 | The method of the abnormal MIM capacitor dielectric layer of processing |
| CN107768232B (en) * | 2016-08-23 | 2020-03-13 | 中芯国际集成电路制造(上海)有限公司 | Method for removing protective layer on surface of device |
| CN107919267B (en) * | 2016-10-10 | 2021-02-19 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device and manufacturing method thereof |
| CN108321085B (en) * | 2017-01-17 | 2021-04-23 | 中芯国际集成电路制造(上海)有限公司 | Method for removing polyimide layer and method for manufacturing semiconductor device |
Citations (5)
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