CN104901844A - High precision timestamp acquisition method based on PCIE, device and network card - Google Patents

High precision timestamp acquisition method based on PCIE, device and network card Download PDF

Info

Publication number
CN104901844A
CN104901844A CN201510240376.4A CN201510240376A CN104901844A CN 104901844 A CN104901844 A CN 104901844A CN 201510240376 A CN201510240376 A CN 201510240376A CN 104901844 A CN104901844 A CN 104901844A
Authority
CN
China
Prior art keywords
clock
high precision
time stamps
adjustment
local
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201510240376.4A
Other languages
Chinese (zh)
Other versions
CN104901844B (en
Inventor
邹昕
周立
张家琦
金暐
黄文廷
李应博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Computer Network and Information Security Management Center
Original Assignee
National Computer Network and Information Security Management Center
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Computer Network and Information Security Management Center filed Critical National Computer Network and Information Security Management Center
Priority to CN201510240376.4A priority Critical patent/CN104901844B/en
Publication of CN104901844A publication Critical patent/CN104901844A/en
Application granted granted Critical
Publication of CN104901844B publication Critical patent/CN104901844B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/08Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/04Processing captured monitoring data, e.g. for logfile generation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Environmental & Geological Engineering (AREA)
  • Data Mining & Analysis (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

The present invention provides a high precision timestamp acquisition method based on PCIE (peripheral component interconnect express), a device and a network card. The method comprises a packet high speed sending step of sending a network data packet to a user mode program through the PCIE by using a zero copy mode, and a timestamp adding step of adding a timestamp to each network data packet at a media independent interface MII, wherein the MII is between a media access control (MAC) layer and a physical layer PHY. The high precision timestamp is obtained in the network data packet high speed uploading process.

Description

The High Precision Time Stamps acquisition methods of Based PC IE, device and network interface card
Technical field
The present invention relates to computer network testing technical field, particularly relate to the High Precision Time Stamps acquisition methods of a kind of Based PC IE, device and network interface card.
Background technology
Peripheral assembly high speed interconnect (Peripheral Component Interconnect Express, is abbreviated as PCIE) is a kind of emerging bus and interface standard.The great advantage of this standard is that message transmission rate is high, and disclosed maximum transmission rate can reach more than 10GB/s at present, and current form is also had sizable development potentiality.The network interface card of Based PC IE can provide high speed flow transmission channel for server, but only can ensure the high-speed transfer of network data, can not realize network data in time-related Accurate Analysis and measurement.
At present, occur being applicable to small scale network data flow at time-related analysis and test, but these prior aries are only applicable to the analysis of data flow on a small scale, time precision is not high, can not be suitable for Accurate Analysis and the measurement of high-speed transfer network data flow yet.Therefore, need the High Precision Time Stamps acquisition methods of a kind of Based PC IE, to solve the above-mentioned technical problem existed in prior art.
Summary of the invention
The invention provides the High Precision Time Stamps acquisition methods of a kind of Based PC IE, device and network interface card, in the process of network packet high-speed uploading, obtain High Precision Time Stamps.
The technical solution used in the present invention is:
Based on a High Precision Time Stamps acquisition methods of peripheral assembly high speed interconnect PCIE, it comprises: message high speed send step: adopt zero-copy pattern by SCN Space Cable Network packet on PCIE to User space program; Add a cover timestamp step: add a cover timestamp at Media Independent Interface MII to each network packet, wherein said MII is between media interviews mac layer and physical layer PHY.
Preferably, before adding a cover timestamp step, described method also comprises: clock synchronous step: adopt IEEE1588 clock synchronization protocol by synchronize local clocks in high accuracy real-time clock.
Preferably, also comprise before clock synchronous step: clock frequency dynamic adjustment step: the time deviation calculating local clock and high accuracy real-time clock according to IEEE1588 clock synchronization protocol; By multiple time deviation of sampling, obtain the deviation average of multiple time deviation; According to described deviation average adjustment local clock cycles.
Preferably, according in described deviation average adjustment local clock cycles, calculate the local clock cycles after adjustment as follows, next_clyce=inc_intg+ (inc_num/inc_den), wherein, next_clyce is the local clock cycles after adjustment; Inc_intg is the local clock cycles before adjustment; Inc_num is the mean value of clock jitter; Inc_den is local clock crystal oscillator frequency.
Preferably, described network packet, comprising: NIC driver bag.
In addition, present invention also offers the High Precision Time Stamps acquisition device of a kind of Based PC IE, it comprises: message high speed send module: for adopting zero-copy pattern by SCN Space Cable Network packet on PCIE to User space program; Add a cover timestamp module: for adding a cover timestamp at Media Independent Interface MII to each network packet, wherein said MII is between media interviews mac layer and physical layer PHY.
Preferably, described High Precision Time Stamps acquisition device also comprises clock synchronization module, before adding a cover timestamp at Media Independent Interface MII to each network packet, adopts IEEE1588 clock synchronization protocol by synchronize local clocks in high accuracy real-time clock.
Preferably, described clock synchronization module also comprises clock frequency dynamic conditioning module, for: the time deviation calculating local clock and high accuracy real-time clock according to IEEE1588 clock synchronization protocol; By multiple time deviation of sampling, obtain the deviation average of multiple time deviation; According to described deviation average adjustment local clock cycles.
Preferably, described clock frequency dynamic conditioning module, also for, calculate the local clock cycles after adjustment as follows, next_clyce=inc_intg+ (inc_num/inc_den), wherein, next_clyce is the local clock cycles after adjustment; Inc_intg is the local clock cycles before adjustment; Inc_num is the mean value of clock jitter; Inc_den is local clock crystal oscillator frequency.
In addition, present invention also offers a kind of network interface card, wherein, described network interface card comprises High Precision Time Stamps acquisition device as described above.
Adopt technique scheme, the present invention at least has following effect:
In High Precision Time Stamps acquisition methods of the present invention, using network interface card as the auxiliary device of server, by PCIE, a large amount of network packet is delivered to server at high speed, for server, testing and analyzing is carried out to the flow of network packet.On employing PCIE, the uploading rate of SCN Space Cable Network packet can up to 10G.In addition, this High Precision Time Stamps acquisition methods the Media Independent Interface between MAC layer and physical chip packet-by-packet can add a cover timestamp to the network packet in network traffic data, thus for the measuring and analysis of the data traffic of server provides High Precision Time Stamps.Further, adopt IEEE1588 clock synchronization protocol by synchronize local clocks in high accuracy real-time clock, guarantee that the precision of timestamp can reach nanosecond, for the measurement of network traffic data and analysis provide accuracy guarantee.
Accompanying drawing explanation
Fig. 1 is the flow chart of the High Precision Time Stamps acquisition methods of the first embodiment of the present invention;
Fig. 2 is the flow chart of the High Precision Time Stamps acquisition methods of the second embodiment of the present invention;
Fig. 3 is the block diagram of the High Precision Time Stamps acquisition device of the third embodiment of the present invention;
Fig. 4 is the block diagram of the High Precision Time Stamps acquisition device of the fourth embodiment of the present invention;
Fig. 5 is the block diagram of the High Precision Time Stamps acquisition device of the fifth embodiment of the present invention.
Embodiment
For further setting forth the present invention for the technological means reaching predetermined object and take and effect, below in conjunction with accompanying drawing and preferred embodiment, the present invention is described in detail as after.
The High Precision Time Stamps acquisition methods of Based PC IE provided by the invention under the state ensureing network packet high-speed uploading, can obtain High Precision Time Stamps.High Precision Time Stamps acquisition methods of the present invention and each step thereof will be described in detail belows.
First embodiment
As shown in Figure 1, the High Precision Time Stamps acquisition methods in the present embodiment comprise message at a high speed on send step S10 and add a cover timestamp step S20.Wherein, message high speed send step S10: adopt zero-copy pattern by SCN Space Cable Network packet on PCIE to User space program.Zero-copy pattern is adopted to be on network packet is direct by network interface card, deliver to the User space program of server, User space program is delivered on not direct through protocol stack due to network packet, decrease the number of times of network packet copy, uploading rate, up to 10G, improves the speed of network packet transmission.In the measurement of large scale network data traffic and in analyzing, PCIE is that the high-speed transfer of data provides strong guarantee.
In order to realize network traffic data in time-related test, need to add a cover timestamp to network packet, timestamp is used for the transmission of record data bag and time of reception, and High Precision Time Stamps can be the measurement of the network parameters such as network delay, bandwidth and shake and analysis provides solid foundation.Particularly, add a cover timestamp step S20: add a cover timestamp at Media Independent Interface MII to each network packet, wherein MII is between media interviews mac layer and physical layer PHY.The method of hardware detection PTP frame is the most accurate, and add a cover timestamp at this Media Independent Interface place, accurately can add a cover timestamp on each packet, the precision of adding a cover timestamp can reach nanosecond, for the measurement of data traffic and analysis provide accuracy guarantee.
As seen through the above analysis, in the High Precision Time Stamps acquisition methods of the present embodiment, PCIE is combined with High Precision Time Stamps, for the test of large scale network data traffic and analysis provide solution effectively.
After the CPU of follow-up network interface card extracts above-mentioned timestamp, above deliver to server, completed the analysis and test of network traffic data associated time aspect by server according to this timestamp.Wherein the extraction of timestamp with reference to the general extraction methods of timestamp in prior art, can not repeat them here.
Preferably, network packet, comprising: NIC driver bag.The object of NIC driver bag high-speed uploading is Fast Installation NIC driver, thus can the high-speed uploading of network packet.
Second embodiment
As shown in Figure 2, in the present embodiment, before adding a cover timestamp step S20, High Precision Time Stamps acquisition methods also comprises clock synchronous step S30: adopt IEEE1588 clock synchronization protocol by synchronize local clocks in high accuracy real-time clock.The frequency of high accuracy real-time clock is 500MHz, ensure that the time precision of timestamp itself.
Adopt 1588 time synchronization protocols by the synchronize local clocks of network interface card in high accuracy real-time clock, because the crystal oscillator frequency of local clock and the crystal oscillator frequency of high accuracy real-time clock inevitably exist error, therefore on the basis of employing 1588 time synchronization protocol, as preferred embodiment, before clock synchronous step S30, also comprise clock frequency dynamic adjustment step, particularly: the time deviation calculating local clock and high accuracy real-time clock according to IEEE1588 clock synchronization protocol; By multiple time deviation of sampling, obtain the deviation average of multiple time deviation; According to deviation average adjustment local clock cycles.Ensure synchronize local clocks and the high accuracy real-time clock of network interface card thus further, thus make between the two time error in nanosecond.Further, according in deviation average adjustment local clock cycles, calculate the local clock cycles after adjustment as follows, next_clyce=inc_intg+ (inc_num/inc_den), wherein, next_clyce is the local clock cycles after adjustment; Inc_intg is the local clock cycles before adjustment; Inc_num is the mean value of clock jitter; Inc_den is local clock crystal oscillator frequency.Subsequently through the crystal oscillator cycle arranging corresponding register adjustment local clock.
3rd embodiment
As shown in Figure 3, the present embodiment is the device class claim of corresponding first embodiment.The High Precision Time Stamps acquisition device of the Based PC IE provided in this embodiment comprise message at a high speed on send module and add a cover timestamp module.Wherein message high speed send module: for adopting zero-copy pattern by SCN Space Cable Network packet on PCIE to User space program.Add a cover timestamp module: for adding a cover timestamp at Media Independent Interface MII to each network packet, wherein MII is between media interviews mac layer and physical layer PHY.
4th embodiment
As shown in Figure 4, compared to the 3rd embodiment, the High Precision Time Stamps acquisition device of the present embodiment also comprises clock synchronization module, before timestamp being added a cover to each network packet at Media Independent Interface MII, adopt IEEE1588 clock synchronization protocol by synchronize local clocks in high accuracy real-time clock.After the startup of message high-speed uploading module enters operating state, send enabling signal to clock synchronization module, clock synchronization module makes synchronize local clocks and the high accuracy real-time clock of network interface card after starting.The precision of high accuracy real-time clock should in nanosecond, and clock crystal oscillator has higher stability, to ensure the stability of the crystal oscillator frequency of local clock.
5th embodiment
As shown in Figure 5, the High Precision Time Stamps acquisition device of the present embodiment also comprises clock frequency dynamic conditioning module.Clock frequency dynamic conditioning module is used for: adopted IEEE1588 clock synchronization protocol by synchronize local clocks before high accuracy real-time clock at clock synchronization module, calculate the time deviation of local clock and high accuracy real-time clock according to IEEE1588 clock synchronization protocol; By multiple time deviation of sampling, obtain the deviation average of multiple time deviation; According to deviation average adjustment local clock cycles.
Further, clock frequency dynamic conditioning module, also for, calculate the local clock cycles after adjustment as follows, next_clyce=inc_intg+ (inc_num/inc_den), wherein, next_clyce is the local clock cycles after adjustment; Inc_intg is the local clock cycles before adjustment; Inc_num is the mean value of clock jitter; Inc_den is local clock crystal oscillator frequency.
6th embodiment
A kind of network interface card is provided in the present embodiment, this network interface card comprises High Precision Time Stamps acquisition device as described above, and the detailed technology content of this High Precision Time Stamps acquisition device can see the description in the 3rd embodiment, the 4th embodiment and the 5th embodiment.This network interface card as the special auxiliary device of flow analysis servers, such as with PCIE 8X for hardware transport passage, have 40G theoretical bandwidth, the test and analyzing being enough to meet large-scale data flow uses.
By the explanation of embodiment, should to the present invention for the technological means reaching predetermined object and take and effect be able to more deeply and concrete understanding, but appended diagram be only to provide with reference to and the use of explanation, be not used for being limited the present invention.

Claims (10)

1., based on a High Precision Time Stamps acquisition methods of peripheral assembly high speed interconnect PCIE, it is characterized in that, comprising:
Message high speed send step: adopt zero-copy pattern by SCN Space Cable Network packet on PCIE to User space program;
Add a cover timestamp step: add a cover timestamp at Media Independent Interface MII to each network packet, wherein said MII is between media interviews mac layer and physical layer PHY.
2. High Precision Time Stamps acquisition methods according to claim 1, is characterized in that, before adding a cover timestamp step, described method also comprises:
Clock synchronous step: adopt IEEE1588 clock synchronization protocol by synchronize local clocks in high accuracy real-time clock.
3. High Precision Time Stamps acquisition methods according to claim 2, is characterized in that, before clock synchronous step, described method also comprises: clock frequency dynamic adjustment step:
The time deviation of local clock and high accuracy real-time clock is calculated according to IEEE1588 clock synchronization protocol;
By multiple time deviation of sampling, obtain the deviation average of multiple time deviation;
According to described deviation average adjustment local clock cycles.
4. High Precision Time Stamps acquisition methods according to claim 3, is characterized in that, according in described deviation average adjustment local clock cycles, calculates the local clock cycles after adjustment as follows,
Next_clyce=inc_intg+ (inc_num/inc_den), wherein, next_clyce is the local clock cycles after adjustment; Inc_intg is the local clock cycles before adjustment; Inc_num is the mean value of clock jitter; Inc_den is local clock crystal oscillator frequency.
5. High Precision Time Stamps acquisition methods according to any one of claim 1 to 4, is characterized in that, described network packet, comprising: NIC driver bag.
6. a High Precision Time Stamps acquisition device of Based PC IE, is characterized in that, comprising:
Message high speed send module: for adopting zero-copy pattern by SCN Space Cable Network packet on PCIE to User space program;
Add a cover timestamp module: for adding a cover timestamp at Media Independent Interface MII to each network packet, wherein said MII is between media interviews mac layer and physical layer PHY.
7. High Precision Time Stamps acquisition device according to claim 6, it is characterized in that, described High Precision Time Stamps acquisition device also comprises clock synchronization module, before timestamp being added a cover to each network packet at Media Independent Interface MII, adopt IEEE1588 clock synchronization protocol by synchronize local clocks in high accuracy real-time clock.
8. High Precision Time Stamps acquisition device according to claim 7, it is characterized in that, described High Precision Time Stamps acquisition device also comprises clock frequency dynamic conditioning module, for adopting IEEE1588 clock synchronization protocol at described clock synchronization module by synchronize local clocks before high accuracy real-time clock
The time deviation of local clock and high accuracy real-time clock is calculated according to IEEE1588 clock synchronization protocol;
By multiple time deviation of sampling, obtain the deviation average of multiple time deviation;
According to described deviation average adjustment local clock cycles.
9. High Precision Time Stamps acquisition device according to claim 8, is characterized in that, described clock frequency dynamic conditioning module, also for calculating the local clock cycles after adjustment as follows,
Next_clyce=inc_intg+ (inc_num/inc_den), wherein, next_clyce is the local clock cycles after adjustment; Inc_intg is the local clock cycles before adjustment; Inc_num is the mean value of clock jitter; Inc_den is local clock crystal oscillator frequency.
10. a network interface card, is characterized in that, described network interface card comprises the High Precision Time Stamps acquisition device according to any one of claim 6 to 9.
CN201510240376.4A 2015-05-13 2015-05-13 High Precision Time Stamps acquisition methods, device and network interface card based on PCIE Expired - Fee Related CN104901844B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510240376.4A CN104901844B (en) 2015-05-13 2015-05-13 High Precision Time Stamps acquisition methods, device and network interface card based on PCIE

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510240376.4A CN104901844B (en) 2015-05-13 2015-05-13 High Precision Time Stamps acquisition methods, device and network interface card based on PCIE

Publications (2)

Publication Number Publication Date
CN104901844A true CN104901844A (en) 2015-09-09
CN104901844B CN104901844B (en) 2019-01-22

Family

ID=54034247

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510240376.4A Expired - Fee Related CN104901844B (en) 2015-05-13 2015-05-13 High Precision Time Stamps acquisition methods, device and network interface card based on PCIE

Country Status (1)

Country Link
CN (1) CN104901844B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109150355A (en) * 2018-08-14 2019-01-04 华东计算技术研究所(中国电子科技集团公司第三十二研究所) System for realizing PTP network card under FPGA
CN109194432A (en) * 2018-08-13 2019-01-11 华东计算技术研究所(中国电子科技集团公司第三十二研究所) Multi-virtual machine time synchronization system under KVM

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101388741A (en) * 2008-10-24 2009-03-18 中国科学院计算技术研究所 Highly precised time synchronization device, system and method for computer network
CN101707505A (en) * 2008-08-13 2010-05-12 华为技术有限公司 Method and device for time synchronization in passive optical network and passive optical network
CN101841470A (en) * 2010-03-29 2010-09-22 东南大学 High-speed capturing method of bottom-layer data packet based on Linux
CN101937253A (en) * 2009-06-30 2011-01-05 英特尔公司 Mechanism for clock synchronization
CN102013967A (en) * 2009-09-08 2011-04-13 郑州威科姆科技股份有限公司 1588 protocol-based beidou time synchronization device and application thereof
CN104239249A (en) * 2014-09-16 2014-12-24 国家计算机网络与信息安全管理中心 PCI-E (peripheral component interconnect-express) zero-copy DMA (direct memory access) data transmission method
CN104579623A (en) * 2014-12-23 2015-04-29 国电南瑞科技股份有限公司 Network time-setting system and method for secondary equipment of electric power system

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101707505A (en) * 2008-08-13 2010-05-12 华为技术有限公司 Method and device for time synchronization in passive optical network and passive optical network
CN101388741A (en) * 2008-10-24 2009-03-18 中国科学院计算技术研究所 Highly precised time synchronization device, system and method for computer network
CN101937253A (en) * 2009-06-30 2011-01-05 英特尔公司 Mechanism for clock synchronization
CN102013967A (en) * 2009-09-08 2011-04-13 郑州威科姆科技股份有限公司 1588 protocol-based beidou time synchronization device and application thereof
CN101841470A (en) * 2010-03-29 2010-09-22 东南大学 High-speed capturing method of bottom-layer data packet based on Linux
CN104239249A (en) * 2014-09-16 2014-12-24 国家计算机网络与信息安全管理中心 PCI-E (peripheral component interconnect-express) zero-copy DMA (direct memory access) data transmission method
CN104579623A (en) * 2014-12-23 2015-04-29 国电南瑞科技股份有限公司 Network time-setting system and method for secondary equipment of electric power system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
段辰生: "实时Linux下网络报文捕获平台的研究与实现", 《中国优秀硕士学位论文全文数据库》 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109194432A (en) * 2018-08-13 2019-01-11 华东计算技术研究所(中国电子科技集团公司第三十二研究所) Multi-virtual machine time synchronization system under KVM
CN109194432B (en) * 2018-08-13 2020-04-07 华东计算技术研究所(中国电子科技集团公司第三十二研究所) Multi-virtual machine time synchronization system under KVM
CN109150355A (en) * 2018-08-14 2019-01-04 华东计算技术研究所(中国电子科技集团公司第三十二研究所) System for realizing PTP network card under FPGA

Also Published As

Publication number Publication date
CN104901844B (en) 2019-01-22

Similar Documents

Publication Publication Date Title
CN104836630B (en) IEEE1588 clock synchronization system and implementation method therefor
CN102244572B (en) A kind of method and device for realizing that clock is synchronous
EP3284244B1 (en) Methods, systems, and computer readable media for emulating network devices with different clocks
EP2997485B1 (en) Media time based usb frame counter synchronization for wi-fi serial bus
CN109074723B (en) Time synchronization method, sensor embedded terminal and sensor network system
CN105262555B (en) Time synchronization method, programmable logic device, single board and network element
WO2014173267A1 (en) Timestamp generating method, device and system
CN103309397B (en) Based on the synchronous sampling method of the data acquisition equipment of USB
CN101977104A (en) IEEE1588 based accurate clock synchronization protocol system and synchronization method thereof
CN108650051A (en) The clock synchronization apparatus and method of general devices at full hardware single step 1588
CN103929293A (en) Asymmetrically-delayed time synchronization method and system
TW201530155A (en) Communications systems and methods for distributed power system measurement
CN103532693B (en) Time synchronizing device and method
CN105281885B (en) Time synchronization method and device for network equipment and time synchronization server
CN103248471A (en) Clock synchronization method based on PTP (Precision Time Protocol) and reflective memory network
CN110995388B (en) Distributed shared clock trigger delay system
US20100293243A1 (en) method and apparatus for measuring directionally differentiated (one-way) network latency
CN102916758B (en) Ethernet time synchronism apparatus and the network equipment
CN108023723A (en) The method of Frequency Synchronization and from clock
US20220360350A1 (en) Method and apparatus for acquiring timestamp of data stream, storage medium, and electronic apparatus
CN104579623A (en) Network time-setting system and method for secondary equipment of electric power system
CN104901844A (en) High precision timestamp acquisition method based on PCIE, device and network card
WO2021129755A1 (en) Clock time synchronization method, apparatus and device, and storage medium
CN101867431B (en) Network clock synchronization method
CN102983959B (en) Method for realizing one-step mode and two-step mode for PTP (precision time synchronization protocol) in a plurality of MAC

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20190122

Termination date: 20190513

CF01 Termination of patent right due to non-payment of annual fee