CN104901359A - Charging and discharging control device with battery current detection circuit - Google Patents
Charging and discharging control device with battery current detection circuit Download PDFInfo
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- CN104901359A CN104901359A CN201510244530.5A CN201510244530A CN104901359A CN 104901359 A CN104901359 A CN 104901359A CN 201510244530 A CN201510244530 A CN 201510244530A CN 104901359 A CN104901359 A CN 104901359A
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Abstract
The invention relates to a charging and discharging control device with a battery current detection circuit. The battery current detection circuit comprises a charging current sampling circuit, a discharging current sampling circuit, and a current measurement circuit, wherein the current measurement circuit is used for achieving the difference between a discharging current signal and a charging current signal. If the different is positive, the discharging current of the battery at a discharging state is obtained; if the different is negative, the charging current of the battery at a charging state is obtained. According to the invention, the charging current signal is sampled from the charging circuit, and the discharging current signal is sampled from the discharging circuit. The difference between the charging current signal and the discharging current signal is achieved, so as to judge that the battery is at the charging state or the discharging state. Moreover, the charging current or discharging current is obtained, i.e., the current flowing into or out from the battery, thereby achieving the calculation of the remaining capacity of the battery according to the open-circuit voltage of the battery. The device can accurately detect the current of the battery with no need of a sampling resistor, and effectively reduces the power consumption and cost.
Description
Technical field
The present invention relates to a kind of charge-discharge controller with battery current detection circuit.
Background technology
In the electronics, electric equipment products of use rechargeable battery, usually there is a charge-discharge controller, wherein, comprise the charging circuit for being filled with electric energy to battery and the discharge circuit (or power supply circuits) for the electric energy of battery being exported its load of confession or other circuit workings, in traditional charge-discharge controller, be generally distinguish sampling battery voltage, battery current by tension measuring circuit, current measurement circuit, and then calculate battery electric quantity.
As shown in Figure 1, for having the schematic diagram of the charge-discharge controller of tension measuring circuit and current measurement circuit in prior art.When carrying out voltage sample and detecting, by equivalent series resistance Resr1 and Resr2 that mesuring battary (part in figure in dotted line frame) is equivalent to an electric capacity Cb and connects with it.This capacitor model has certain voltage-capacity curve, as shown in Figure 2, is the voltage-capacity curve stored by test data sheet.Measure the voltage on this equivalent capacity Cb through described tension measuring circuit, dump energy information can be obtained by inquiry voltage-capacity curve.Described tension measuring circuit is connected across described BATP and holds between BATN end, adopt the voltage VBAT that generally can only measure in this way between BATP end and BATN end, again by measuring the electric current I BAT flowing through battery, calculate the voltage between CP end and CN end according to the equivalent series resistance of setting.Suppose that the resistance value sum of Resr1 and Resr2 is R_Resr, then the voltage VCb=VBAT-R_Resr × IBAT between CP end and CN end.
And described in will obtaining, flow through the electric current I BAT of battery, be then generally utilize current measurement circuit, battery is connected a precision resistance Rs, calculates battery current IBAT by the voltage on this precision resistance Rs.This circuit can cause being that charging current or discharging current (supply current) all flow through Rs, consumes energy, reduces system effectiveness.This resistance is in order to bear the larger heat under big current simultaneously, and also needing is the power resistor that radiated energy is stronger, because this resistance cost taken by themselves is higher, and the increase of the cost of the system that result also in own.
Summary of the invention
Instant invention overcomes above-mentioned shortcoming, provide and a kind of measure accurately, the charge-discharge controller of what power consumption was lower have battery current detection circuit.
The present invention solves the technical scheme that its technical problem takes: a kind of charge-discharge controller with battery current detection circuit, comprise for being filled with the charging circuit of electric energy and the discharge circuit for being exported by the electric energy of battery to battery, described battery current detection circuit comprises charge current sample circuit, discharging current sample circuit and current measurement circuit
Described charge current sample circuit, its input is connected with described charging circuit, and output is connected with described current measurement circuit, for the electric current of sample streams through described charging circuit, obtains charging current signal;
Described discharging current sample circuit, its input is connected with described discharge circuit, and output is connected with described current measurement circuit, for the electric current of sample streams through described discharge circuit, obtains discharging current signal;
Described current measurement circuit, its input is connected with discharging current sample circuit with described charge current sample circuit respectively, for described discharging current signal and described charging current signal are done difference, when difference is positive number, obtain the discharging current under battery discharge status, when difference is negative, obtain the charging current under battery charging state.
Described current measurement circuit can comprise AD conversion unit and processing unit, the input of described AD conversion unit is connected with discharging current sample circuit with described charge current sample circuit respectively, for described charging current signal and discharging current signal are converted to digital signal respectively, the input of described processing unit is connected with the output of described AD conversion unit, calculating for the digital signal of described sign charging current signal and discharging current signal being carried out do difference, obtaining described discharging current or charging current.
Described charging circuit can comprise charge control module and the first PMOS, the grid of described first PMOS is connected with the output of described charge control module, source electrode is connected with power input, described charge current sample circuit can comprise the second PMOS, formation first current mirror of described second PMOS and described first PMOS, described charge current sample circuit also comprises the second current mirror, 3rd current mirror and the first operational amplifier, described first current mirror, second current mirror is connected successively with the 3rd current mirror, two inputs of described first operational amplifier are connected with the drain electrode of the second PMOS with the drain electrode of described first PMOS respectively, output is connected with the common gate of described second current mirror, the common source of described second current mirror is connected with battery cathode end, described 3rd current mirror common source is connected with the common source of the first current mirror,
When described charge control module employing has the constant current/constant voltage control module of a Linear Control output, the grid of described first PMOS is connected with described Linear Control output, drain electrode is connected with anode end, the output of described 3rd current mirror is the output of described charge current sample circuit
When described charge control module employing has the constant current/constant voltage control module of two switch control rule outputs, described charging circuit also comprises the first NMOS tube, first energy storage inductor and the first electric capacity, the grid of described first PMOS and the grid of the first NMOS tube are connected with described two switch control rule outputs respectively, the drain electrode of described first NMOS tube is connected with the drain electrode of described first PMOS, and be connected with anode end through described first energy storage inductor, source electrode is connected with battery cathode end, described first electric capacity is connected between described anode end and negative pole end, described charge current sample circuit also comprises the first resistance, first voltage follower, first sampling capacitance and a sampling switch, one end of described first resistance is connected with battery cathode end, the other end is connected with the output of described 3rd current mirror, and be connected to the input of described first voltage follower, the input of described first voltage follower is connected with the input of described sampling switch, described first sampling capacitance is connected between the output of described sampling switch and battery cathode end, the grid of described first PMOS is connected to the control end of described sampling switch through an inverter, the output of described sampling switch connects the first low pass filter and the first voltage current adapter more in turn, the output of described first voltage current adapter is as the output of described charge current sample circuit.
Described discharge circuit can comprise control of discharge module and the 4th PMOS, the grid of described 4th PMOS is connected with the output of described control of discharge module, source electrode is connected with anode end, described discharging current sample circuit can comprise the 5th PMOS, formation the 4th current mirror of described 5th PMOS and described 4th PMOS, described discharging current sample circuit also comprises the 5th current mirror, 6th current mirror and the second operational amplifier, described 4th current mirror, 5th current mirror is connected successively with the 6th current mirror, two inputs of described second operational amplifier are connected with the drain electrode of the 5th PMOS with the drain electrode of described 4th PMOS respectively, output is connected with the common gate of described 5th current mirror, the common source of described 5th current mirror is connected with battery cathode end, described 6th current mirror common source is connected with the common source of the 4th current mirror,
When described control of discharge module employing has the voltage regulator of a Linear Control output, the grid of described 4th PMOS is connected with described Linear Control output, drain electrode is connected with power output end, and the output of described 6th current mirror is the output of described discharging current sample circuit
When described control of discharge module employing has the voltage descending DC-DC converter of two switch control rule outputs, described discharge circuit also comprises the second NMOS tube, second energy storage inductor and the second electric capacity, the grid of described 4th PMOS is connected with described two switch control rule outputs respectively with the grid of the second NMOS tube, the drain electrode of described second NMOS tube is connected with the drain electrode of described 4th PMOS, and be connected with power output end through described second energy storage inductor, source electrode is connected with battery cathode end, described second electric capacity is connected between described power output end and battery cathode end, described charge current sample circuit also comprises the second resistance, second voltage follower and the second sampling capacitance, one end of described second resistance is connected with battery cathode end, the other end is connected with the output of described 6th current mirror, and be connected to the input of described second voltage follower, between the output that described second sampling capacitance is connected to described second voltage follower and battery cathode end, the output of described second voltage follower connects the second low pass filter and the second voltage current adapter more in turn, the output of described second voltage current adapter is as the output of described discharging current sample circuit.
Described charging circuit can be multichannel, is correspondingly respectively connected with multichannel charge current sample circuit, and the described charging current signal of each road charge current sample circuit, after superposition, is input to described current measurement circuit.
Described discharge circuit can be multichannel, is correspondingly respectively connected with multichannel discharging current sample circuit, and the described discharging current signal of each road discharging current sample circuit, after superposition, is input to described current measurement circuit.
The present invention is by respectively from the charging current signal that charging circuit samples, discharging current signal is sampled from discharge circuit, described charging current signal and discharging current signal are done difference, judge that battery is in charged state or discharge condition, and obtain charging current or discharging current, namely flow into or flow out the electric current of battery, and then battery dump energy can be calculated according to battery open circuit voltage.The present invention can detect battery current accurately without the need to sampling resistor, effectively reduces power consumption and cost.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of existing battery fuel gauge circuit;
Fig. 2 is the voltage-capacity curve stored by test data sheet;
Fig. 3 is theory diagram of the present invention;
Fig. 4 is the schematic diagram of current measurement circuit described in Fig. 3;
Fig. 5 adopts the charging circuit of linear model and the schematic diagram of charge current sample circuit in Fig. 3;
Fig. 6 adopts the charging circuit of switching mode and the schematic diagram of charge current sample circuit in Fig. 3;
Fig. 7 adopts the power-switching circuit of linear model and the schematic diagram of discharging current sample circuit in Fig. 3;
Fig. 8 adopts the power-switching circuit of switching mode and the schematic diagram of discharging current sample circuit in Fig. 3;
Fig. 9 is the oscillogram adopting execution mode in Fig. 6;
Figure 10 is the oscillogram adopting execution mode in Fig. 8.
Embodiment
Below in conjunction with embodiment, content of the present invention is described in detail.
As shown in Figure 3, for a kind of theory diagram with the charge-discharge controller of described current detection circuit in the present invention, comprise for being filled with the charging circuit of electric energy and the discharge circuit for being exported by the electric energy of battery to battery, described charging circuit has a power input VCHG and the output be connected with negative pole end BATN with anode end BATP respectively, be charging signals by the Power convert of power input VCHG, charge to battery from anode end BATP and negative pole end BATN; Described discharge circuit has a power output end and the input be connected with negative pole end BATN with anode end BATP respectively, the conversion of the electric energy of battery is exported to and is powered circuit, described discharge circuit is equivalent to using battery as power supply, the described load being powered circuit and being equivalent to battery, therefore, described discharge circuit, also can be described as power-switching circuit.
Described charge-discharge controller also comprises charge current sample circuit, discharging current sample circuit and current measurement circuit:
Described charge current sample circuit, its input is connected with described charging circuit, and output is connected with described current measurement circuit, for the electric current of sample streams through described charging circuit, obtains charging current signal;
Described discharging current sample circuit, its input is connected with described discharge circuit, and output is connected with described current measurement circuit, for the electric current of sample streams through described discharge circuit, obtains discharging current signal;
Described current measurement circuit, its input Ich holds and is connected with discharging current sample circuit with described charge current sample circuit respectively with Idch end, for described discharging current signal and described charging current signal are done difference, when difference is positive number, obtain the discharging current under battery discharge status, when difference is negative, obtain the charging current under battery charging state.
As shown in Figure 4, described current measurement circuit comprises AD conversion unit and processing unit, the input of described AD conversion unit is connected with discharging current sample circuit with described charge current sample circuit respectively, for the discharging current signal by the described charging current signal of Ich end input and the input of Idch end, conversion can be carried out the digital signal of calculation process by processing unit respectively, the input of described processing unit is connected with the output of described AD conversion unit, calculate for the discharging current signal of the charging current signal representated by described digital signal and input being carried out do difference, obtain described discharging current or charging current.Such as, when described discharging current signal is A, charging current signal is B, if (A-B) is positive number, represent that battery current shows as discharging current, battery is in discharge condition; If (A-B) be negative, represent that battery current shows as charging current, battery is in charged state.In addition, described processing unit can utilize the processor in original device to calculate.
Described charge current sample circuit and discharging current sample circuit, all can adopt one or more levels current mirror to realize, and wherein, each current mirror is common-source common-gate current mirror.
Because described charging circuit and charging circuit have the multiple implementation such as linear model and switching mode respectively, corresponding described charge current sample circuit and discharging current sample circuit also have different circuit structures, and its specific implementation is as follows:
As shown in Figure 5, be the schematic diagram of the charging circuit and charge current sample circuit that adopt linear model in Fig. 3, the left side of figure chain lines is charging circuit, and right side is charge current sample circuit.
Described charging circuit comprises constant current/constant voltage control module U1 and PMOS MPC1, described constant current/constant voltage control module adopts has a Linear Control output, the grid of described PMOS MPC1 and being connected with described Linear Control output of described constant current/constant voltage control module, drain electrode is held with anode end BATP and is connected, source electrode is held with power input VCHG and is connected, described charge current sample circuit comprises PMOS MPsc11, described PMOS MPsc11 and described PMOS MPC1 forms the first current mirror, described charge current sample circuit also comprises the second current mirror, 3rd current mirror and operational amplifier OP1, described second current mirror is made up of NMOS tube MN11 and MN12, described 3rd current mirror is made up of PMOS MPc11 and MPc12, described first current mirror, second current mirror is connected successively with the 3rd current mirror, two inputs of described operational amplifier OP1 are connected with the drain electrode of PMOS MPsc11 with the drain electrode of described PMOS MPC1 respectively, output is connected with the common gate of described second current mirror, the common source of described second current mirror is connected with battery cathode end BATN, described 3rd current mirror common source is connected with the common source (namely VCHG holds) of the first current mirror, the output of described 3rd current mirror is that the output Ich of described charge current sample circuit holds.
The output of described constant current/constant voltage control module is PGL end (i.e. Linear Control output), controls the electric current of PMOS MPC1, meets current constant control and Isobarically Control, when cell voltage is lower than 4.2V, be in current constant control state; When cell voltage is close to 4.2V, be in Isobarically Control state.These belong to prior art, not directly related with the present invention, in order to simplified characterization, repeat no more herein.Emphasis describes the operation principle of described charge current sample circuit below, two inputs due to operational amplifier OP1 connect the drain electrode of described PMOS MPC1 and the drain electrode of another PMOS MPsc11 respectively, the drain voltage (i.e. BATP terminal voltage) of PMOS MPC1 is equaled through adjusting the voltage making the drain D Psc1 of PMOS MPsc11 hold, described PMOS MPC1 and described PMOS MPsc11 common source in addition, source voltage is equal, described PMOS MPC1 and described PMOS MPsc11 common gate, the grid voltage of the two is equal, described PMOS MPsc11 and MPC1 forms common-source common-gate current mirror, electric current becomes mirror.The ratio designing the breadth length ratio of described PMOS MPsc11 and MPC1 meets certain ratio, and described breadth length ratio is the wide of the conducting channel of PMOS and long ratio, and breadth length ratio is larger, and the drain current Id of PMOS is larger, and namely breadth length ratio is directly proportional to Id.Therefore, the ratio of the breadth length ratio of two PMOS is the ratio of drain current Id.The ratio of the breadth length ratio of such as described PMOS MPsc11 and MPC1 is 1/1000, then the drain current of described PMOS MPsc11 equals 1/1000 of described PMOS MPC1 drain current.In like manner, NMOS tube MN11 and MN12 forms current mirror, and PMOS MPc11 and MPc12 forms current mirror, such as all be designed to the current mirror of 1:1, therefore, the drain current of described PMOS MPc12, namely the electric current of Ich end, equals 1/1000 of described PMOS MPC1 drain current.Because described PMOS MPC1 and MPsc11 is operated on off state, i.e. linear zone and non-saturated region, the second level current mirror utilizing MN11 and MN12 to form, obtain more satisfactory mirror effect, the 3rd current mirror that recycling MPc11 and MPc12 is formed, switching current direction, namely the current conversion flowing to BATN end (holding with being equivalent to) of the 3rd current mirror input is the directional current from power end VCHG end to outflow.In addition, because described first current mirror, the second current mirror and the 3rd current mirror form tertiary current mirror, can be set to as 10:1,10:1,10:1 by the ratio of the breadth length ratio of every grade, equivalence is also 1000:1, makes oversampling ratio precision more accurate.
As shown in Figure 6, be the schematic diagram of the charging circuit and charge current sample circuit that adopt switching mode in Fig. 3, the left side of figure chain lines is charging circuit, and right side is charge current sample circuit;
Described charging circuit comprises PMOS MPC2, NMOS tube MNC2, energy storage inductor L2 and electric capacity C21, with the constant current/constant voltage control module U2 with two switch control rule outputs, the grid of described PMOS MPC2 and the grid of NMOS tube MNC2 are connected with two switch control rule outputs of described constant current/constant voltage control module U2 respectively, the source electrode of described PMOS MPC2 is connected with power input VCHG, the drain electrode of described NMOS tube MNC2 is connected with the drain electrode of described PMOS MPC2, and be connected with anode end through described energy storage inductor L2, source electrode is connected with battery cathode end BATN, described electric capacity C21 is connected between described anode end BATP and negative pole end BATN.Described charge current sample circuit comprises PMOS MPsc21, described PMOS MPsc21 and described PMOS MPC2 forms the first current mirror, described charge current sample circuit also comprises the second current mirror be made up of NMOS tube MN21 and MN22, the 3rd current mirror be made up of PMOS MPc21 and MPc22, and operational amplifier OP21, described first current mirror, second current mirror is connected successively with the 3rd current mirror, two inputs of described operational amplifier OP21 are connected with the drain electrode of NMOS tube MNC2 with the drain electrode of described PMOS MPC2 respectively, output is connected with the common gate of described second current mirror, the common source of described second current mirror is connected with battery cathode end, described 3rd current mirror common source is connected with the common source (namely power end VCHG holds) of the first current mirror, described charge current sample circuit also comprises resistance R2, voltage follower OP22, sampling capacitance C22 and sampling switch S2, one end of described resistance R2 is connected with battery cathode end BATV, the other end is held with the output DPc2 of described 3rd current mirror and is connected, and be connected to the input of described voltage follower OP22, the input of described voltage follower OP22 is connected with the input of described sampling switch S2, described sampling capacitance C22 is connected between the output of described sampling switch S2 and battery cathode end BATN, the grid of described PMOS MPC2 is connected to the control end of described sampling switch S2 through an inverter INV1, the output of described sampling switch S2 connects the first low pass filter and the first voltage current adapter more in turn, the output of described first voltage current adapter is as the output Ich of described charge current sample circuit.
In switching mode implementation, by described constant current/constant voltage control module U2, there are two outputs, alternately control the conducting of described PMOS MPC2 and NMOS tube MNC2, to inductance L 2 energy storage with release energy, thus realize energy and move.When described PMOS MPC2 conducting, the electric current of inductance L 2 rises with the slope of (U_VCHG-U_BATP)/L, and wherein U_VCHG is the voltage of VCHG node, and U_BATP is the voltage of BATP node, and L is the inductance value of inductance L 2.When described NMOS tube MNC2 conducting, the electric current of inductance L 2 declines with the slope of-U_BATP/L, and negative sign represents electric current downward trend, and wherein, U_BATP is the voltage of BATP node, and L is the inductance value of inductance L 2.When described PMOS MPC2 conducting, MPsc21 is conducting also, two inputs of operational amplifier OP21 connect the drain electrode of described PMOS MPC2 and the drain electrode of another PMOS MPsc21 respectively, the drain voltage of MPsc1 (i.e. DPsc1 terminal voltage) is made to equal the drain voltage of described PMOS MPC2 through operational amplifier OP1 adjustment, another MPsc1 and MPC2 forms common-source common-gate current mirror, the two source voltage is equal, grid voltage is equal, so the drain current of MPsc21 becomes mirror with the drain current of MPC2.In like manner, MN21 and MN22 forms current mirror, MPc21 and MPc22 forms current mirror, the electric current of described PMOS MPsc21 equals the electric current of NMOS tube MN21, if described PMOS MPsc21 is designed to 1/1000 with the ratio of the breadth length ratio of described PMOS MPC2, NMOS tube MN21 is designed to 1:1 with the ratio of the breadth length ratio of NMOS tube MN22, and the ratio of the breadth length ratio of PMOS MPc21 and PMOS MPc22 is designed to 1:1, and therefore the electric current of described PMOS MPc2 is 1/1000 of MPC electric current.
Now, the electric current owing to charging to battery should for flowing through the mean value of inductance L 2 electric current.The electric current of described PMOS MPc22 flows through resistance R2, voltage signal is produced at DPc2 end, operational amplifier OP22 coating-forming voltage follower, strengthen driving force, the input of switch S 2 connects the output of described operational amplifier OP22, and control end is connected to the output be connected with the grid of described PMOS MPC2 of described constant current/constant voltage control unit, its role is to, only when MPC2 conducting, the voltage that the output OP2O of described operational amplifier OP22 holds is sampled.Because the voltage that is sampled exported from described operational amplifier OP22 is constantly change, electric current only when described PMOS MPC2 conducting, mean value in its ON time, just equal the mean value of the electric current of described inductance L 2, also just equal the electric current (namely to the charging current of battery) flowing into BATP.Therefore, sampled in the correct moment by the control of described switch S 2, described PMOS MPsc21 mirror image be the electric current of described PMOS MPC2, the time of sampling switch S2 conducting corresponds to the time of described PMOS MPC2 conducting.When GPC end is for low level, described PMOS MPC2 conducting, the output of inverter INV1 is high level, now switch S 2 conducting, OP2O terminal voltage is sampled on electric capacity C22, through low pass filter and voltage-current converter, exports charging current signal Ich.
As shown in Figure 9, for adopting the oscillogram of execution mode in Fig. 6, wherein, IL1 is the waveform of inductive current, and IMPC is the current waveform of described PMOS MPC2, and IMNC is the current waveform of described NMOS tube MNC2, and Iav1 is the mean value of IMPC in the T1 time period.Therefore, to utilize in Fig. 6 in execution mode, the current value exported due to Ich is 1/1000 of Iav1, utilize the charging current signal Ich exported, can realize being averaged in MPC3 ON time section (i.e. the time period of T1 shown in Fig. 9) to IMPC, this mean value is equal with the mean value of inductance L 2 electric current, so thus can to the charging current signal of battery.
As shown in Figure 7, be the schematic diagram of the power-switching circuit and discharging current sample circuit that adopt linear model in Fig. 3; The left side of figure chain lines is power-switching circuit, and right side is discharging current sample circuit.
Described power-switching circuit comprises the voltage regulator U3 and PMOS MPC3 with a Linear Control output, the grid of described PMOS MPC3 is connected with described Linear Control output, drain electrode is connected with power output end VO, source electrode is held with anode end BATP and is connected, described discharging current sample circuit comprises PMOS MPsc31, 5th current mirror, 6th current mirror and operational amplifier OP3, described PMOS MPC3 and MPsc31 forms the 4th current mirror, described 4th current mirror, 5th current mirror is connected successively with the 6th current mirror, two inputs of described operational amplifier OP3 are connected with the drain electrode of PMOS MPsc31 with the drain electrode of described PMOS MPC3 respectively, output is connected with the common gate of described 5th current mirror, the common source of described 5th current mirror is held with battery cathode end BATN and is connected, described 6th current mirror common source is connected with the common source (namely anode end BATP holds) of the 4th current mirror, the output of described 6th current mirror is that the output Idch of described discharging current sample circuit holds.
Wherein, Voltage Regulator Module adjustment PMOS MPC3 realizes power source conversion function, and it is prior art, in order to simplified characterization, repeats no more herein.The output VO end of described power-switching circuit is connected to and is powered circuit, and being powered circuit as load, can be the circuit that such as voicefrequency circuit, radio circuit, digital circuit etc. are any is power supply with described battery.Two inputs of described operational amplifier OP3 connect the drain electrode of described PMOS MPC3 and the drain electrode of another PMOS MPsc31 respectively, the voltage of the drain electrode of PMOS MPsc31 (i.e. DPsc1 end) is made to equal the drain voltage (i.e. VO terminal voltage) of PMOS MPC3 through adjustment, simultaneously, the source voltage of described PMOS MPC3 equals the source voltage of described PMOS MPsc31, the grid voltage of described PMOS MPC3 equals the grid voltage of described PMOS MPsc31, and described like this PMOS MPsc31 becomes mirror with the electric current of described PMOS MPC3.The ratio designing the breadth length ratio of described PMOS MPsc31 and MPC3 meets certain ratio, such as 1/1000, then the electric current of described PMOS MPsc1 drain electrode equals 1/1000 of MPC3 drain current, in like manner, NMOS tube MN31 and MN32 forms current mirror, and PMOS MPc31 and MPc32 forms current mirror, such as, be all designed to the current mirror of 1:1, therefore the drain current of described PMOS MPc32, namely the electric current of Idch end equals 1/1000 of described PMOS MPC3 drain current.
Fig. 8 adopts the power-switching circuit of switching mode and the schematic diagram of discharging current sample circuit in Fig. 3; The left side of figure chain lines is power-switching circuit, and right side is discharging current sample circuit.
Described voltage conversion circuit comprises the voltage descending DC-DC converter U4 with two switch control rule outputs, PMOS MPC4, NMOS tube MNC4, energy storage inductor L4 and electric capacity C41, the grid of described PMOS MPC4 and the grid of NMOS tube MNC4 are connected with two switch control rule outputs of described voltage descending DC-DC converter U4 respectively, the source electrode of described PMOS MPC4 is held with anode end BATP and is connected, the drain electrode of described NMOS tube MNC4 is connected with the drain electrode of described PMOS MPC4, and to hold with power output end VO through described energy storage inductor L4 and be connected, source electrode is connected with battery cathode end BATN, described electric capacity C41 is connected between described power output end VO and battery cathode end BATN.Described discharging current sample circuit comprises PMOS MPsc41, 5th current mirror, 6th current mirror and operational amplifier OP41, , described PMOS MPC4 and described PMOS MPsc41 forms the 4th current mirror, described 4th current mirror, 5th current mirror is connected successively with the 6th current mirror, two inputs of described operational amplifier OP41 are connected with the drain electrode of PMOS MPsc41 with the drain electrode of described PMOS MPC4 respectively, output is connected with the common gate of described 5th current mirror, the common source of described 5th current mirror is connected with battery cathode end BATN, described 6th current mirror common source is connected with the common source (i.e. anode end BATP) of the 4th current mirror, described discharging current sample circuit also comprises resistance R4, voltage follower OP42 and sampling capacitance C42, one end of described resistance R4 is connected with battery cathode end BATN, the other end is connected with the output of described 6th current mirror, and be connected to the input of described voltage follower OP42, described sampling capacitance C42 is connected between the output of described voltage follower OP42 and battery cathode end BATN, the output of described voltage follower OP42 connects the second low pass filter and the second voltage current adapter more in turn, the output of described second voltage current adapter is held as the output Idch of described discharging current sample circuit.
The working method of wherein said voltage descending DC-DC converter is identical with the working method of voltage descending DC-DC converter in prior art, for the purpose of simplifying the description, repeats no more herein.Two inputs of operational amplifier OP41 connect the drain electrode of described PMOS MPC4 and the drain electrode of another PMOS MPsc41 respectively, operational amplifier OP41 adjustment makes the drain voltage of MPsc41 equal with the drain voltage of MPC4, and the source voltage of the source voltage of MPsc41 and MPC4 is equal, the grid voltage of MPsc41 is equal with the grid voltage of MPC4, therefore the electric current of MPsc41 becomes mirror with the electric current of MPC4, and the ratio of its drain current equals the ratio of its breadth length ratio.MN41 and MN42 forms current mirror, and MPc41 and MPc42 also forms current mirror.The ratio of the ratio of breadth length ratio such as designing MPsc41 and MPC4 to be the ratio of the breadth length ratio of 1/1000, MN41 and MN42 be 1:1, the MPc41 also breadth length ratio of MPc42 is 1:1.The electric current of MPc42 is then 1/1000 of MPC4 electric current, the electric current of described PMOS MPc42 produces voltage through resistance R4, voltage follower OP42 is formed by operational amplifier, by the voltage sample of its output on electric capacity C42, through low pass filter and voltage-current converter, export charging current signal Idch.Compared with Fig. 6, here sampling switch S2 is not had, but directly connect, this means all to sample in the time in complete period, obtain the electric current flowed out from BATP end, should be from the mean value of MPC4 source current in the whole cycle, the output current produced at Idch end be equivalent to 1/1000 of described PMOS MPC4 electric current of having sampled, and then within the complete period, the result of filtering outputs to Idch end.
As shown in Figure 10, for adopting the oscillogram of execution mode in Fig. 8, the current waveform of described inductance L 4 is IL1, the current waveform of MPC4 is IMPC, the current waveform of MNC4 is IMNC, Iav2 is the mean value of IMPC within whole cycle time, and the current value that Idch exports is 1/1000 of Iav2.
In some applications, described charging circuit can have the situation of multichannel, such as charge from power line respectively, adaptor charge, USB charging and solar energy module charging etc., or the situation that many group solar energy modules charge simultaneously, all need multiple charging circuit, based on technique scheme, a charge current sample circuit (not indicating in the drawings) can be connected respectively to every road charging circuit, carry out charge current sample, then the charging current sampled in each road is directly superposed, or carry out superposition calculation by described processing unit, produce the summation of each road charging current, in like manner, for the situation of multiple power supplies change-over circuit, discharging current sample circuit (not indicating in the drawings) can be connected respectively to every road power-switching circuit, carry out discharging current sampling respectively, then each road sample rate current is directly superposed, or carry out superposition calculation by described processing unit, produce overall discharging current.In order to realize the function of electric current superposition, also simply each current output terminal can be linked together, namely realizing electric current superposition.
Above the charge-discharge controller with battery current detection circuit provided by the present invention is described in detail, apply specific case herein to set forth principle of the present invention and execution mode, the explanation of above embodiment just understands method of the present invention and core concept thereof for helping; Meanwhile, for one of ordinary skill in the art, according to thought of the present invention, all will change in specific embodiments and applications, in sum, this description should not be construed as limitation of the present invention.
Claims (10)
1. one kind has the charge-discharge controller of battery current detection circuit, comprise for being filled with the charging circuit of electric energy and the discharge circuit for being exported by the electric energy of battery to battery, it is characterized in that: described battery current detection circuit comprises charge current sample circuit, discharging current sample circuit and current measurement circuit
Described charge current sample circuit, its input is connected with described charging circuit, and output is connected with described current measurement circuit, for the electric current of sample streams through described charging circuit, obtains charging current signal;
Described discharging current sample circuit, its input is connected with described discharge circuit, and output is connected with described current measurement circuit, for the electric current of sample streams through described discharge circuit, obtains discharging current signal;
Described current measurement circuit, its input is connected with discharging current sample circuit with described charge current sample circuit respectively, the described charging current signal received for basis and discharging current signal acquisition battery current signal.
2. the charge-discharge controller with battery current detection circuit according to claim 1, it is characterized in that: described current measurement circuit comprises AD conversion unit and processing unit, the input of described AD conversion unit is connected with discharging current sample circuit with described charge current sample circuit respectively, for described charging current signal and discharging current signal are converted to digital signal respectively, the input of described processing unit is connected with the output of described AD conversion unit, calculate for the digital signal of described sign charging current signal and discharging current signal being carried out do difference, when difference is positive number, obtain the discharging current under battery discharge status, when difference is negative, obtain the charging current under battery charging state.
3. the charge-discharge controller with battery current detection circuit according to claim 1 and 2, it is characterized in that: described charging circuit comprises charge control module and the first PMOS, when described charge control module employing has the constant current/constant voltage control module of a Linear Control output, the grid of described first PMOS is connected with described Linear Control output, source electrode is connected with power input, drain electrode is connected with anode end, the input of described charge current sample circuit is connected with the drain electrode of described first PMOS, the drain current of described first PMOS of sampling.
4. the charge-discharge controller with battery current detection circuit according to claim 3, it is characterized in that: described charge current sample circuit comprises the second PMOS, formation first current mirror of described second PMOS and described first PMOS, described charge current sample circuit also comprises the second current mirror, 3rd current mirror and the first operational amplifier, described first current mirror, second current mirror is connected successively with the 3rd current mirror, two inputs of described first operational amplifier are connected with the drain electrode of the second PMOS with the drain electrode of described first PMOS respectively, output is connected with the common gate of described second current mirror, the common source of described second current mirror is connected with battery cathode end, described 3rd current mirror common source is connected with the common source of the first current mirror, the output of described 3rd current mirror is the output of described charge current sample circuit.
5. the charge-discharge controller with battery current detection circuit according to claim 1 and 2, it is characterized in that: described charging circuit comprises charge control module and the first PMOS, when described charge control module employing has the constant current/constant voltage control module of two switch control rule outputs, described charging circuit also comprises the first NMOS tube, first energy storage inductor and the first electric capacity, the grid of described first PMOS and the grid of the first NMOS tube are connected with described two switch control rule outputs respectively, described first PMOS source electrode is connected with power input, drain electrode is connected with the drain electrode of described first NMOS tube, and be connected with anode end through described first energy storage inductor, the source electrode of described first NMOS tube is connected with battery cathode end, described first electric capacity is connected between described anode end and negative pole end, the input of described charge current sample circuit is connected with the drain electrode of described first PMOS, sample described first PMOS conducting time the mean value of drain current in its ON time.
6. the charge-discharge controller with battery current detection circuit according to claim 5, it is characterized in that: described charge current sample circuit comprises the second PMOS, formation first current mirror of described second PMOS and described first PMOS, described charge current sample circuit also comprises the second current mirror, 3rd current mirror and the first operational amplifier, described first current mirror, second current mirror is connected successively with the 3rd current mirror, two inputs of described first operational amplifier are connected with the drain electrode of the second PMOS with the drain electrode of described first PMOS respectively, output is connected with the common gate of described second current mirror, the common source of described second current mirror is connected with battery cathode end, described 3rd current mirror common source is connected with the common source of the first current mirror, described charge current sample circuit also comprises the first resistance, first voltage follower, first sampling capacitance and a sampling switch, one end of described first resistance is connected with battery cathode end, the other end is connected with the output of described 3rd current mirror, and be connected to the input of described first voltage follower, the input of described first voltage follower is connected with the input of described sampling switch, described first sampling capacitance is connected between the output of described sampling switch and battery cathode end, the grid of described first PMOS is connected to the control end of described sampling switch through an inverter, when the grid of described first PMOS obtains Continuity signal, control described sampling switch conducting, the output of described sampling switch connects the first low pass filter and the first voltage current adapter more in turn, the output of described first voltage current adapter is as the output of described charge current sample circuit.
7. the charge-discharge controller with battery current detection circuit according to claim 1 and 2, it is characterized in that: described discharge circuit comprises control of discharge module and the 4th PMOS, when described control of discharge module employing has the voltage regulator of a Linear Control output, the grid of described 4th PMOS is connected with described Linear Control output, drain electrode is connected with power output end, source electrode is connected with anode end, the input of described discharging current sample circuit is connected with the drain electrode of described 4th PMOS, the drain current of described 4th PMOS of sampling.
8. the charge-discharge controller with battery current detection circuit according to claim 7, it is characterized in that: described discharging current sample circuit comprises the 5th PMOS, formation the 4th current mirror of described 5th PMOS and described 4th PMOS, described discharging current sample circuit also comprises the 5th current mirror, 6th current mirror and the second operational amplifier, described 4th current mirror, 5th current mirror is connected successively with the 6th current mirror, two inputs of described second operational amplifier are connected with the drain electrode of the 5th PMOS with the drain electrode of described 4th PMOS respectively, output is connected with the common gate of described 5th current mirror, the common source of described 5th current mirror is connected with battery cathode end, described 6th current mirror common source is connected with the common source of the 4th current mirror, the output of described 6th current mirror is the output of described discharging current sample circuit.
9. the charge-discharge controller with battery current detection circuit according to claim 1 and 2, it is characterized in that: described discharge circuit comprises control of discharge module and the 4th PMOS, when described control of discharge module employing has the voltage descending DC-DC converter of two switch control rule outputs, described discharge circuit also comprises the second NMOS tube, second energy storage inductor and the second electric capacity, the grid of described 4th PMOS is connected with described two switch control rule outputs respectively with the grid of the second NMOS tube, the source electrode of described 4th PMOS is connected with anode end, the drain electrode of described second NMOS tube is connected with the drain electrode of described 4th PMOS, and be connected with power output end through described second energy storage inductor, source electrode is connected with battery cathode end, described second electric capacity is connected between described power output end and battery cathode end, the input of described discharging current sample circuit is connected with the drain electrode of described 4th PMOS, the mean value of the drain current of described 4th PMOS of sampling.
10. the charge-discharge controller with battery current detection circuit according to claim 9, it is characterized in that: described discharging current sample circuit comprises the 5th PMOS, formation the 4th current mirror of described 5th PMOS and described 4th PMOS, described discharging current sample circuit also comprises the 5th current mirror, 6th current mirror and the second operational amplifier, described 4th current mirror, 5th current mirror is connected successively with the 6th current mirror, two inputs of described second operational amplifier are connected with the drain electrode of the 5th PMOS with the drain electrode of described 4th PMOS respectively, output is connected with the common gate of described 5th current mirror, the common source of described 5th current mirror is connected with battery cathode end, described 6th current mirror common source is connected with the common source of the 4th current mirror, described charge current sample circuit also comprises the second resistance, second voltage follower and the second sampling capacitance, one end of described second resistance is connected with battery cathode end, the other end is connected with the output of described 6th current mirror, and be connected to the input of described second voltage follower, between the output that described second sampling capacitance is connected to described second voltage follower and battery cathode end, the output of described second voltage follower connects the second low pass filter and the second voltage current adapter more in turn, the output of described second voltage current adapter is as the output of described discharging current sample circuit.
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| CN108227805A (en) * | 2017-12-25 | 2018-06-29 | 南京中感微电子有限公司 | A kind of band gap reference voltage source circuit |
| CN108279727A (en) * | 2017-12-25 | 2018-07-13 | 南京中感微电子有限公司 | Improved current generating circuit |
| CN108319316A (en) * | 2017-12-25 | 2018-07-24 | 南京中感微电子有限公司 | A kind of band gap reference voltage source circuit |
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| CN111551864A (en) * | 2020-06-22 | 2020-08-18 | 微思机器人(深圳)有限公司 | High-precision bidirectional current detection circuit applied to battery charging and discharging and method thereof |
| CN111551864B (en) * | 2020-06-22 | 2022-07-15 | 微思机器人(深圳)有限公司 | High-precision bidirectional current detection circuit applied to battery charging and discharging and method thereof |
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