CN104853506A - Gate driving type blue light LED protection system based on multipath output voltage stabilizing power supply - Google Patents
Gate driving type blue light LED protection system based on multipath output voltage stabilizing power supply Download PDFInfo
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- CN104853506A CN104853506A CN201510307083.3A CN201510307083A CN104853506A CN 104853506 A CN104853506 A CN 104853506A CN 201510307083 A CN201510307083 A CN 201510307083A CN 104853506 A CN104853506 A CN 104853506A
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Abstract
The invention discloses a gate driving type blue light LED protection system based on a multipath output voltage stabilizing power supply. The system is composed of a grid driving circuit, a logic control circuit, a power amplifier P1, a power amplifier P2, a pulse comparator U1, a pulse comparator U2, an oscillator, a main error amplifier W1, a safety error amplifier W2, the multipath output voltage stabilizing power supply, a field effect transistor MOS1, a field effect transistor MOS2, a field effect transistor MOS3, a field effect transistor MOS4, a field effect transistor MOS5, a field effect transistor MOS6, a light beam excitation type logic amplification circuit connected with the anode input end of the main error amplifier W1, and a gate driving circuit connected in series between the light beam excitation type logic amplification circuit and the safety error amplifier W2 According to the invention, by use of the gate driving circuit, the LED protection system can be rapidly driven, the response speed of the system can be faster, and an LED can be better protected.
Description
Technical field
The present invention relates to a kind of LED protection circuit, specifically refer to the gate-drive type blue-ray LED protection system based on multiple-channel output stabilized voltage power supply.
Background technology
At present, because LED has, energy consumption is low, the feature such as long service life and safety and environmental protection, and it has become one of main product of people's life lighting.Because LED is different from traditional incandescent lamp, its needs are driven by special drive circuit, have therefore just occurred the protection system for preventing drive system from disturbing from inner or outside unfavorable factor miscellaneous on the market.
Although these protection systems all possess short-circuit protection function and overheat protective function mostly, the structure of these protection systems often all more complicated, and reaction speed is comparatively slow, can not protect LED timely.
Summary of the invention
The object of the invention is to overcome complex structure existing for current LED protection system and the slower defect of reaction speed, the gate-drive type blue-ray LED protection system based on multiple-channel output stabilized voltage power supply is provided.
Object of the present invention is achieved through the following technical solutions: based on the gate-drive type blue-ray LED protection system of multiple-channel output stabilized voltage power supply, it is by gate driver circuit, logic control circuit, the power amplifier P1 that andlogic control circuit is connected and power amplifier P2, the pulse comparator U1 that andlogic control circuit is connected and pulse comparator U2, the field effect transistor MOS1 that grid is all connected with gate driver circuit, field effect transistor MOS2, field effect transistor MOS3 and field effect transistor MOS4, be serially connected in the oscillator between the negative input of pulse comparator U1 and the negative input of pulse comparator U2, the main error amplifier W1 that output is all connected with the electrode input end of pulse comparator U2 with the electrode input end of pulse comparator U1 and error on the safe side amplifier W2, the field effect transistor MOS5 that source electrode is all connected with the output of error on the safe side amplifier W2 with main error amplifier W1 and field effect transistor MOS6, respectively with field effect transistor MOS1, field effect transistor MOS3, power amplifier P1 is connected with power amplifier P2 and provides the multiple-channel output stabilized voltage power supply of electric current for it, the beam excitation formula logic amplifying circuit be connected with the electrode input end of main error amplifier W1, and the gate drive circuit between the electrode input end being serially connected in beam excitation formula logic amplifying circuit and error on the safe side amplifier W2 forms.
Further, described gate drive circuit is by triode Q1, triode Q2, field effect transistor MOS7, unidirectional thyristor D11, negative pole is connected with the base stage of triode Q2, the electric capacity C16 that positive pole is then connected with beam excitation formula logic amplifying circuit, the resistance R17 be in parallel with electric capacity C16, one end is connected with the positive pole of electric capacity C16, the resistance R16 of ground connection while the other end is then connected with the emitter of triode Q2, one end is connected with the collector electrode of triode Q1, the resistance R15 that the other end is then connected with the positive pole of electric capacity C16, be serially connected in the resistance R18 between the collector electrode of triode Q1 and base stage, N pole is connected with the collector electrode of triode Q2, the diode D10 that P pole is then connected with the grid of field effect transistor MOS7 after resistance R19, positive pole is connected with the emitter of triode Q2, the electric capacity C17 that negative pole is then connected with the grid of field effect transistor MOS7 after resistance R20, positive pole is connected with the negative pole of electric capacity C17, the electric capacity C18 that negative pole is then connected with the P pole of unidirectional thyristor D11, and positive pole is connected with the control pole of unidirectional thyristor D11, the electric capacity C19 that negative pole is then connected with the electrode input end of error on the safe side amplifier W2 forms, the base stage of described triode Q1 is connected with the collector electrode of triode Q2, its emitter is then connected with the P pole of diode D10, grounded drain, its source electrode of described field effect transistor MOS7 are then connected with the N pole of unidirectional thyristor D11.
Described beam excitation formula logic amplifying circuit is by power amplifier P3, NAND gate IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the electrode input end of power amplifier P3, the polar capacitor C13 of positive pole ground connection after optical diode D8, one end is connected with the positive pole of polar capacitor C13, the resistance R1 of other end ground connection after diode D9, positive pole is connected with the tie point of diode D9 with resistance R1, the polar capacitor C15 of minus earth, one end is connected with the negative input of NAND gate IC1, the resistance R2 that the other end is connected with the electrode input end of power amplifier P3, be serially connected in the resistance R3 between the negative input of power amplifier P3 and output, one end is connected with the output of NAND gate IC1, the resistance R4 that the other end is connected with the negative input of NAND gate IC3, positive pole is connected with the output of NAND gate IC2, the electric capacity C14 that negative pole is connected with the negative input of NAND gate IC3, and one end is connected with the positive pole of polar capacitor C15, the resistance R5 that the other end is connected with the negative input of NAND gate IC2 forms, the electrode input end of described NAND gate IC1 is connected with the negative input of power amplifier P3, and its output is connected with the electrode input end of NAND gate IC2, the electrode input end of NAND gate IC3 is connected with the output of power amplifier P3, and its output is then connected with the positive pole of electric capacity C16, the positive pole of described polar capacitor C13 is then connected with the electrode input end of main error amplifier W1, the drain electrode of described field effect transistor MOS1 is connected with the source electrode of field effect transistor MOS2, and its source electrode is connected with the V1 voltage end of multiple-channel output stabilized voltage power supply, the grid of field effect transistor MOS2 is connected with the electrode input end of power amplifier P1, its grounded drain, the drain electrode of field effect transistor MOS3 is connected with the source electrode of field effect transistor MOS4, and its source electrode is connected with the V1 voltage end of multiple-channel output stabilized voltage power supply, the grid of field effect transistor MOS4 is connected with the electrode input end of power amplifier P2, its grounded drain, the negative input of described power amplifier P1 is connected with the V2 voltage end of multiple-channel output stabilized voltage power supply, and the negative input of power amplifier P2 is connected with the V3 voltage end of multiple-channel output stabilized voltage power supply, the output of the electrode input end of described pulse comparator U1, the electrode input end of pulse comparator U2, main error amplifier W1 is all connected with the V2 voltage end of multiple-channel output stabilized voltage power supply with the output of error on the safe side amplifier W2, the negative input of main error amplifier W1 and all external 1.23V voltage of negative input of error on the safe side amplifier W2, the drain electrode of described field effect transistor MOS5 and the equal ground connection of the drain electrode of field effect transistor MOS6.
Described multiple-channel output stabilized voltage power supply is by transformer T, the first output circuit be connected with the secondary coil L2 of transformer T, the second output circuit be connected with the secondary coil L3 of transformer T and the 3rd output circuit be connected with the secondary coil L4 of transformer T form.
Described first output circuit is made up of diode D1, electric capacity C1, electric capacity C2 and inductance L 5, and the P pole of described diode D1 is connected with the Same Name of Ends of secondary coil L2, its N pole is then connected with the non-same polarity of secondary coil L2 after electric capacity C1; One end of inductance L 5 is connected with the tie point of electric capacity C1 with diode D1, the other end is then connected with the non-same polarity of secondary coil L2 after electric capacity C2; The two ends of electric capacity C2 then form V1 voltage end.
Described second output circuit is made up of diode rectifier Z1, electric capacity C3, electric capacity C4, electric capacity C5, electric capacity C6, integrated regulator W7806 and integrated regulator W7809; Input and the secondary coil L3 of described diode rectifier Z1 are in parallel, and the positive pole of electric capacity C3 is connected with the cathode output end of diode rectifier Z1, its negative pole is then connected with the cathode output end of diode rectifier Z1; The positive pole of electric capacity C4 is connected with the positive pole of electric capacity C3, its negative pole is connected with the positive pole of electric capacity C5, and the negative pole of electric capacity C5 is then connected with the negative pole of electric capacity C3; First output of integrated regulator W7806 is connected with the positive pole of electric capacity C4, the negative pole of its second output then electric capacity C4 is connected; First output of integrated regulator W7809 is connected with the positive pole of electric capacity C5, the negative pole of its second output then electric capacity C5 is connected, and electric capacity C6 is then serially connected between first output of integrated regulator W7809 and the 3rd output; 3rd output of described integrated regulator W7806 and the 3rd output of integrated regulator W7809 then form V2 voltage end.
Described 3rd output circuit is made up of diode rectifier Z2, electric capacity C7, electric capacity C8, electric capacity C9, diode D2 and integrated regulator W7809; Input and the secondary coil L4 of described diode rectifier Z2 are in parallel, between the cathode output end being then serially connected in diode rectifier Z2 of electric capacity C7 and cathode output end, electric capacity C8 and electric capacity C7 is in parallel, and electric capacity C9 is serially connected between the 3rd output of integrated regulator W7809 and the second output; Diode D2 is then serially connected between first output of integrated regulator W7809 and the 3rd output; The two ends of electric capacity C9 then form V3 voltage end.
Described logic control circuit by NAND gate IC4, the first logical links be connected with the electrode input end of NAND gate IC4 and the second logical links and filter delay circuit, and the not gate IC8 that input is connected with the output of NAND gate IC4 forms; The first described logical links is made up of not gate IC5, not gate IC6, resistance R13, diode D5, filter delay circuit, resistance R10, resistance R11, electric capacity C10 and diode D3; The output of the input NAND gate IC5 of this not gate IC6 is connected, and its output is then connected with the electrode input end of NAND gate IC4 after diode D5 through resistance R13 in turn; The input of the P pole NAND gate IC5 of diode D3 is connected, and its N pole is connected through the input of resistance R11 NAND gate IC5 after electric capacity C10 in turn, and resistance R10 is then in parallel with diode D3; Meanwhile, the tie point ground connection of described electric capacity C10 and resistance R11, the N pole of diode D3 is connected with the output of power amplifier P1, and the output of not gate IC6 is then all connected with the output of power amplifier P2 with the output of not gate IC8.
Described filter delay circuit is by electrochemical capacitor C12, and the resistance R14 be serially connected between the positive pole of electrochemical capacitor C12 and negative pole forms, and the positive pole of described electrochemical capacitor C12 is connected with the N pole of diode D5 and the electrode input end of NAND gate IC4 respectively.
The second described logical links is made up of XOR gate IC9, diode D4, diode D6, diode D7, resistance R12 and electric capacity C11; The P pole of described diode D6 is connected with the electrode input end of NAND gate IC4, and its N pole is connected with the first input end of XOR gate IC6; The input of the N pole NAND gate IC7 of diode D4 is connected, and its P pole is connected with the output of pulse comparator U1; Resistance R12 is then in parallel with diode D4; The positive pole of electric capacity C11 is connected with the N pole of diode D4, its minus earth; The N pole of diode D7 is connected with the first input end of XOR gate IC9, and its P pole is connected with the output of pulse comparator U1; The output of the second input NAND gate IC8 of XOR gate IC9 is connected, and the output of XOR gate IC9 is then connected with the output of pulse comparator U2.
The present invention comparatively prior art compares, and has the following advantages and beneficial effect:
(1) the present invention not only has the function of short-circuit protection, overvoltage protection and open-circuit-protection, and its power consumption is lower, is only 1/3 of conventional protection circuit power consumption.
(2) the present invention is provided with multiple-channel output stabilized voltage power supply, therefore can guarantee the need for electricity of protective circuit self, effectively can avoid external electromagnetic interference, improves the sensitivity and precision that control.
(3) the present invention also has undervoltage lockout function, effectively can overcome the late effect of conventional protection circuit.
(4) the present invention adopts gate drive circuit, and it can drive LED protection system fast, thus makes reaction speed of the present invention faster, can better protect LED.
Accompanying drawing explanation
Fig. 1 is overall structure schematic diagram of the present invention.
Fig. 2 is multiple-channel output stabilized voltage power supply structural representation of the present invention.
Fig. 3 is logic control circuit structural representation of the present invention.
Fig. 4 is gate drive circuit structural representation of the present invention.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
Embodiment
As shown in Figure 1, blue LED lamp protection system based on multiple-channel output stabilized voltage power supply of the present invention, it is by gate driver circuit, logic control circuit, power amplifier P1, power amplifier P2, pulse comparator U1, pulse comparator U2, oscillator, main error amplifier W1, error on the safe side amplifier W2, multiple-channel output stabilized voltage power supply and field effect transistor MOS1, field effect transistor MOS2, field effect transistor MOS3, field effect transistor MOS4, field effect transistor MOS5 and field effect transistor MOS6, the beam excitation formula logic amplifying circuit be connected with the electrode input end of main error amplifier W1, and the gate drive circuit between the electrode input end being serially connected in beam excitation formula logic amplifying circuit and error on the safe side amplifier W2 forms.
Wherein, gate drive circuit is emphasis of the present invention, as shown in Figure 4, by triode Q1, triode Q2, field effect transistor MOS7, unidirectional thyristor D11, negative pole is connected with the base stage of triode Q2, the electric capacity C16 that positive pole is then connected with beam excitation formula logic amplifying circuit, the resistance R17 be in parallel with electric capacity C16, one end is connected with the positive pole of electric capacity C16, the resistance R16 of ground connection while the other end is then connected with the emitter of triode Q2, one end is connected with the collector electrode of triode Q1, the resistance R15 that the other end is then connected with the positive pole of electric capacity C16, be serially connected in the resistance R18 between the collector electrode of triode Q1 and base stage, N pole is connected with the collector electrode of triode Q2, the diode D10 that P pole is then connected with the grid of field effect transistor MOS7 after resistance R19, positive pole is connected with the emitter of triode Q2, the electric capacity C17 that negative pole is then connected with the grid of field effect transistor MOS7 after resistance R20, positive pole is connected with the negative pole of electric capacity C17, the electric capacity C18 that negative pole is then connected with the P pole of unidirectional thyristor D11, and positive pole is connected with the control pole of unidirectional thyristor D11, the electric capacity C19 that negative pole is then connected with the electrode input end of error on the safe side amplifier W2 forms.
During connection, the base stage of described triode Q1 is connected with the collector electrode of triode Q2, its emitter is then connected with the P pole of diode D10.Grounded drain, its source electrode of described field effect transistor MOS7 are then connected with the N pole of unidirectional thyristor D11.
Wherein, this electric capacity C16 forms a reshaper together with resistance R17, and it can carry out Shape correction to signal.And triode Q2, triode Q1 and diode D10 then form an amplifier, this amplifier can do signal and amplify process.
Meanwhile, triode Q2 preferentially adopts NPN type triode, and triode Q1 then preferentially adopts PNP type triode, so then can provide enough gate currents, drives better to trigger field effect transistor MOS7.Meanwhile, in order to eliminate the oscillatory occurences that may occur, the electric capacity C17 in this gate drive circuit, electric capacity C18 and resistance R20 then form a damping filter, and it is for oscillation-damped phenomenon.
Described beam excitation formula logic amplifying circuit is primarily of power amplifier P3, NAND gate IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the electrode input end of power amplifier P3, the polar capacitor C13 of positive pole ground connection after optical diode D8, one end is connected with the positive pole of polar capacitor C13, the resistance R1 of other end ground connection after diode D9, positive pole is connected with the tie point of diode D9 with resistance R1, the polar capacitor C15 of minus earth, one end is connected with the negative input of NAND gate IC1, the resistance R2 that the other end is connected with the electrode input end of power amplifier P3, be serially connected in the resistance R3 between the negative input of power amplifier P3 and output, one end is connected with the output of NAND gate IC1, the resistance R4 that the other end is connected with the negative input of NAND gate IC3, positive pole is connected with the output of NAND gate IC2, the electric capacity C14 that negative pole is connected with the negative input of NAND gate IC3, and one end is connected with the positive pole of polar capacitor C15, the resistance R5 that the other end is connected with the negative input of NAND gate IC2 forms.
Meanwhile, the electrode input end of described NAND gate IC1 is connected with the negative input of power amplifier P3, and its output is connected with the electrode input end of NAND gate IC2; The electrode input end of NAND gate IC3 is connected with the output of power amplifier P3, and its output is then connected with the positive pole of electric capacity C16.
Described gate driver circuit is used for providing gate drive voltage for field effect transistor MOS1, field effect transistor MOS2, field effect transistor MOS3 and field effect transistor MOS4, and logic control circuit is then for Logic judgment of the present invention and process.Due to the technology that this gate driver circuit is comparatively ripe at present, therefore the present invention does not just do too much description at this.
As shown in Figure 2, this multiple-channel output stabilized voltage power supply is by transformer T, the first output circuit be connected with the secondary coil L2 of transformer T, the second output circuit be connected with the secondary coil L3 of transformer T and the 3rd output circuit be connected with the secondary coil L4 of transformer T form.
Wherein, the first output circuit is made up of diode D1, electric capacity C1, electric capacity C2 and inductance L 5, and the P pole of described diode D1 is connected with the Same Name of Ends of secondary coil L2, its N pole is then connected with the non-same polarity of secondary coil L2 after electric capacity C1; One end of inductance L 5 is connected with the tie point of electric capacity C1 with diode D1, the other end is then connected with the non-same polarity of secondary coil L2 after electric capacity C2; The two ends of electric capacity C2 then form V1 voltage end.
Second output circuit is made up of diode rectifier Z1, electric capacity C3, electric capacity C4, electric capacity C5, electric capacity C6, integrated regulator W7806 and integrated regulator W7809; Input and the secondary coil L3 of described diode rectifier Z1 are in parallel, and the positive pole of electric capacity C3 is connected with the cathode output end of diode rectifier Z1, its negative pole is then connected with the cathode output end of diode rectifier Z1; The positive pole of electric capacity C4 is connected with the positive pole of electric capacity C3, its negative pole is connected with the positive pole of electric capacity C5, and the negative pole of electric capacity C5 is then connected with the negative pole of electric capacity C3; First output of integrated regulator W7806 is connected with the positive pole of electric capacity C4, the negative pole of its second output then electric capacity C4 is connected.
First output of integrated regulator W7809 is connected with the positive pole of electric capacity C5, the negative pole of its second output then electric capacity C5 is connected, and electric capacity C6 is then serially connected between first output of integrated regulator W7809 and the 3rd output; 3rd output of described integrated regulator W7806 and the 3rd output of integrated regulator W7809 then form V2 voltage end.
Because the second output has two groups of magnitudes of voltage, i.e.+6V as described in Figure 2 and-6V, therefore in use, the application only need connect the link of its+6V.
3rd output circuit is made up of diode rectifier Z2, electric capacity C7, electric capacity C8, electric capacity C9, diode D2 and integrated regulator W7809; Input and the secondary coil L4 of described diode rectifier Z2 are in parallel, between the cathode output end being then serially connected in diode rectifier Z2 of electric capacity C7 and cathode output end, electric capacity C8 and electric capacity C7 is in parallel, and electric capacity C9 is serially connected between the 3rd output of integrated regulator W7809 and the second output; Diode D2 is then serially connected between first output of integrated regulator W7809 and the 3rd output; The two ends of electric capacity C9 then form V3 voltage end
During connection, the grid of described field effect transistor MOS1 will be connected with gate driver circuit, and its drain electrode is connected with the source electrode of field effect transistor MOS2, and its source electrode then needs to be connected with the V1 voltage end of multiple-channel output stabilized voltage power supply.The grid of field effect transistor MOS2 is connected with the electrode input end of gate driver circuit with power amplifier P1 simultaneously, its grounded drain.The grid of field effect transistor MOS3 is connected with gate driver circuit, and its drain electrode is connected with the source electrode of field effect transistor MOS4, and its source electrode is connected with the V1 voltage end of multiple-channel output stabilized voltage power supply equally.The grid of field effect transistor MOS4 is connected with the electrode input end of gate driver circuit with power amplifier P2 simultaneously, its grounded drain.
The output of described power amplifier P1 and power amplifier P2 then all andlogic control circuit be connected.Consider the actual features of logic control circuit, the negative input of the power amplifier P1 in the application needs the V2 voltage end of external multiple-channel output stabilized voltage power supply, the negative input of power amplifier P2 then needs the V3 voltage end of external multiple-channel output stabilized voltage power supply, the input voltage of the power amplifier P2 namely in the application lower than the input voltage of power amplifier P1, just must can guarantee the normal work of logic control circuit.
Meanwhile, pulse comparator U1 also wants andlogic control circuit to be connected with the output of pulse comparator U2.Oscillator is then serially connected between the negative input of pulse comparator U1 and the negative input of pulse comparator U2, to guarantee that this oscillator can for pulse comparator U1 and pulse comparator U2 input pulse signal.
The output of described main error amplifier W1 and error on the safe side amplifier W2, and the electrode input end of pulse comparator U1 all will be connected with the V2 voltage end of multiple-channel output stabilized voltage power supply with the electrode input end of pulse comparator U2, so as by this multiple-channel output stabilized voltage power supply be main error amplifier W1, error on the safe side amplifier W2, pulse comparator U1 and pulse comparator U2 provide operating voltage.
Wherein, main error amplifier W1 is used for the process being responsible for the application's medial error coefficient, and error on the safe side amplifier W2 is then for preventing short circuit or instantaneous high pressure to the destruction of native system.During connection, the negative input of main error amplifier W1 and all external 1.23V voltage of negative input of error on the safe side amplifier W2, meanwhile, the electrode input end of this error on the safe side amplifier W2 then needs to be connected with the negative pole of electric capacity C19.
The voltage of the grid of described field effect transistor MOS5 and all external+1.23V of the grid of field effect transistor MOS6, field effect transistor MOS5 is then connected with the output of error on the safe side amplifier W2 with main error amplifier W1 respectively with the source electrode of field effect transistor MOS6, meanwhile, the drain electrode of field effect transistor MOS5 and the equal ground connection of the drain electrode of field effect transistor MOS6.
The structure of logic control circuit of the present invention as shown in Figure 3, it is by not gate IC5, the not gate IC6 that the output of input NAND gate IC5 is connected, the non-gate ic7 that output is connected with the negative input of NAND gate IC4, and the first logical links be connected with the electrode input end of NAND gate IC4 and the second logical links form.
Wherein, this first logical links is made up of not gate IC5, not gate IC6, resistance R13, diode D5, filter delay circuit, resistance R10, resistance R11, electric capacity C10 and diode D3.During connection, the output of the input NAND gate IC5 of not gate IC6 is connected, and its output is then connected with the electrode input end of NAND gate IC4 after diode D5 through resistance R13 in turn.Meanwhile, filter delay circuit will be connected with the electrode input end of NAND gate IC4.
The input of the P pole NAND gate IC5 of diode D3 is connected, its N pole is connected through the input of resistance R11 NAND gate IC5 after electric capacity C10 in turn, namely needs in turn to form an electric loop with the P pole of diode D3 after resistance R11 and electric capacity C10 from the N pole of diode D3.Resistance R10 is then in parallel with diode D3.Meanwhile, the tie point ground connection of described electric capacity C10 and resistance R11, the N pole of diode D3 needs to be connected with the output of power amplifier P1, and the output of not gate IC6 is then all connected with the output of power amplifier P2 with the output of not gate IC8.
Described filter delay circuit is by electrochemical capacitor C12, and the resistance R14 be serially connected between the positive pole of electrochemical capacitor C12 and negative pole forms, during connection, the N pole of diode D5 will be connected with the positive pole of this electrochemical capacitor C12, and namely the electrode input end of NAND gate IC4 will be connected with the positive pole of electrochemical capacitor C12.
The second described logical links is made up of XOR gate IC9, diode D4, diode D6, diode D7, resistance R12 and electric capacity C11.During connection, the P pole of diode D6 is connected with the electrode input end of NAND gate IC4, and its N pole is connected with the first input end of XOR gate IC6.The input of the N pole NAND gate IC7 of diode D4 is connected, and its P pole is connected with the output of pulse comparator U1; Resistance R12 is then in parallel with diode D4.
The positive pole of electric capacity C11 is connected with the N pole of diode D4, its minus earth; The N pole of diode D7 is connected with the first input end of XOR gate IC9, and its P pole is connected with the output of pulse comparator U1.Meanwhile, the output of the second input NAND gate IC8 of XOR gate IC9 is connected, and the output of XOR gate IC9 is then connected with the output of pulse comparator U2.
As mentioned above, just the present invention can well be realized.
Claims (7)
1. based on the gate-drive type blue-ray LED protection system of multiple-channel output stabilized voltage power supply, it is by gate driver circuit, logic control circuit, the power amplifier P1 that andlogic control circuit is connected and power amplifier P2, the pulse comparator U1 that andlogic control circuit is connected and pulse comparator U2, the field effect transistor MOS1 that grid is all connected with gate driver circuit, field effect transistor MOS2, field effect transistor MOS3 and field effect transistor MOS4, be serially connected in the oscillator between the negative input of pulse comparator U1 and the negative input of pulse comparator U2, the main error amplifier W1 that output is all connected with the electrode input end of pulse comparator U2 with the electrode input end of pulse comparator U1 and error on the safe side amplifier W2, the field effect transistor MOS5 that source electrode is all connected with the output of error on the safe side amplifier W2 with main error amplifier W1 and field effect transistor MOS6, respectively with field effect transistor MOS1, field effect transistor MOS3, power amplifier P1 is connected with power amplifier P2 and provides the multiple-channel output stabilized voltage power supply of electric current for it, and the beam excitation formula logic amplifying circuit to be connected with the electrode input end of main error amplifier W1 forms, it is characterized in that, between beam excitation formula logic amplifying circuit and the electrode input end of error on the safe side amplifier W2, be also serially connected with gate drive circuit, described gate drive circuit is by triode Q1, triode Q2, field effect transistor MOS7, unidirectional thyristor D11, negative pole is connected with the base stage of triode Q2, the electric capacity C16 that positive pole is then connected with beam excitation formula logic amplifying circuit, the resistance R17 be in parallel with electric capacity C16, one end is connected with the positive pole of electric capacity C16, the resistance R16 of ground connection while the other end is then connected with the emitter of triode Q2, one end is connected with the collector electrode of triode Q1, the resistance R15 that the other end is then connected with the positive pole of electric capacity C16, be serially connected in the resistance R18 between the collector electrode of triode Q1 and base stage, N pole is connected with the collector electrode of triode Q2, the diode D10 that P pole is then connected with the grid of field effect transistor MOS7 after resistance R19, positive pole is connected with the emitter of triode Q2, the electric capacity C17 that negative pole is then connected with the grid of field effect transistor MOS7 after resistance R20, positive pole is connected with the negative pole of electric capacity C17, the electric capacity C18 that negative pole is then connected with the P pole of unidirectional thyristor D11, and positive pole is connected with the control pole of unidirectional thyristor D11, the electric capacity C19 that negative pole is then connected with the electrode input end of error on the safe side amplifier W2 forms, the base stage of described triode Q1 is connected with the collector electrode of triode Q2, its emitter is then connected with the P pole of diode D10, grounded drain, its source electrode of described field effect transistor MOS7 are then connected with the N pole of unidirectional thyristor D11.
2. the gate-drive type blue-ray LED protection system based on multiple-channel output stabilized voltage power supply according to claim 1, it is characterized in that, described beam excitation formula logic amplifying circuit is by power amplifier P3, NAND gate IC1, NAND gate IC2, NAND gate IC3, negative pole is connected with the electrode input end of power amplifier P3, the polar capacitor C13 of positive pole ground connection after optical diode D8, one end is connected with the positive pole of polar capacitor C13, the resistance R1 of other end ground connection after diode D9, positive pole is connected with the tie point of diode D9 with resistance R1, the polar capacitor C15 of minus earth, one end is connected with the negative input of NAND gate IC1, the resistance R2 that the other end is connected with the electrode input end of power amplifier P3, be serially connected in the resistance R3 between the negative input of power amplifier P3 and output, one end is connected with the output of NAND gate IC1, the resistance R4 that the other end is connected with the negative input of NAND gate IC3, positive pole is connected with the output of NAND gate IC2, the electric capacity C14 that negative pole is connected with the negative input of NAND gate IC3, and one end is connected with the positive pole of polar capacitor C15, the resistance R5 that the other end is connected with the negative input of NAND gate IC2 forms, the electrode input end of described NAND gate IC1 is connected with the negative input of power amplifier P3, and its output is connected with the electrode input end of NAND gate IC2, the electrode input end of NAND gate IC3 is connected with the output of power amplifier P3, and its output is then connected with the positive pole of electric capacity C16, the positive pole of described polar capacitor C13 is then connected with the electrode input end of main error amplifier W1, the drain electrode of described field effect transistor MOS1 is connected with the source electrode of field effect transistor MOS2, and its source electrode is connected with the V1 voltage end of multiple-channel output stabilized voltage power supply, the grid of field effect transistor MOS2 is connected with the electrode input end of power amplifier P1, its grounded drain, the drain electrode of field effect transistor MOS3 is connected with the source electrode of field effect transistor MOS4, and its source electrode is connected with the V1 voltage end of multiple-channel output stabilized voltage power supply, the grid of field effect transistor MOS4 is connected with the electrode input end of power amplifier P2, its grounded drain, the negative input of described power amplifier P1 is connected with the V2 voltage end of multiple-channel output stabilized voltage power supply, and the negative input of power amplifier P2 is connected with the V3 voltage end of multiple-channel output stabilized voltage power supply, the output of the electrode input end of described pulse comparator U1, the electrode input end of pulse comparator U2, main error amplifier W1 is all connected with the V2 voltage end of multiple-channel output stabilized voltage power supply with the output of error on the safe side amplifier W2, the negative input of main error amplifier W1 and all external 1.23V voltage of negative input of error on the safe side amplifier W2, the drain electrode of described field effect transistor MOS5 and the equal ground connection of the drain electrode of field effect transistor MOS6.
3. the gate-drive type blue-ray LED protection system based on multiple-channel output stabilized voltage power supply according to claim 2; it is characterized in that; described multiple-channel output stabilized voltage power supply is by transformer T; the first output circuit be connected with the secondary coil L2 of transformer T, the second output circuit be connected with the secondary coil L3 of transformer T and the 3rd output circuit be connected with the secondary coil L4 of transformer T form.
4. the gate-drive type blue-ray LED protection system based on multiple-channel output stabilized voltage power supply according to claim 3, it is characterized in that, described first output circuit is made up of diode D1, electric capacity C1, electric capacity C2 and inductance L 5, and the P pole of described diode D1 is connected with the Same Name of Ends of secondary coil L2, its N pole is then connected with the non-same polarity of secondary coil L2 after electric capacity C1; One end of inductance L 5 is connected with the tie point of electric capacity C1 with diode D1, the other end is then connected with the non-same polarity of secondary coil L2 after electric capacity C2; The two ends of electric capacity C2 then form V1 voltage end.
5. the gate-drive type blue-ray LED protection system based on multiple-channel output stabilized voltage power supply according to claim 4, it is characterized in that, described second output circuit is made up of diode rectifier Z1, electric capacity C3, electric capacity C4, electric capacity C5, electric capacity C6, integrated regulator W7806 and integrated regulator W7809; Input and the secondary coil L3 of described diode rectifier Z1 are in parallel, and the positive pole of electric capacity C3 is connected with the cathode output end of diode rectifier Z1, its negative pole is then connected with the cathode output end of diode rectifier Z1; The positive pole of electric capacity C4 is connected with the positive pole of electric capacity C3, its negative pole is connected with the positive pole of electric capacity C5, and the negative pole of electric capacity C5 is then connected with the negative pole of electric capacity C3; First output of integrated regulator W7806 is connected with the positive pole of electric capacity C4, the negative pole of its second output then electric capacity C4 is connected; First output of integrated regulator W7809 is connected with the positive pole of electric capacity C5, the negative pole of its second output then electric capacity C5 is connected, and electric capacity C6 is then serially connected between first output of integrated regulator W7809 and the 3rd output; 3rd output of described integrated regulator W7806 and the 3rd output of integrated regulator W7809 then form V2 voltage end.
6. the gate-drive type blue-ray LED protection system based on multiple-channel output stabilized voltage power supply according to claim 5, it is characterized in that, described 3rd output circuit is made up of diode rectifier Z2, electric capacity C7, electric capacity C8, electric capacity C9, diode D2 and integrated regulator W7809; Input and the secondary coil L4 of described diode rectifier Z2 are in parallel, between the cathode output end being then serially connected in diode rectifier Z2 of electric capacity C7 and cathode output end, electric capacity C8 and electric capacity C7 is in parallel, and electric capacity C9 is serially connected between the 3rd output of integrated regulator W7809 and the second output; Diode D2 is then serially connected between first output of integrated regulator W7809 and the 3rd output; The two ends of electric capacity C9 then form V3 voltage end.
7. the gate-drive type blue-ray LED protection system based on multiple-channel output stabilized voltage power supply according to claim 6, it is characterized in that: described logic control circuit is by NAND gate IC4, the first logical links be connected with the electrode input end of NAND gate IC4 and the second logical links and filter delay circuit, and the not gate IC8 that input is connected with the output of NAND gate IC4 forms; The first described logical links is made up of not gate IC5, not gate IC6, resistance R13, diode D5, filter delay circuit, resistance R10, resistance R11, electric capacity C10 and diode D3; The output of the input NAND gate IC5 of this not gate IC6 is connected, and its output is then connected with the electrode input end of NAND gate IC4 after diode D5 through resistance R13 in turn; The input of the P pole NAND gate IC5 of diode D3 is connected, and its N pole is connected through the input of resistance R11 NAND gate IC5 after electric capacity C10 in turn, and resistance R10 is then in parallel with diode D3; Meanwhile, the tie point ground connection of described electric capacity C10 and resistance R11, the N pole of diode D3 is connected with the output of power amplifier P1, and the output of not gate IC6 is then all connected with the output of power amplifier P2 with the output of not gate IC8;
Described filter delay circuit is by electrochemical capacitor C12, and the resistance R14 be serially connected between the positive pole of electrochemical capacitor C12 and negative pole forms, and the positive pole of described electrochemical capacitor C12 is connected with the N pole of diode D5 and the electrode input end of NAND gate IC4 respectively;
The second described logical links is made up of XOR gate IC9, diode D4, diode D6, diode D7, resistance R12 and electric capacity C11; The P pole of described diode D6 is connected with the electrode input end of NAND gate IC4, and its N pole is connected with the first input end of XOR gate IC6; The input of the N pole NAND gate IC7 of diode D4 is connected, and its P pole is connected with the output of pulse comparator U1; Resistance R12 is then in parallel with diode D4; The positive pole of electric capacity C11 is connected with the N pole of diode D4, its minus earth; The N pole of diode D7 is connected with the first input end of XOR gate IC9, and its P pole is connected with the output of pulse comparator U1; The output of the second input NAND gate IC8 of XOR gate IC9 is connected, and the output of XOR gate IC9 is then connected with the output of pulse comparator U2.
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| CN201510307083.3A CN104853506A (en) | 2014-11-25 | 2015-06-06 | Gate driving type blue light LED protection system based on multipath output voltage stabilizing power supply |
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| CN2014106874377 | 2014-11-25 | ||
| CN201510307083.3A CN104853506A (en) | 2014-11-25 | 2015-06-06 | Gate driving type blue light LED protection system based on multipath output voltage stabilizing power supply |
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| CN201510307083.3A Pending CN104853506A (en) | 2014-11-25 | 2015-06-06 | Gate driving type blue light LED protection system based on multipath output voltage stabilizing power supply |
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| WO2019041655A1 (en) * | 2017-09-01 | 2019-03-07 | 常州市派腾电子技术服务有限公司 | Voltage output circuit and atomizing device |
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