CN104851425A - High-definition voice identification system based on symmetric triode amplification circuit - Google Patents

High-definition voice identification system based on symmetric triode amplification circuit Download PDF

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CN104851425A
CN104851425A CN201510290828.XA CN201510290828A CN104851425A CN 104851425 A CN104851425 A CN 104851425A CN 201510290828 A CN201510290828 A CN 201510290828A CN 104851425 A CN104851425 A CN 104851425A
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triode
pole
resistance
diode
electric capacity
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CN104851425B (en
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刘霖
刘永
邱会中
杨先明
张晓奕
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Ningbo Momi Innovation Works Electronic Technology Co Ltd
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Ningbo Momi Innovation Works Electronic Technology Co Ltd
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Abstract

The invention discloses a high-definition voice identification system based on a symmetric triode amplification circuit. The system is composed of a voice acquisition module (8), a master control unit (1), a voice database (2), a feature extraction module (3), a voice recognition module (4), an audio encoding module (7), a preprocessing module (6), and an endpoint detection module (5). The voice database (2), the feature extraction module (3), and the voice recognition module (4) are connected with the master control unit (1); the audio encoding module (7) is connected with the voice acquisition module (8); the preprocessing module (6) is connected with the audio encoding module (7); and the endpoint detection module (5) is connected with the preprocessing module (6). The system is characterized in that a symmetric triode amplification circuit (9) is also connected in series between the endpoint detection module (5) and the master control unit (1). According to the invention, with the symmetric triode amplification circuit, the signal can be amplified without any distortion and thus the system can identify the signal conveniently, thereby improving the identification precision of the system and thus avoiding unnecessary trouble for people caused by wrong identification.

Description

A kind of high definition speech recognition system based on symmetrical expression transistor amplifier
Technical field
The present invention relates to a kind of speech recognition system, specifically refer to a kind of high definition speech recognition system based on symmetrical expression transistor amplifier.
Background technology
Speech recognition, as a cross discipline, starts to move towards market from laboratory in recent years.In today of scientific and technological development, speech recognition technology extensively enters into the every field such as industry, household electrical appliances, communication, automotive electronics, medical treatment, home services, consumption electronic product, brings huge change to the life of people and production.But existing commercially used its accuracy of identification of speech recognition system is not high, easily occurs the existing picture of wrong identification, has brought very large trouble.
Summary of the invention
The object of the invention is to overcome the defect that its accuracy of identification of speech recognition system traditional is at present not high, a kind of high definition speech recognition system based on symmetrical expression transistor amplifier is provided.
Object of the present invention is achieved through the following technical solutions: a kind of high definition speech recognition system based on symmetrical expression transistor amplifier, it comprises voice acquisition module, main control unit, the sound bank be connected with main control unit, characteristic extracting module, sound identification module, the audio coding module be connected with voice acquisition module, the pretreatment module be connected with audio coding module, and the endpoint detection module to be connected with pretreatment module, in order to reach object of the present invention, the present invention is also serially connected with symmetrical expression transistor amplifier between endpoint detection module and main control unit.
Further, described symmetrical expression transistor amplifier is by triode Q7, triode Q8, unidirectional thyristor D12, unidirectional thyristor D13, negative pole is connected with the P pole of unidirectional thyristor D12, the electric capacity C7 that positive pole is then connected with the N pole of unidirectional thyristor D12 after resistance R15, N pole is connected with the positive pole of electric capacity C7, the diode D10 that P pole is then connected with the base stage of triode Q7, negative pole is connected with the base stage of triode Q7, positive pole is then as the electric capacity C5 of the input end of this symmetrical expression transistor amplifier, one end is connected with the collector of triode Q7, the resistance R17 that the other end is then connected with+12V voltage, one end is connected with the emitter of triode Q7, the resistance R18 that the other end is then connected with the emitter of triode Q8 after resistance R19, N pole is connected with the positive pole of electric capacity C5, the diode D9 that P pole is then connected with the base stage of triode Q8 after electric capacity C6, one end is connected with the P pole of diode D9, the resistance R16 that the other end is then connected with the N pole of unidirectional thyristor D13, N pole is connected with the base stage of triode Q8, the diode D11 that P pole is then connected with the P pole of unidirectional thyristor D13 after electric capacity C8, and one end is connected with the collector of triode Q8, the resistance R20 that the other end then connects-12V voltage forms, the N pole of described unidirectional thyristor D12 is extremely all connected with the tie point of resistance R19 with resistance R18 with the N of unidirectional thyristor D13, as the output terminal of this symmetrical expression transistor amplifier while the control pole of unidirectional thyristor D12 is connected with the control pole of unidirectional thyristor D13.
Described pretreatment module is then by triode trigger circuit, and the testing circuit be connected with triode trigger circuit and self-maintained circuit form; Described self-maintained circuit is also connected with this testing circuit.
Described triode trigger circuit are by triode Q1, triode Q2, triode Q3, positive pole is connected with the base stage of triode Q3 after diode D2, the electric capacity C1 that negative pole is then connected with self-maintained circuit, N pole is connected with the base stage of triode Q2, the diode D1 that P pole is then connected with the collector of triode Q1, one end is connected with the base stage of triode Q2, the resistance R3 that the other end is then connected with the collector of triode Q3 after resistance R4, positive pole is connected with the base stage of triode Q1, the electric capacity C2 that negative pole is then connected with testing circuit after resistance R1, one end is connected with the base stage of triode Q3, the resistance R2 that the other end is then connected with the emitter of triode Q2, the electric capacity C3 be in parallel with resistance R2, P pole is connected with the emitter of triode Q3 after resistance R5 through diode D3 in turn, the diode D4 that N pole is then connected with self-maintained circuit forms, the grounded emitter of described triode Q1, its collector are then as the input end of these triode trigger circuit, the collector of described triode Q2 is connected with its base stage, its emitter is then connected with self-maintained circuit, the emitter of triode Q3 is also connected with testing circuit, resistance R3 connects+12V voltage while being connected with testing circuit with the tie point of resistance R4.
Described testing circuit is by detection chip U, and electric capacity C4, resistance R6, resistance R7 and diode D5 form; One end of described resistance R6 is connected with the emitter of triode Q3, its other end is then connected with the LBI pin of detection chip U; The positive pole of electric capacity C4 is connected with the tie point of resistance R4 with resistance R3, its negative pole is then connected with the VBAT pin of detection chip U; The P pole of diode D5 is connected with the LBO pin of detection chip U, its N pole is then connected with self-maintained circuit after resistance R7; The RLIM pin of described detection chip U is connected with the negative pole of electric capacity C2 after resistance R1, its GND pin ground connection, FB pin are then connected with self-maintained circuit, and its LX pin is then connected with the N pole of diode D5.
Described self-maintained circuit is by triode Q4, triode Q5, triode Q6, XOR gate IC1, N pole is connected with the N pole of diode D4, the diode D6 that P pole is then connected with the first input end of XOR gate IC1, N pole is connected with the P pole of diode D6, the diode D7 of P pole ground connection, one end is connected with the first input end of XOR gate IC1, the other end is then in turn through resistance R8 that resistance R9 is connected with the base stage of triode Q6 after resistance R14, be serially connected in the resistance R10 between the first input end of XOR gate IC1 and the second input end, one end is connected with the collector of triode Q4, the resistance R11 that the other end is then connected with the collector of triode Q5, one end is connected with the emitter of triode Q4, the resistance R13 that the other end is then connected with the output terminal of XOR gate IC1, N pole is connected with the N pole of diode D5 after resistance R7, the diode D8 that P pole is then connected with the collector of triode Q6, and one end is connected with the N pole of diode D8, the resistance R12 that the other end is then connected with the emitter of triode Q5 forms, the first input end of described XOR gate IC1 is respectively with the negative pole of electric capacity C1 and the negative pole of electric capacity C3 is connected, its output terminal is then as the output terminal of this self-maintained circuit, the described base stage of triode Q4 is connected with the first input end of XOR gate IC1, its collector is then connected with the base stage of triode Q5, the collector of described triode Q5 is then connected with the FB pin of detection chip U and the N pole of diode D8 respectively, the grounded emitter of triode Q6.
Described detection chip U is SP6648 integrated circuit.
The present invention comparatively prior art compares, and has the following advantages and beneficial effect:
(1) decipherment distance of the present invention is far away, and people do not need to lean on very near, as long as sound the present invention and identifiable design a long way off in the process identified.
(2) the present invention is by the effect of symmetrical expression transistor amplifier, can carry out distortionless amplification, facilitate the present invention to identify, so then improve accuracy of identification of the present invention high to signal, avoids identifying bringing unnecessary trouble by mistake.
(3) structure of the present invention is simple, and energy consumption is low, is applicable to wide model and promotes.
Accompanying drawing explanation
Fig. 1 is one-piece construction schematic diagram of the present invention.
Fig. 2 is pretreatment module electrical block diagram of the present invention.
Fig. 3 is symmetrical expression transistor amplifier structural representation of the present invention.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
Embodiment
As shown in Figure 1, the present invention is by main control unit 1, the sound bank 2 be connected with main control unit 1, characteristic extracting module 3, sound identification module 4 and symmetrical expression transistor amplifier 9, with the endpoint detection module 5 claiming formula transistor amplifier 9 to be connected, the pretreatment module 6 be connected with endpoint detection module 5, the audio coding module 7 be connected with pretreatment module 6, and the voice collecting unit 8 be connected with audio coding module 7 forms.
Wherein, main control unit 1 is as control center of the present invention, and it adopts existing single-chip microcomputer to realize.Voice collecting unit 8 is for received speech signal and export after converting simulated audio signal to, and it can adopt existing microphone to realize.Audio coding module 7 exports after converting received simulated audio signal to digital audio and video signals, pretreatment module 6 is for processing digital audio and video signals, avoid distorted signals, endpoint detection module 5 is then for making a distinction the period of voice signal and non-speech audio.Title formula transistor amplifier 9 can carry out distortionless amplification to signal.
Sound bank 2 is for prestoring the voice signal being identified target, and characteristic extracting module 3, for analyzing the digital speech entry signal of input, extracts the order representated by entry signal.Sound identification module 4 identifies for the voice signal in the voice signal that extracts characteristic extracting module 3 and sound bank 2, judges that whether voice command is consistent.This audio coding module 7, endpoint detection module 5, sound bank 2, characteristic extracting module 3 and sound identification module 4 all adopt prior art to realize.
As shown in Figure 2, this pretreatment module 6 is by triode trigger circuit, and the testing circuit be connected with triode trigger circuit and self-maintained circuit form; Described self-maintained circuit is also connected with this testing circuit.
Wherein, triode trigger circuit are by triode Q1, and triode Q2, triode Q3, electric capacity C1, electric capacity C2, electric capacity C3, diode D1, diode D2, diode D3, diode D4, resistance R1, resistance R2, resistance R3, resistance R4 and resistance R5 form.
During connection, the positive pole of electric capacity C1 is connected with the base stage of triode Q3 after diode D2, its negative pole is then connected with self-maintained circuit, the N pole of diode D1 is connected with the base stage of triode Q2, its P pole is then connected with the collector of triode Q1, one end of resistance R3 is connected with the base stage of triode Q2, its other end is then connected with the collector of triode Q3 after resistance R4, the positive pole of electric capacity C2 is connected with the base stage of triode Q1, its negative pole is then connected with testing circuit after resistance R1, one end of resistance R2 is connected with the base stage of triode Q3, its other end is then connected with the emitter of triode Q2, electric capacity C3 is then in parallel with resistance R2, the P pole of diode D4 is connected with the emitter of triode Q3 after resistance R5 through diode D3 in turn, its N pole is then connected with self-maintained circuit.
Meanwhile, the grounded emitter of this triode Q1, its collector are then as the input end of these triode trigger circuit.The collector of described triode Q2 is connected with its base stage, its emitter is then connected with self-maintained circuit.The emitter of triode Q3 also needs to be connected with testing circuit; Resistance R3 connects+12V voltage while being connected with testing circuit with the tie point of resistance R4.
Described testing circuit can detect voice signal frequency, and it is by detection chip U, electric capacity C4, resistance R6, and resistance R7 and diode D5 forms.During connection, one end of described resistance R6 is connected with the emitter of triode Q3, its other end is then connected with the LBI pin of detection chip U.The positive pole of electric capacity C4 is connected with the tie point of resistance R4 with resistance R3, its negative pole is then connected with the VBAT pin of detection chip U.The P pole of diode D5 is connected with the LBO pin of detection chip U, its N pole is then connected with self-maintained circuit after resistance R7.The RLIM pin of described detection chip U is connected with the negative pole of electric capacity C2 after resistance R1, its GND pin ground connection, FB pin are then connected with self-maintained circuit, and its LX pin is then connected with the N pole of diode D5.In order to reach better Detection results, this detection chip U preferentially adopts SP6648 integrated circuit to realize.
Described self-maintained circuit comprises triode Q4, triode Q5, triode Q6, XOR gate IC1, N pole is connected with the N pole of diode D4, the diode D6 that P pole is then connected with the first input end of XOR gate IC1, N pole is connected with the P pole of diode D6, the diode D7 of P pole ground connection, one end is connected with the first input end of XOR gate IC1, the other end is then in turn through resistance R8 that resistance R9 is connected with the base stage of triode Q6 after resistance R14, be serially connected in the resistance R10 between the first input end of XOR gate IC1 and the second input end, one end is connected with the collector of triode Q4, the resistance R11 that the other end is then connected with the collector of triode Q5, one end is connected with the emitter of triode Q4, the resistance R13 that the other end is then connected with the output terminal of XOR gate IC1, N pole is connected with the N pole of diode D5 after resistance R7, the diode D8 that P pole is then connected with the collector of triode Q6, and one end is connected with the N pole of diode D8, the resistance R12 that the other end is then connected with the emitter of triode Q5.
It is when connecting, and the first input end of this XOR gate IC1 needs respectively with the negative pole of electric capacity C1 and the negative pole of electric capacity C3 is connected, its output terminal is then as the output terminal of this self-maintained circuit.The described base stage of triode Q4 is connected with the first input end of XOR gate IC1, its collector is then connected with the base stage of triode Q5; The collector of described triode Q5 is then connected with the FB pin of detection chip U and the N pole of diode D8 respectively; The grounded emitter of triode Q6.
Symmetrical expression transistor amplifier 9 is emphasis place of the present invention, and as shown in Figure 3, it is by triode Q7, triode Q8, unidirectional thyristor D12, unidirectional thyristor D13, resistance R15, resistance R16, resistance R17, resistance R18, resistance R19, resistance R20, electric capacity C5, electric capacity C6, electric capacity C7, diode D9, diode D10 and diode D11 form.
During connection, the negative pole of electric capacity C7 is connected with the P pole of unidirectional thyristor D12, its positive pole is then connected with the N pole of unidirectional thyristor D12 after resistance R15, the N pole of diode D10 is connected with the positive pole of electric capacity C7, its P pole is then connected with the base stage of triode Q7, the negative pole of electric capacity C5 is connected with the base stage of triode Q7, its positive pole is then as the input end of this symmetrical expression transistor amplifier, one end of resistance R17 is connected with the collector of triode Q7, its other end is then connected with+12V voltage, one end of resistance R18 is connected with the emitter of triode Q7, its other end is then connected with the emitter of triode Q8 after resistance R19, the N pole of diode D9 is connected with the positive pole of electric capacity C5, its P pole is then connected with the base stage of triode Q8 after electric capacity C6, one end of resistance R16 is connected with the P pole of diode D9, its other end is then connected with the N pole of unidirectional thyristor D13, the N pole of diode D11 is connected with the base stage of triode Q8, its P pole is then connected with the P pole of unidirectional thyristor D13 after electric capacity C8, one end of resistance R20 is connected with the collector of triode Q8, its other end then connects-12V voltage.
Simultaneously, the N pole of unidirectional thyristor D12 is extremely all connected with the tie point of resistance R19 with resistance R18 with the N of unidirectional thyristor D13, as the output terminal of this symmetrical expression transistor amplifier while the control pole of unidirectional thyristor D12 is connected with the control pole of unidirectional thyristor D13.
Wherein, unidirectional thyristor D12, triode Q7, electric capacity C5, electric capacity C7, diode D10, resistance R15 and resistance R18 form the first amplifier, and unidirectional thyristor D13, resistance R16, resistance R19, triode Q8, electric capacity C6, electric capacity C8 and diode D11 then form the second amplifier.This first amplifier and the second amplifier are symmetrical, operationally can mutually restrict, and amplified, thus occur the existing picture of distortion after avoiding signal to amplify after signal input is come in by two symmetrical amplifiers.
As mentioned above, just the present invention can well be realized.

Claims (6)

1. the high definition speech recognition system based on symmetrical expression transistor amplifier, it is by voice acquisition module (8), main control unit (1), the sound bank (2) be connected with main control unit (1), characteristic extracting module (3), sound identification module (4), the audio coding module (7) be connected with voice acquisition module (8), the pretreatment module (6) be connected with audio coding module (7), and the endpoint detection module (5) be connected with pretreatment module (6) forms, it is characterized in that: between endpoint detection module (5) and main control unit (1), be also serially connected with symmetrical expression transistor amplifier (9), described symmetrical expression transistor amplifier (9) is by triode Q7, triode Q8, unidirectional thyristor D12, unidirectional thyristor D13, negative pole is connected with the P pole of unidirectional thyristor D12, the electric capacity C7 that positive pole is then connected with the N pole of unidirectional thyristor D12 after resistance R15, N pole is connected with the positive pole of electric capacity C7, the diode D10 that P pole is then connected with the base stage of triode Q7, negative pole is connected with the base stage of triode Q7, positive pole is then as the electric capacity C5 of the input end of this symmetrical expression transistor amplifier (9), one end is connected with the collector of triode Q7, the resistance R17 that the other end is then connected with+12V voltage, one end is connected with the emitter of triode Q7, the resistance R18 that the other end is then connected with the emitter of triode Q8 after resistance R19, N pole is connected with the positive pole of electric capacity C5, the diode D9 that P pole is then connected with the base stage of triode Q8 after electric capacity C6, one end is connected with the P pole of diode D9, the resistance R16 that the other end is then connected with the N pole of unidirectional thyristor D13, N pole is connected with the base stage of triode Q8, the diode D11 that P pole is then connected with the P pole of unidirectional thyristor D13 after electric capacity C8, and one end is connected with the collector of triode Q8, the resistance R20 that the other end then connects-12V voltage forms, the N pole of described unidirectional thyristor D12 is extremely all connected with the tie point of resistance R19 with resistance R18 with the N of unidirectional thyristor D13, as the output terminal of this symmetrical expression transistor amplifier (9) while the control pole of unidirectional thyristor D12 is connected with the control pole of unidirectional thyristor D13.
2. a kind of high definition speech recognition system based on symmetrical expression transistor amplifier according to claim 1, it is characterized in that: described pretreatment module (6) is then by triode trigger circuit, and the testing circuit be connected with triode trigger circuit and self-maintained circuit form; Described self-maintained circuit is also connected with this testing circuit.
3. a kind of high definition speech recognition system based on symmetrical expression transistor amplifier according to claim 2, it is characterized in that: described triode trigger circuit are by triode Q1, triode Q2, triode Q3, positive pole is connected with the base stage of triode Q3 after diode D2, the electric capacity C1 that negative pole is then connected with self-maintained circuit, N pole is connected with the base stage of triode Q2, the diode D1 that P pole is then connected with the collector of triode Q1, one end is connected with the base stage of triode Q2, the resistance R3 that the other end is then connected with the collector of triode Q3 after resistance R4, positive pole is connected with the base stage of triode Q1, the electric capacity C2 that negative pole is then connected with testing circuit after resistance R1, one end is connected with the base stage of triode Q3, the resistance R2 that the other end is then connected with the emitter of triode Q2, the electric capacity C3 be in parallel with resistance R2, P pole is connected with the emitter of triode Q3 after resistance R5 through diode D3 in turn, the diode D4 that N pole is then connected with self-maintained circuit forms, the grounded emitter of described triode Q1, its collector are then as the input end of these triode trigger circuit, the collector of described triode Q2 is connected with its base stage, its emitter is then connected with self-maintained circuit, the emitter of triode Q3 is also connected with testing circuit, resistance R3 connects+12V voltage while being connected with testing circuit with the tie point of resistance R4.
4. a kind of high definition speech recognition system based on symmetrical expression transistor amplifier according to claim 3, is characterized in that: described testing circuit is by detection chip U, and electric capacity C4, resistance R6, resistance R7 and diode D5 form; One end of described resistance R6 is connected with the emitter of triode Q3, its other end is then connected with the LBI pin of detection chip U; The positive pole of electric capacity C4 is connected with the tie point of resistance R4 with resistance R3, its negative pole is then connected with the VBAT pin of detection chip U; The P pole of diode D5 is connected with the LBO pin of detection chip U, its N pole is then connected with self-maintained circuit after resistance R7; The RLIM pin of described detection chip U is connected with the negative pole of electric capacity C2 after resistance R1, its GND pin ground connection, FB pin are then connected with self-maintained circuit, and its LX pin is then connected with the N pole of diode D5.
5. a kind of high definition speech recognition system based on symmetrical expression transistor amplifier according to claim 4, it is characterized in that: described self-maintained circuit is by triode Q4, triode Q5, triode Q6, XOR gate IC1, N pole is connected with the N pole of diode D4, the diode D6 that P pole is then connected with the first input end of XOR gate IC1, N pole is connected with the P pole of diode D6, the diode D7 of P pole ground connection, one end is connected with the first input end of XOR gate IC1, the other end is then in turn through resistance R8 that resistance R9 is connected with the base stage of triode Q6 after resistance R14, be serially connected in the resistance R10 between the first input end of XOR gate IC1 and the second input end, one end is connected with the collector of triode Q4, the resistance R11 that the other end is then connected with the collector of triode Q5, one end is connected with the emitter of triode Q4, the resistance R13 that the other end is then connected with the output terminal of XOR gate IC1, N pole is connected with the N pole of diode D5 after resistance R7, the diode D8 that P pole is then connected with the collector of triode Q6, and one end is connected with the N pole of diode D8, the resistance R12 that the other end is then connected with the emitter of triode Q5 forms, the first input end of described XOR gate IC1 is respectively with the negative pole of electric capacity C1 and the negative pole of electric capacity C3 is connected, its output terminal is then as the output terminal of this self-maintained circuit, the described base stage of triode Q4 is connected with the first input end of XOR gate IC1, its collector is then connected with the base stage of triode Q5, the collector of described triode Q5 is then connected with the FB pin of detection chip U and the N pole of diode D8 respectively, the grounded emitter of triode Q6.
6. a kind of high definition speech recognition system based on symmetrical expression transistor amplifier according to claim 5, is characterized in that: described detection chip U is SP6648 integrated circuit.
CN201510290828.XA 2015-05-30 2015-05-30 A kind of high definition speech recognition system based on symmetrical transistor amplifier Expired - Fee Related CN104851425B (en)

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