CN104820107A - Motor speed test system based on phase-locked loop circuit - Google Patents
Motor speed test system based on phase-locked loop circuit Download PDFInfo
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- CN104820107A CN104820107A CN201510225180.8A CN201510225180A CN104820107A CN 104820107 A CN104820107 A CN 104820107A CN 201510225180 A CN201510225180 A CN 201510225180A CN 104820107 A CN104820107 A CN 104820107A
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Abstract
The invention discloses a motor speed test system based on a phase-locked loop circuit. The motor speed test system is composed of a single-chip microcomputer (1), a power supply module (2) connected with the single-chip microcomputer (1), a motor speed control module (3) connected with the single-chip microcomputer (1), a triode trigger circuit (8) connected with the single-chip microcomputer (1), a display (7) connected with the single-chip microcomputer (1), a speed signal processing module (5) connected with the triode trigger circuit (8), a measured motor (4) connected with the motor speed control module (3), and a speed sensor (6) connected with the measured motor (4). The motor speed control module (3) is further connected with the power supply module (2). The motor speed test system is characterized in that a phase-locked loop circuit (9) is arranged between the speed signal processing module (5) and the speed sensor (6). By adopting the system of the invention, the speed of a motor can be tested accurately, and test personnel can better judge the performance of the motor. Through the function of the phase-locked loop circuit, speed signals are more stable, and the accuracy of speed test is further improved.
Description
Technical field
The present invention relates to a kind of Motor Measuring System, specifically refer to a kind of Motors Speed Measuring System based on phase-locked loop circuit.
Background technology
Along with national economy and scientific and technical development, the effect that motor plays in all trades and professions is more and more important.Meanwhile, along with the development of every profession and trade, more and more higher requirement is proposed to motor product, so motor product needs to verify whether its characteristic reaches application requirement by some pilot projects.Therefore, Motor Measuring Technology has considerable meaning for the performance verification of motor.
But the stability of traditional Motor Measuring System when testing of electric motors rotating speed is not high, have impact on the assessment of tester to motor performance to a great extent.Therefore, a kind of stable Motor Measuring System is provided to be then the current task of top priority.
Summary of the invention
The object of the invention is to overcome the low defect of its stability of traditional Motor Measuring System, a kind of Motors Speed Measuring System based on phase-locked loop circuit is provided.
Object of the present invention is achieved through the following technical solutions: a kind of Motors Speed Measuring System based on phase-locked loop circuit, by single-chip microcomputer, the power module be connected with single-chip microcomputer, motor speed control module, triode trigger circuit, display, the tach signal processing module be connected with triode trigger circuit, be connected with motor speed control module by measured motor, the speed pickup be connected with by measured motor, described motor speed control module is also connected with power module, in order to reach object of the present invention, the present invention is also provided with phase-locked loop circuit between tach signal processing module and speed pickup.
Further, described phase-locked loop circuit is by phase-locked chip U2, triode VT8, bidirectional thyristor D8, positive pole is connected with the OFIL pin of phase-locked chip U2, negative pole is then as the polar capacitor C9 of an input pole of this phase lock circuitry, one end is connected with the negative pole of polar capacitor C9, the resistance R16 that the other end is then connected with the LFIL pin of phase-locked chip U2, N pole is connected with the IN pin of phase-locked chip U2, P pole then together with the negative pole of polar capacitor C9 as the diode D6 of the input end of phase lock circuitry, negative pole is connected with the base stage of triode VT8 after resistance R17, the polar capacitor C10 that positive pole is then connected with the negative pole of polar capacitor C9, and P pole is connected with the OFIL pin of phase-locked chip U2, the diode D7 that N pole is then connected with the RT pin of phase-locked chip U2 after resistance R18 forms, the VCC pin of described phase-locked chip U2 is connected with the negative pole of polar capacitor C10, its GND pin ground connection, CT pin are then connected with the base stage of pole pipe VT8, OUT pin is connected with the first anode of bidirectional thyristor D8, the emitter of described triode VT8 is connected with the second anode of bidirectional thyristor D8, its grounded collector, the control pole ground connection of described bidirectional thyristor D8, the N pole of described diode D7 together with the OUT pin of phase-locked chip U2 as the output terminal of this phase lock circuitry.
Described triode trigger circuit are by triode VT5, pole pipe VT6, triode VT7, one end is connected with the base stage of triode VT5, the other end is then as the resistance R11 of an input pole of these triode trigger circuit, one end is connected with the emitter of triode VT5, the other end is then as the resistance R10 of an output stage of triode trigger circuit, P pole is connected with the base stage of triode VT6, the diode D5 that N pole is then connected with the collector of triode VT5, positive pole is connected with the base stage of triode VT7, negative pole is then as the polar capacitor C8 of another input pole of these triode trigger circuit, the resistance R12 be in parallel with polar capacitor C8, and one end is connected with the emitter of triode VT7, the resistance R13 that the other end is then connected with the collector of triode VT7 after resistance R15 through resistance R14 in turn forms, the base stage of described triode VT7 is connected with the tie point of resistance R14 with resistance R13, its collector is then connected with the collector of triode VT5, the emitter of described triode VT6 is connected with the collector of triode VT7, its grounded collector, the tie point of described resistance R14 and resistance R15 as these triode trigger circuit another output stage while ground connection.
Described tach signal processing module by signal screening circuit, the signal processing circuit be connected with signal screening circuit, and the transformation output circuit be connected with signal processing circuit forms.
Described signal screening circuit is by companion chip U, triode VT1, triode VT2, Sheffer stroke gate A1, Sheffer stroke gate A2, negative pole is connected with the VIN pin of companion chip U, the polar capacitor C1 that positive pole is then connected with the emitter of triode VT1 after resistance R1, positive pole is connected with the LX pin of companion chip U, the polar capacitor C2 that negative pole is then connected with the collector of triode VT2, positive terminal is connected with the PGND pin of companion chip U, the polarity-inverting amplifier D1 that end of oppisite phase is then connected with the negative pole of Sheffer stroke gate A2, negative pole is connected with the negative pole of Sheffer stroke gate A1, the polar capacitor C3 that positive pole is then connected with the emitter of triode VT2 after resistance R2, and minus earth, the polar capacitor C4 that positive pole is then connected with the positive pole of Sheffer stroke gate A2 after resistance R3 forms, the LX pin of described companion chip U is connected with the collector of triode VT1, its OUT pin is then connected with the negative pole of Sheffer stroke gate A2, GND pin ground connection, the output terminal of described Sheffer stroke gate A2 is connected with signal processing circuit, its positive pole is then connected with the output terminal of Sheffer stroke gate A1 and signal processing circuit respectively, and the positive pole of described Sheffer stroke gate A1 is connected with the collector of triode VT2, its negative pole is then connected with signal processing circuit, the positive pole of described polar capacitor C4 is also connected with signal processing circuit, the base stage of described triode VT1 together with the base stage of triode VT2 as the input end of this signal screening circuit.
Described signal processing circuit is by process chip U1, field effect transistor Q1, field effect transistor Q2, triode VT3, P pole is connected with the positive pole of Sheffer stroke gate A2, the diode D2 that N pole is then connected with the BOOT pin of process chip U1, positive pole is connected with the GND pin of process chip U1, the polar capacitor C5 that negative pole is then connected with the FB pin of process chip U1, positive pole is connected with the drain electrode of field effect transistor Q1, the polar capacitor C7 of minus earth, one end is connected with the PHASE pin of process chip U1, the inductance L 1 that the other end is then connected with the emitter of triode VT3, one end is connected with the OCSET pin of process chip U1, the resistance R4 that the other end is then connected with the source electrode of field effect transistor Q1, one end is connected with the LGATE pin of process chip U1, the resistance R5 that the other end is then connected with the base stage of triode VT3, and negative pole is connected with the LGAET pin of process chip U1, the polar capacitor C6 that positive pole is then connected with the collector of triode VT3 after resistance R6 forms, the VCC pin of described process chip U1 is connected with the positive pole of polar capacitor C4, its FB pin is then connected with the negative pole of Sheffer stroke gate A1, GND pin ground connection, LGATE pin are connected with the grid of field effect transistor Q2, UGATE pin is then connected with the grid of field effect transistor Q1, the drain electrode of described field effect transistor Q1 is respectively with the output terminal of Sheffer stroke gate A2 and transformation output circuit is connected, its source electrode is then connected with the drain electrode of field effect transistor Q2, the source ground of described field effect transistor Q2, the emitter of triode VT3 is then connected with transformation output circuit.
Described transformation output circuit is by transformer T, triode VT4, field effect transistor Q3, N pole is connected with transformer T former limit non-same polarity, the diode D3 of P pole ground connection, the diode D4 that P pole is connected with transformer T secondary non-same polarity, N pole is then connected with the grid of field effect transistor Q3 after resistance R8, the resistance R9 that one end is connected with transformer T secondary Same Name of Ends, the other end is then connected with the grid of field effect transistor Q3, and the resistance R7 that one end is connected with transformer T secondary Same Name of Ends, the other end is then connected with the base stage of triode VT4 forms; Described transformer T former limit Same Name of Ends is connected with the drain electrode of field effect transistor Q1, its non-same polarity is then connected with the emitter of triode VT3, and the grid of described field effect transistor Q3 is connected with the collector of triode VT4, its source electrode is then connected with the emitter of triode VT4 and transformer T secondary Same Name of Ends respectively; The drain electrode of described field effect transistor Q3 together with its source electrode as the output terminal of this transformation output circuit.
In order to ensure result of use, described companion chip U is preferably MAX1921 integrated circuit, and process chip U1 then preferentially adopts APW7120 integrated circuit, and phase-locked chip U2 then preferentially adopts LM567 integrated circuit to realize.
The present invention comparatively prior art compares, and has the following advantages and beneficial effect:
(1) structure of the present invention is simple, and easy to operate, system cost is cheap.
(2) the present invention can test motor speed accurately, and tester can better judge motor performance.
(3) the present invention adopts APW7120 integrated chip as process chip, more energy-conservation.
(4) the present invention can make tach signal more stable by the effect of phase-locked loop circuit, further increases measurement of rotating speed precision of the present invention.
Accompanying drawing explanation
Fig. 1 is one-piece construction schematic diagram of the present invention;
Fig. 2 is tach signal processing module electrical block diagram of the present invention;
Fig. 3 is triode trigger circuit structure schematic diagram of the present invention;
Fig. 4 is phase-locked loop circuit structural representation of the present invention.
Reference numeral name in above accompanying drawing is called:
1-single-chip microcomputer, 2-power module, 3-motor speed control module, 4-by measured motor, 5-tach signal processing module, 6-speed pickup, 7-display, 8-triode trigger circuit, 9-phase-locked loop circuit, 51-signal screening circuit, 52-signal processing circuit, 53-transformation output circuit.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited to this.
Embodiment
As shown in Figure 1, the present invention is by single-chip microcomputer 1, the power module 2 be connected with single-chip microcomputer 1, motor speed control module 3, display 7, triode trigger circuit 8, the tach signal processing module 5 be connected with triode trigger circuit 8, be connected with motor speed control module 3 by measured motor 4, the speed pickup 6 be connected with by measured motor 4, described motor speed control module 3 is also connected with power module 2.In order to reach object of the present invention, the present invention is also provided with phase-locked loop circuit 9 between tach signal processing module 5 and speed pickup 6.
Wherein, single-chip microcomputer 1 is as control center of the present invention, and power module 2 is for providing power supply to Motor Measuring System.Motor speed control module 3 is for controlling by the rotating speed of measured motor 4, namely after tester inputs motor speed value in single-chip microcomputer 1, signal is sent to motor speed control module 3, by motor speed control module 3 the rotating speed set by the adjustment of rotational speed of measured motor 4 to tester by single-chip microcomputer 1.Speed pickup 6 is for gathering by the real-time rotate speed signal of measured motor 4, and tach signal processing module 5 is then for processing tach signal.Triode trigger circuit 8 are for doing further process to tach signal.Display 7 is for showing intuitively by the tachometer value of measured motor 4.Phase-locked loop circuit 9 is as inventive point of the present invention, and it is for carrying out phase-locked process to tach signal, and the tach signal after process is more stable.
Better effect is reached in order to enable the present invention, the MEMS type magnetic resistance speed sensor of the BNP-16 series that this speed pickup 6 adopts great Gong An road, Dalian instrument and meter for automation company to produce, this speed probe has extremely low velocity deviation, and the impact do not shaken.Motor speed control module 3, power module 2, display 7, single-chip microcomputer 1 all adopt existing technology to realize.
As shown in Figure 2, this tach signal processing module 5 by the signal screening circuit 51 screened tach signal, the signal processing circuit 52 be connected with signal screening circuit 51, and the transformation output circuit 53 be connected with signal processing circuit 52 forms.
Wherein, signal screening circuit 51 is by by companion chip U, triode VT1, triode VT2, Sheffer stroke gate A1, Sheffer stroke gate A2, negative pole is connected with the VIN pin of companion chip U, the polar capacitor C1 that positive pole is then connected with the emitter of triode VT1 after resistance R1, positive pole is connected with the LX pin of companion chip U, the polar capacitor C2 that negative pole is then connected with the collector of triode VT2, positive terminal is connected with the PGND pin of companion chip U, the polarity-inverting amplifier D1 that end of oppisite phase is then connected with the negative pole of Sheffer stroke gate A2, negative pole is connected with the negative pole of Sheffer stroke gate A1, the polar capacitor C3 that positive pole is then connected with the emitter of triode VT2 after resistance R2, and minus earth, the polar capacitor C4 that positive pole is then connected with the positive pole of Sheffer stroke gate A2 after resistance R3 forms.The LX pin of described companion chip U is connected with the collector of triode VT1, its OUT pin is then connected with the negative pole of Sheffer stroke gate A2, GND pin ground connection, the output terminal of described Sheffer stroke gate A2 is connected with signal processing circuit 52, its positive pole is then connected with the output terminal of Sheffer stroke gate A1 and signal processing circuit 52 respectively, and the positive pole of described Sheffer stroke gate A1 is connected with the collector of triode VT2, its negative pole is then connected with signal processing circuit 52.The positive pole of described polar capacitor C4 is also connected with signal processing circuit 52; The base stage of described triode VT1 together with the base stage of triode VT2 as the input end of this signal screening circuit 51.In order to better implement the present invention, this companion chip U preferentially adopts MAX1921 integrated circuit to realize.
Described signal processing circuit 52 is by process chip U1, field effect transistor Q1, field effect transistor Q2, triode VT3, P pole is connected with the positive pole of Sheffer stroke gate A2, the diode D2 that N pole is then connected with the BOOT pin of process chip U1, positive pole is connected with the GND pin of process chip U1, the polar capacitor C5 that negative pole is then connected with the FB pin of process chip U1, positive pole is connected with the drain electrode of field effect transistor Q1, the polar capacitor C7 of minus earth, one end is connected with the PHASE pin of process chip U1, the inductance L 1 that the other end is then connected with the emitter of triode VT3, one end is connected with the OCSET pin of process chip U1, the resistance R4 that the other end is then connected with the source electrode of field effect transistor Q1, one end is connected with the LGATE pin of process chip U1, the resistance R5 that the other end is then connected with the base stage of triode VT3, and negative pole is connected with the LGAET pin of process chip U1, the polar capacitor C6 that positive pole is then connected with the collector of triode VT3 after resistance R6 forms.The VCC pin of described process chip U1 is connected with the positive pole of polar capacitor C4, its FB pin is then connected with the negative pole of Sheffer stroke gate A1, GND pin ground connection, LGATE pin are connected with the grid of field effect transistor Q2, UGATE pin is then connected with the grid of field effect transistor Q1; The drain electrode of described field effect transistor Q1 is respectively with the output terminal of Sheffer stroke gate A2 and transformation output circuit 53 is connected, its source electrode is then connected with the drain electrode of field effect transistor Q2.The source ground of described field effect transistor Q2; The emitter of triode VT3 is then connected with transformation output circuit 53.In order to better implement the present invention, described process chip U1 is preferably APW7120 integrated circuit to realize.
Described transformation output circuit 53 is by transformer T, triode VT4, field effect transistor Q3, N pole is connected with transformer T former limit non-same polarity, the diode D3 of P pole ground connection, the diode D4 that P pole is connected with transformer T secondary non-same polarity, N pole is then connected with the grid of field effect transistor Q3 after resistance R8, the resistance R9 that one end is connected with transformer T secondary Same Name of Ends, the other end is then connected with the grid of field effect transistor Q3, and the resistance R7 that one end is connected with transformer T secondary Same Name of Ends, the other end is then connected with the base stage of triode VT4 forms.Described transformer T former limit Same Name of Ends is connected with the drain electrode of field effect transistor Q1, its non-same polarity is then connected with the emitter of triode VT3, and the grid of described field effect transistor Q3 is connected with the collector of triode VT4, its source electrode is then connected with the emitter of triode VT4 and transformer T secondary Same Name of Ends respectively.The drain electrode of described field effect transistor Q3 together with its source electrode as the output terminal of this transformation output circuit.
As shown in Figure 3, triode trigger circuit 8 are by triode VT5, pole pipe VT6, triode VT7, one end is connected with the base stage of triode VT5, the other end is then as the resistance R11 of an input pole of these triode trigger circuit 8, one end is connected with the emitter of triode VT5, the other end is then as the resistance R10 of an output stage of triode trigger circuit 8, P pole is connected with the base stage of triode VT6, the diode D5 that N pole is then connected with the collector of triode VT5, positive pole is connected with the base stage of triode VT7, negative pole is then as the polar capacitor C8 of another input pole of these triode trigger circuit 8, the resistance R12 be in parallel with polar capacitor C8, and one end is connected with the emitter of triode VT7, the resistance R13 that the other end is then connected with the collector of triode VT7 after resistance R15 through resistance R14 in turn forms.The base stage of described triode VT7 is connected with the tie point of resistance R14 with resistance R13, its collector is then connected with the collector of triode VT5; The emitter of described triode VT6 is connected with the collector of triode VT7, its grounded collector; The tie point of described resistance R14 and resistance R15 as these triode trigger circuit 8 another output stage while ground connection.In order to better implement the present invention, described triode VT5, triode VT6 and triode VT7 preferentially adopt negative-positive-negative transistor to realize.
As shown in Figure 4, described phase-locked loop circuit 9 is by phase-locked chip U2, triode VT8, bidirectional thyristor D8, positive pole is connected with the OFIL pin of phase-locked chip U2, negative pole is then as the polar capacitor C9 of an input pole of this phase lock circuitry 9, one end is connected with the negative pole of polar capacitor C9, the resistance R16 that the other end is then connected with the LFIL pin of phase-locked chip U2, N pole is connected with the IN pin of phase-locked chip U2, P pole then together with the negative pole of polar capacitor C9 as the diode D6 of the input end of phase lock circuitry 9, negative pole is connected with the base stage of triode VT8 after resistance R17, the polar capacitor C10 that positive pole is then connected with the negative pole of polar capacitor C9, and P pole is connected with the OFIL pin of phase-locked chip U2, the diode D7 that N pole is then connected with the RT pin of phase-locked chip U2 after resistance R18 forms.The VCC pin of described phase-locked chip U2 is connected with the negative pole of polar capacitor C10, its GND pin ground connection, CT pin are then connected with the base stage of pole pipe VT8, OUT pin is connected with the first anode of bidirectional thyristor D8; The emitter of described triode VT8 is connected with the second anode of bidirectional thyristor D8, its grounded collector; The control pole ground connection of described bidirectional thyristor D8; The N pole of described diode D7 together with the OUT pin of phase-locked chip U2 as the output terminal of this phase lock circuitry 9.In order to ensure result of use of the present invention, this phase-locked chip U2 preferentially adopts LM567 integrated circuit to realize.
As mentioned above, just well the present invention can be realized.
Claims (9)
1. the Motors Speed Measuring System based on phase-locked loop circuit, by single-chip microcomputer (1), the power module (2) be connected with single-chip microcomputer (1), motor speed control module (3), triode trigger circuit (8), display (7), the tach signal processing module (5) be connected with triode trigger circuit (8), be connected with motor speed control module (3) by measured motor (4), the speed pickup (6) be connected with by measured motor (4) forms, described motor speed control module (3) is also connected with power module (2), it is characterized in that, phase-locked loop circuit (9) is also provided with between tach signal processing module (5) and speed pickup (6), described phase-locked loop circuit (9) is by phase-locked chip U2, triode VT8, bidirectional thyristor D8, positive pole is connected with the OFIL pin of phase-locked chip U2, negative pole is then as the polar capacitor C9 of an input pole of this phase lock circuitry (9), one end is connected with the negative pole of polar capacitor C9, the resistance R16 that the other end is then connected with the LFIL pin of phase-locked chip U2, N pole is connected with the IN pin of phase-locked chip U2, P pole then together with the negative pole of polar capacitor C9 as the diode D6 of the input end of phase lock circuitry (9), negative pole is connected with the base stage of triode VT8 after resistance R17, the polar capacitor C10 that positive pole is then connected with the negative pole of polar capacitor C9, and P pole is connected with the OFIL pin of phase-locked chip U2, the diode D7 that N pole is then connected with the RT pin of phase-locked chip U2 after resistance R18 forms, the VCC pin of described phase-locked chip U2 is connected with the negative pole of polar capacitor C10, its GND pin ground connection, CT pin are then connected with the base stage of pole pipe VT8, OUT pin is connected with the first anode of bidirectional thyristor D8, the emitter of described triode VT8 is connected with the second anode of bidirectional thyristor D8, its grounded collector, the control pole ground connection of described bidirectional thyristor D8, the N pole of described diode D7 together with the OUT pin of phase-locked chip U2 as the output terminal of this phase lock circuitry (9).
2. a kind of Motors Speed Measuring System based on phase-locked loop circuit according to claim 1, it is characterized in that: described triode trigger circuit (8) are by triode VT5, pole pipe VT6, triode VT7, one end is connected with the base stage of triode VT5, the other end is then as the resistance R11 of an input pole of these triode trigger circuit (8), one end is connected with the emitter of triode VT5, the other end is then as the resistance R10 of an output stage of triode trigger circuit (8), P pole is connected with the base stage of triode VT6, the diode D5 that N pole is then connected with the collector of triode VT5, positive pole is connected with the base stage of triode VT7, negative pole is then as the polar capacitor C8 of another input pole of these triode trigger circuit (8), the resistance R12 be in parallel with polar capacitor C8, and one end is connected with the emitter of triode VT7, the resistance R13 that the other end is then connected with the collector of triode VT7 after resistance R15 through resistance R14 in turn forms, the base stage of described triode VT7 is connected with the tie point of resistance R14 with resistance R13, its collector is then connected with the collector of triode VT5, the emitter of described triode VT6 is connected with the collector of triode VT7, its grounded collector, the tie point of described resistance R14 and resistance R15 as these triode trigger circuit (8) another output stage while ground connection.
3. a kind of Motors Speed Measuring System based on phase-locked loop circuit according to claim 2, it is characterized in that: described tach signal processing module (5) is by signal screening circuit (51), the signal processing circuit (52) be connected with signal screening circuit (51), and the transformation output circuit (53) be connected with signal processing circuit (52) forms.
4. a kind of Motors Speed Measuring System based on phase-locked loop circuit according to claim 3, it is characterized in that: described signal screening circuit (51) is by companion chip U, triode VT1, triode VT2, Sheffer stroke gate A1, Sheffer stroke gate A2, negative pole is connected with the VIN pin of companion chip U, the polar capacitor C1 that positive pole is then connected with the emitter of triode VT1 after resistance R1, positive pole is connected with the LX pin of companion chip U, the polar capacitor C2 that negative pole is then connected with the collector of triode VT2, positive terminal is connected with the PGND pin of companion chip U, the polarity-inverting amplifier D1 that end of oppisite phase is then connected with the negative pole of Sheffer stroke gate A2, negative pole is connected with the negative pole of Sheffer stroke gate A1, the polar capacitor C3 that positive pole is then connected with the emitter of triode VT2 after resistance R2, and minus earth, the polar capacitor C4 that positive pole is then connected with the positive pole of Sheffer stroke gate A2 after resistance R3 forms, the LX pin of described companion chip U is connected with the collector of triode VT1, its OUT pin is then connected with the negative pole of Sheffer stroke gate A2, GND pin ground connection, the output terminal of described Sheffer stroke gate A2 is connected with signal processing circuit (52), its positive pole is then connected with the output terminal of Sheffer stroke gate A1 and signal processing circuit (52) respectively, and the positive pole of described Sheffer stroke gate A1 is connected with the collector of triode VT2, its negative pole is then connected with signal processing circuit (52), the positive pole of described polar capacitor C4 is also connected with signal processing circuit (52), the base stage of described triode VT1 together with the base stage of triode VT2 as the input end of this signal screening circuit (51).
5. a kind of Motors Speed Measuring System based on phase-locked loop circuit according to claim 4, it is characterized in that: described signal processing circuit (52) is by process chip U1, field effect transistor Q1, field effect transistor Q2, triode VT3, P pole is connected with the positive pole of Sheffer stroke gate A2, the diode D2 that N pole is then connected with the BOOT pin of process chip U1, positive pole is connected with the GND pin of process chip U1, the polar capacitor C5 that negative pole is then connected with the FB pin of process chip U1, positive pole is connected with the drain electrode of field effect transistor Q1, the polar capacitor C7 of minus earth, one end is connected with the PHASE pin of process chip U1, the inductance L 1 that the other end is then connected with the emitter of triode VT3, one end is connected with the OCSET pin of process chip U1, the resistance R4 that the other end is then connected with the source electrode of field effect transistor Q1, one end is connected with the LGATE pin of process chip U1, the resistance R5 that the other end is then connected with the base stage of triode VT3, and negative pole is connected with the LGAET pin of process chip U1, the polar capacitor C6 that positive pole is then connected with the collector of triode VT3 after resistance R6 forms, the VCC pin of described process chip U1 is connected with the positive pole of polar capacitor C4, its FB pin is then connected with the negative pole of Sheffer stroke gate A1, GND pin ground connection, LGATE pin are connected with the grid of field effect transistor Q2, UGATE pin is then connected with the grid of field effect transistor Q1, the drain electrode of described field effect transistor Q1 is respectively with the output terminal of Sheffer stroke gate A2 and transformation output circuit (53) is connected, its source electrode is then connected with the drain electrode of field effect transistor Q2, the source ground of described field effect transistor Q2, the emitter of triode VT3 is then connected with transformation output circuit (53).
6. a kind of Motors Speed Measuring System based on phase-locked loop circuit according to claim 5, it is characterized in that: described transformation output circuit (53) is by transformer T, triode VT4, field effect transistor Q3, N pole is connected with transformer T former limit non-same polarity, the diode D3 of P pole ground connection, P pole is connected with transformer T secondary non-same polarity, the diode D4 that N pole is then connected with the grid of field effect transistor Q3 after resistance R8, one end is connected with transformer T secondary Same Name of Ends, the resistance R9 that the other end is then connected with the grid of field effect transistor Q3, and one end is connected with transformer T secondary Same Name of Ends, the resistance R7 that the other end is then connected with the base stage of triode VT4 forms, described transformer T former limit Same Name of Ends is connected with the drain electrode of field effect transistor Q1, its non-same polarity is then connected with the emitter of triode VT3, and the grid of described field effect transistor Q3 is connected with the collector of triode VT4, its source electrode is then connected with the emitter of triode VT4 and transformer T secondary Same Name of Ends respectively, the drain electrode of described field effect transistor Q3 together with its source electrode as the output terminal of this transformation output circuit (53).
7. a kind of Motors Speed Measuring System based on phase-locked loop circuit according to claim 6, is characterized in that: described companion chip U is MAX1921 integrated circuit.
8. a kind of Motors Speed Measuring System based on phase-locked loop circuit according to claim 6, is characterized in that: described process chip U1 is APW7120 integrated circuit.
9. a kind of Motors Speed Measuring System based on phase-locked loop circuit according to any one of claim 1 ~ 6, is characterized in that: described phase-locked chip U2 is LM567 integrated circuit.
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| CN201510225180.8A CN104820107A (en) | 2015-05-06 | 2015-05-06 | Motor speed test system based on phase-locked loop circuit |
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Citations (5)
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Application publication date: 20150805 |