CN104808011A - Motor revolving speed testing system based on self-gain control - Google Patents
Motor revolving speed testing system based on self-gain control Download PDFInfo
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- CN104808011A CN104808011A CN201510225179.5A CN201510225179A CN104808011A CN 104808011 A CN104808011 A CN 104808011A CN 201510225179 A CN201510225179 A CN 201510225179A CN 104808011 A CN104808011 A CN 104808011A
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Abstract
The invention discloses a motor revolving speed testing system based on self-gain control. The motor revolving speed testing system comprises a single-chip microcomputer (1), a power source module (2), a motor revolving speed control module (3), a display (7), a measured motor (4), a speed sensor (6) and a revolving speed signal processing module (5), wherein the power source module (2), the motor revolving speed control module (3) and the display (7) are connected with the single-chip microcomputer (1), the measured motor (4) is connected with the motor revolving speed control module (3), the speed sensor (6) is connected with the measured motor (4), and the revolving speed signal processing module (5) is connected with the speed sensor (6). The motor revolving speed control module (3) is connected with the power source module (2). The motor revolving speed testing system is characterized in that a self-gain control circuit (8) is arranged between the revolving speed signal processing module (5) and the single-chip microcomputer (1). By the motor revolving speed testing system, revolving speed signals can be processed by gain amplification, the revolving signals received by the single-chip microcomputer is clearer, and revolving speed testing accuracy is improved.
Description
Technical field
The present invention relates to a kind of Motor Measuring System, specifically referring to a kind of motor speed test macro based on controlling from gain.
Background technology
Along with national economy and scientific and technical development, the effect that motor plays in all trades and professions is more and more important.Meanwhile, along with the development of every profession and trade, more and more higher requirement is proposed to motor product, so motor product needs to verify whether its characteristic reaches application requirement by some pilot projects.Therefore, Motor Measuring Technology has considerable meaning for the performance verification of motor.
But traditional Motor Measuring System there will be the more weak situation of collected tach signal unavoidably when testing of electric motors rotating speed, at this moment motor speed test macro then can not accurately test out the actual revolution of motor.Therefore, provide a kind of simple and measuring accuracy is high Motor Measuring System is then the current task of top priority.
Summary of the invention
The object of the invention is to overcome traditional Motor Measuring System cannot test out motor actual revolution accurately defect when collecting more weak tach signal, a kind of motor speed test macro based on controlling from gain is provided.
Object of the present invention is achieved through the following technical solutions: a kind of motor speed test macro based on controlling from gain, by single-chip microcomputer, the power module be connected with single-chip microcomputer, motor speed control module, display, be connected with motor speed control module by measured motor, the speed pickup be connected with by measured motor, the tach signal processing module be connected with speed pickup, described motor speed control module is also connected with power module, in order to reach object of the present invention, the present invention is also provided with from gain control circuit between tach signal processing module and single-chip microcomputer.
Further, described from gain control circuit by amplifier P1, field effect transistor Q4, field effect transistor Q5, unidirectional thyristor D5, negative pole is connected with the drain electrode of field effect transistor Q5, positive pole is then in turn through polar capacitor C9 that resistance R11 is connected with the N pole of unidirectional thyristor D5 after resistance R10, one end is connected with the positive pole of polar capacitor C9, the resistance R13 that the other end is then connected with the output terminal of amplifier P1, negative pole is connected with the source electrode of field effect transistor Q4, the polar capacitor C8 that positive pole is then connected with the positive pole of amplifier P1, and the resistance R12 be serially connected between the negative pole of amplifier P1 and output terminal forms, the control pole of described unidirectional thyristor D5 is connected with the grid of field effect transistor Q5, its P pole is then connected with the grid of field effect transistor Q4, ground connection while the positive pole of described amplifier P1 is connected with the tie point of resistance R11 with resistance R10, its negative pole is then connected with the drain electrode of field effect transistor Q4, the source ground of described field effect transistor Q5, the N pole of described unidirectional thyristor D5 together with its P pole as should from the input end of gain control circuit, the positive pole of polar capacitor C9 then together with the output terminal of amplifier P1 as the output terminal from gain control circuit.
Described tach signal processing module by signal screening circuit, the signal processing circuit be connected with signal screening circuit, and the transformation output circuit be connected with signal processing circuit forms.
Described signal screening circuit is by companion chip U, triode VT1, triode VT2, Sheffer stroke gate A1, Sheffer stroke gate A2, negative pole is connected with the VIN pin of companion chip U, the polar capacitor C1 that positive pole is then connected with the emitter of triode VT1 after resistance R1, positive pole is connected with the LX pin of companion chip U, the polar capacitor C2 that negative pole is then connected with the collector of triode VT2, positive terminal is connected with the PGND pin of companion chip U, the polarity-inverting amplifier D1 that end of oppisite phase is then connected with the negative pole of Sheffer stroke gate A2, negative pole is connected with the negative pole of Sheffer stroke gate A1, the polar capacitor C3 that positive pole is then connected with the emitter of triode VT2 after resistance R2, and minus earth, the polar capacitor C4 that positive pole is then connected with the positive pole of Sheffer stroke gate A2 after resistance R3 forms, the LX pin of described companion chip U is connected with the collector of triode VT1, its OUT pin is then connected with the negative pole of Sheffer stroke gate A2, GND pin ground connection, the output terminal of described Sheffer stroke gate A2 is connected with signal processing circuit, its positive pole is then connected with the output terminal of Sheffer stroke gate A1 and signal processing circuit respectively, and the positive pole of described Sheffer stroke gate A1 is connected with the collector of triode VT2, its negative pole is then connected with signal processing circuit, the positive pole of described polar capacitor C4 is also connected with signal processing circuit, the base stage of described triode VT1 together with the base stage of triode VT2 as the input end of this signal screening circuit.
Described signal processing circuit is by process chip U1, field effect transistor Q1, field effect transistor Q2, triode VT3, P pole is connected with the positive pole of Sheffer stroke gate A2, the diode D2 that N pole is then connected with the BOOT pin of process chip U1, positive pole is connected with the GND pin of process chip U1, the polar capacitor C5 that negative pole is then connected with the FB pin of process chip U1, positive pole is connected with the drain electrode of field effect transistor Q1, the polar capacitor C7 of minus earth, one end is connected with the PHASE pin of process chip U1, the inductance L 1 that the other end is then connected with the emitter of triode VT3, one end is connected with the OCSET pin of process chip U1, the resistance R4 that the other end is then connected with the source electrode of field effect transistor Q1, one end is connected with the LGATE pin of process chip U1, the resistance R5 that the other end is then connected with the base stage of triode VT3, and negative pole is connected with the LGAET pin of process chip U1, the polar capacitor C6 that positive pole is then connected with the collector of triode VT3 after resistance R6 forms, the VCC pin of described process chip U1 is connected with the positive pole of polar capacitor C4, its FB pin is then connected with the negative pole of Sheffer stroke gate A1, GND pin ground connection, LGATE pin are connected with the grid of field effect transistor Q2, UGATE pin is then connected with the grid of field effect transistor Q1, the drain electrode of described field effect transistor Q1 is respectively with the output terminal of Sheffer stroke gate A2 and transformation output circuit is connected, its source electrode is then connected with the drain electrode of field effect transistor Q2, the source ground of described field effect transistor Q2, the emitter of triode VT3 is then connected with transformation output circuit.
Described transformation output circuit is by transformer T, triode VT4, field effect transistor Q3, N pole is connected with transformer T former limit non-same polarity, the diode D3 of P pole ground connection, the diode D4 that P pole is connected with transformer T secondary non-same polarity, N pole is then connected with the grid of field effect transistor Q3 after resistance R8, the resistance R9 that one end is connected with transformer T secondary Same Name of Ends, the other end is then connected with the grid of field effect transistor Q3, and the resistance R7 that one end is connected with transformer T secondary Same Name of Ends, the other end is then connected with the base stage of triode VT4 forms; Described transformer T former limit Same Name of Ends is connected with the drain electrode of field effect transistor Q1, its non-same polarity is then connected with the emitter of triode VT3, and the grid of described field effect transistor Q3 is connected with the collector of triode VT4, its source electrode is then connected with the emitter of triode VT4 and transformer T secondary Same Name of Ends respectively; The drain electrode of described field effect transistor Q3 together with its source electrode as the output terminal of this transformation output circuit.
In order to reach better implementation result, described companion chip U preferentially adopts MAX1921 integrated circuit, and described process chip U1 is then preferably APW7120 integrated circuit and realizes.
The present invention comparatively prior art compares, and has the following advantages and beneficial effect:
(1) structure of the present invention is simple, and easy to operate, system cost is cheap.
(2) the present invention can test motor speed accurately, and tester can better judge motor performance.
(3) the present invention adopts APW7120 integrated chip as process chip, more energy-conservation.
(4) the present invention can carry out gain amplification disposal to tach signal, makes the tach signal received by single-chip microcomputer more clear, improves the precision of measurement of rotating speed.
Accompanying drawing explanation
Fig. 1 is one-piece construction schematic diagram of the present invention;
Fig. 2 is tach signal processing module electrical block diagram of the present invention;
Fig. 3 is of the present invention from gain control circuit structural representation.
Reference numeral name in above accompanying drawing is called:
1-single-chip microcomputer, 2-power module, 3-motor speed control module, 4-by measured motor, 5-tach signal processing module, 6-speed pickup, 7-display, 8-from gain control circuit, 51-signal screening circuit, 52-signal processing circuit, 53-transformation output circuit.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited to this.
Embodiment
As shown in Figure 1, the present invention is by single-chip microcomputer 1, the power module 2 be connected with single-chip microcomputer 1, motor speed control module 3, display 7, be connected with motor speed control module 3 by measured motor 4, the speed pickup 6 be connected with by measured motor 4, the tach signal processing module 5 be connected with speed pickup 6, described motor speed control module 3 is also connected with power module 2.In order to reach object of the present invention, the present invention is also provided with from gain control circuit 8 between tach signal processing module 5 and single-chip microcomputer 1.
Wherein, single-chip microcomputer 1 is as control center of the present invention, and power module 2 is for providing power supply to Motor Measuring System.Motor speed control module 3 is for controlling by the rotating speed of measured motor 4, namely after tester inputs motor speed value in single-chip microcomputer 1, signal is sent to motor speed control module 3, by motor speed control module 3 the rotating speed set by the adjustment of rotational speed of measured motor 4 to tester by single-chip microcomputer 1.Speed pickup 6 is for gathering by the real-time rotate speed signal of measured motor 4, and tach signal processing module 5 is then for processing tach signal.From gain control circuit 8 for doing gain amplification disposal to tach signal, make the tach signal received by single-chip microcomputer 1 more clear.Display 7 is for showing intuitively by the tachometer value of measured motor 4.
Better effect is reached in order to enable the present invention, the MEMS type magnetic resistance speed sensor of the BNP-16 series that this speed pickup 6 adopts great Gong An road, Dalian instrument and meter for automation company to produce, this speed probe has extremely low velocity deviation, and the impact do not shaken.Motor speed control module 3, power module 2, display 7, single-chip microcomputer 1 all adopt existing technology to realize.
As shown in Figure 2, this tach signal processing module 5 by the signal screening circuit 51 screened tach signal, the signal processing circuit 52 be connected with signal screening circuit 51, and the transformation output circuit 53 be connected with signal processing circuit 52 forms.
Wherein, signal screening circuit 51 is by companion chip U, triode VT1, triode VT2, Sheffer stroke gate A1, Sheffer stroke gate A2, negative pole is connected with the VIN pin of companion chip U, the polar capacitor C1 that positive pole is then connected with the emitter of triode VT1 after resistance R1, positive pole is connected with the LX pin of companion chip U, the polar capacitor C2 that negative pole is then connected with the collector of triode VT2, positive terminal is connected with the PGND pin of companion chip U, the polarity-inverting amplifier D1 that end of oppisite phase is then connected with the negative pole of Sheffer stroke gate A2, negative pole is connected with the negative pole of Sheffer stroke gate A1, the polar capacitor C3 that positive pole is then connected with the emitter of triode VT2 after resistance R2, and minus earth, the polar capacitor C4 that positive pole is then connected with the positive pole of Sheffer stroke gate A2 after resistance R3 forms.The LX pin of described companion chip U is connected with the collector of triode VT1, its OUT pin is then connected with the negative pole of Sheffer stroke gate A2, GND pin ground connection, the output terminal of described Sheffer stroke gate A2 is connected with signal processing circuit 52, its positive pole is then connected with the output terminal of Sheffer stroke gate A1 and signal processing circuit 52 respectively, and the positive pole of described Sheffer stroke gate A1 is connected with the collector of triode VT2, its negative pole is then connected with signal processing circuit 52.The positive pole of described polar capacitor C4 is also connected with signal processing circuit 52.The base stage of described pole pipe VT1 together with the base stage of triode VT2 as the input end of this signal screening circuit 51.In order to better implement the present invention, this companion chip U preferentially adopts MAX1921 integrated circuit to realize.
Described signal processing circuit 52 is by process chip U1, field effect transistor Q1, field effect transistor Q2, triode VT3, P pole is connected with the positive pole of Sheffer stroke gate A2, the diode D2 that N pole is then connected with the BOOT pin of process chip U1, positive pole is connected with the GND pin of process chip U1, the polar capacitor C5 that negative pole is then connected with the FB pin of process chip U1, positive pole is connected with the drain electrode of field effect transistor Q1, the polar capacitor C7 of minus earth, one end is connected with the PHASE pin of process chip U1, the inductance L 1 that the other end is then connected with the emitter of triode VT3, one end is connected with the OCSET pin of process chip U1, the resistance R4 that the other end is then connected with the source electrode of field effect transistor Q1, one end is connected with the LGATE pin of process chip U1, the resistance R5 that the other end is then connected with the base stage of triode VT3, and negative pole is connected with the LGAET pin of process chip U1, the polar capacitor C6 that positive pole is then connected with the collector of triode VT3 after resistance R6 forms.The VCC pin of described process chip U1 is connected with the positive pole of polar capacitor C4, its FB pin is then connected with the negative pole of Sheffer stroke gate A1, GND pin ground connection, LGATE pin are connected with the grid of field effect transistor Q2, UGATE pin is then connected with the grid of field effect transistor Q1; The drain electrode of described field effect transistor Q1 is respectively with the output terminal of Sheffer stroke gate A2 and transformation output circuit 53 is connected, its source electrode is then connected with the drain electrode of field effect transistor Q2.The source ground of described field effect transistor Q2; The emitter of triode VT3 is then connected with transformation output circuit 53.In order to better implement the present invention, described process chip U1 is preferably APW7120 integrated circuit to realize.
Described transformation output circuit 53 is by transformer T, triode VT4, field effect transistor Q3, N pole is connected with transformer T former limit non-same polarity, the diode D3 of P pole ground connection, the diode D4 that P pole is connected with transformer T secondary non-same polarity, N pole is then connected with the grid of field effect transistor Q3 after resistance R8, the resistance R9 that one end is connected with transformer T secondary Same Name of Ends, the other end is then connected with the grid of field effect transistor Q3, and the resistance R7 that one end is connected with transformer T secondary Same Name of Ends, the other end is then connected with the base stage of triode VT4 forms.Described transformer T former limit Same Name of Ends is connected with the drain electrode of field effect transistor Q1, its non-same polarity is then connected with the emitter of triode VT3, and the grid of described field effect transistor Q3 is connected with the collector of triode VT4, its source electrode is then connected with the emitter of triode VT4 and transformer T secondary Same Name of Ends respectively.The drain electrode of described field effect transistor Q3 together with its source electrode as the output terminal of transformation output circuit 53.
Be then emphasis of the present invention from gain control circuit 8, as shown in Figure 3, it is by amplifier P1, field effect transistor Q4, field effect transistor Q5, unidirectional thyristor D5, polar capacitor C8, polar capacitor C9, resistance R10, resistance R11, resistance R12, and resistance R13 forms.During connection, the negative pole of polar capacitor C9 is connected with the drain electrode of field effect transistor Q5, positive pole is then connected with the N pole of unidirectional thyristor D5 after resistance R10 through resistance R11 in turn, one end of resistance R13 is connected with the positive pole of polar capacitor C9, the other end is then connected with the output terminal of amplifier P1, the negative pole of polar capacitor C8 is connected with the source electrode of field effect transistor Q4, its positive pole is then connected with the positive pole of amplifier P1, between the negative pole that resistance R12 is then serially connected in amplifier P1 and output terminal.The control pole of described unidirectional thyristor D5 is connected with the grid of field effect transistor Q5, its P pole is then connected with the grid of field effect transistor Q4.Ground connection while the positive pole of described amplifier P1 is connected with the tie point of resistance R11 with resistance R10, its negative pole is then connected with the drain electrode of field effect transistor Q4.The source ground of described field effect transistor Q5; The N pole of described unidirectional thyristor D5 together with its P pole as should from the input end of gain control circuit 8, the positive pole of polar capacitor C9 then together with the output terminal of amplifier P1 as the output terminal from gain control circuit 8.
As mentioned above, just well the present invention can be realized.
Claims (7)
1. one kind based on the motor speed test macro controlled from gain, by single-chip microcomputer (1), the power module (2) be connected with single-chip microcomputer (1), motor speed control module (3), display (7), be connected with motor speed control module (3) by measured motor (4), the speed pickup (6) be connected with by measured motor (4), the tach signal processing module (5) be connected with speed pickup (6) forms, described motor speed control module (3) is also connected with power module (2), it is characterized in that, also be provided with between tach signal processing module (5) and single-chip microcomputer (1) from gain control circuit (8), described from gain control circuit (8) by amplifier P1, field effect transistor Q4, field effect transistor Q5, unidirectional thyristor D5, negative pole is connected with the drain electrode of field effect transistor Q5, positive pole is then in turn through polar capacitor C9 that resistance R11 is connected with the N pole of unidirectional thyristor D5 after resistance R10, one end is connected with the positive pole of polar capacitor C9, the resistance R13 that the other end is then connected with the output terminal of amplifier P1, negative pole is connected with the source electrode of field effect transistor Q4, the polar capacitor C8 that positive pole is then connected with the positive pole of amplifier P1, and the resistance R12 be serially connected between the negative pole of amplifier P1 and output terminal forms, the control pole of described unidirectional thyristor D5 is connected with the grid of field effect transistor Q5, its P pole is then connected with the grid of field effect transistor Q4, ground connection while the positive pole of described amplifier P1 is connected with the tie point of resistance R11 with resistance R10, its negative pole is then connected with the drain electrode of field effect transistor Q4, the source ground of described field effect transistor Q5, the N pole of described unidirectional thyristor D5 together with its P pole as should input end from gain control circuit (8), the positive pole of polar capacitor C9 then together with the output terminal of amplifier P1 as the output terminal from gain control circuit (8).
2. a kind of motor speed test macro based on controlling from gain according to claim 1, it is characterized in that: described tach signal processing module (5) is by signal screening circuit (51), the signal processing circuit (52) be connected with signal screening circuit (51), and the transformation output circuit (53) be connected with signal processing circuit (52) forms.
3. a kind of motor speed test macro based on controlling from gain according to claim 2, it is characterized in that: described signal screening circuit (51) is by companion chip U, triode VT1, triode VT2, Sheffer stroke gate A1, Sheffer stroke gate A2, negative pole is connected with the VIN pin of companion chip U, the polar capacitor C1 that positive pole is then connected with the emitter of triode VT1 after resistance R1, positive pole is connected with the LX pin of companion chip U, the polar capacitor C2 that negative pole is then connected with the collector of triode VT2, positive terminal is connected with the PGND pin of companion chip U, the polarity-inverting amplifier D1 that end of oppisite phase is then connected with the negative pole of Sheffer stroke gate A2, negative pole is connected with the negative pole of Sheffer stroke gate A1, the polar capacitor C3 that positive pole is then connected with the emitter of triode VT2 after resistance R2, and minus earth, the polar capacitor C4 that positive pole is then connected with the positive pole of Sheffer stroke gate A2 after resistance R3 forms, the LX pin of described companion chip U is connected with the collector of triode VT1, its OUT pin is then connected with the negative pole of Sheffer stroke gate A2, GND pin ground connection, the output terminal of described Sheffer stroke gate A2 is connected with signal processing circuit (52), its positive pole is then connected with the output terminal of Sheffer stroke gate A1 and signal processing circuit (52) respectively, and the positive pole of described Sheffer stroke gate A1 is connected with the collector of triode VT2, its negative pole is then connected with signal processing circuit (52), the positive pole of described polar capacitor C4 is also connected with signal processing circuit (52), the base stage of described triode VT1 together with the base stage of triode VT2 as the input end of this signal screening circuit (51).
4. a kind of motor speed test macro based on controlling from gain according to claim 3, it is characterized in that: described signal processing circuit (52) is by process chip U1, field effect transistor Q1, field effect transistor Q2, triode VT3, P pole is connected with the positive pole of Sheffer stroke gate A2, the diode D2 that N pole is then connected with the BOOT pin of process chip U1, positive pole is connected with the GND pin of process chip U1, the polar capacitor C5 that negative pole is then connected with the FB pin of process chip U1, positive pole is connected with the drain electrode of field effect transistor Q1, the polar capacitor C7 of minus earth, one end is connected with the PHASE pin of process chip U1, the inductance L 1 that the other end is then connected with the emitter of triode VT3, one end is connected with the OCSET pin of process chip U1, the resistance R4 that the other end is then connected with the source electrode of field effect transistor Q1, one end is connected with the LGATE pin of process chip U1, the resistance R5 that the other end is then connected with the base stage of triode VT3, and negative pole is connected with the LGAET pin of process chip U1, the polar capacitor C6 that positive pole is then connected with the collector of triode VT3 after resistance R6 forms, the VCC pin of described process chip U1 is connected with the positive pole of polar capacitor C4, its FB pin is then connected with the negative pole of Sheffer stroke gate A1, GND pin ground connection, LGATE pin are connected with the grid of field effect transistor Q2, UGATE pin is then connected with the grid of field effect transistor Q1, the drain electrode of described field effect transistor Q1 is respectively with the output terminal of Sheffer stroke gate A2 and transformation output circuit (53) is connected, its source electrode is then connected with the drain electrode of field effect transistor Q2, the source ground of described field effect transistor Q2, the emitter of triode VT3 is then connected with transformation output circuit (53).
5. a kind of motor speed test macro based on controlling from gain according to claim 4, it is characterized in that: described transformation output circuit (53) is by transformer T, triode VT4, field effect transistor Q3, N pole is connected with transformer T former limit non-same polarity, the diode D3 of P pole ground connection, P pole is connected with transformer T secondary non-same polarity, the diode D4 that N pole is then connected with the grid of field effect transistor Q3 after resistance R8, one end is connected with transformer T secondary Same Name of Ends, the resistance R9 that the other end is then connected with the grid of field effect transistor Q3, and one end is connected with transformer T secondary Same Name of Ends, the resistance R7 that the other end is then connected with the base stage of triode VT4 forms, described transformer T former limit Same Name of Ends is connected with the drain electrode of field effect transistor Q1, its non-same polarity is then connected with the emitter of triode VT3, and the grid of described field effect transistor Q3 is connected with the collector of triode VT4, its source electrode is then connected with the emitter of triode VT4 and transformer T secondary Same Name of Ends respectively, the drain electrode of described field effect transistor Q3 together with its source electrode as the output terminal of this transformation output circuit (53).
6. a kind of motor speed test macro based on controlling from gain according to claim 5, is characterized in that: described companion chip U is MAX1921 integrated circuit.
7. a kind of motor speed test macro based on controlling from gain according to claim 5, is characterized in that: described process chip U1 is APW7120 integrated circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510225179.5A CN104808011A (en) | 2015-05-06 | 2015-05-06 | Motor revolving speed testing system based on self-gain control |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510225179.5A CN104808011A (en) | 2015-05-06 | 2015-05-06 | Motor revolving speed testing system based on self-gain control |
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| CN104808011A true CN104808011A (en) | 2015-07-29 |
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| CN201510225179.5A Withdrawn CN104808011A (en) | 2015-05-06 | 2015-05-06 | Motor revolving speed testing system based on self-gain control |
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