CN104778971B - Accumulator system and its access method - Google Patents
Accumulator system and its access method Download PDFInfo
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- CN104778971B CN104778971B CN201410015024.4A CN201410015024A CN104778971B CN 104778971 B CN104778971 B CN 104778971B CN 201410015024 A CN201410015024 A CN 201410015024A CN 104778971 B CN104778971 B CN 104778971B
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Abstract
It is a kind of accumulator system and its access method the invention discloses the present invention.The accumulator system of the present invention includes：Multiple storage units, conversion circuit, and access circuit.Access method comprises the steps of：One correspondence of M threshold voltage and N number of data interdigit is provided the respectively storage unit, wherein, which includes threshold voltage of at least one tool compared with high anti-jamming capacity, the threshold voltage with least one relatively low antijamming capability of tool；With threshold voltage of at least one tool compared with high anti-jamming capacity, the combination in the correspondence data bit corresponding with the threshold voltage of the relatively low antijamming capability of at least one tool of replacing；And these storage units are accessed according to the correspondence after replacement.
Description
Technical field
The invention relates to a kind of accumulator system and its access method, and in particular to a kind of flash memory system and
Its access method.
Background technology
Flash memory (flash memory) is a kind of fairly common nonvolatile memory (non-volatile
memory).In short, the practice of flash memory is, electric charge (charge) is stored in transistor cell (transistor
Memory cell) grid (gate) asked with base stage (substrate), and changed according to the number of the stored quantity of electric charge brilliant
The threshold voltage (threshold voltage, referred to as Vt) of body pipe.Wherein, threshold voltage size represents different storage numbers
According to content.
Nitride (Silicon-Oxide-Nitride-Oxide-Silicon, referred to as SONOS) flash memory is the one of flash memory
Kind framework, it is characterized in that being not easy, in the characteristic of oxygen nitrogen oxygen (ONO) interlayer movement, electric charge to be limited to (trap) in fixation using electric charge
Position.SONOS flash memories are made of SONOS transistor arrays (array), and are controlled write-in data by access circuit, read data.
Figure 1A is referred to, it is the schematic diagram of SONOS transistors.SONOS transistors have source electrode (source), grid
(gate), grid (drain).Wherein, position and the non-conductor for storing electric charge, but nitride are used between source electrode and grid
(Nitride).Therefore, it is not easy to flow each other in the electric charge of this both sides storage.For purposes of illustration only, herein by between grid and grid
Between (right side of grid), grid and source electrode (left side), one first storage element and one second storage element are respectively defined as.As before
Described, the electric charge R of the first storage element storage simultaneously is not easy to be moved to the second storage element；The electric charge L of second storage element storage
Also it is not easily shifted to the first storage element.
Figure 1B is referred to, it is in the storage element of SONOS transistors, and when storing single data bit (bit), threshold value is electric
Press the schematic diagram of distribution.Wherein curve location is higher, represents that Probability is bigger, can also represent in SONOS transistor arrays, have
Storage element the more has respective threshold voltage.
The relation of the storage element quantity and representative data bit of SONOS transistor arrays also can be explained in Figure 1B.This figure
Formula includes two threshold voltages (V1, V2), and it is higher as 1, threshold voltage that the first relatively low level V1 of threshold voltage represents data bit
Second electrical level V2 represent data bit as 0.Wherein, when SONOS transistors program (program) storage element or read (read)
During storage element, criterion is used as using reference voltage (reference voltage) level Vc.
If for example, when reading storage element, when judging that the threshold voltage of storage element is higher than reference voltage Vc, representative is read
Data bit be " 0 "；And if when reading storage element, when judging that the threshold voltage of storage element is less than reference voltage Vc, generation
The data bit that table is read is " 1 ".
When data bit to write-in is " 0 ", it is necessary to stored electric charge to oxygen nitrogen oxygen using programming (program) flow
(ONO) layer, makes its threshold voltage be higher than reference voltage Vc.Conversely, when the data bit to write-in is " 1 ", it is necessary to utilize erasing
(erase) flow, equivalent electric charge is removed from oxygen nitrogen oxygen (ONO) layer, its threshold voltage is less than reference voltage Vc.
Figure 1A, Figure 1B represent the situation that storage element is only used for storing single data bit.With the data of required storage
Increase substantially, SONOS transistors certainly will need access facility of the offer more efficiently to bigger storage volume, and ensure logarithm
Correctness during according to position into line access.
The content of the invention
According to the first aspect of the invention, a kind of accumulator system is proposed, comprising：Multiple storage units, respectively the storage list
Member is to represent N number of data bit using M threshold voltage, wherein, it is higher anti-interference which includes at least one tool
The threshold voltage of (high interference immunity) ability, with least one relatively low anti-interference (low of tool
Interference immunity) ability threshold voltage, wherein M, N are integer, and M is more than N；One conversion circuit, it is to carry
For these threshold voltages and a correspondence of these data interdigits, also, with threshold of at least one tool compared with high anti-jamming capacity
Threshold voltage, the corresponding data of threshold voltage with the relatively low antijamming capability of at least one tool in the correspondence that replace combine；
And an access circuit, it is to access these storage units according to the correspondence after replacement.
According to the second aspect of the invention, propose a kind of access method, applied to include multiple storage units, one conversion electricity
One accumulator system of Lu Yuyi access circuits, the access method comprise the steps of：The conversion circuit is to the respectively storage unit
One correspondence of M threshold voltage and N number of data interdigit is provided, wherein, which includes at least one tool compared with highly resistance
The threshold voltage of interference performance, the threshold voltage with least one relatively low antijamming capability of tool, wherein M, N are integer, and M is more than N；
The conversion circuit with this at least one tool compared with high anti-jamming capacity threshold voltage, replace in the correspondence with this at least one tool
The combination of the corresponding data bit of threshold voltage of relatively low antijamming capability；And the access circuit according to after replacement this is right
It should be related to and access these storage units.
More preferably understand to have to the above-mentioned and other aspect of the present invention, preferred embodiment cited below particularly, and coordinate institute
Accompanying drawings, are described in detail below：
Brief description of the drawings
Figure 1A, it is the schematic diagram of SONOS transistors.
Figure 1B, its be in the storage element of SONOS transistors, when storing single data bit, storage element quantity and threshold
The schematic diagram of threshold voltage distribution.
Fig. 2A, it is the storage element of SONOS transistors both sides, is respectively used to the schematic diagram of two data bit of storage.
Fig. 2 B, its be in the storage element of SONOS transistors, when storing two data bit, storage element quantity and threshold
The schematic diagram of threshold voltage distribution.
Fig. 3, it is the threshold voltage of the storage element of SONOS transistors, is illustrated be subject to what adjacent storage element was influenced
Figure.
Fig. 4, it is to converge the storage elements of whole SONOS transistors both sides when storing two data bit respectively, threshold voltage
Combination situations.
Fig. 5, it is the schematic diagram that two data bit are represented in storage element five threshold voltages of offer.
Fig. 6, when it is that the storage element of SONOS transistors both sides provides five level respectively, the combination feelings of threshold voltage
Shape.
Fig. 7, it is the schematic diagram of the memory circuitry of the present invention.
Fig. 8, it is the embodiment of the present invention, and the 5th level V5 is corresponded to the schematic diagram that data bit is " 10 ".
Fig. 9 A, when it is that the present invention is directed to five kinds of level combinations, easily produce the signal that diachesis changes definition mode
Figure.
Fig. 9 B, its be converge whole Fig. 9 A level combinations and data bit correspondence schematic diagram.
【Symbol description】
71 conversion circuit 73 of access circuit
75 memory array 77 of voltage generation circuit
Embodiment
In order to store more data, SONOS transistors can further change the electric charge and threshold value electricity of storage element storage
Correspondence between pressure.Such as：Assuming that each storage element can be used for two data bit of storage.
Fig. 2A is referred to, it is the storage element of SONOS transistors both sides, is respectively used to the signal of two data bit of storage
Figure.Wherein, the storage element in left side can store data bit L1, L2, and, the storage element on right side be used to storing data bit R1,
R2.Hereinafter, by taking the storage element of wherein side as an example, the correspondence of data bit and threshold voltage is illustrated.
Refer to Fig. 2 B, its be in the storage element of SONOS transistors, store two data bit when, storage element number
Amount and the schematic diagram of threshold voltage distribution.This schema includes four level, the different threshold voltage of this four level representatives.By a left side
And the right side is respectively：Represent data bit as " 11 " the first level V1, represent data bit as " 10 " second electrical level V2, represent data
Position is the 3rd level V3 of " 00 ", represents fourth level V4 of the data bit as " 01 ".
When storage element is used to store two data bit, it is necessary to reference to multiple voltages.Wherein, initial reference voltage Vc0
Corresponding to the high position data of storage element.First reference voltage Vc1 and the second reference voltage Vc2 is then corresponding to the low of storage element
Position data.First illustrate the mode read below, then in the mode of explanation write-in.
For the distribution scenario of Fig. 2 B, when reading storage element, if its threshold voltage is less than the feelings of initial reference voltage Vc0
Shape, you can the high position for confirming data bit is " 1 ", on the contrary then be " 0 ".
It is that threshold voltage is higher than the situation of initial reference voltage Vc0 that explanation, which reads result, first.As it was previously stated, threshold value is electric
When pressure is higher than initial reference voltage Vc0, the high position equivalent to data bit is " 0 ".Then, determine whether threshold voltage is low
In the second reference voltage Vc2.
If threshold voltage is actually lower than the second reference voltage Vc2, you can the low level for confirming data bit is " 0 ".Accordingly, arrange in pairs or groups
The high position for previously judging to draw is " 0 " as a result, being combined as " 00 " for data bit can be learnt.
Conversely, if threshold voltage is higher than the second reference voltage Vc2, the low level that can confirm data bit is " 1 ".Accordingly, take
It is " 0 " as a result, being combined as " 01 " for data bit can be learnt with the previously high position that judges to draw.
Hold, after being judged a high position for 0 according to initial reference voltage Vc0, further according to threshold voltage and second with reference to electricity
Press the low level of the comparison of Vc2 and determination data position.If read the threshold voltage drawn between initial reference voltage Vc0 and second to join
Between examining voltage Vc2, judge the content of data bit for " 00 "；And if read draw when being higher than the second reference voltage Vc2, sentence
The content of disconnected data bit is " 01 ".
Secondly it is that threshold voltage is less than the situation of initial reference voltage Vc0 that explanation, which reads result,.As it was previously stated, threshold value is electric
Force down when initial reference voltage Vc0, the high position equivalent to data bit is " 1 ".Then, determine whether threshold voltage is low
In the first reference voltage Vc1.
If threshold voltage is actually lower than the first reference voltage Vc1, you can the low level for confirming data bit is " 1 ".Accordingly, arrange in pairs or groups
The high position for previously judging to draw is " 1 " as a result, being combined as " 11 " for data bit can be learnt.
Conversely, if threshold voltage is higher than the first reference voltage Vc1, the low level that can confirm data bit is " 0 ".Accordingly, take
It is " 1 " as a result, being combined as " 10 " for data bit can be learnt with the previously high position that judges to draw.
Hold, after judging that a high position is " 1 " according to initial reference voltage Vc0, referred to further according to threshold voltage and first
The comparison of voltage Vc1 and the low level of determination data position.If the threshold voltage drawn is read between initial reference voltage Vc0 and first
Between reference voltage Vc1, the content of data bit is judged as " 10 "；And if the threshold voltage drawn is read less than the first reference
During voltage Vc1, the content of data bit is judged as " 11 ".
, can be according to the content for the data bit to be write and with not when on the other hand, to write data to storage element
Same threshold voltage programming storage element, or the threshold voltage through erasing flow reduction storage element.
First, if a high position for the data bit wished to write to is " 0 " (that is, the data bit of write-in is " 0x "), it is necessary to will store up
Deposit element threshold voltages and be programmed to position (V3) higher than initial reference voltage Vc0.Then, if the data bit wished to write to it is low
When position is " 1 " (that is, the data bit of write-in is " 01 "), it is necessary to which storage element threshold voltage is programmed to higher than the second reference voltage
The position (V4) of Vc2.
Conversely, when the high position to the data bit of write-in is " 1 " (that is, the data bit of write-in is " 1x "), then must utilize
Flow is wiped, the threshold voltage of storage element is less than initial reference voltage Vc0.Then, if the data bit wished to write to it is low
Position is when be " 1 " (that is, the data bit of write-in is " 11 "), it is necessary to using flow is wiped, the threshold voltage of storage element is less than the
The position (V1) of one reference voltage Vc1.
For purposes of illustration only, the voltage's distribiuting of Fig. 2 B is divided into four level herein.By left, the right side is respectively：Threshold voltage
The first level V1 less than the first reference voltage Vc1；Threshold voltage is between the first reference voltage Vc1 and initial reference voltage Vc0
Between second electrical level V2；Threeth level of the threshold voltage between initial reference voltage Vc0 and the second reference voltage Vc2
V3；And threshold voltage is higher than the 4th level V4 of the second reference voltage Vc2.
In other words, if the threshold voltage drawn belongs to the first level V1, represent storage element storage data bit as "
11″；If the threshold voltage drawn belongs to second electrical level V2, the data bit of storage element storage is represented as " 10 "；If draw
When threshold voltage belongs to the 3rd level V3, the data bit of storage element storage is represented as " 00 "；And the if threshold voltage drawn
When belonging to the 4th level V4, the data bit of storage element storage is represented as " 01 ".
Furthermore then it is the threshold voltage that storage element is controlled through programming and erasing flow during to write-in data bit.
That is, when the data bit to write-in is " 11 ", control threshold voltage belongs to the first level V1；Data bit to write-in is " 10 "
When, control threshold voltage belongs to the 2nd V2；When data bit to write-in is " 00 ", control threshold voltage belongs to the 3rd level
V3；And when to the data bit of write-in being " 01 ", control threshold voltage belongs to the 4th level V4.
Hold, the threshold voltage of storage element can influence the sentence read result to data bit.Therefore, in same storage element
When storing multiple data bit, how correct interpretation threshold voltage, be very important.With the progress of processing procedure, storage unit
The size of (SONOS transistors) is also smaller, the situation also easier generation of storage element (interference) interfering with each other.
That is, in same SONOS transistors, the electric charge of adjacent storage element may affect one another, cause the judgement of threshold voltage by
To interference.That is, there may be overlapping situation for the threshold voltage distribution of each level.
As it was previously stated, the electric charge in storage element may be interfering with each other.It is event, the distribution of actual threshold voltage is not as figure
It is preferable as 2B, and may be as shown in Figure 3.Fig. 3 is referred to, it is the threshold voltage of the storage element of SONOS transistors, is subject to phase
The schematic diagram that adjacent storage element influences.This schema represents, storage element (the second storage member on the left of SONOS transistors
Part), if its threshold voltage is the first level V1, and the threshold voltage of the storage element (the first storage element) on right side is programmed
During to the 3rd level V3 or the 4th level V4, then the threshold voltage of left side storage element (the second storage element) is easily stored by right side
Element programs influence.
As seen from Figure 3, when being programmed to the first storage element, the second storage element but can be disturbed seriously.
Even, the second storage element should also produce the situation to overlap each other with second electrical level V2 positioned at the threshold voltage of the first level V1.
If the first level V1 is considered as an interference source threshold voltage, second electrical level V2 belongs to the threshold value electricity for having relatively low antijamming capability
Pressure.Related, when the threshold voltage of the second storage element of interpretation belongs to the first level V1 or second electrical level V2, it is possible to produce
Erroneous judgement.That is, for the second storage element threshold voltage between the first reference voltage Vc1 and initial reference voltage Vc0 situation,
Will be unable to read the data bit in the second storage element is 11 or 10 actually.
Such a interference cases, are particularly easy to occur relatively low with the threshold voltage of storage element, but because of adjacent storage member
Part wants programmed threshold voltage higher, and the feelings that the threshold voltage difference corresponding to the data bit of the two storage elements is excessive
Shape.Therefore, if the threshold voltage of the first storage element script is the first level V1, but the second storage element will be programmed to the 3rd
During level V3 or the 4th level V4, the first storage element can be also affected similarly.
Fig. 4 is referred to, it is to converge the storage elements of whole SONOS transistors both sides when storing two data bit respectively, threshold value
The combination situations of voltage.The first row of this schema is represented in the first storage element (storage element on the right side of SONOS transistors)
Threshold voltage is respectively the first level V1, second electrical level V2, the 3rd level V3, the situation of the 4th level V4.The first of this schema
The threshold voltage that column represents in the second storage element (storage element on the left of SONOS transistors) is respectively the first level V1, the
Two level V2, the 3rd level V3, the situation of the 4th level V4.Where it is assumed that the first level V1 represents data bit as (1,1),
Two level V2 represent data bit as (1,0), the 3rd level V3 represent data bit as (0,0), the 4th level V4 represent data bit as
(0,1).
For purposes of illustration only, other fields in form represent that different types of threshold voltage combines with the form of Vx-Vy.Its
Middle Vx represents the corresponding threshold voltage of the second storage element (left side storage element), Vy represents (the right side storage of the first storage element
Element) corresponding threshold voltage.
The upper right corner of Fig. 4 forms is with shading sign threshold voltage combination (V1-V3) and (V1-V4).That is, when the second storage member
The threshold voltage of part is the first level V1, and the first storage element will be programmed to the 3rd level V3, the situation of the 4th level V4.
Such a threshold voltage combination belongs to the situation that the second storage element is easily influenced be subject to the first storage element.At this time, the second storage
The situation such as Fig. 3 may be presented in the threshold voltage of element.
The lower left corner of Fig. 4 forms is with shading sign threshold voltage combination (V3-V1) and (V4-V1).That is, when the first storage member
The threshold voltage of part is the first level V1, and the second storage element will be programmed to the 3rd level V3, the situation of the 4th level V4.
Such a threshold voltage combination belongs to the situation that the first storage element is easily influenced be subject to the second storage element.At this time, the first storage
The situation such as Fig. 3 may be presented in the threshold voltage of element.
Hold, the threshold voltage of second the-the first storage element of storage element is combined as (V1-V3), (V1-V4), (V3-
V1), when (V4-V1), the situation for easily producing programming interference is belonged to.Wherein, the combination (V1-V3) of threshold voltage is equivalent to data
Position be the situation of (11,00), combinations of voltages (V1-V4) equivalent to the situation, threshold voltage that data bit is (11,01) combination
(V3-V1) it is (01,11) equivalent to data bit equivalent to situation that data bit is (00,11), the combination (V4-V1) of threshold voltage
Situation.
In order to avoid the threshold voltage of storage element is subject to disturbing for adjacent storage element, the present invention proposes a kind of utilize
Compared with the way that data byte closes more threshold voltages.Such as：If each storage element can store 2 data bit, each
The composite type of the available data bit of storage element can be 4 kinds.At this time, if 5 kinds of threshold voltages can be provided in storage element.Such as
This one, when SONOS transistors both sides storage element using such a threshold voltage carry out data bit interpretation when, both sides
The combination variety for the threshold voltage that storage element is likely to form, also will and then increase.
Fig. 5 is referred to, it is the schematic diagram that two data bit are represented in storage element five threshold voltages of offer.Scheme herein
In mark, threshold voltage is divided into five level：First level V1, second electrical level V2, the 3rd level V3, the 4th level V4,
Five level V5.Where it is assumed that the data bit that the first level V1 is represented in storage element represents storage as (1,1), second electrical level V2
The data bit that data bit in element is (1,0), the 3rd level V3 is represented in storage element represents as (0,0), the 4th level V4
Data bit in storage element is (0,1).In addition, the 5th level V5 is threshold voltage of the tool compared with high anti-jamming capacity.5th electricity
Flat V5 can be used for the definition mode for providing an elasticity, and therefore, data bit corresponding with the 5th level V5 need not be simultaneously defined.Adopt
During with the threshold voltage interpretation mode of Fig. 5, the issuable combination of threshold voltage of the first storage element and the second storage element
Type shares 5*5=25 kinds.
Fig. 6 is referred to, it is the schematic diagram that the storage element of SONOS transistors both sides provides five level respectively.As before
Described, threshold voltage combination (V1-V3), (V1-V4), (V3-V1), (V4-V1) are the first storage element and the second storage element
The combination of interference is easily formed each other.Herein, will further hold confusing threshold voltage combo box to be selected in together.For example, threshold
Threshold voltage combination (V1-V3) easily produces interference to threshold voltage combination (V2-V3)；Threshold voltage combination (V1-V4) is easily right
Threshold voltage combination (V2-V4) produces interference；Threshold voltage combination (V3-V1) easily produces threshold voltage combination (V3-V2)
Interference；And threshold voltage combination (V4-V1) easily produces interference to threshold voltage combination (V4-V2).
When the threshold voltage of storage element is the first level V1, easily because adjacent storage element is opposite high level
The influence of (V3, V4) and be driven high, and then influence threshold voltage be V2 phenomenon.In other words, the threshold voltage of storage element is
During second electrical level V2, belong to the threshold voltage for having relatively low antijamming capability.If threshold voltage combination includes second electrical level V2, quilt
The chance of interference is higher.
However, being compared with Fig. 4, Fig. 6 has increased the situation of the 5th level V5 newly, thus, it is possible to create combinations of voltages species
It is more.Wherein, when threshold voltage is the 5th level V5, threshold voltage of the tool compared with high anti-jamming capacity is belonged to.That is, increase newly herein
The combinations (V1-V5) of several threshold voltages, (V2-V5), (V3-V5), (V4-V5), (V5-V1), (V5-V2), (V5-V3),
(V5-V4)、(V5-V5).Therefore, these newly-increased threshold voltage combinations can be used for substituting the threshold voltage for easily producing and obscuring
Combination.
Fig. 7 is referred to, it is the schematic diagram of the memory circuitry of the present invention.Conception according to the present invention, access circuit 71
When accessing programmable memory array 77, must be converted to by conversion circuit 73 by the data content for the N number of data bit to be write
Corresponding M threshold voltage, the according to this reference as access storage unit.In the foregoing embodiments, it is assumed that M=5, N=
4, but practical application is not limited thereto.That is, M, N are integer, and M is more than N, you can the conception of the application present invention.Wherein, change
Circuit 73 combines and data interdigit, mutual correspondence equivalent to threshold voltage is provided.During practical application, such a correspondence
Image mode, lookup table mode can be passed through or changed using algorithmic approach.Furthermore voltage generation circuit 75 is then used to produce
Raw dynamic operation combinations of voltages needed for for M threshold voltage read-write memory array.
Fig. 8 is referred to, it is the embodiment of the present invention, and the 5th level V5 is corresponded to the schematic diagram that data bit is " 10 ".
It is " 10 " to unify the data definition representated by the 5th level of the first storage element and the second storage element herein.This embodiment
Using threshold voltage (fiveth level V5) of the tool compared with high anti-jamming capacity, replacement has the threshold voltage (the of relatively low antijamming capability
Two level V2).
In short, the way of this embodiment is：When the data bit of the second storage element is " 10 ", and the first storage element because
To be programmed to the 3rd level V3 corresponding to data bit " 00 ", or because to be programmed to the corresponding to data bit " 01 "
During four level V4, in the second storage element, correspond to data bit " 10 " without using second electrical level V2, but change with the 5th level V5
Corresponding to data bit " 10 ".
Furthermore when the data bit of the first storage element is " 10 ", and the second storage element is because correspond to data bit " 00 "
And the 3rd level V3 is programmed to, or because when being programmed to the 4th level V4 corresponding to data bit " 01 ", first
In storage element, correspond to data bit " 10 " without using second electrical level V2, but change and data bit " 10 " is corresponded to the 5th level V5.
Fig. 9 A illustrate several the situations how present invention will easily be subject to programming to disturb, with newly-increased the 5th level formation
Combination is replaced.Fig. 9 A are referred to, when it is that storage element five kinds of threshold voltages of offer represent two data bit, SONOS is brilliant
The schematic diagram of the threshold voltage combination of body pipe both sides.For purposes of illustration only, threshold voltage is indicated in the data bit represented herein
Together.It can be learnt by Fig. 8：When threshold voltage is combined as (V1-V2), left side storage element is represented as the first level V1, the right side
Side storage element is second electrical level V2.First level of left side storage element corresponds to data bit for " 11 " and right side storage element
Second electrical level corresponding to data bit be " 10 ".Therefore, the 3rd arrange the 4th field mark in figure and show, threshold voltage is combined as (V1-V2)
When, (11,10) of left side storage element and the data bit of right side storage element.Remaining threshold voltage combines pair with data bit
It should be related to and also adopt similar notation methods.
Since the both sides of SONOS transistors need to provide 4 data bit altogether, the number of combinations that this four data bit produce is 16
Kind.Therefore, it is necessary to be combined corresponding to 16 kinds of threshold voltages.However, when the threshold voltage for defining each storage element is 5 kinds
When, the number of combinations of the threshold voltage of SONOS transistors both sides shares 25 kinds.Therefore, can exclude wherein characteristic it is less desirable and
There may be the situation obscured.
As it was previously stated, second electrical level V2 belongs to the threshold voltage for having relatively low antijamming capability, therefore, easily it is subject to the first electricity
The interference of flat V1.It is event, this embodiment utilizes threshold voltage (fiveth level V5) of the tool compared with high anti-jamming capacity, the electricity of replacement second
The combination of data bit representated by flat V2.
One is easily to produce the situation obscured with (V2-V3) for threshold voltage combination (V1-V3), deletes threshold value electricity
Press the correspondence of (V2-V3) and data bit (10,00), and change with threshold voltage combine (V5-V3) corresponding to data bit (10,
00).Can be further the first level V1 or second electrical level V2 by the second storage element, and first stores up according to the embodiment of Fig. 9 A
The threshold voltage combination of the situation that element is the 3rd level V3, i.e. (V1/V2-V3) is deposited, jointly corresponding to data bit (11,00).
Consequently, it is possible to be influenced even if the second storage element is programmed to the 3rd level V3 be subject to the first storage element, lead
It is follow-up to read the second storage element when causing the threshold voltage of the second storage element to be changed into second electrical level V2 by the first level V1
When, the data bit interpretation for remaining to correctly store the second storage element is " 11 ".Such a practice, can be to avoid when the second storage
Element is relatively low threshold voltage (V1/V2), and when the first storage element will be programmed to the 3rd level V3, second may be stored
The data bit of element produces the situation of erroneous judgement.
Secondly being easily to produce the situation obscured with (V2-V4) for threshold voltage combination (V1-V4), threshold value electricity is deleted
The correspondence of pressure combination (V2-V4) and data bit (10,01), and change and (V5-V4) is combined with threshold voltage correspond to data bit
(10,01).Can be further the first level V1 or second electrical level V2 by the second storage element according to the embodiment of Fig. 9 A, and the
One storage element is the combination of the situation, the i.e. threshold voltage of (V1/V2-V4) of the 4th level V4, jointly corresponding to data bit
(11,01).
Consequently, it is possible to be influenced even if the second storage element is programmed to the 4th level V4 be subject to the first storage element, lead
When causing the threshold voltage of the second storage element to be changed into second electrical level V2 by the first level V1, remain to the second storage member correctly
The data bit interpretation of part storage is " 11 ".Such a practice, can to avoid when the second storage element be compared with low level (V1/V2), and
When first storage element will be programmed to the 4th level V4, the data bit of the second storage element may be made to produce the situation of erroneous judgement.
Thirdly being that the situation obscured easily is produced for combinations of voltages (V3-V1) and (V3-V2), threshold voltage group is deleted
Close the correspondence of (V3-V2) and data bit (00,10), and change with threshold voltage combine (V3-V5) corresponding to data bit (00,
10).Can be further the first level V1 or second electrical level by the threshold voltage of the first storage element according to the embodiment of Fig. 9 A
V2, and the threshold voltage combination of the situation that the second storage element is the 3rd level V3, i.e. (V3-V1/V2), jointly corresponding to data
Position (00,11).
Consequently, it is possible to be influenced even if the first storage element is programmed to the 3rd level V3 be subject to the second storage element, lead
When causing the threshold voltage of the first storage element to be changed into second electrical level V2 by the first level V1, remain to the first storage member correctly
The data bit interpretation of part storage is " 11 ".Such a practice, can be relatively low electricity to avoid the threshold voltage when the first storage element
Press (V1/V2), and when the second storage element will be programmed to the 3rd level V3, may produce the data bit of the first storage element
The situation of erroneous judgement.
It four is easily produces the situation obscured with (V4-V2) for threshold voltage combination (V4-V1), and deletion threshold value is electric
The correspondence of pressure combination (V4-V2) and data bit (01,10), and change and (V4-V5) is combined with threshold voltage correspond to data bit
(01,10).Can be further V1 or V2 by the first storage element, and the second storage element is V4's according to the embodiment of Fig. 9 A
The threshold voltage combination of situation, i.e. (V4-V1/V2), jointly corresponding to data bit (01,11).
Consequently, it is possible to be influenced even if the first storage element is programmed to the 4th level V4 be subject to the second storage element, lead
When causing the threshold voltage of the first storage element to be changed into second electrical level V2 by the first level V1, remain to the first storage member correctly
Data bit interpretation stored by part is " 11 ".Such a practice, can be relatively low electricity to avoid the threshold voltage when the first storage element
Flat (V1/V2), and when the second storage element will be programmed to the 4th level V4, may produce the data bit of the first storage element
The situation of erroneous judgement.
Further, since only needing the combination of 16 kinds of threshold voltages, several threshold voltages on more border can be deleted here
Combination.Therefore, threshold voltage is combined as (V1-V5), (V2-V5), (V5-V1), (V5-V2), the situation of (V5-V5),
And it is not used by.Hold, the correspondence that Fig. 9 A are defined, can be further higher threshold voltage (the by the first storage element
Three level V3 or the 4th level V4), and the second storage element is relatively low threshold voltage (the first level V1 or second electrical level V2)
Situation be separated.And by the second storage element be higher threshold voltage (the 3rd level V3 or the 4th level V4), and
First storage element is separated for the situation of relatively low threshold voltage (the first level V1 or second electrical level V2).Even if storage member
The threshold voltage of part changes the distribution scenario of threshold voltage because adjacent storage element is programmed, but there may be erroneous judgement
Data bit separated in advance, thus can prevent erroneous judgement situation.
Further to differentiate the correspondence that data bit is combined with threshold voltage, Fig. 9 B further converge the level group of whole Fig. 9 A
Close and data bit correspondence.Threshold voltage combination is divided into three classes by Fig. 9 B in a manner of enclosing choosing.I.e.：Each circle circle includes
It is the first situation of four threshold voltages combination, each second case of circle circle comprising two threshold voltages combinations, each
A circle circle only includes the third situation of a threshold voltage combination.
The first situation refers to：Positioned at the right side in circle circle of the upper left corner comprising four threshold voltages combinations, figure in figure
Inferior horn includes the circle circle of four threshold voltage combinations.That is, threshold voltage combination (V1-V1), (V1-V2), (V2-V1), (V2-
V2)、(V3-V3)、(V3-V4)、(V4-V3)、(V4-V4).When the threshold voltage in storage element belongs to such a situation, represent
Can be according to the type of the direct interpretation data position of threshold voltage.Such a situation represents according to default correspondence judgment threshold
The correspondence of voltage and data bit.The combination of the threshold voltage of these types, with the first level V1 represent data bit " 11 ", with
Second electrical level V2 represents data bit " 10 ", represents data bit " 00 " with the 3rd level V3, represents data bit with the 4th level V4 "
01″。
Second case refers to：Circle circle, the figure middle position upper right of two threshold voltage combinations are included in figure positioned at the lower left corner
Angle includes the circle circle of two threshold voltage combinations.That is, threshold voltage combination (V3-V1/V2), (V4-V1/V2), (V1/V2-V3),
(V1/V2-V4).When the threshold voltage in storage element belongs to such a situation, represent low level threshold voltage (V1, V2)
Make no exception, it is not necessary to repartition the first level V1 and second electrical level V2.Such a situation is to have the threshold of relatively low antijamming capability
Threshold voltage (second electrical level V2), the dry of interference is produced corresponding to having the threshold voltage (second electrical level V2) of relatively low antijamming capability
Disturb the data combination " 11 " corresponding to source threshold voltage (the first level V1).Wherein, has the threshold voltage of relatively low antijamming capability
In threshold voltage, to have time low level threshold voltage；And interference source threshold voltage is in threshold voltage, has minimum level
Threshold voltage.Therefore, data bit " 11 " is represented with the first level V1/ second electrical levels V2, data bit is represented with the 3rd level V3 "
00 ", with the 4th level V4 represent data bit " 01 ".
The third situation refers to：Positioned at the circle circle of downside and right side in figure.When the threshold voltage in storage element is fallen into
During the two circle circles, the situation that the 5th level V5 is used is represented.That is, threshold voltage combination (V3-V5), (V4-V5), (V5-
V3)、(V5-V4).Such a situation system with have compared with high anti-jamming capacity threshold voltage (such as：5th level V5), replace at this
With having the data bit " 10 " corresponding to the threshold voltage (second electrical level V2) of relatively low antijamming capability in correspondence.Wherein, with
3rd level V3 represents data bit " 00 ", represents data bit " 01 " with the 4th level V4, represents data bit with the 5th level V5 "
10″。
The conversion circuit of Fig. 7, you can right when providing access circuit read-write memory array for foregoing several situations
Used in the conversion of data bit and threshold voltage.Hold, SONOS transistors (storage unit) of the invention, more numbers can be directed to
According to the application of position, more accurately change threshold voltage and the data bit representated by interpretation threshold voltage.Wherein, will be originally secondary with tool
The threshold voltage of low level and the relatively low antijamming capability of tool is (such as：Second electrical level V2) with the correspondence of data bit " 10 ", be changed to
And have maximum level and tool compared with high anti-jamming capacity threshold voltage (such as：5th level V5) replacement.Such a practice can be to avoid
Adjacent storage element is when being programmed to high level, the interference to the generation of more low level threshold voltage, and lifts data
Read effect.
During practical application, data bit corresponding with the 5th level V5 is not limited with " 10 ".Even, first storage element
5th level V5, the 5th level V5 with the second storage element, the data bit representated by both are also not necessarily intended to identical.
Traditional way is the corresponding threshold voltage combination of number decision for position, such as：For SONOS transistors
When the data bit number of offer is 4, there is provided the combination of 2^4=16 kind threshold voltages.It is of the invention then further provide for more threshold
Threshold voltage combines (5 × 5=25), and then can exclude wherein threshold voltage characteristic and easily not be affected person.Foregoing embodiment, says
The bright present invention can be to avoid in adjacent storage interelement, because the erroneous judgement result that electric charge interference produces.Accordingly, can improve
Reliability (reliability) during SONOS memory storage data.
During practical application, no matter using which kind of correspondence, as long as changing the table of comparisons in conversion circuit 63 or turning
Change formula, the practice also relative ease.Further, the present invention can also be applied to that threshold voltage number is more, data bit
The more situations of number.
For the present embodiment using the more voltage level of number, arrange in pairs or groups appropriate coding and conversion can be to avoid adjacent storages
Deposit programming interference, the reading interference of element, and the threshold voltage distribution problem of other patterns.In addition, other in application,
Also it is further that the demand etc. of the scope of threshold voltage, annoyance level, read or write speed is taken into consideration.Alternatively, collocation is with threshold value electricity
Change, curent change, voltage change, electric quantity change, electric field change, resistance variations, capacitance variations, changes of magnetic field, the thermal change of pressure
The parameters such as change, reflectance, light transmittance, pressure change, change in location, encode/the reference frame of image as conversion circuit.
In addition to SONOS memories, the conception for the image conversion that the present invention uses, can also be used in other pattern storages
In device.Such as：Resistance-type memory (Resister Memory), ferromagnetic formula memory (Ferroelectric Memory), magnetic
Resistive memory (Magnetoresistive Memory), Ovonics unified memory (Phase-change Memory) etc..This
The conversion circuit of invention is redefined the correspondence between data bit and threshold voltage, is reached more using the mode of coding
The easy effect differentiate, there is bigger limit, being easier realization and manufacture.
In conclusion although the present invention is disclosed above with preferred embodiment, so it is not limited to the present invention.This hair
Bright those of ordinary skill in the art, without departing from the spirit and scope of the present invention, when various changes can be made
With retouching.Therefore, subject to protection scope of the present invention ought be defined depending on appended claims scope.
Claims (10)
1. a kind of accumulator system, comprising：
Multiple storage units, respectively the storage unit is to represent N number of data bit using M threshold voltage, wherein, the M threshold value electricity
Briquetting is containing threshold voltage of at least one tool compared with high anti-jamming capacity, the threshold voltage with least one relatively low antijamming capability of tool, its
Middle M, N are integer, and M is more than N；
One conversion circuit, it is to provide a correspondence of these threshold voltages and these data interdigits, also, using this at least
One tool is compared with the threshold voltage of high anti-jamming capacity, the threshold value for the relatively low antijamming capability of at least one tool that replaces in the correspondence
The combination of data bit representated by voltage；And
One access circuit, it is to access these storage units according to the correspondence after replacement.
2. accumulator system according to claim 1, wherein further including：
One voltage generation circuit, it is to produce the M threshold voltage.
3. accumulator system according to claim 1, wherein respectively the storage unit includes one first storage element and one the
Two storage elements, and respectively the storage element is to store N/2 data bit respectively with the M threshold voltage.
4. system according to claim 1, wherein,
At least one tool is in these threshold voltages compared with the threshold voltage of high anti-jamming capacity, has the threshold voltage of maximum level；
And
The threshold voltage of the relatively low antijamming capability of at least one tool is in these threshold voltages, has time low level threshold voltage.
5. system according to claim 1, wherein, which is by the threshold of the relatively low antijamming capability of at least one tool
Threshold voltage, an interference source threshold voltage institute of interference is produced corresponding to the threshold voltage to the relatively low antijamming capability of at least one tool
Corresponding data combination.
A kind of 6. access method, applied to the memory system comprising multiple storage units, a conversion circuit and an access circuit
System, the access method comprise the steps of：
The conversion circuit provides the respectively storage unit one correspondence of M threshold voltage and N number of data interdigit, wherein, the M
A threshold voltage includes threshold voltage of at least one tool compared with high anti-jamming capacity, the threshold value with least one relatively low antijamming capability of tool
Voltage, wherein M, N are integer, and M is more than N；
The conversion circuit, compared with the threshold voltage of high anti-jamming capacity, replaces in the correspondence this at least using at least one tool
The combination of data bit representated by the threshold voltage of the one relatively low antijamming capability of tool；And
The access circuit accesses these storage units according to the correspondence after replacement.
7. access method according to claim 6, the wherein accumulator system include a voltage generation circuit, and the access
Method further includes following steps：
The voltage generation circuit produces the M threshold voltage.
8. access method according to claim 6, wherein respectively the storage unit includes one first storage element and one second
Storage element, and respectively the storage element is to store N/2 data bit respectively with the M threshold voltage.
9. access method according to claim 6, wherein,
At least one tool is in these threshold voltages compared with the threshold voltage of high anti-jamming capacity, has the threshold voltage of maximum level；
And
The threshold voltage of the relatively low antijamming capability of at least one tool is in these threshold voltages, has time low level threshold voltage.
10. access method according to claim 6, wherein further including following steps：
The conversion circuit is by the threshold voltage of the relatively low antijamming capability of at least one tool, corresponding to relatively low anti-dry at least one tool
Disturb the data combination corresponding to an interference source threshold voltage of the threshold voltage generation interference of ability.
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| CN101221813A (en) * | 2006-10-20 | 2008-07-16 | 三星电子株式会社 | Methods of restoring data in flash memory devices and related flash memory device memory systems |
| CN103325413A (en) * | 2012-03-21 | 2013-09-25 | 旺宏电子股份有限公司 | Integrated circuit with memory cells comprising addressing bit lines and adjacent bit lines, and operation method |
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| CN101221813A (en) * | 2006-10-20 | 2008-07-16 | 三星电子株式会社 | Methods of restoring data in flash memory devices and related flash memory device memory systems |
| CN103325413A (en) * | 2012-03-21 | 2013-09-25 | 旺宏电子股份有限公司 | Integrated circuit with memory cells comprising addressing bit lines and adjacent bit lines, and operation method |
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