CN104778971A - Memory system and access method thereof - Google Patents
Memory system and access method thereof Download PDFInfo
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- CN104778971A CN104778971A CN201410015024.4A CN201410015024A CN104778971A CN 104778971 A CN104778971 A CN 104778971A CN 201410015024 A CN201410015024 A CN 201410015024A CN 104778971 A CN104778971 A CN 104778971A
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Abstract
The invention discloses a memory system and an access method thereof. The memory system includes a plurality of memory cells, a converting circuit and an access circuit. The access method includes the following steps: providing a corresponding relationship between M threshold voltages and N data bits for each memory cell, wherein the M threshold voltages contain at least one threshold voltage having higher anti-interference ability and at least one threshold voltage having lower anti-interference ability; replacing a combination of a data bit corresponding to the at least one threshold voltage having the lower anti-interference ability in the corresponding relationship with the at least one threshold voltage having the higher anti-interference ability; and storing the memory cells according to the corresponding relationship after replacement.
Description
Technical field
The invention relates to a kind of accumulator system and access method thereof, and relate to a kind of flash memory system and access method thereof especially.
Background technology
Flash memory (flash memory) is a kind of quite general nonvolatile memory (non-volatilememory).In brief, the practice of flash memory is, the grid (gate) electric charge (charge) being stored in transistor cell (transistor memory cell) is asked with base stage (substrate), and the threshold voltage (threshold voltage, referred to as Vt) of transistor is changed according to the number of the stored quantity of electric charge.Wherein, threshold voltage size represents different storage data contents.
Nitride (Silicon-Oxide-Nitride-Oxide-Silicon, referred to as SONOS) flash memory is a kind of framework of flash memory, it is characterized by and utilize electric charge not easily in the characteristic of oxygen nitrogen oxygen (ONO) interlayer movement, by electric charge limitation (trap) in fixed position.SONOS flash memory is made up of SONOS transistor array (array), and is controlled write data by access circuit, read data.
Refer to Figure 1A, it is the schematic diagram of SONOS transistor.SONOS transistor has source electrode (source), grid (gate), grid (drain).Wherein, for storing the position of electric charge and nonconductor between source electrode and grid, but nitride (Nitride).Therefore, the electric charge stored in these both sides not easily flows each other.For ease of illustrating, herein by (right side of grid) between grid and grid, between grid and source electrode (left side), be defined as one first storage unit and one second storage unit respectively.As previously mentioned, the electric charge R that the first storage unit stores also not easily moves to the second storage unit; The electric charge L that second storage unit stores also not easily moves to the first storage unit.
Refer to Figure 1B, it is in the storage unit of SONOS transistor, when storing single data bit (bit), and the schematic diagram of threshold voltage distribution.Wherein curve location is higher, represents that Probability is larger, also can represent in SONOS transistor array, have storage unit the more to have respective threshold voltage.
Figure 1B also can illustrate the storage unit quantity of SONOS transistor array and the relation of representative data bit.This is graphic comprises two threshold voltages (V1, V2), and the second electrical level V2 representative data position that the first level V1 representative data position is 1, threshold voltage is higher that threshold voltage is lower is 0.Wherein, when SONOS transistor programming (program) storage unit or reading (read) storage unit, using reference voltage (reference voltage) level Vc as criterion.
Such as, if when reading storage unit, when judging the threshold voltage of storage unit higher than reference voltage Vc, representing the data bit read is " 0 "; And if when reading storage unit, when judging the threshold voltage of storage unit lower than reference voltage Vc, representing the data bit read is " 1 ".
When data bit to write is " 0 ", programming (program) flow process must be utilized by charge storage to oxygen nitrogen oxygen (ONO) layer, make its threshold voltage higher than reference voltage Vc.Otherwise, when the data bit to write is " 1 ", erasing (erase) flow process must be utilized, equivalent electric charge is shifted out from oxygen nitrogen oxygen (ONO) layer, make its threshold voltage lower than reference voltage Vc.
Figure 1A, Figure 1B represent storage unit only for storing the situation of single data bit.Along with the increasing substantially of data of required storage, SONOS transistor certainly will need the more efficient access facility provided larger storage volume, and guarantees correctness when accessing data bit.
Summary of the invention
According to a first aspect of the invention, a kind of accumulator system is proposed, comprise: multiple storage unit, respectively this storage unit utilizes M threshold voltage to represent N number of data bit, wherein, this M threshold voltage comprises the threshold voltage of at least one tool higher anti-interference (high interference immunity) ability, with the threshold voltage of at least one tool lower anti-interference (low interference immunity) ability, wherein M, N are integer, and M is greater than N; One change-over circuit, it is to provide the corresponding relation between these threshold voltages and these data bit, further, with the threshold voltage of this at least one tool compared with high anti-jamming capacity, replace the data assemblies that the threshold voltage of the lower antijamming capability of tool at least one with this is corresponding in this corresponding relation; And an access circuit, it accesses these storage unit according to this corresponding relation after replacement.
According to a second aspect of the invention, a kind of access method is proposed, be applied to the accumulator system comprising multiple storage unit, a change-over circuit and an access circuit, this access method comprises following steps: this change-over circuit provides the corresponding relation between M threshold voltage and N number of data bit to each this storage unit, wherein, this M threshold voltage comprises the threshold voltage of at least one tool compared with high anti-jamming capacity, with the threshold voltage of the lower antijamming capability of at least one tool, wherein M, N are integer, and M is greater than N; This change-over circuit with the threshold voltage of this at least one tool compared with high anti-jamming capacity, the combination of in this corresponding relation data bit that the threshold voltage of the lower antijamming capability of tool at least one with this is corresponding of replacing; And this access circuit accesses these storage unit according to this corresponding relation after replacement.
In order to have better understanding to above-mentioned and other aspect of the present invention, preferred embodiment cited below particularly, and coordinating institute's accompanying drawings, being described in detail below:
Accompanying drawing explanation
Figure 1A, it is the schematic diagram of SONOS transistor.
Figure 1B, it is in the storage unit of SONOS transistor, when storing single data bit, the schematic diagram that storage unit quantity and threshold voltage distribute.
Fig. 2 A, it is the storage unit of SONOS transistor both sides, is respectively used to the schematic diagram of storage two data bit.
Fig. 2 B, it is in the storage unit of SONOS transistor, when storing two data bit, the schematic diagram that storage unit quantity and threshold voltage distribute.
Fig. 3, it is the threshold voltage of the storage unit of SONOS transistor, is subject to the schematic diagram of adjacent storage unit impact.
Fig. 4, it converges the storage unit of whole SONOS transistor both sides when storing two data bit respectively, the combination situations of threshold voltage.
Fig. 5, it provides five threshold voltages to represent the schematic diagram of two data bit in storage unit.
Fig. 6, it is the storage unit of SONOS transistor both sides when providing five level respectively, the combination situations of threshold voltage.
Fig. 7, it is the schematic diagram of memory circuitry of the present invention.
Fig. 8, it is embodiments of the invention, and the 5th level V5 is corresponded to the schematic diagram that data bit is " 10 ".
Fig. 9 A, it is when the present invention is directed to five kinds of level combinations, easily produces the schematic diagram that diachesis changes definition mode.
Fig. 9 B, it converges the level combinations of whole Fig. 9 A and the schematic diagram of data bit corresponding relation.
[symbol description]
Access circuit 71 change-over circuit 73
Voltage generation circuit 75 memory array 77
Embodiment
In order to store more data, SONOS transistor can change the corresponding relation between the electric charge of storage unit storage and threshold voltage further.Such as: suppose that each storage unit can be used for storage two data bit.
Refer to Fig. 2 A, it is the storage unit of SONOS transistor both sides, is respectively used to the schematic diagram of storage two data bit.Wherein, the storage unit in left side can storage data position L1, L2, and the storage unit on right side is used for storage data position R1, R2.Below, for the storage unit of wherein side, the corresponding relation of data bit and threshold voltage is described.
Refer to Fig. 2 B, it is in the storage unit of SONOS transistor, when storing two data bit, and the schematic diagram that storage unit quantity and threshold voltage distribute.This is graphic comprises four level, the threshold voltage that this four level representative are different.By a left side, the right side is respectively: the 4th level V4 that the three level V3 that the second electrical level V2 that the first level V1 that representative data position is " 11 ", representative data position are " 10 ", representative data position are " 00 ", representative data position are " 01 ".
When storage unit is for storing two data bit, need with reference to multiple voltage.Wherein, initial reference voltage Vc0 corresponds to the high position data of storage unit.First reference voltage Vc1 and the second reference voltage Vc2 then corresponds to the low data of storage unit.The mode of reading is below first described, then in the mode that write is described.
For the distribution scenario of Fig. 2 B, when reading storage unit, if its threshold voltage is lower than the situation of initial reference voltage Vc0, can confirms that a high position for data bit is for " 1 ", otherwise be then " 0 ".
First illustrate that reading result is that threshold voltage is higher than the situation of initial reference voltage Vc0.As previously mentioned, when threshold voltage is higher than initial reference voltage Vc0, be equivalent to a high position for data bit for " 0 ".Then, whether further judgment threshold voltage is lower than the second reference voltage Vc2.
If threshold voltage is really lower than the second reference voltage Vc2, can confirm that the low level of data bit is for " 0 ".Accordingly, the previous high position having judged to draw of arranging in pairs or groups, as the result of " 0 ", can learn being combined as " 00 " of data bit.
Otherwise, if threshold voltage is higher than the second reference voltage Vc2, then can confirm that the low level of data bit is for " 1 ".Accordingly, the previous high position having judged to draw of arranging in pairs or groups, as the result of " 0 ", can learn being combined as " 01 " of data bit.
Hold, judging that according to initial reference voltage Vc0 a high position is after 0, then according to threshold voltage with the second comparing of reference voltage Vc2 and the low level of determination data position.The threshold voltage drawn if read, between initial reference voltage Vc0 and the second reference voltage Vc2, judges that the content of data bit is as " 00 "; And, if read draw higher than the second reference voltage Vc2 time, judge that the content of data bit is as " 01 ".
Secondly illustrate that reading result is that threshold voltage is lower than the situation of initial reference voltage Vc0.As previously mentioned, when threshold voltage is lower than initial reference voltage Vc0, be equivalent to a high position for data bit for " 1 ".Then, whether further judgment threshold voltage is lower than the first reference voltage Vc1.
If threshold voltage is really lower than the first reference voltage Vc1, can confirm that the low level of data bit is for " 1 ".Accordingly, the previous high position having judged to draw of arranging in pairs or groups, as the result of " 1 ", can learn being combined as " 11 " of data bit.
Otherwise, if threshold voltage is higher than the first reference voltage Vc1, then can confirm that the low level of data bit is for " 0 ".Accordingly, the previous high position having judged to draw of arranging in pairs or groups, as the result of " 1 ", can learn being combined as " 10 " of data bit.
Hold, judging according to initial reference voltage Vc0 high-order for after " 1 ", then according to threshold voltage and the first comparing of reference voltage Vc1 the low level of determination data position.The content of data bit, between initial reference voltage Vc0 and the first reference voltage Vc1, is judged as " 10 " by the threshold voltage drawn if read; And, when the threshold voltage drawn if read is lower than the first reference voltage Vc1, the content of data bit is judged as " 11 ".
On the other hand, to write data to storage unit time, can according to institute for write data bit content and with different threshold voltages programming storage unit, or through erasing flow process reduction storage unit threshold voltage.
First, if when a high position of wishing the data bit of write is " 0 " (that is, the data bit of write is " 0x "), storage unit threshold voltage must be programmed to the position (V3) higher than initial reference voltage Vc0.Then, if when the low level of wishing the data bit of write is " 1 " (that is, the data bit of write is " 01 "), storage unit threshold voltage must be programmed to the position (V4) higher than the second reference voltage Vc2.
Otherwise, when the high position to the data bit of write is " 1 " (that is, the data bit of write is " 1x "), then must utilizes erasing flow process, make the threshold voltage of storage unit lower than initial reference voltage Vc0.Then, if when the low level of wishing the data bit of write is " 1 " (that is, the data bit of write is " 11 "), erasing flow process must be utilized, makes the threshold voltage of storage unit lower than the position (V1) of the first reference voltage Vc1.
For ease of illustrating, the voltage's distribiuting of Fig. 2 B is divided into four level herein.By a left side, the right side is respectively: threshold voltage is lower than the first level V1 of the first reference voltage Vc1; The second electrical level V2 of threshold voltage between the first reference voltage Vc1 and initial reference voltage Vc0; The three level V3 of threshold voltage between initial reference voltage Vc0 and the second reference voltage Vc2; And threshold voltage is higher than the 4th level V4 of the second reference voltage Vc2.
In other words, if when the threshold voltage drawn belongs to the first level V1, the data bit representing storage unit storage is " 11 "; If when the threshold voltage drawn belongs to second electrical level V2, the data bit representing storage unit storage is " 10 "; If when the threshold voltage drawn belongs to three level V3, the data bit representing storage unit storage is " 00 "; And if when the threshold voltage drawn belongs to the 4th level V4, the data bit representing storage unit storage is " 01 ".
Moreover, during to write data bit, be then through programming and erasing flow process, control the threshold voltage of storage unit.That is, when the data bit to write being " 11 ", controlling threshold voltage and belonging to the first level V1; When data bit to write is " 10 ", controls threshold voltage and belong to the 2nd V2; When data bit to write is " 00 ", controls threshold voltage and belong to three level V3; And, when the data bit to write is " 01 ", controls threshold voltage and belong to the 4th level V4.
Hold, the threshold voltage of storage unit can affect the sentence read result to data bit.Therefore, when same storage unit stores multiple data bit, how correct interpretation threshold voltage be very important.Along with the progress of processing procedure, the size of storage unit (SONOS transistor) is also less, and the situation of storage unit (interference) interfering with each other also more easily produces.That is, in same SONOS transistor, the electric charge of adjacent storage element may affect each other, causes the judgement of threshold voltage to be interfered.That is, the threshold voltage of each level distributes the situation that may overlap.
As previously mentioned, the electric charge in storage unit may be interfering with each other.Be therefore, actual threshold voltage distribution unlike desirable as Fig. 2 B, and may be as shown in Figure 3.Refer to Fig. 3, it is the threshold voltage of the storage unit of SONOS transistor, is subject to the schematic diagram of adjacent storage unit impact.This graphic representative, be positioned at the storage unit (the second storage unit) on the left of SONOS transistor, if when its threshold voltage is the first level V1, and the threshold voltage of the storage unit on right side (the first storage unit) is when being programmed to three level V3 or the 4th level V4, then the threshold voltage in left side storage unit (the second storage unit) is subject to right side storage unit programming impact.
As seen from Figure 3, when programming to the first storage unit, the second storage unit but can seriously be disturbed.Even, the threshold voltage that the second storage unit should be positioned at the first level V1 also produces the situation overlapped each other with second electrical level V2.If the first level V1 is considered as an interference source threshold voltage, then, second electrical level V2 belongs to the threshold voltage of the lower antijamming capability of tool.Related, when the threshold voltage of interpretation second storage unit belongs to the first level V1 or second electrical level V2, just may erroneous judgement be produced.That is, for the threshold voltage of the second storage unit between the situation of the first reference voltage Vc1 and initial reference voltage Vc0, the data bit that cannot read in the second storage unit is 11 or 10 actually.
This kind of interference cases, especially easily occurs in the threshold voltage of storage unit lower, but the threshold voltage that will be programmed because of adjacent storage unit is higher, and the situation that threshold voltage difference corresponding to the data bit of these two storage units is excessive.Therefore, if the first storage unit threshold voltage is originally the first level V1, but when the second storage unit will be programmed to three level V3 or the 4th level V4, the first storage unit also can be subject to similar impact.
Refer to Fig. 4, it converges the storage unit of whole SONOS transistor both sides when storing two data bit respectively, the combination situations of threshold voltage.The representative of this graphic first row is respectively the situation of the first level V1, second electrical level V2, three level V3, the 4th level V4 at the threshold voltage of the first storage unit (storage unit on the right side of SONOS transistor).This first graphic hurdle representative is respectively the situation of the first level V1, second electrical level V2, three level V3, the 4th level V4 at the threshold voltage of the second storage unit (storage unit on the left of SONOS transistor).Wherein, suppose that the first level V1 representative data position is (1,1), second electrical level V2 representative data position is (1,0), three level V3 representative data position is (0,0), the 4th level V4 representative data position is (0,1).
For ease of illustrating, other fields in form represent dissimilar threshold voltage combination with the form of Vx-Vy.The threshold voltage that wherein Vx represents threshold voltage corresponding to the second storage unit (left side storage unit), Vy represents the first storage unit (right side storage unit) correspondence.
The upper right corner of Fig. 4 form indicates threshold voltage combination (V1-V3) and (V1-V4) with shading.That is, when the threshold voltage of the second storage unit is the first level V1, and the first storage unit will be programmed to the situation of three level V3, the 4th level V4.This kind of threshold voltage combination belongs to the situation that the second storage unit is easily subject to the first storage unit impact.Now, the threshold voltage of the second storage unit may present the situation as Fig. 3.
The lower left corner of Fig. 4 form indicates threshold voltage combination (V3-V1) and (V4-V1) with shading.That is, when the threshold voltage of the first storage unit is the first level V1, and the second storage unit will be programmed to the situation of three level V3, the 4th level V4.This kind of threshold voltage combination belongs to the situation that the first storage unit is easily subject to the second storage unit impact.Now, the threshold voltage of the first storage unit may present the situation as Fig. 3.
Hold, the threshold voltage of the second storage unit-the first storage unit be combined as (V1-V3), (V1-V4), (V3-V1), (V4-V1) time, belong to the situation easily producing programming interference.Wherein, it is (11 that the combination (V1-V3) of threshold voltage is equivalent to data bit, 00) it is (11 that situation, combinations of voltages (V1-V4) are equivalent to data bit, 01) it is (00 that the combination (V3-V1) of situation, threshold voltage is equivalent to data bit, 11) combination (V4-V1) of situation, threshold voltage is equivalent to the situation that data bit is (01,11).
Threshold voltage in order to avoid storage unit is subject to the interference of adjacent storage unit, and the present invention proposes more threshold voltage is closed in a kind of utilization way compared with data byte.Such as: if each storage unit can store 2 data bit, then, the composite type of the available data bit of each storage unit can be 4 kinds.Now, if 5 kinds of threshold voltages can be provided in storage unit.Thus, when the storage unit of SONOS transistor both sides all adopts this kind of threshold voltage to carry out the interpretation of data bit, the combination variety of the threshold voltage that the storage unit of both sides may be formed, also will follow increase.
Refer to Fig. 5, it provides five threshold voltages to represent the schematic diagram of two data bit in storage unit.In this icon, threshold voltage is divided into five level: the first level V1, second electrical level V2, three level V3, the 4th level V4, the 5th level V5.Wherein, suppose that the first level V1 data bit represented in storage unit is (1,1), second electrical level V2 represents the data bit in storage unit is (1,0), three level V3 represents the data bit in storage unit is (0,0), the 4th level V4 represents the data bit in storage unit is (0,1).In addition, the 5th level V5 is the threshold voltage of tool compared with high anti-jamming capacity.5th level V5 can be used for providing a flexible definition mode, and therefore, the data bit corresponding with the 5th level V5 does not need to be defined.When adopting the threshold voltage interpretation mode of Fig. 5, the issuable composite type of threshold voltage of the first storage unit and the second storage unit has 5*5=25 kind.
Refer to Fig. 6, it is the schematic diagram that the storage unit of SONOS transistor both sides provides five level respectively.As previously mentioned, threshold voltage combination (V1-V3), (V1-V4), (V3-V1), (V4-V1) are the combination that the first storage unit and the second storage unit easily form interference each other.Herein, further the threshold voltage combo box easily obscured is selected in together.Such as, threshold voltage combination (V1-V3) easily produces interference to threshold voltage combination (V2-V3); Threshold voltage combination (V1-V4) easily produces interference to threshold voltage combination (V2-V4); Threshold voltage combination (V3-V1) easily produces interference to threshold voltage combination (V3-V2); And threshold voltage combination (V4-V1) easily produces interference to threshold voltage combination (V4-V2).
When the threshold voltage of storage unit is the first level V1, easily because the impact that adjacent storage unit is relative high level (V3, V4) is driven high, and then affect the phenomenon that threshold voltage is V2.In other words, when the threshold voltage of storage unit is second electrical level V2, belong to the threshold voltage of the lower antijamming capability of tool.If when threshold voltage combination comprises second electrical level V2, disturbed chance is higher.
But compare with Fig. 4, Fig. 6 has increased the situation of the 5th level V5 newly, therefore, issuable combinations of voltages kind is more.Wherein, when threshold voltage is the 5th level V5, belong to the threshold voltage of tool compared with high anti-jamming capacity.That is, the combination (V1-V5) of several threshold voltage, (V2-V5), (V3-V5), (V4-V5), (V5-V1), (V5-V2), (V5-V3), (V5-V4), (V5-V5) has been increased herein newly.Therefore, these newly-increased threshold voltage combinations can be used to replace the threshold voltage combination easily producing and obscure.
Refer to Fig. 7, it is the schematic diagram of memory circuitry of the present invention.According to conception of the present invention, access circuit 71 when accessing programmable memory array 77, must by change-over circuit 73 by institute for the data content of N number of data bit write, be converted to a corresponding M threshold voltage, according to this as the reference of access memory cell.In the foregoing embodiments, suppose M=5, N=4, but practical application is not as limit.That is, M, N are integer, and M is greater than N, can apply conception of the present invention.Wherein, change-over circuit 73 is equivalent to provide between threshold voltage combination and data bit, corresponding relation each other.During practical application, this kind of corresponding relation or can use algorithmic approach to change through image mode, lookup table mode.Moreover voltage generation circuit 75 is for generation of for the dynamic operation combinations of voltages needed for M threshold voltage read-write memory array.
Refer to Fig. 8, it is embodiments of the invention, and the 5th level V5 is corresponded to the schematic diagram that data bit is " 10 ".Unified herein the data representated by the 5th level of the first storage unit and the second storage unit to be defined as " 10 ".This embodiment utilizes tool compared with the threshold voltage (the 5th level V5) of high anti-jamming capacity, the threshold voltage (second electrical level V2) of the lower antijamming capability of replacement tool.
In brief, the way of this embodiment is: when the data bit of the second storage unit is " 10 ", and the first storage unit will be programmed to three level V3 because corresponding to data bit " 00 ", or when will be programmed to the 4th level V4 because corresponding to data bit " 01 ", in the second storage unit, do not use second electrical level V2 to correspond to data bit " 10 ", but change and correspond to data bit " 10 " with the 5th level V5.
Moreover, when the data bit of the first storage unit is " 10 ", and the second storage unit will be programmed to three level V3 because corresponding to data bit " 00 ", or when will be programmed to the 4th level V4 because corresponding to data bit " 01 ", in the first storage unit, do not use second electrical level V2 to correspond to data bit " 10 ", but change and correspond to data bit " 10 " with the 5th level V5.
Fig. 9 A illustrates how the present invention will easily be subject to several situations disturbed of programming, and is replaced with the combination that the 5th newly-increased level is formed.Refer to Fig. 9 A, it is storage unit when providing five kinds of threshold voltages to represent two data bit, the schematic diagram of the threshold voltage combination of SONOS transistor both sides.For ease of illustrating, together with threshold voltage being indicated in the data bit of representative herein.Can be learnt by Fig. 8: when threshold voltage is combined as (V1-V2), represent that left side storage unit is the first level V1, right side storage unit is second electrical level V2.It is " 10 " that first level of left side storage unit corresponds to data bit corresponding to the second electrical level that data bit is " 11 " and right side storage unit.Therefore, in figure, the 3rd arranges the 4th field mark and illustrates, when threshold voltage is combined as (V1-V2), and (11,10) of the data bit of left side storage unit and right side storage unit.The combination of remaining threshold voltage also adopts similar notation methods with the corresponding relation of data bit.
Because the both sides of SONOS transistor need provide 4 data bit altogether, the number of combinations that these four data bit produce is 16 kinds.Therefore, need to correspond to 16 kinds of threshold voltage combinations.But when the threshold voltage defining each storage unit is 5 kinds, the number of combinations of the threshold voltage of SONOS transistor both sides has 25 kinds.Therefore, wherein characteristic can be got rid of more undesirable and the situation obscured may be produced.
As previously mentioned, second electrical level V2 belongs to the threshold voltage of the lower antijamming capability of tool, therefore, is easily subject to the interference of the first level V1.Be event, this embodiment utilizes tool compared with the threshold voltage (the 5th level V5) of high anti-jamming capacity, the combination of the data bit representated by replacement second electrical level V2.
One is, easily the situation obscured is produced with (V2-V3) for threshold voltage combination (V1-V3), delete threshold voltage (V2-V3) and data bit (10,00) corresponding relation, and change with threshold voltage combination (V5-V3) corresponding to data bit (10,00).According to the embodiment of Fig. 9 A, can be the first level V1 or second electrical level V2 by the second storage unit further, and the first storage unit be the situation of three level V3, i.e. the threshold voltage combination of (V1/V2-V3), common corresponding to data bit (11,00).
Thus, even if the second storage unit is subject to the impact that the first storage unit is programmed to three level V3, when causing the threshold voltage of the second storage unit to change second electrical level V2 into by the first level V1, during follow-up reading the second storage unit, the data bit interpretation stored by the second storage unit that still can be correct is " 11 ".This kind of practice, can avoid when the second storage unit is lower threshold voltage (V1/V2), and when the first storage unit will be programmed to three level V3, the data bit of possibility the second storage unit produces the situation of erroneous judgement.
It two is, easily the situation obscured is produced with (V2-V4) for threshold voltage combination (V1-V4), delete threshold voltage combination (V2-V4) and data bit (10,01) corresponding relation, and change with threshold voltage combination (V5-V4) corresponding to data bit (10,01).According to the embodiment of Fig. 9 A, can be the first level V1 or second electrical level V2 further by the second storage unit, and the first storage unit be the situation of the 4th level V4, the i.e. combination of the threshold voltage of (V1/V2-V4), common corresponding to data bit (11,01).
Thus, even if the second storage unit is subject to the impact that the first storage unit is programmed to the 4th level V4, when causing the threshold voltage of the second storage unit to change second electrical level V2 into by the first level V1, the data bit interpretation stored by the second storage unit that still can be correct is " 11 ".This kind of practice, can avoid when the second storage unit is comparatively low level (V1/V2), and when the first storage unit will be programmed to the 4th level V4, the data bit of the second storage unit may be made to produce the situation of erroneous judgement.
It three is, easily the situation obscured is produced with (V3-V2) for combinations of voltages (V3-V1), delete threshold voltage combination (V3-V2) and data bit (00,10) corresponding relation, and change with threshold voltage combination (V3-V5) corresponding to data bit (00,10).According to the embodiment of Fig. 9 A, can be the first level V1 or second electrical level V2 by the threshold voltage of the first storage unit further, and the second storage unit be the situation of three level V3, i.e. the threshold voltage combination of (V3-V1/V2), common corresponding to data bit (00,11).
Thus, even if the first storage unit is subject to the impact that the second storage unit is programmed to three level V3, when causing the threshold voltage of the first storage unit to change second electrical level V2 into by the first level V1, the data bit interpretation stored by the first storage unit that still can be correct is " 11 ".This kind of practice, can avoid the threshold voltage when the first storage unit to be lower voltage (V1/V2), and when the second storage unit will be programmed to three level V3, the data bit of the first storage unit may be made to produce the situation of erroneous judgement.
It four is, easily the situation obscured is produced with (V4-V2) for threshold voltage combination (V4-V1), delete threshold voltage combination (V4-V2) and data bit (01,10) corresponding relation, and change with threshold voltage combination (V4-V5) corresponding to data bit (01,10).According to the embodiment of Fig. 9 A, can be V1 or V2 by the first storage unit further, and the second storage unit is the situation of V4, namely the threshold voltage combination of (V4-V1/V2), corresponds to data bit (01,11) jointly.
Thus, even if the first storage unit is subject to the impact that the second storage unit is programmed to the 4th level V4, when causing the threshold voltage of the first storage unit to change second electrical level V2 into by the first level V1, still can be correct be " 11 " by the data bit interpretation stored by the first storage unit.This kind of practice, can avoid the threshold voltage when the first storage unit to be comparatively low level (V1/V2), and when the second storage unit will be programmed to the 4th level V4, the data bit of the first storage unit may be made to produce the situation of erroneous judgement.
In addition, owing to only needing the combination of 16 kinds of threshold voltages, several threshold voltage array modes on comparatively border can be deleted here.Therefore, the situation being combined as (V1-V5), (V2-V5), (V5-V1), (V5-V2), (V5-V5) of threshold voltage, is not used.Hold, the corresponding relation that Fig. 9 A defines, can be higher threshold voltage (three level V3 or the 4th level V4) further by the first storage unit, and the situation that the second storage unit is lower threshold voltage (the first level V1 or second electrical level V2) be separated.And, be higher threshold voltage (three level V3 or the 4th level V4) by the second storage unit, and the situation that the first storage unit is lower threshold voltage (the first level V1 or second electrical level V2) is separated.Even if the threshold voltage of storage unit changes the distribution scenario of threshold voltage because adjacent storage unit is programmed, but the data bit that may produce erroneous judgement is separated in advance, thus can prevent the situation judged by accident.
For differentiating the corresponding relation that data bit and threshold voltage combine further, Fig. 9 B converges the level combinations of whole Fig. 9 A and data bit corresponding relation further.Threshold voltage combination is divided into three classes in the mode of enclosing choosing by Fig. 9 B.That is: the second case that each circle circle comprises the first situation of four threshold voltages combination, each circle circle comprises two threshold voltages combinations, each circle circle only comprise the third situation of a threshold voltage combination.
The first situation refers to: be arranged in figure that the upper left corner comprises the circle circle of four threshold voltages combination, figure is positioned at the circle circle that the lower right corner comprises four threshold voltages combinations.That is, threshold voltage combination (V1-V1), (V1-V2), (V2-V1), (V2-V2), (V3-V3), (V3-V4), (V4-V3), (V4-V4).When the threshold voltage in storage unit belongs to this kind of situation, representative can according to the type of the direct interpretation data position of threshold voltage.This kind of situation represents according to the corresponding relation preset and the corresponding relation of judgment threshold voltage and data bit.The combination of the threshold voltage of these types, with the first level V1 representative data position " 11 ", with second electrical level V2 representative data position " 10 ", with three level V3 representative data position " 00 ", with the 4th level V4 representative data position " 01 ".
Second case refers to: be positioned at the circle circle that the lower left corner comprises the circle circle of two threshold voltages combination, the figure meta upper right corner comprises two threshold voltages combinations in figure.That is, threshold voltage combination (V3-V1/V2), (V4-V1/V2), (V1/V2-V3), (V1/V2-V4).When the threshold voltage in storage unit belongs to this kind of situation, represent and low level threshold voltage (V1, V2) is made no exception, do not need to distinguish the first level V1 and second electrical level V2 again.This kind of situation is with the threshold voltage of the lower antijamming capability of tool (second electrical level V2), corresponds to the data assemblies " 11 " corresponding to the interference source threshold voltage (the first level V1) of threshold voltage (second electrical level V2) the generation interference of the lower antijamming capability of tool.Wherein, the threshold voltage of the lower antijamming capability of tool is in threshold voltage, tool time low level threshold voltage; And interference source threshold voltage is in threshold voltage, the threshold voltage of tool minimum level.Therefore, with the first level V1/ second electrical level V2 representative data position " 11 ", with three level V3 representative data position " 00 ", with the 4th level V4 representative data position " 01 ".
The third situation refers to: the circle circle being positioned at downside and right side in figure.When the threshold voltage in storage unit falls into these two circle circles, represent the 5th level V5 by the situation used.That is, threshold voltage combination (V3-V5), (V4-V5), (V5-V3), (V5-V4).This kind of situation system with the threshold voltage (such as: five level V5) of tool compared with high anti-jamming capacity, the data bit " 10 " corresponding to threshold voltage (second electrical level V2) of with the tool lower antijamming capability of replacing in this corresponding relation.Wherein, with three level V3 representative data position " 00 ", with the 4th level V4 representative data position " 01 ", with the 5th level V5 representative data position " 10 ".
The change-over circuit of Fig. 7, when can provide access circuit read-write memory array for aforesaid several situation, the conversion for data bit and threshold voltage uses.Hold, SONOS transistor (storage unit) of the present invention, for the application of multiple data bit, threshold voltage and the data bit representated by interpretation threshold voltage can be changed more accurately.Wherein, by originally and the corresponding relation of tool time low level and the threshold voltage (as: second electrical level V2) of the lower antijamming capability of tool and data bit " 10 ", to change into tool maximum level and tool replaces compared with the threshold voltage (as: the 5th level V5) of high anti-jamming capacity.This kind of practice can avoid adjacent storage unit when being programmed to high level, to the interference that more low level threshold voltage produces, and promotes the reading effect of data.
During practical application, the data bit corresponding with the 5th level V5 is not limited with " 10 ".Even, the 5th level V5 of the first storage unit, with the 5th level V5 of the second storage unit, the data bit representated by both is also not necessarily identical.
Traditional way determines corresponding threshold voltage combination for the number of position, such as: when the data bit number provided for SONOS transistor is 4, provide the combination of 2^4=16 kind threshold voltage.The present invention then provides more threshold voltage combination (5 × 5=25) further, and then can get rid of wherein threshold voltage characteristic and not easily to be affected person.Aforesaid embodiment, illustrates that the present invention can avoid at adjacent storage interelement, because the erroneous judgement result that electric charge interference produces.Accordingly, the fiduciary level (reliability) during SONOS memory storage data can be improved.
During practical application, which kind of corresponding relation what no matter adopt is, as long as the table of comparisons changed in change-over circuit 63 or conversion formula, the practice is relative ease also.Further, the present invention also can be applied to that threshold voltage number is more, the more situation of data bit number.
The voltage level that the present embodiment uses number more, arrange in pairs or groups suitable coding and conversion, can avoid the programming of adjacent storage unit to disturb, read interference and the threshold voltage distribution problem of other pattern.In addition, when other application, also the demand etc. of the scope of threshold voltage, annoyance level, read or write speed is listed in consideration further.Or, collocation, with parameters such as the change of threshold voltage, curent change, change in voltage, electric quantity change, electric field change, resistance variations, capacitance variations, changes of magnetic field, thermal distortion, reflectance, penetrability, pressure change, change in location, carries out the reference frame of encoding/videoing as change-over circuit.
Except SONOS storer, the conception of the reflection conversion that the present invention adopts, also can be used in other pattern storer.Such as: resistance-type memory (Resister Memory), ferromagnetic formula storer (Ferroelectric Memory), reluctance type storer (Magnetoresistive Memory), Ovonics unified memory (Phase-change Memory) etc.Change-over circuit of the present invention uses the mode of coding, redefines the corresponding relation between data bit and threshold voltage, makes it reach more easily to differentiate, has larger limit, more easily to realize and the effect that manufactures.
In sum, although the present invention with preferred embodiment disclose as above, so itself and be not used to limit the present invention.Persond having ordinary knowledge in the technical field of the present invention, without departing from the spirit and scope of the present invention, when being used for a variety of modifications and variations.Therefore, protection scope of the present invention is when being as the criterion of defining depending on the right of enclosing.
Claims (10)
1. an accumulator system, comprises:
Multiple storage unit, respectively this storage unit utilizes M threshold voltage to represent N number of data bit, wherein, this M threshold voltage comprises the threshold voltage of at least one tool compared with high anti-jamming capacity, with the threshold voltage of the lower antijamming capability of at least one tool, wherein M, N are integer, and M is greater than N;
One change-over circuit, it is to provide the corresponding relation between these threshold voltages and these data bit, further, with the threshold voltage of this at least one tool compared with high anti-jamming capacity, replace the data assemblies that the threshold voltage of the lower antijamming capability of tool at least one with this is corresponding in this corresponding relation; And,
One access circuit, it accesses these storage unit according to this corresponding relation after replacement.
2. accumulator system according to claim 1, wherein more comprises:
One voltage generation circuit, its be produce should and M threshold voltage is greater than N.
3. accumulator system according to claim 1, wherein respectively this storage unit comprises one first storage unit and one second storage unit, and respectively this storage unit stores N/2 data bit with this M threshold voltage respectively.
4. system according to claim 1, wherein,
This at least one tool is in these threshold voltages compared with the threshold voltage of high anti-jamming capacity, the threshold voltage of tool maximum level; And,
The threshold voltage of the lower antijamming capability of this at least one tool is in these threshold voltages, tool time low level threshold voltage.
5. system according to claim 1, wherein, this change-over circuit is by the threshold voltage of the lower antijamming capability of this at least one tool, corresponds to the data assemblies corresponding to an interference source threshold voltage of the threshold voltage generation interference of the lower antijamming capability of this at least one tool.
6. an access method, be applied to the accumulator system comprising multiple storage unit, a change-over circuit and an access circuit, this access method comprises following steps:
This change-over circuit provides the corresponding relation between M threshold voltage and N number of data bit to each this storage unit, wherein, this M threshold voltage comprises the threshold voltage of at least one tool compared with high anti-jamming capacity, with the threshold voltage of the lower antijamming capability of at least one tool, wherein M, N are integer, and M is greater than N;
This change-over circuit with the threshold voltage of this at least one tool compared with high anti-jamming capacity, the combination of in this corresponding relation data bit that the threshold voltage of the lower antijamming capability of tool at least one with this is corresponding of replacing; And,
This access circuit accesses these storage unit according to this corresponding relation after replacement.
7. access method according to claim 6, wherein this accumulator system comprises a voltage generation circuit, and this access method more comprises following steps:
This voltage generation circuit produces this M threshold voltage.
8. access method according to claim 6, wherein respectively this storage unit comprises one first storage unit and one second storage unit, and respectively this storage unit stores N/2 data bit with this M threshold voltage respectively.
9. access method according to claim 6, wherein,
This at least one tool is in these threshold voltages compared with the threshold voltage of high anti-jamming capacity, the threshold voltage of tool maximum level; And,
The threshold voltage of the lower antijamming capability of this at least one tool is in these threshold voltages, tool time low level threshold voltage.
10. access method according to claim 6, wherein more comprises following steps:
This change-over circuit, by the threshold voltage of the lower antijamming capability of this at least one tool, corresponds to the data assemblies corresponding to an interference source threshold voltage of the threshold voltage generation interference of the lower antijamming capability of this at least one tool.
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| CN101221813A (en) * | 2006-10-20 | 2008-07-16 | 三星电子株式会社 | Methods of restoring data in flash memory devices and related flash memory device memory systems |
| US20090091974A1 (en) * | 2007-10-08 | 2009-04-09 | Samsung Electronics Co., Ltd. | Methods of programming non-volatile memory cells |
| CN103325413A (en) * | 2012-03-21 | 2013-09-25 | 旺宏电子股份有限公司 | Integrated circuit with memory cells comprising addressing bit lines and adjacent bit lines, and operation method |
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| CN101221813A (en) * | 2006-10-20 | 2008-07-16 | 三星电子株式会社 | Methods of restoring data in flash memory devices and related flash memory device memory systems |
| US20090091974A1 (en) * | 2007-10-08 | 2009-04-09 | Samsung Electronics Co., Ltd. | Methods of programming non-volatile memory cells |
| CN103325413A (en) * | 2012-03-21 | 2013-09-25 | 旺宏电子股份有限公司 | Integrated circuit with memory cells comprising addressing bit lines and adjacent bit lines, and operation method |
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