CN104735384A - Method and device for distributing memory of coding channels - Google Patents
Method and device for distributing memory of coding channels Download PDFInfo
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Abstract
The invention relates to a method and device for distributing memory of coding channels. The method includes the steps of dividing a public cache pool into a plurality of cache areas, determining one of the cache areas in the public cache pool as a memory unit of a first reestablished frame corresponding to the first channel, releasing the memory unit of the first reestablished frame to the public cache pool when determining an original reference frame corresponding to the first channel as a first reference frame, releasing the memory unit of the original reference frame corresponding to the first channel to the public release pool when determining the first reestablished frame as the first reference frame, determining the memory unit released by a previous channel to the public cache pool as the memory unit of a second reestablished frame corresponding to the current channel, releasing the memory unit of the second reestablished frame to the public cache pool when determining the original reference frame corresponding to the current channel as a second reference frame, and releasing the memory unit of the original reference frame corresponding to the current channel to the public cache pool when determining the second reestablished frame as the second reference frame.
Description
Technical field
The present invention relates to video and technical field of image processing, particularly relate to a kind of method and apparatus of allocated code passage internal memory.
Background technology
Digital video recorder (Digital Video Recorder is called for short " DVR "), relative to traditional analog video video tape recorder, adopts hard disc recording, therefore is usually called as DVR.It is a set of computer system of carrying out image stores processor, have image/voice recorded a video for a long time, record, the function of telemonitoring and control.And its coding/decoding system is all generally self-editing explaining by oneself, and coding, the way of decoding and resolution are all more fixing.Encoding and decoding way is more, and the occupancy of its internal memory is more, and internal memory cost is also higher.
The internal memory that each passage of current coded system takies is independently, mainly the internal memory that takies of reference frame and reconstructed frame is more, be that the internal memory of the reference frame of channel interior and the internal memory of reconstructed frame can be switched mutually in cataloged procedure, but the internal memory between passage but can not be shared.
1 coded system comprising 16 coding passes, each coding pass wherein needs 1 reference frame and 1 reconstructed frame, and the size of the internal storage location that each reference frame or each reconstructed frame take is 3M, so 16 coding passes have needs 16 × 2 × 3M=96M altogether as the internal memory with reference to frame and reconstructed frame.Concurrent working from the coding of angle 16 passages of user, but from coded hardware unit, the coding of these 16 passages is work in series in fact, namely hardware only writes out the reconstructed frame of 1 passage all the time, at this moment the internal memory of the 45M reconstructed frame of other 15 passages is all in idle condition, cause EMS memory occupation amount many, increase internal memory cost.
Summary of the invention
Embodiments provide a kind of method and apparatus of allocated code passage internal memory, shared the internal memory of reconstructed frame by interchannel, realize multiple channel multiplexing internal storage location, thus save the occupancy of internal memory, reduce internal memory cost.
First aspect, a kind of method of allocated code passage internal memory is provided, described coding pass internal memory comprises the internal memory of reference frame and the internal memory of reconstructed frame, and the method comprises: public cache pool is divided into multiple buffer area, described public cache pool unoccupied and can utilize by multiple passage; A buffer area in multiple buffer areas in described public cache pool is defined as the internal storage location of the first reconstructed frame corresponding to first passage; When determining former reference frame corresponding for described first passage as the first reference frame, the internal storage location of described first reconstructed frame is released into described public cache pool; Or, when determining described first reconstructed frame as described first reference frame, the internal storage location of former reference frame corresponding for described first passage is released into described public cache pool; The upper passage internal storage location be released in described public cache pool is defined as the internal storage location of the second reconstructed frame corresponding to current channel, wherein, described current channel is the passage except described first passage; When determining former reference frame corresponding for described current channel as the second reference frame, the internal storage location of described second reconstructed frame is released into described public cache pool; Or, when determining described second reconstructed frame as described second reference frame, the internal storage location of former reference frame corresponding for described current channel is released into described public cache pool, and as the internal storage location of reconstructed frame corresponding to next passage.
In conjunction with first aspect, in the first possible implementation of first aspect, the method also comprises: the former reference frame that described current channel is corresponding according to described current channel, and the target image frame processing described current channel obtains described second reconstructed frame.
In conjunction with the first possible implementation of first aspect, in the implementation that the second of first aspect is possible, the former reference frame that this current channel is corresponding according to this current channel, process the target image frame of this current channel, obtain this second reconstructed frame, comprise: the former reference frame that this current channel is corresponding according to this current channel, coded treatment is carried out to this target image frame and obtains this second reconstructed frame.
In conjunction with the first possible implementation of first aspect, in the third possible implementation of first aspect, the former reference frame that this current channel is corresponding according to this current channel, process the target image frame of this current channel, obtain this second reconstructed frame, comprise: the former reference frame that this current channel is corresponding according to this current channel, noise reduction process is carried out to this target image frame and obtains this second reconstructed frame.
In conjunction with any one the possible implementation in above-mentioned possible implementation, in the 4th kind of possible implementation of first aspect, the size of each buffer area in the plurality of buffer area to meet in multiple passage each passage to the requirement of resolution.
Second aspect, a kind of device of allocated code passage internal memory is provided, described coding pass internal memory comprises the internal memory of reference frame and the internal memory of reconstructed frame, this device comprises: divide module, for public cache pool is divided into multiple buffer area, described public cache pool unoccupied and can utilize by multiple passage; First determination module, for being defined as the internal storage location of the first reconstructed frame corresponding to first passage by a buffer area in the multiple buffer areas in described public cache pool; First release module, for when determining that former reference frame that first passage is corresponding is as during with reference to frame, is released into described public cache pool by the internal storage location of described first reconstructed frame; Or, when determining described first reconstructed frame as described reference frame, the internal storage location of former reference frame corresponding for described first passage is released into described public cache pool; Second determination module, for the upper passage internal storage location be released in described public cache pool being defined as the internal storage location of the second reconstructed frame corresponding to current channel, wherein, described current channel is the passage except described first passage; Second release module, for when determining former reference frame corresponding for described current channel as the second reference frame, is released into described public cache pool by the internal storage location of described second reconstructed frame; Maybe when determining described second reconstructed frame as described second reference frame, the internal storage location of former reference frame corresponding for described current channel is released into described public cache pool, and as the internal storage location of reconstructed frame corresponding to next passage.
In conjunction with second aspect, in the first possible implementation of second aspect, device also comprises: processing module, and for the former reference frame that described current channel is corresponding according to described current channel, the target image frame processing described current channel obtains described second reconstructed frame.
In conjunction with the first possible implementation of second aspect, in the implementation that the second of second aspect is possible, this processing module specifically for, the former reference frame that this current channel is corresponding according to this current channel, carries out coded treatment to this target image frame and obtains this second reconstructed frame.
In conjunction with the first possible implementation of second aspect, in the third possible implementation of second aspect, this processing module specifically for, the former reference frame that this current channel is corresponding according to this current channel, carries out noise reduction process to this target image frame and obtains this second reconstructed frame.
In conjunction with any one the possible implementation in above-mentioned possible implementation, in the 4th kind of possible implementation of second aspect, the size of each buffer area in the plurality of buffer area to meet in multiple passage each passage to the requirement of resolution.
Based on technique scheme, the method of the allocated code passage internal memory that the embodiment of the present invention provides, by the upper passage internal storage location be released in this public cache pool being defined as the internal storage location of reconstructed frame corresponding to this current channel, and determine whether the internal storage location of this reconstructed frame to be released into this public cache pool, as the internal storage location of reconstructed frame corresponding to next passage, to realize multiple channel multiplexing internal storage location, thus save the occupancy of internal memory, reduce internal memory cost.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, be briefly described to the accompanying drawing used required in the embodiment of the present invention below, apparently, accompanying drawing described is below only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the schematic diagram of the multiple coding pass systems according to the embodiment of the present invention;
Fig. 2 is the indicative flowchart of the method for allocated code passage internal memory according to the embodiment of the present invention;
Fig. 3 is the indicative flowchart of the method for allocated code passage internal memory according to another embodiment of the present invention;
Fig. 4 is the schematic diagram of the device of allocated code passage internal memory according to the embodiment of the present invention;
Fig. 5 is the schematic diagram of the device of allocated code passage internal memory according to another embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is a part of embodiment of the present invention, instead of whole embodiment.Based on the embodiment in the present invention, the every other embodiment that those of ordinary skill in the art obtain under the prerequisite not making creative work, all should belong to the scope of protection of the invention.
Fig. 1 is the schematic diagram of the multi-channel coding system according to the embodiment of the present invention.In system as shown in Figure 1, public cache pool comprises N+1 buffer area, and each passage in N number of passage has 1 reference frame and 1 reconstructed frame, and 1 reference frame takies an internal storage location.Wherein, 1st passage can by the buffer area of in public cache pool, such as: buffer area 2 is defined as the internal storage location of the 1st reconstructed frame that passage is corresponding, the former reference frame that then the 1st passage is corresponding according to the 1st passage, coded treatment is carried out to the target image frame of the 1st passage and obtains reconstructed frame, and determine using this reconstructed frame as with reference to frame time, the internal storage location of former reference frame corresponding for the 1st passage is released into public cache pool, now, reconstructed frame can as the reference frame of the picture frame of next code; Or, determining that the internal storage location of the 1st reconstructed frame that passage is corresponding is released into public cache pool, and now, reconstructed frame is released using former reference frame corresponding for the 1st passage as during with reference to frame.Such as: the passage of encoding after the 1st passage is the 3rd passage, then the 1st the passage internal storage location be released in public cache pool can be defined as the internal storage location of the 3rd reconstructed frame that passage is corresponding by the 3rd passage, make the internal storage location of multiplexing 1st the passage release of the internal storage location of the reconstructed frame of the 3rd passage, thus the occupancy of internal memory can be saved, reduce internal memory cost.
It should be noted that, in embodiments of the present invention, only have during a reference frame for each passage in N number of passage and only take an internal storage location, the technical scheme of the embodiment of the present invention is described, but each passage can have multiple reference frame, then to take multiple internal storage location.
Fig. 2 is the indicative flowchart of the method 100 of allocated code passage internal memory according to the embodiment of the present invention.Method 100 as shown in Figure 2, wherein, coding pass internal memory comprises the internal memory of reference frame and the internal memory of reconstructed frame, comprising:
110, public cache pool is divided into multiple buffer area, described public cache pool unoccupied and can utilize by multiple passage;
120, the buffer area in the multiple buffer areas in described public cache pool is defined as the internal storage location of the first reconstructed frame corresponding to first passage;
130, when determining former reference frame corresponding for described first passage as the first reference frame, the internal storage location of described first reconstructed frame is released into described public cache pool; Or, when determining described first reconstructed frame as described first reference frame, the internal storage location of former reference frame corresponding for described first passage is released into described public cache pool;
140, the upper passage internal storage location be released in described public cache pool is defined as the internal storage location of the second reconstructed frame corresponding to current channel, wherein, described current channel is the passage except described first passage.
150, when determining former reference frame corresponding for described current channel as the second reference frame, the internal storage location of described second reconstructed frame is released into described public cache pool; Or, when determining described second reconstructed frame as described second reference frame, the internal storage location of former reference frame corresponding for described current channel is released into described public cache pool, and as the internal storage location of reconstructed frame corresponding to next passage.
Concrete, in embodiments of the present invention, public cache pool can be divided into multiple buffer area, and a buffer area in this multiple buffer area is defined as the internal storage location of the first reconstructed frame corresponding to the 1st passage, when determining former reference frame corresponding for the 1st passage as the first reference frame, the internal storage location of the first reconstructed frame is released into public cache pool, that is: when determine not using this first reconstructed frame as the 1st the first reference frame that passage is corresponding time, the internal storage location of this first reconstructed frame is released into this public cache pool, or when determining this first reconstructed frame as the 1st the first reference frame that passage is corresponding, the internal storage location of former reference frame corresponding for the 1st passage is released into this public cache pool.The upper passage internal storage location be released in described public cache pool can be defined as the internal storage location of the second reconstructed frame corresponding to current channel, this current channel is the passage except the 1st passage, when determining former reference frame corresponding for this current channel as the second reference frame, the internal storage location of this second reconstructed frame is released into public cache pool, that is: when determine not using this second reconstructed frame as the second reference frame that this current channel is corresponding time, the internal storage location of this second reconstructed frame is released into this public cache pool, or, when determining this second reconstructed frame as the second reference frame that this current channel is corresponding, the internal storage location of former reference frame corresponding for this current channel is released into this public cache pool, and as the internal storage location of reconstructed frame corresponding to next passage.
Such as: have 2 coding passes, and each coding pass has 1 reference frame and 1 reconstructed frame, and reference frame and reconstructed frame take an internal storage location respectively.Then according to the embodiment of the present invention, a buffer area in multiple buffer areas that public cache pool can be divided is defined as the internal storage location of the first reconstructed frame corresponding to the 1st passage, and when determining former reference frame corresponding for the 1st passage as the first reference frame, the internal storage location of the first reconstructed frame is released into public cache pool, or when determining this first reconstructed frame as the 1st the first reference frame that passage is corresponding, the internal storage location of former reference frame corresponding for the 1st passage is released into this public cache pool.Then, 1st the passage internal storage location be released in public cache pool can be defined as the internal storage location of the 2nd the second reconstructed frame that passage is corresponding, and when determining former reference frame corresponding for the 2nd passage as the second reference frame, the internal storage location of the second reconstructed frame is released into public cache pool, or when determining this second reconstructed frame as the 2nd the second reference frame that passage is corresponding, the internal storage location of former reference frame corresponding for the 2nd passage is released into this public cache pool.
According to the embodiment of the present invention, 2 coding passes can be released into internal storage location in public cache pool by multiplexing first passage, 2 coding passes occupy 3 internal storage locations altogether, and according to the scheme of prior art, 2 coding passes need to take 4 internal storage locations.That is, according to the technical scheme of the embodiment of the present invention, N number of coding pass can save N-1 internal storage location.
Therefore, the method of the allocated code passage internal memory that the embodiment of the present invention provides, by the upper passage internal storage location be released in this public cache pool being defined as the internal storage location of reconstructed frame corresponding to current channel, and determine whether the internal storage location of this reconstructed frame to be released into this public cache pool, and as the internal storage location of reconstructed frame corresponding to next passage, to realize multiple channel multiplexing internal storage location, thus save the occupancy of internal memory, reduce internal memory cost.
Should be understood that in embodiments of the present invention, and the structure of the code stream exported can be needed to determine whether reconstructed frame as reference frame according to the regulation of coding protocol.
Should also be understood that in embodiments of the present invention, a upper passage, not mathematical relation in turn between current channel and next passage, but temporal logical relation.Such as: current channel is the 5th passage, then go up a passage and refer to that the previous moment of carrying out the target image frame process of the 5th passage at the 5th passage completes the passage of its target image frame process, such as: this passage can be the 4th passage, can be the 1st passage, can be the 8th passage, etc., but the present invention is not limited thereto.And next passage refers to that the rear moment completing the target image frame process of the 5th passage at the 5th passage will carry out the passage of its target image frame process, such as: this passage can be the 4th passage, can be the 2nd passage, can be the 8th passage, etc., but the present invention is not limited thereto.
It should be noted that, in embodiments of the present invention, in the multiple passage of size demand fulfillment of each buffer area in multiple buffer area, each passage is to the requirement of resolution.That is, when this public buffer area is divided into multiple buffer area, need to consider that in multiple passage, each passage is to the requirement of resolution.In multiple passage, each passage can be identical to the requirement of resolution, also can be different.When passage each in multiple passage is different to the requirement of resolution, the size of buffer area is divided according to that passage that resolution requirement is the highest, to guarantee to meet in multiple passage each passage to the requirement of resolution, thus realize sharing of the internal memory of reconstructed frame.
Should understand, in embodiments of the present invention, the former reference frame that this current channel is corresponding refer to current channel when current time processing target picture frame based on reference frame, such as: this target image frame is the first frame original image, then former reference frame can be this first frame original image itself.For another example: this target image frame is the 5th two field picture, then former reference frame can be any frame image in four two field pictures before the 5th two field picture or multiple image, can be maybe also the 5th two field picture itself, but not form any restriction to the embodiment of the present invention.
It should be noted that, in embodiments of the present invention, the reference frame that the first reference frame is corresponding after being first channel coding, the reference frame that the second reference frame is corresponding after being current channel coding, only be used to the classification distinguishing corresponding passage, any restriction is not formed to the embodiment of the present invention.
Will also be understood that, in embodiments of the present invention, can using the partial memory of Double Data Rate synchronous DRAM DDR as this public cache pool, but the embodiment of the present invention is not limited thereto, such as: can also by other memory, as: the partial memory of ROM, RAM, hard disk etc. is as this public cache pool, and the present invention does not limit this.
Will also be understood that, the technical scheme of the embodiment of the present invention can be applied to multi-channel coding system, also can be applied to multi-channel video image processing system, that is, the technical scheme of the embodiment of the present invention can be applied to frame and deposit the system or field of switching, and the present invention does not limit this.
Optionally, as one embodiment of the present of invention, the method 100 also comprises: the former reference frame that described current channel is corresponding according to described current channel, and the target image frame processing described current channel obtains described second reconstructed frame.
Concrete, in embodiments of the present invention, after the upper passage internal memory be released in described public cache pool is defined as the internal storage location of the second reconstructed frame corresponding to current channel, need the former reference frame that current channel is corresponding according to this current channel, the target image frame processing this current channel obtains the second reconstructed frame.Such as: the former reference frame that this current channel can be corresponding according to this current channel, coded treatment is carried out to the target image frame of this current channel and obtains the second reconstructed frame.That is, when the target image frame of current channel is encoded, target image frame and former reference frame are subtracted each other the residual error 1 obtained and carry out transform and quantization process, obtain residual error 2, code stream is obtained to residual error 2 coding, residual error 2 is added with former reference frame simultaneously and obtains the second reconstructed frame.Owing to being only carry out coded treatment to residual error in an encoding process, so redundant information can be reduced greatly, improve compression ratio.And when determining former reference frame corresponding for this current channel as the second reference frame, the internal storage location of this second reconstructed frame is released into public cache pool, that is: when determine not using this second reconstructed frame as the second reference frame that this current channel is corresponding time, the internal storage location of this second reconstructed frame is released into this public cache pool, then this second reconstructed frame is released; Or when determining this second reconstructed frame as the second reference frame that this current channel is corresponding, the internal storage location of former reference frame corresponding for this current channel is released into this public cache pool, then this second reconstructed frame is as the reference frame of the picture frame of next code.
Similar, for first passage, after a buffer area in the multiple buffer areas in public cache pool is defined as the internal storage location of the 1st reconstructed frame that passage is corresponding, need the former reference frame that the 1st passage is corresponding according to the 1st passage, the target image frame processing the 1st passage obtains the first reconstructed frame.When determining former reference frame corresponding for the 1st passage as the first reference frame, the internal storage location of the first reconstructed frame is released into public cache pool, that is: when determine not using this first reconstructed frame as the 1st the first reference frame that passage is corresponding time, the internal storage location of this first reconstructed frame is released into this public cache pool, or when determining this first reconstructed frame as the 1st the first reference frame that passage is corresponding, the internal storage location of former reference frame corresponding for the 1st passage is released into this public cache pool.
According to the embodiment of the present invention, concrete, the former reference frame that current channel is corresponding according to this current channel, can in the following manner, and the target image frame processing this current channel obtains the second reconstructed frame:
First kind of way, the former reference frame that this current channel is corresponding according to this current channel, can carry out coded treatment to this target image frame and obtain this second reconstructed frame.
Concrete, in embodiments of the present invention, the upper passage internal memory be released in described public cache pool can be defined as the internal storage location of the second reconstructed frame corresponding to current channel.Then the former reference frame that this current channel is corresponding according to this current channel, coded treatment is carried out to the target image frame of this current channel and obtains this second reconstructed frame, when determining former reference frame corresponding for current channel as the second reference frame, the internal storage location of the second reconstructed frame is released into public cache pool, that is: when determine should not the second reconstructed frame as the second reference frame that this current channel is corresponding time, the internal storage location of this second reconstructed frame is released into this public cache pool, or when determining this second reconstructed frame as the second reference frame that this current channel is corresponding, the internal storage location of former reference frame corresponding for this current channel is released into this public cache pool, and as the internal storage location of reconstructed frame corresponding to next passage.
Similar, for first passage, after a buffer area in the multiple buffer areas in public cache pool is defined as the internal storage location of the 1st reconstructed frame that passage is corresponding, need the former reference frame that the 1st passage is corresponding according to the 1st passage, coded treatment is carried out to the target image frame of the 1st passage and obtains this first reconstructed frame, when determining former reference frame corresponding for the 1st passage as the first reference frame, the internal storage location of the first reconstructed frame is released into public cache pool, that is: when uncertain using this first reconstructed frame as the 1st the first reference frame that passage is corresponding time, the internal storage location of this first reconstructed frame is released into this public cache pool, or when determining this first reconstructed frame as the 1st the first reference frame that passage is corresponding, the internal storage location of former reference frame corresponding for the 1st passage is released into this public cache pool.
Such as: when next passage is the 5th passage, 5th passage can be applied for being released into the internal storage location of the internal storage location in this public cache pool as the 5th reconstructed frame that passage is corresponding in 130, then the former reference frame that the 5th passage is corresponding according to the 5th passage, coded treatment is carried out to the target image frame of the 5th passage and obtains the 5th reconstructed frame that passage is corresponding, and when determining former reference frame corresponding for the 5th passage as the second reference frame, the internal storage location of the 5th reconstructed frame that passage is corresponding is released into this public cache pool, or when determining the 5th reconstructed frame that passage is corresponding as the second reference frame, the internal storage location of former reference frame corresponding for the 5th passage is released into this public cache pool.
The second way, the former reference frame that this current channel is corresponding according to this current channel, carries out noise reduction process to the target image frame of this current channel and obtains this second reconstructed frame.
Concrete, in embodiments of the present invention, the upper passage internal memory be released in described public cache pool can be defined as the internal storage location of the second reconstructed frame corresponding to current channel.Then the former reference frame that this current channel is corresponding according to this current channel, noise reduction process is carried out to the target image frame of this current channel and obtains this second reconstructed frame, when determining former reference frame corresponding for current channel as the second reference frame, the internal storage location of the second reconstructed frame is released into public cache pool, that is: when determine not using this second reconstructed frame as the second reference frame that current channel is corresponding time, the internal storage location of this second reconstructed frame is released into this public cache pool, or when determining this second reconstructed frame as the second reference frame that current channel is corresponding, the internal storage location of former reference frame corresponding for this current channel is released into this public cache pool, and as the internal storage location of reconstructed frame corresponding to next passage.
Similar, for first passage, after a buffer area in the multiple buffer areas in public cache pool is defined as the internal storage location of the 1st reconstructed frame that passage is corresponding, need the former reference frame that the 1st passage is corresponding according to the 1st passage, noise reduction process is carried out to the target image frame of the 1st passage and obtains this first reconstructed frame, and when determining former reference frame corresponding for the 1st passage as the first reference frame, the internal storage location of the first reconstructed frame is released into public cache pool, that is: when determine not using this first reconstructed frame as the 1st the first reference frame that passage is corresponding time, the internal storage location of this first reconstructed frame is released into this public cache pool, or when determining this first reconstructed frame as the 1st the first reference frame that passage is corresponding, the internal storage location of former reference frame corresponding for the 1st passage is released into this public cache pool.
Below for N number of channel coding, and the technical scheme of composition graphs 2 pairs of embodiment of the present invention is described in detail, and wherein, N gets the positive integer being greater than or equal to 2.Should be understood that this is only an example of the embodiment of the present invention, any restriction is not formed to the embodiment of the present invention.
Fig. 3 is the indicative flowchart of the method 200 of allocated code passage internal memory according to the embodiment of the present invention.Method 200 as shown in Figure 3 comprises:
210, public cache pool is divided into M+1 buffer area, this public cache pool unoccupied and can utilize by multiple passage.
Concrete, in embodiments of the present invention, using the partial memory of DDR as this public cache pool, then this public cache pool can be divided into M+1 buffer area, wherein, M is the sum of the reference frame committed memory unit of N number of passage.That is, each passage in N number of passage can have 1 or multiple reference frame, then can take 1 or multiple internal storage location, and when each passage has multiple reference frame to take multiple internal storage location, the quantity of the internal storage location that the reference frame of each passage takies can be the same or different, and the embodiment of the present invention does not limit this.And when this public cache pool is divided into M+1 buffer area, need to consider that in N number of passage, each passage is to the requirement of resolution.In N number of passage, each passage can be identical to the requirement of resolution, also can be different.When passage each in N number of passage is different to the requirement of resolution, divide the size of buffer area according to that passage that resolution requirement is the highest, to guarantee to meet in N number of passage each passage to the requirement of resolution, thus realize sharing of the internal memory of reconstructed frame.
220, a buffer area in the multiple buffer areas in public cache pool is defined as the internal storage location of the first reconstructed frame corresponding to first passage.
230, the former reference frame that this first passage is corresponding according to this first passage, carries out coded treatment to the target image frame of this first passage and obtains this first reconstructed frame.
Concrete, in embodiments of the present invention, can comprise the following steps: that the reconstructed frame obtained coded treatment carries out DPB (Decoded picture buffer) management after 230.
240, determine whether this first reconstructed frame as the first reference frame corresponding to this first passage.
Concrete, whether in embodiments of the present invention, can preset when encoding will using this first reconstructed frame as the first reference frame corresponding to this first passage.
251, when determine not using this first reconstructed frame as the first reference frame that this first passage is corresponding time, the internal storage location of this first reconstructed frame is released into this public cache pool.That is, when determining former reference frame corresponding for this first passage to continue as the first reference frame, the internal storage location of this first reconstructed frame is released into this public cache pool.
252, when determining this first reconstructed frame as the first reference frame that this first passage is corresponding, the internal storage location of former reference frame corresponding for this first passage is released into this public cache pool.
260, the upper passage internal storage location be released in public cache pool is defined as the internal storage location of the second reconstructed frame corresponding to current channel, current channel is the passage except described first passage.
270, the former reference frame that this current channel is corresponding according to this current channel, carries out coded treatment to the target image frame of this current channel and obtains this second reconstructed frame.
275, determine whether this second reconstructed frame as the second reference frame corresponding to this current channel.
281, when determine not using this second reconstructed frame as the second reference frame that this current channel is corresponding time, the internal storage location of this second reconstructed frame is released into this public cache pool.That is, when determining former reference frame corresponding for this current channel to continue as the second reference frame, the internal storage location of this second reconstructed frame is released into this public cache pool.
282, when determining this second reconstructed frame as the second reference frame that this current channel is corresponding, the internal storage location of former reference frame corresponding for this current channel is released into this public cache pool.
290, start the cataloged procedure of next passage, repeat step 260 to step 282.
Concrete, in embodiments of the present invention, suppose that current channel is the 3rd passage, next passage is the 2nd passage, then the 3rd the passage internal storage location be released in this public cache pool can be defined as the internal storage location of the 2nd reconstructed frame that passage is corresponding by the 2nd passage.The former reference frame that 2nd passage is corresponding according to the 2nd passage, carries out coded treatment to the target image frame of the 2nd passage and obtains the 2nd reconstructed frame that passage is corresponding; 2nd reconstructed frame that passage is corresponding that then can obtain coded treatment carries out DPB (Decoded picture buffer) management.The structure of the code stream that can export according to the regulation of coding protocol and needs determines whether will using the reference frame of the 2nd reconstructed frame that passage is corresponding as the 2nd passage, when determine cannot using the 2nd reconstructed frame that passage is corresponding as the reference frame of the 2nd passage time, the internal storage location of the 2nd reconstructed frame that passage is corresponding is released into this public cache pool; When determine can using the 2nd reconstructed frame that passage is corresponding as the reference frame of the 2nd passage time, the internal storage location of former reference frame corresponding for the 2nd passage is released into this public cache pool, and as the internal storage location of reconstructed frame corresponding to next passage.Obviously, in embodiments of the present invention, the internal storage location of the reconstructed frame of the 2nd passage is multiplexing 3rd passage be released in public cache pool that internal storage location.
It should be noted that, in embodiments of the present invention, M can equal N, namely, the reference frame of each passage in N number of passage takies 1 internal storage location, and N number of passage can multiplexing 1 internal storage location, therefore, compared with existing coded system, the technical scheme of the embodiment of the present invention can save N-1 internal storage location.
Therefore, the method of the allocated code passage internal memory that the embodiment of the present invention provides, by the upper passage internal storage location be released in this public cache pool being defined as the internal memory of reconstructed frame corresponding to current channel, and determine whether the internal storage location of this reconstructed frame to be released into this public cache pool, as the internal storage location of reconstructed frame corresponding to next passage, to realize multiple channel multiplexing internal storage location, thus save the occupancy of internal memory, reduce internal memory cost.
Should be understood that in various embodiments of the present invention, the size of the sequence number of above-mentioned each process does not also mean that the priority of execution sequence, and the execution sequence of each process should be determined with its function and internal logic, and should not form any restriction to the implementation process of the embodiment of the present invention.
Above composition graphs 2 and Fig. 3, describes the method for the allocated code passage internal memory according to the embodiment of the present invention in detail, below in conjunction with Fig. 4 and Fig. 5, describes the device of the allocated code passage internal memory of the embodiment of the present invention in detail.
Fig. 4 is the schematic diagram of the device 400 of allocated code passage internal memory according to the embodiment of the present invention.As the device 400 of Fig. 4, wherein, coding pass internal memory comprises the internal memory of reference frame and the internal memory of reconstructed frame, this device 400 comprises: divide module 410, first determination module 420, first release module 430, second determination module 440 and the second release module 450, wherein
Divide module 410, for public cache pool is divided into multiple buffer area, described public cache pool unoccupied and can utilize by multiple passage;
First determination module 420, for being defined as the internal storage location of the first reconstructed frame corresponding to first passage by a buffer area in the multiple buffer areas in described public cache pool;
First release module 430, for when determining former reference frame corresponding for described first passage as the first reference frame, is released into described public cache pool by the internal storage location of described first reconstructed frame; Or, when determining described first reconstructed frame as described first reference frame, the internal storage location of former reference frame corresponding for described first passage is released into described public cache pool;
Second determination module 440, for the upper passage internal storage location be released in described public cache pool being defined as the internal storage location of the second reconstructed frame corresponding to current channel, wherein, described current channel is the passage except described passage;
Second release module 450, for when determining former reference frame corresponding for described current channel as the second reference frame, is released into described public cache pool by the internal storage location of described second reconstructed frame; Maybe when determining described second reconstructed frame as described second reference frame, the internal storage location of former reference frame corresponding for described current channel is released into described public cache pool, so that next passage uses.
Concrete, in embodiments of the present invention, divide module 410 and public cache pool can be divided into multiple buffer area, the first determination module 420 can from the internal storage location that the buffer area divided in multiple buffer areas that module 410 divides the public cache pool obtained is defined as the first reconstructed frame corresponding to the 1st passage.When determining former reference frame corresponding for the 1st passage as the first reference frame, that is: when determine not using this first reconstructed frame as the 1st the first reference frame that passage is corresponding time, the internal memory of this first reconstructed frame is released into this public cache pool by release module 430, or when determining this first reconstructed frame as the 1st the first reference frame that passage is corresponding, the internal storage location of former reference frame corresponding for the 1st passage is released into this public cache pool by the first release module 430.The upper passage internal storage location be released in described public cache pool can be defined as the internal storage location of the second reconstructed frame corresponding to current channel by the second determination module 440, and this current channel is the passage except the 1st passage.Then when determining former reference frame corresponding for current channel as the second reference frame, that is: when determine not using this second reconstructed frame as the second reference frame that this current channel is corresponding time, the internal storage location of this second reconstructed frame is released into this public cache pool by the second release module 450, or, when determining this second reconstructed frame as the second reference frame that this current channel is corresponding, the internal storage location of former reference frame corresponding for this this current channel is released into this public cache pool by the second release module 450, and as the internal storage location of reconstructed frame corresponding to next passage.
Should be understood that in embodiments of the present invention, a upper passage, not mathematical relation in turn between current channel and next passage, but temporal logical relation.Such as: current channel is the 5th passage, then go up a passage and refer to that the previous moment of carrying out the target image frame process of the 5th passage at the 5th passage completes the passage of its target image frame process, such as: this passage can be the 4th passage, can be the 1st passage, can be the 8th passage, etc., but the present invention is not limited thereto.And next passage refers to that the rear moment completing the target image frame process of the 5th passage at the 5th passage will carry out the passage of its target image frame process, such as: this passage can be the 4th passage, can be the 2nd passage, can be the 8th passage, etc., but the present invention is not limited thereto.
Therefore, the device of the allocated code passage internal memory that the embodiment of the present invention provides, by the upper passage internal storage location be released in this public cache pool being defined as the internal memory of reconstructed frame corresponding to current channel, and determine whether the internal storage location of this reconstructed frame to be released into this public cache pool, as the internal storage location of reconstructed frame corresponding to next passage, to realize multiple channel multiplexing internal storage location, thus save the occupancy of internal memory, reduce internal memory cost.
It should be noted that, in embodiments of the present invention, in the multiple passage of size demand fulfillment of each buffer area in multiple buffer area, each passage is to the requirement of resolution.That is, when this public buffer area is divided into multiple buffer area, need to consider that in multiple passage, each passage is to the requirement of resolution.In multiple passage, each passage can be identical to the requirement of resolution, also can be different.When passage each in multiple passage is different to the requirement of resolution, the size of buffer area is divided according to that passage that resolution requirement is the highest, to guarantee to meet in multiple passage each passage to the requirement of resolution, thus realize sharing of the internal memory of reconstructed frame.
Should understand, in embodiments of the present invention, the former reference frame that this current channel is corresponding refer to current channel this target image frame time base of current time process in reference frame, such as: this target image frame is the first frame original image, then former reference frame can be this first frame original image itself.For another example: then former reference frame can be any frame image in four two field pictures before the 5th two field picture or multiple image, can be maybe also the 5th two field picture itself, but not form any restriction to the embodiment of the present invention.
Will also be understood that, in embodiments of the present invention, can using the partial memory of Double Data Rate synchronous DRAM DDR as this public cache pool, but the embodiment of the present invention is not limited thereto, such as: can also by other memory, as: the partial memory of ROM, RAM, hard disk etc. is as this public cache pool, and the present invention does not limit this.
Will also be understood that, the technical scheme of the embodiment of the present invention can be applied to multi-channel coding system, also can be applied to multi-channel video image processing system, that is, the technical scheme of the embodiment of the present invention can be applied to frame and deposit the system or field of switching, and the present invention does not limit this.
Optionally, as one embodiment of the present of invention, described device 400 also comprises: processing module, and for the former reference frame that described current channel is corresponding according to described current channel, the target image frame processing described current channel obtains described second reconstructed frame.
Concrete, in embodiments of the present invention, after the upper passage internal memory be released in described public cache pool is defined as the internal storage location of the second reconstructed frame corresponding to current channel by the second determination module 440, processing module may be used for the current channel former reference frame corresponding according to this current channel, and the target image frame processing this current channel obtains the second reconstructed frame.When determining former reference frame corresponding for this current channel as the second reference frame, the internal storage location of this second reconstructed frame is released into public cache pool, that is: when determine not using this second reconstructed frame as the second reference frame that this current channel is corresponding time, the internal storage location of this second reconstructed frame is released into this public cache pool by the second release module 450, or, when determining this second reconstructed frame as the second reference frame that this current channel is corresponding, the internal storage location of former reference frame corresponding for this this current channel is released into this public cache pool by the second release module 450, and as the internal storage location of reconstructed frame corresponding to next passage.
Similar, for first passage, first determination module 420 is after being defined as the internal storage location of the 1st reconstructed frame that passage is corresponding by a buffer area in the multiple buffer areas in public cache pool, processing module may be used for the 1st the passage former reference frame corresponding according to the 1st passage, and the target image frame processing the 1st passage obtains the first reconstructed frame.When determining former reference frame corresponding for the 1st passage as the first reference frame, the internal storage location of the first reconstructed frame is released into public cache pool, that is: when determine not using this first reconstructed frame as the 1st the first reference frame that passage is corresponding time, the internal storage location of this first reconstructed frame is released into this public cache pool by the first release module 430, or when determining this first reconstructed frame as the 1st the first reference frame that passage is corresponding, the internal storage location of former reference frame corresponding for the 1st passage is released into this public cache pool by the first release module 430.
Optionally, as an alternative embodiment of the invention, this processing module specifically for, the former reference frame that this current channel is corresponding according to this current channel, carries out coded treatment to this target image frame and obtains this second reconstructed frame.That is, when the target image frame of this current channel is encoded, target image frame and former reference frame are subtracted each other the residual error 1 obtained and carry out transform and quantization process, obtain residual error 2, code stream is obtained to residual error 2 coding, residual error 2 is added with former reference frame simultaneously and obtains the second reconstructed frame.
Concrete, in embodiments of the present invention, processing module, also specifically for the former reference frame that this first passage is corresponding according to the 1st passage, is carried out coded treatment to the target image frame of the 1st passage and is obtained this first reconstructed frame.
Optionally, as an alternative embodiment of the invention, this processing module specifically for, the former reference frame that this current channel is corresponding according to this current channel, carries out noise reduction process to this target image frame and obtains this second reconstructed frame.
Concrete, in embodiments of the present invention, processing module, also specifically for the former reference frame that this first passage is corresponding according to the 1st passage, is carried out noise reduction process to the target image frame of the 1st passage and is obtained this first reconstructed frame.
Should understand, in embodiments of the present invention, may correspond according to the method 100 of the embodiment of the present invention and the executive agent of method 200 according to the device 400 of the embodiment of the present invention, and above-mentioned and other operation of the modules in device 400 and/or function are respectively in order to realize the corresponding flow process of each method in Fig. 2 and Fig. 3, for simplicity, do not repeat them here.
The embodiment of the present invention also provides a kind of device 500 of allocated code passage internal memory.As shown in Figure 5, this device 500 comprises processor 510, memory 520 and bus system 530.Wherein, processor 510 is connected by bus system 530 with memory 520, and this memory 520 is for storing instruction, and this processor 510 is for performing the instruction of this memory 520 storage.Wherein,
This processor 510 for: public cache pool is divided into multiple buffer area, described public cache pool unoccupied and can utilize by multiple passage, and the internal storage location of the first reconstructed frame corresponding to current first passage will be defined as from the buffer area in the multiple buffer areas in public cache pool, when determining former reference frame corresponding for described first passage as the first reference frame, the internal storage location of this first reconstructed frame is released into this public cache pool, maybe when determining this first reconstructed frame as the first reference frame that described first passage is corresponding, the internal storage location of former reference frame corresponding for described first passage is released into this public cache pool, the upper passage internal storage location be released in described public cache pool is defined as the internal storage location of the second reconstructed frame corresponding to current channel, wherein, described current channel is the passage except described first passage, when determining former reference frame corresponding for described current channel as the second reference frame, the internal storage location of described second reconstructed frame is released into described public cache pool, maybe when determining described second reconstructed frame as described second reference frame, the internal storage location of former reference frame corresponding for described current channel is released into described public cache pool, and as the internal storage location of reconstructed frame corresponding to next passage.
Therefore, the device of the allocated code passage internal memory that the embodiment of the present invention provides, by the upper passage internal storage location be released in this public cache pool being defined as the internal storage location of reconstructed frame corresponding to current channel, and determine whether the internal storage location of this reconstructed frame to be released into this public cache pool, as the internal storage location of reconstructed frame corresponding to next passage, to realize multiple channel multiplexing internal storage location, thus save the occupancy of internal memory, reduce internal memory cost.
Should understand, in embodiments of the present invention, this processor 510 can be CPU (Central Processing Unit, CPU), this processor 510 can also be other general processors, digital signal processor (DSP), application-specific integrated circuit (ASIC) (ASIC), ready-made programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic, discrete hardware components etc.The processor etc. of general processor can be microprocessor or this processor also can be any routine.
This memory 520 can comprise read-only memory and random access memory, and provides instruction and data to processor 510.A part for memory 520 can also comprise nonvolatile RAM.Such as, the information of all right storage device type of memory 520.
This bus system 530, except comprising data/address bus, can also comprise power bus, control bus and status signal bus in addition etc.But for the purpose of clearly demonstrating, in the drawings various bus is all designated as bus system 530.
In implementation procedure, each step of said method can be completed by the instruction of the integrated logic circuit of the hardware in processor 510 or software form.Step in conjunction with the method disclosed in the embodiment of the present invention can directly be presented as that hardware processor is complete, or hardware in purpose processor and software module combination complete.Software module can be positioned at random asccess memory, flash memory, read-only memory, in the storage medium of this area maturations such as programmable read only memory or electrically erasable programmable memory, register.This storage medium is positioned at memory 520, and processor 510 reads the information in memory 520, completes the step of said method in conjunction with its hardware.For avoiding repetition, be not described in detail here.
Alternatively, as one embodiment of the present of invention, processor 510 also for, the former reference frame that described current channel is corresponding according to described current channel, the target image frame processing described current channel obtains described second reconstructed frame.
Optionally, as an alternative embodiment of the invention, processor 510 specifically for, the former reference frame that this current channel is corresponding according to this current channel, carries out coded treatment to this target image frame and obtains this second reconstructed frame.
Concrete, in embodiments of the present invention, processing module, also specifically for the former reference frame that this first passage is corresponding according to the 1st passage, is carried out coded treatment to the target image frame of the 1st passage and is obtained this first reconstructed frame.
Alternatively, as an alternative embodiment of the invention, processor 510 specifically for, the former reference frame that this current channel is corresponding according to this current channel, carries out noise reduction process to this target image frame and obtains this second reconstructed frame.
Concrete, in embodiments of the present invention, processing module, also specifically for the former reference frame that this first passage is corresponding according to the 1st passage, is carried out noise reduction process to the target image frame of the 1st passage and is obtained this first reconstructed frame.
Should understand, may correspond according to the executive agent in the method 100 of the embodiment of the present invention and method 200 and the device 500 according to the embodiment of the present invention according to the device 500 of the embodiment of the present invention, and above-mentioned and other operation of the modules in device 500 and/or function are respectively in order to realize the corresponding flow process of each method in Fig. 2 and Fig. 3, for simplicity, do not repeat them here.
Those of ordinary skill in the art can recognize, in conjunction with unit and the algorithm steps of each example of embodiment disclosed herein description, can realize with electronic hardware, computer software or the combination of the two, in order to the interchangeability of hardware and software is clearly described, generally describe composition and the step of each example in the above description according to function.These functions perform with hardware or software mode actually, depend on application-specific and the design constraint of technical scheme.Professional and technical personnel can use distinct methods to realize described function to each specifically should being used for, but this realization should not thought and exceeds scope of the present invention.
Those skilled in the art can be well understood to, and for convenience of description and succinctly, the specific works process of the system of foregoing description, device and unit, with reference to the corresponding process in preceding method embodiment, can not repeat them here.
In several embodiments that the application provides, should be understood that disclosed system, apparatus and method can realize by another way.Such as, device embodiment described above is only schematic, such as, the division of described unit, be only a kind of logic function to divide, actual can have other dividing mode when realizing, such as multiple unit or assembly can in conjunction with or another system can be integrated into, or some features can be ignored, or do not perform.
In addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit, and also can be that the independent physics of unit exists, also can be that two or more unit are in a unit integrated.Above-mentioned integrated unit both can adopt the form of hardware to realize, and the form of SFU software functional unit also can be adopted to realize.
If described integrated unit using the form of SFU software functional unit realize and as independently production marketing or use time, can be stored in a computer read/write memory medium.Based on such understanding, technical scheme of the present invention is in essence in other words to the part that prior art contributes, or all or part of of this technical scheme can embody with the form of software product, this computer software product is stored in a storage medium, comprising some instructions in order to make a computer equipment (can be personal computer, server, or the network equipment etc.) perform all or part of step of method described in each embodiment of the present invention.And aforesaid storage medium comprises: USB flash disk, portable hard drive, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), magnetic disc or CD etc. various can be program code stored medium.
The above; be only the specific embodiment of the present invention; but protection scope of the present invention is not limited thereto; anyly be familiar with those skilled in the art in the technical scope that the present invention discloses; can expect amendment or the replacement of various equivalence easily, these amendments or replacement all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion with the protection range of claim.
Claims (10)
1. a method for allocated code passage internal memory, described coding pass internal memory comprises the internal memory of reference frame and the internal memory of reconstructed frame, it is characterized in that, comprising:
Public cache pool is divided into multiple buffer area, described public cache pool unoccupied and can utilize by multiple passage;
A buffer area in multiple buffer areas in described public cache pool is defined as the internal storage location of the first reconstructed frame corresponding to first passage;
When determining former reference frame corresponding for described first passage as the first reference frame that described first passage is corresponding, the internal storage location of described first reconstructed frame is released into described public cache pool; Or,
When determining described first reconstructed frame as described first reference frame, the internal storage location of former reference frame corresponding for described first passage is released into described public cache pool;
The upper passage internal storage location be released in described public cache pool is defined as the internal storage location of the second reconstructed frame corresponding to current channel, wherein, described current channel is the passage except described first passage;
When determining former reference frame corresponding for described current channel as the second reference frame that described current channel is corresponding, the internal storage location of described second reconstructed frame is released into described public cache pool; Or,
When determining described second reconstructed frame as described second reference frame, the internal storage location of former reference frame corresponding for described current channel is released into described public cache pool, and as the internal storage location of reconstructed frame corresponding to next passage.
2. method according to claim 1, is characterized in that, described method also comprises:
The former reference frame that described current channel is corresponding according to described current channel, the target image frame processing described current channel obtains described second reconstructed frame.
3. method according to claim 2, is characterized in that, the former reference frame that described current channel is corresponding according to described current channel, processes the target image frame of described current channel, obtains described second reconstructed frame, comprising:
The former reference frame that described current channel is corresponding according to described current channel, carries out coded treatment to described target image frame and obtains described second reconstructed frame.
4. method according to claim 2, is characterized in that, the former reference frame that described current channel is corresponding according to described current channel, processes the target image frame of described current channel, obtains described second reconstructed frame, comprising:
The former reference frame that described current channel is corresponding according to described current channel, carries out noise reduction process to described target image frame and obtains described second reconstructed frame.
5. method according to any one of claim 1 to 4, is characterized in that, the size of each buffer area in described multiple buffer area to meet in described multiple passage each passage to the requirement of resolution.
6. a device for allocated code passage internal memory, described coding pass internal memory comprises the internal memory of reference frame and the internal memory of reconstructed frame, it is characterized in that, described device comprises:
Divide module, for public cache pool is divided into multiple buffer area, described public cache pool unoccupied and can utilize by multiple passage;
First determination module, for being defined as the internal storage location of the first reconstructed frame corresponding to first passage by a buffer area in the multiple buffer areas in described public cache pool;
First release module, for when determining that former reference frame that first passage is corresponding is as the first reference frame, is released into described public cache pool by the internal storage location of described first reconstructed frame; Or, when determining described first reconstructed frame as described first reference frame, the internal storage location of former reference frame corresponding for described first passage is released into described public cache pool;
Second determination module, for the upper passage internal storage location be released in described public cache pool being defined as the internal storage location of the second reconstructed frame corresponding to current channel, wherein, described current channel is the passage except described first passage;
Second release module, for when determining former reference frame corresponding for described current channel as the second reference frame, is released into described public cache pool by the internal storage location of described second reconstructed frame; Maybe when determining described second reconstructed frame as described second reference frame, the internal storage location of former reference frame corresponding for described current channel is released into described public cache pool, and as the internal storage location of reconstructed frame corresponding to next passage.
7. device according to claim 6, is characterized in that, described device also comprises: processing module, and for the former reference frame that described current channel is corresponding according to described current channel, the target image frame processing described current channel obtains described second reconstructed frame.
8. device according to claim 7, is characterized in that, described processing module specifically for, the former reference frame that described current channel is corresponding according to described current channel, carries out coded treatment to described target image frame and obtains described second reconstructed frame.
9. device according to claim 7, is characterized in that, described processing module specifically for, the former reference frame that described current channel is corresponding according to described current channel, carries out noise reduction process to described target image frame and obtains described second reconstructed frame.
10. the device according to any one of claim 6 to 9, is characterized in that, the size of each buffer area in described multiple buffer area to meet in described multiple passage each passage to the requirement of resolution.
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