CN104735384B - The method and apparatus of allocated code passage internal memory - Google Patents
The method and apparatus of allocated code passage internal memory Download PDFInfo
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Abstract
The present invention relates to a kind of method and apparatus of allocated code passage internal memory, including：Public cache pool is divided into multiple buffer areas；A buffer area in multiple buffer areas in public cache pool is defined as to the internal storage location of the first reconstructed frame corresponding to first passage；When it is determined that using former reference frame corresponding to first passage as during the first reference frame, the internal storage location of the first reconstructed frame is discharged to public cache pool；When it is determined that using the first reconstructed frame as during the first reference frame, the internal storage location of former reference frame corresponding to first passage is discharged to public cache pool；A upper passage is discharged to the internal storage location in public cache pool to the internal storage location for being defined as the second reconstructed frame corresponding to current channel；When it is determined that using former reference frame corresponding to current channel as during the second reference frame, the internal storage location of the second reconstructed frame is discharged to public cache pool；When it is determined that using the second reconstructed frame as during the second reference frame, the internal storage location of former reference frame corresponding to current channel is discharged to public cache pool.
Description
Technical field
The present invention relates to video and technical field of image processing, more particularly to a kind of method of allocated code passage internal memory and
Device.
Background technology
Digital video recorder (Digital Video Recorder, referred to as " DVR ") is relative to traditional analog video
Video recorder, uses HD recording, therefore commonly referred to as DVR.It is the department of computer science of a set of progress image storage processing
System, have and long-time video recording, recording, remotely monitor and the function of control are carried out to image/voice.And its coding/decoding system one
As be all it is self-editing self solve, and encode, decoding way and resolution ratio all compare fixation.Encoding and decoding way is more, and its internal memory accounts for
Dosage is more, and internal memory cost is also higher.
The internal memory that each passage of current coded system takes is independent, is taken mostly in reference to frame and reconstructed frame
Internal memory is more, is that the internal memory of the reference frame of channel interior and the internal memory of reconstructed frame can be switched mutually in cataloged procedure, but logical
Internal memory between road can not but be shared.
1 coded system for including 16 coding passes, each coding pass therein need 1 reference frame and 1 weight
Structure frame, and the size for the internal storage location that each reference frame or each reconstructed frame take is 3M, then 16 coding passes need altogether
16 × 2 × 3M=96M is wanted as reference frame and the internal memory of reconstructed frame.The coding of 16 passages is parallel from the perspective of user
Work, but from the point of view of coded hardware unit, the coding of this 16 passages is work in series in fact, i.e. hardware all the time
The reconstructed frame of 1 passage is only write out, at this moment the internal memory of the 45M reconstructed frames of other 15 passages is at idle condition, leads
Cause EMS memory occupation amount more, increase internal memory cost.
The content of the invention
The embodiments of the invention provide a kind of method and apparatus of allocated code passage internal memory, pass through the shared reconstruct of interchannel
The internal memory of frame, multiple one internal storage location of channel multiplexing are realized, so as to save the occupancy of internal memory, reduce internal memory cost.
First aspect, there is provided a kind of method of allocated code passage internal memory, the coding pass internal memory include reference frame
The internal memory of internal memory and reconstructed frame, this method include：Public cache pool is divided into multiple buffer areas, the public cache pool not by
Take and can be utilized by multiple passages；A buffer area in multiple buffer areas in the public cache pool is defined as
The internal storage location of first reconstructed frame corresponding to first passage；When it is determined that using former reference frame corresponding to first passage as
During the first reference frame, the internal storage location of first reconstructed frame is discharged to the public cache pool；Or, when determining described the
When one reconstructed frame is as first reference frame, the internal storage location of former reference frame corresponding to first passage is discharged to institute
State public cache pool；A upper passage is discharged to the internal storage location in the public cache pool and is defined as corresponding to current channel
The internal storage location of two reconstructed frames, wherein, the current channel is the passage in addition to first passage；When it is determined that by described in
When former reference frame is as the second reference frame corresponding to current channel, the internal storage location of second reconstructed frame is discharged to the public affairs
Cache pool altogether；Or, when it is determined that using second reconstructed frame as during second reference frame, will be former corresponding to the current channel
The internal storage location of reference frame is discharged to the public cache pool, and as the interior deposit receipt of third reconstructed frame corresponding to next passage
Member.
With reference in a first aspect, in the first possible implementation of first aspect, this method also includes：It is described current
Passage former reference frame according to corresponding to the current channel, the target image frame for handling the current channel obtain second weight
Structure frame.
With reference to the first possible implementation of first aspect, in second of possible implementation of first aspect
In, the current channel former reference frame according to corresponding to the current channel, handle the target image frame of the current channel, obtain this
Two reconstructed frames, including：The current channel former reference frame according to corresponding to the current channel, the target image frame is carried out at coding
Reason obtains second reconstructed frame.
With reference to the first possible implementation of first aspect, in the third possible implementation of first aspect
In, the current channel former reference frame according to corresponding to the current channel, handle the target image frame of the current channel, obtain this
Two reconstructed frames, including：The current channel former reference frame according to corresponding to the current channel, the target image frame is carried out at noise reduction
Reason obtains second reconstructed frame.
With reference to any of above-mentioned possible implementation possible implementation, in the 4th kind of possibility of first aspect
Implementation in, the size of each buffer area in the plurality of buffer area meets that each passage is to resolution ratio in multiple passages
It is required that.
Second aspect, there is provided a kind of device of allocated code passage internal memory, the coding pass internal memory include reference frame
The internal memory of internal memory and reconstructed frame, the device include：Division module, it is described for public cache pool to be divided into multiple buffer areas
Public cache pool is unoccupied and can be utilized by multiple passages；First determining module, for by the public cache pool
Multiple buffer areas in a buffer area be defined as the internal storage location of the first reconstructed frame corresponding to first passage；First release
Module, for when it is determined that former reference frame is as reference frame corresponding to first passage, by the interior deposit receipt of first reconstructed frame
Member is discharged to the public cache pool；Or, when it is determined that using first reconstructed frame as during the reference frame, by described first
The internal storage location of former reference frame corresponding to passage is discharged to the public cache pool；Second determining module, for by a upper passage
Release is defined as the internal storage location of the second reconstructed frame corresponding to current channel to the internal storage location in the public cache pool, its
In, the current channel is the passage in addition to first passage；Second release module, will be described current for working as determination
When former reference frame is as the second reference frame corresponding to passage, the internal storage location of second reconstructed frame is discharged to described public slow
Deposit pond；Or when it is determined that using second reconstructed frame as during second reference frame, being referred to former corresponding to the current channel
The internal storage location of frame is discharged to the public cache pool, and as the internal storage location of third reconstructed frame corresponding to next passage.
With reference to second aspect, in the first possible implementation of second aspect, device also includes：Processing module,
For the current channel, former reference frame, the target image frame for handling the current channel obtain according to corresponding to the current channel
To second reconstructed frame.
With reference to the first possible implementation of second aspect, in second of possible implementation of second aspect
In, the processing module is specifically used for, and the current channel former reference frame according to corresponding to the current channel, the target image frame is entered
Row coded treatment obtains second reconstructed frame.
With reference to the first possible implementation of second aspect, in the third possible implementation of second aspect
In, the processing module is specifically used for, and the current channel former reference frame according to corresponding to the current channel, the target image frame is entered
Row noise reduction process obtains second reconstructed frame.
With reference to any of above-mentioned possible implementation possible implementation, in the 4th kind of possibility of second aspect
Implementation in, the size of each buffer area in the plurality of buffer area meets that each passage is to resolution ratio in multiple passages
It is required that.
Based on above-mentioned technical proposal, the method for allocated code passage internal memory provided in an embodiment of the present invention, by by upper one
The internal storage location that passage is discharged into the public cache pool is defined as the internal storage location of reconstructed frame corresponding to the current channel, and really
It is fixed whether to discharge the internal storage location of the reconstructed frame to the public cache pool, the interior deposit receipt as reconstructed frame corresponding to next passage
Member, to realize multiple one internal storage location of channel multiplexing, so as to save the occupancy of internal memory, reduce internal memory cost.
Brief description of the drawings
In order to illustrate the technical solution of the embodiments of the present invention more clearly, it will make below to required in the embodiment of the present invention
Accompanying drawing is briefly described, it should be apparent that, drawings described below is only some embodiments of the present invention, for
For those of ordinary skill in the art, on the premise of not paying creative work, other can also be obtained according to these accompanying drawings
Accompanying drawing.
Fig. 1 is the schematic diagram of multiple coding pass systems according to embodiments of the present invention；
Fig. 2 is the indicative flowchart of the method for allocated code passage internal memory according to embodiments of the present invention；
Fig. 3 is the indicative flowchart of the method for allocated code passage internal memory according to another embodiment of the present invention；
Fig. 4 is the schematic diagram of the device of allocated code passage internal memory according to embodiments of the present invention；
Fig. 5 is the schematic diagram of the device of allocated code passage internal memory according to another embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is the part of the embodiment of the present invention, rather than whole embodiments.Based on this hair
Embodiment in bright, the every other reality that those of ordinary skill in the art are obtained on the premise of creative work is not made
Example is applied, should all belong to the scope of protection of the invention.
Fig. 1 is the schematic diagram of multi-channel coding system according to embodiments of the present invention.It is public in system as shown in Figure 1
Cache pool includes N+1 buffer area, and each passage in N number of passage has 1 reference frame and 1 reconstructed frame, and 1 reference frame takes
One internal storage location.Wherein, the 1st passage can by a buffer area in public cache pool, such as：Buffer area 2 is defined as
The internal storage location of 1st reconstructed frame corresponding to passage, then the 1st passage former reference frame according to corresponding to the 1st passage,
Reconstructed frame is obtained to the target image frame progress coded treatment of the 1st passage, and it is determined that using the reconstructed frame as reference frame
When, the internal storage location of former reference frame corresponding to the 1st passage is discharged to public cache pool, now, reconstructed frame can conduct
The reference frame of the picture frame of next code；Or it is determined that using former reference frame corresponding to the 1st passage as during reference frame,
1st internal storage location of reconstructed frame corresponding to passage is discharged to public cache pool, now, reconstructed frame is released.Such as：After
The passage encoded after 1st passage is the 3rd passage, then the 3rd passage can discharge the 1st passage to public caching
Internal storage location in pond is defined as the internal storage location of the 3rd reconstructed frame corresponding to passage so that the reconstructed frame of the 3rd passage
Internal storage location is multiplexed the internal storage location of the 1st passage release, so as to save the occupancy of internal memory, reduces internal memory cost.
It should be noted that in embodiments of the present invention, when only having a reference frame with each passage in N number of passage only
Exemplified by taking an internal storage location, the technical scheme of the embodiment of the present invention is illustrated, however each passage can have it is multiple
Reference frame, then to take multiple internal storage locations.
Fig. 2 is the indicative flowchart of the method 100 of allocated code passage internal memory according to embodiments of the present invention.Such as Fig. 2
Shown method 100, wherein, coding pass internal memory includes the internal memory of reference frame and the internal memory of reconstructed frame, including：
110, public cache pool is divided into multiple buffer areas, the public cache pool is unoccupied and can be by multiple logical
Road is utilized；
120, the buffer area in multiple buffer areas in the public cache pool is defined as corresponding to first passage
The internal storage location of first reconstructed frame；
130, when it is determined that using former reference frame corresponding to first passage as during the first reference frame, by first weight
The internal storage location of structure frame is discharged to the public cache pool；Or, when determination is using first reconstructed frame as the described first reference
During frame, the internal storage location of former reference frame corresponding to first passage is discharged to the public cache pool；
140, a upper passage is discharged to the internal storage location in the public cache pool and is defined as corresponding to current channel
The internal storage location of two reconstructed frames, wherein, the current channel is the passage in addition to first passage.
150, when it is determined that using former reference frame corresponding to the current channel as during the second reference frame, described second is reconstructed
The internal storage location of frame is discharged to the public cache pool；Or, when determination is using second reconstructed frame as second reference frame
When, the internal storage location of former reference frame corresponding to the current channel is discharged to the public cache pool, and be used as next passage
The internal storage location of corresponding third reconstructed frame.
Specifically, in embodiments of the present invention, public cache pool can be divided into multiple buffer areas, and this is multiple slow
The internal storage location that in area buffer area is defined as the first reconstructed frame corresponding to the 1st passage is deposited, when it is determined that by the 1st passage
When corresponding former reference frame is as the first reference frame, the internal storage location of the first reconstructed frame is discharged to public cache pool, i.e.,：When true
It is fixed not using first reconstructed frame as the 1st corresponding to passage during the first reference frame, by the internal storage location of first reconstructed frame
Release is to the public cache pool, or when it is determined that using first reconstructed frame as during the 1st the first reference frame corresponding to passage,
The internal storage location of former reference frame corresponding to 1st passage is discharged to the public cache pool.A upper passage can be discharged to
Internal storage location in the public cache pool is defined as the internal storage location of the second reconstructed frame corresponding to current channel, the current channel
For the passage in addition to the 1st passage, when it is determined that using former reference frame corresponding to the current channel as during the second reference frame, by this
The internal storage location of second reconstructed frame is discharged to public cache pool, i.e.,：When it is determined that not using second reconstructed frame as the current channel
During corresponding second reference frame, the internal storage location of second reconstructed frame is discharged to the public cache pool, or, when it is determined that should
Second reconstructed frame is as corresponding to the current channel during the second reference frame, by the interior deposit receipt of former reference frame corresponding to the current channel
Member is discharged to the public cache pool, and as the internal storage location of third reconstructed frame corresponding to next passage.
Such as：There are 2 coding passes, and each coding pass has 1 reference frame and 1 reconstructed frame, reference frame and reconstruct
Frame takes an internal storage location respectively.Then according to embodiments of the present invention, can be by multiple buffer areas that public cache pool divides
A buffer area be defined as the internal storage location of the first reconstructed frame corresponding to the 1st passage, it is and when determining that the 1st passage is corresponding
Former reference frame as the first reference frame when, the internal storage location of the first reconstructed frame is discharged to public cache pool, or when determine
Using first reconstructed frame as the 1st corresponding to passage during the first reference frame, by former reference frame corresponding to the 1st passage
Internal storage location is discharged to the public cache pool.It is then possible to the 1st passage is discharged true to the internal storage location in public cache pool
Be set to the internal storage location of the second reconstructed frame corresponding to the 2nd passage, and when determine using former reference frame corresponding to the 2nd passage as
During the second reference frame, the internal storage location of the second reconstructed frame is discharged to public cache pool, or works as and determines second reconstructed frame
As the 2nd corresponding to passage during the second reference frame, by the internal storage location of former reference frame corresponding to the 2nd passage discharge to
The public cache pool.
According to embodiments of the present invention, 2 coding passes can be multiplexed in first passage discharged into public cache pool
Memory cell, 2 coding passes occupy 3 internal storage locations altogether, and are needed according to the scheme of prior art, 2 coding passes
Take 4 internal storage locations.That is, technical scheme according to embodiments of the present invention, N number of coding pass can save N-1
Internal storage location.
Therefore, the method for allocated code passage internal memory provided in an embodiment of the present invention, by the way that a upper passage is discharged to this
Internal storage location in public cache pool is defined as the internal storage location of reconstructed frame corresponding to current channel, and determines whether to reconstruct this
The internal storage location of frame is discharged to the public cache pool, and as the internal storage location of reconstructed frame corresponding to next passage, it is more to realize
Individual one internal storage location of channel multiplexing, so as to save the occupancy of internal memory, reduce internal memory cost.
It should be understood that in embodiments of the present invention, the structure for the code stream that can be exported according to the regulation and needs of coding protocol
To determine whether using reconstructed frame as reference frame.
It should also be understood that it is not in embodiments of the present invention, between a upper passage, current channel and next passage mathematically
Sequentially relation, but temporal logical relation.Such as：Current channel is the 5th passage, then a upper passage refers to the 5th
The previous moment that individual passage carries out the target image frame processing of the 5th passage completes the passage that its target image frame is handled, example
Such as：This passage can be the 4th passage, can be the 1st passage, can be the 8th passage, etc., but the present invention is not
It is confined to this.And next passage refers to the later moment in time that the target image frame processing of the 5th passage is completed in the 5th passage
The passage of its target image frame processing will be carried out, such as：This passage can be the 4th passage, can be the 2nd passage,
Can be the 8th passage, etc., but the invention is not limited in this.
It should be noted that in embodiments of the present invention, the size of each buffer area in multiple buffer areas needs to meet
Each requirement of the passage to resolution ratio in multiple passages.That is, when the public buffer area is divided into multiple buffer areas, need
Consider each requirement of the passage to resolution ratio in multiple passages.Each requirement of the passage to resolution ratio can be in multiple passages
Identical or different.When requirement difference of each passage to resolution ratio in multiple passages, according to resolution requirement
The size of highest that passage division buffer area, to guarantee to meet that each passage is wanted to resolution ratio in multiple passages
Ask, so as to realize sharing for the internal memory of reconstructed frame.
It should be understood that in embodiments of the present invention, former reference frame corresponding to the current channel refers to current channel when current
Carve processing target image frame time base in reference frame, such as：The target image frame is the first frame original image, then former reference frame can be with
Be the first frame original image in itself.For another example：The target image frame is the 5th two field picture, then former reference frame can be the 5th two field picture
Any two field picture or multiple image in four two field pictures before, also or can be the 5th two field picture in itself, but not to this
Inventive embodiments form any restriction.
It should be noted that in embodiments of the present invention, the first reference frame is corresponding ginseng after first channel coding
Frame is examined, the second reference frame is corresponding reference frame after current channel coding, is intended merely to the classification of passage corresponding to distinguishing, right
The embodiment of the present invention does not form any restriction.
It should also be understood that in embodiments of the present invention, can be by Double Data Rate synchronous DRAM DDR part
Deposit as the public cache pool, but the embodiment of the present invention is not limited thereto, such as：Can also be by other memories, such as：ROM、
The partial memory of RAM, hard disk etc. is not limited this as the public cache pool, the present invention.
It should also be understood that the technical scheme of the embodiment of the present invention can apply to multi-channel coding system, can also be applied to
Multi-channel video image processing system, that is to say, that the technical scheme of the embodiment of the present invention can apply to frame and deposit what is switched
System or field, the present invention are not limited this.
Optionally, also include as one embodiment of the present of invention, this method 100：The current channel is worked as according to described
Former reference frame corresponding to prepass, the target image frame for handling the current channel obtain second reconstructed frame.
Specifically, in embodiments of the present invention, a upper passage is discharged to the internal memory in the public cache pool and is defined as
, it is necessary to current channel former reference according to corresponding to the current channel after the internal storage location of second reconstructed frame corresponding to current channel
Frame, the target image frame for handling the current channel obtain the second reconstructed frame.Such as：The current channel can be according to the current channel
Corresponding former reference frame, the second reconstructed frame is obtained to the target image frame progress coded treatment of the current channel.It is that is, right
When the target image frame of current channel is encoded, the residual error 1 that target image frame and former reference frame subtract each other to obtain is entered into line translation
And quantification treatment, residual error 2 is obtained, code stream obtained to the coding of residual error 2, while residual error 2 is added with former reference frame to obtain the second weight
Structure frame.Due to being only to carry out coded treatment to residual error in an encoding process, so redundancy can be reduced greatly, pressure is improved
Shrinkage.And when it is determined that using former reference frame corresponding to the current channel as during the second reference frame, by the internal memory of second reconstructed frame
Unit is discharged to public cache pool, i.e.,：When it is determined that not using second reconstructed frame as the second reference frame corresponding to the current channel
When, the internal storage location of second reconstructed frame is discharged to the public cache pool, then second reconstructed frame is released；Or when true
It is fixed using second reconstructed frame as corresponding to the current channel during the second reference frame, by former reference frame corresponding to the current channel
Internal storage location is discharged to the public cache pool, then the reference frame of second reconstructed frame as the picture frame of next code.
It is similar, for first passage, by a buffer area in multiple buffer areas in public cache pool
It is defined as after the 1st internal storage location of reconstructed frame corresponding to passage, it is necessary to which the 1st passage is according to corresponding to the 1st passage
Former reference frame, the target image frame for handling the 1st passage obtain the first reconstructed frame.When it is determined that will be former corresponding to the 1st passage
When reference frame is as the first reference frame, the internal storage location of the first reconstructed frame is discharged to public cache pool, i.e.,：When it is determined that should not
Corresponding to passage during the first reference frame, the internal storage location of first reconstructed frame is discharged to this as the 1st for first reconstructed frame
Public cache pool, or when it is determined that using first reconstructed frame as during the 1st the first reference frame corresponding to passage, by the 1st
The internal storage location of former reference frame corresponding to individual passage is discharged to the public cache pool.
According to embodiments of the present invention, specifically, current channel former reference frame according to corresponding to the current channel, can pass through
In the following manner, the target image frame for handling the current channel obtain the second reconstructed frame：
First way, the current channel former reference frame according to corresponding to the current channel can be to the target image frame
Carry out coded treatment and obtain second reconstructed frame.
Specifically, in embodiments of the present invention, a upper passage can be discharged true to the internal memory in the public cache pool
It is set to the internal storage location of the second reconstructed frame corresponding to current channel.Then the current channel former ginseng according to corresponding to the current channel
Frame is examined, carrying out coded treatment to the target image frame of the current channel obtains second reconstructed frame, when it is determined that by current channel pair
When the former reference frame answered is as the second reference frame, the internal storage location of the second reconstructed frame is discharged to public cache pool, i.e.,：When it is determined that
Should not the second reconstructed frame as corresponding to the current channel during the second reference frame, by the internal storage location of second reconstructed frame discharge to
The public cache pool, or when it is determined that second reconstructed frame is as the second reference frame corresponding to the current channel, this is current
The internal storage location of former reference frame corresponding to passage is discharged to the public cache pool, and as third reconstructed frame corresponding to next passage
Internal storage location.
It is similar, for first passage, by a buffer area in multiple buffer areas in public cache pool
It is defined as after the 1st internal storage location of reconstructed frame corresponding to passage, it is necessary to which the 1st passage is according to corresponding to the 1st passage
Former reference frame, first reconstructed frame is obtained to the target image frame progress coded treatment of the 1st passage, when it is determined that by the 1st
When former reference frame is as the first reference frame corresponding to passage, the internal storage location of the first reconstructed frame is discharged to public cache pool, i.e.,：
When uncertain using first reconstructed frame as during the 1st the first reference frame corresponding to passage, by the internal memory of first reconstructed frame
Unit is discharged to the public cache pool, or when determination is using first reconstructed frame as the first reference corresponding to the 1st passage
During frame, the internal storage location of former reference frame corresponding to the 1st passage is discharged to the public cache pool.
Such as：When next passage is the 5th passage, the 5th passage is discharged to the public cache pool in can applying for 130
In internal storage location of the internal storage location as the 5th reconstructed frame corresponding to passage, then the 5th passage is according to the 5th
Former reference frame corresponding to passage, the target image frame progress coded treatment of the 5th passage is obtained corresponding to the 5th passage
Reconstructed frame, and when it is determined that using former reference frame corresponding to the 5th passage as during the second reference frame, the 5th passage is corresponding
The internal storage location of reconstructed frame discharge to the public cache pool, or when determine using the 5th reconstructed frame corresponding to passage as
During the second reference frame, the internal storage location of former reference frame corresponding to the 5th passage is discharged to the public cache pool.
The second way, the current channel former reference frame according to corresponding to the current channel, to the target of the current channel
Picture frame carries out noise reduction process and obtains second reconstructed frame.
Specifically, in embodiments of the present invention, a upper passage can be discharged true to the internal memory in the public cache pool
It is set to the internal storage location of the second reconstructed frame corresponding to current channel.Then the current channel former ginseng according to corresponding to the current channel
Frame is examined, carrying out noise reduction process to the target image frame of the current channel obtains second reconstructed frame, when it is determined that by current channel pair
When the former reference frame answered is as the second reference frame, the internal storage location of the second reconstructed frame is discharged to public cache pool, i.e.,：When it is determined that
Not using second reconstructed frame as corresponding to current channel during the second reference frame, by the internal storage location of second reconstructed frame discharge to
The public cache pool, or when it is determined that using second reconstructed frame as during the second reference frame corresponding to current channel, this is current
The internal storage location of former reference frame corresponding to passage is discharged to the public cache pool, and as third reconstructed frame corresponding to next passage
Internal storage location.
It is similar, for first passage, by a buffer area in multiple buffer areas in public cache pool
It is defined as after the 1st internal storage location of reconstructed frame corresponding to passage, it is necessary to which the 1st passage is according to corresponding to the 1st passage
Former reference frame, first reconstructed frame is obtained to the target image frame progress noise reduction process of the 1st passage, and work as and determine the 1st
When former reference frame is as the first reference frame corresponding to individual passage, the internal storage location of the first reconstructed frame is discharged to public cache pool,
I.e.：When it is determined that not using first reconstructed frame as during the 1st the first reference frame corresponding to passage, by first reconstructed frame
Memory cell is discharged to the public cache pool, or when determination is using first reconstructed frame as the first ginseng corresponding to the 1st passage
When examining frame, the internal storage location of former reference frame corresponding to the 1st passage is discharged to the public cache pool.
Below by taking N number of channel coding as an example, and combine Fig. 2 and detailed retouch is carried out to the technical scheme of the embodiment of the present invention
State, wherein, N takes the positive integer more than or equal to 2.It should be understood that this is only an example of the embodiment of the present invention, not to this
Inventive embodiments form any restriction.
Fig. 3 is the indicative flowchart of the method 200 of allocated code passage internal memory according to embodiments of the present invention.Such as Fig. 3
Shown method 200 includes：
210, public cache pool is divided into M+1 buffer area, the public cache pool is unoccupied and can be by multiple logical
Road is utilized.
, can be using DDR partial memory as the public cache pool, then by the public affairs specifically, in embodiments of the present invention
Cache pool is divided into M+1 buffer area altogether, wherein, M is the sum of the reference frame committed memory unit of N number of passage.That is,
Each passage in N number of passage can have 1 or multiple reference frames, then can take 1 or multiple internal storage locations, and work as
When each passage has multiple reference frames occupancy multiple internal storage locations, the quantity of the internal storage location of the reference frame occupancy of each passage can
With it is identical can also be different, the embodiment of the present invention is not limited this.And the public cache pool is divided into M+1 buffer area
When, it is necessary to consider each requirement of the passage to resolution ratio in N number of passage.Each requirement of the passage to resolution ratio can in N number of passage
To be identical or different.When requirement difference of each passage to resolution ratio in N number of passage, according to resolution ratio
It is required that the size of highest that passage division buffer area, to guarantee to meet that each passage is to resolution ratio in N number of passage
It is required that so as to realize sharing for the internal memory of reconstructed frame.
220, a buffer area in multiple buffer areas in public cache pool is defined as corresponding to first passage
The internal storage location of one reconstructed frame.
230, first passage former reference frame according to corresponding to first passage, to the target figure of first passage
First reconstructed frame is obtained as frame carries out coded treatment.
Specifically, in embodiments of the present invention, it can comprise the following steps after 230：The weight obtained to coded treatment
Structure frame carries out DPB (Decoded picture buffer) management.
240, it is determined whether using first reconstructed frame as the first reference frame corresponding to first passage.
Specifically, in embodiments of the present invention, can be preset in coding whether using first reconstructed frame as
First reference frame corresponding to first passage.
251, when it is determined that not using first reconstructed frame as during the first reference frame corresponding to first passage, by this first
The internal storage location of reconstructed frame is discharged to the public cache pool.That is, determine former reference frame corresponding to first passage
When continuing as the first reference frame, the internal storage location of first reconstructed frame is discharged to the public cache pool.
252, it is logical by this first when it is determined that first reconstructed frame is as the first reference frame corresponding to first passage
The internal storage location of former reference frame corresponding to road is discharged to the public cache pool.
260, a upper passage is discharged to the internal storage location in public cache pool and is defined as the second weight corresponding to current channel
The internal storage location of structure frame, current channel are the passage in addition to first passage.
270, the current channel former reference frame according to corresponding to the current channel, the target image frame of the current channel is entered
Row coded treatment obtains second reconstructed frame.
275, it is determined whether using second reconstructed frame as the second reference frame corresponding to the current channel.
281, when it is determined that not using second reconstructed frame as during the second reference frame corresponding to the current channel, by second weight
The internal storage location of structure frame is discharged to the public cache pool.That is, determine to continue former reference frame corresponding to the current channel
During as the second reference frame, the internal storage location of second reconstructed frame is discharged to the public cache pool.
282, when it is determined that second reconstructed frame is as the second reference frame corresponding to the current channel, by the current channel pair
The internal storage location for the former reference frame answered is discharged to the public cache pool.
290, start the cataloged procedure of next passage, repeat step 260 to step 282.
Specifically, in embodiments of the present invention, it is assumed that current channel is the 3rd passage, and next passage is the 2nd passage,
Then the internal storage location that the 3rd passage is discharged into the public cache pool can be defined as the 2nd passage pair by the 2nd passage
The internal storage location for the reconstructed frame answered.2nd passage former reference frame according to corresponding to the 2nd passage, to the mesh of the 2nd passage
Logo image frame carries out coded treatment and obtains the 2nd reconstructed frame corresponding to passage；Then coded treatment can be obtained the 2nd
Reconstructed frame corresponding to individual passage carries out DPB (Decoded picture buffer) management.Can be according to the regulation of coding protocol
Determined whether to the structure of code stream that needs to export using the 2nd ginseng of the reconstructed frame as the 2nd passage corresponding to passage
Frame is examined, when it is determined that cannot lead to the 2nd using the 2nd reconstructed frame corresponding to passage as during the reference frame of the 2nd passage
The internal storage location of reconstructed frame corresponding to road is discharged to the public cache pool；When it is determined that can be by reconstruct corresponding to the 2nd passage
During reference frame of the frame as the 2nd passage, the internal storage location of former reference frame corresponding to the 2nd passage is discharged public slow to this
Pond is deposited, and as the internal storage location of third reconstructed frame corresponding to next passage.Obviously, in embodiments of the present invention, the 2nd passage
The internal storage location of reconstructed frame be multiplexed the 3rd passage and discharged to that internal storage location in public cache pool.
It should be noted that in embodiments of the present invention, M can be equal to N, i.e. the reference of each passage in N number of passage
Frame takes 1 internal storage location, and N number of passage can be multiplexed 1 internal storage location, therefore, compared with existing coded system, this hair
The technical scheme of bright embodiment can save N-1 internal storage location.
Therefore, the method for allocated code passage internal memory provided in an embodiment of the present invention, by the way that a upper passage is discharged to this
Internal storage location in public cache pool is defined as the internal memory of reconstructed frame corresponding to current channel, and determines whether the reconstructed frame
Internal storage location is discharged to the public cache pool, multiple to realize as the internal storage location of third reconstructed frame corresponding to next passage
One internal storage location of channel multiplexing, so as to save the occupancy of internal memory, reduce internal memory cost.
It should be understood that in various embodiments of the present invention, the size of the sequence number of above-mentioned each process is not meant to execution sequence
Successively, the execution sequence of each process should be determined with its function and internal logic, the implementation process without tackling the embodiment of the present invention
Form any restriction.
Above in conjunction with Fig. 2 and Fig. 3, the side of allocated code passage internal memory according to embodiments of the present invention is described in detail
Method, below in conjunction with Fig. 4 and Fig. 5, the device of the allocated code passage internal memory of the embodiment of the present invention is described in detail.
Fig. 4 is the schematic diagram of the device 400 of allocated code passage internal memory according to embodiments of the present invention.Such as Fig. 4
Device 400, wherein, the internal memory of coding pass internal memory including reference frame and the internal memory of reconstructed frame, the device 400 include：Division
Module 410, the first determining module 420, the first release module 430, the second determining module 440 and the second release module 450, its
In,
Division module 410, for public cache pool to be divided into multiple buffer areas, the public cache pool it is unoccupied and
It can be utilized by multiple passages；
First determining module 420, for a buffer area in multiple buffer areas in the public cache pool to be determined
For the internal storage location of the first reconstructed frame corresponding to first passage；
First release module 430, for when determination is using former reference frame corresponding to first passage as the first reference
During frame, the internal storage location of first reconstructed frame is discharged to the public cache pool；Or, work as and determine first reconstructed frame
During as first reference frame, the internal storage location of former reference frame corresponding to first passage is discharged to described public slow
Deposit pond；
Second determining module 440, it is defined as a upper passage to be discharged to the internal storage location in the public cache pool
The internal storage location of second reconstructed frame corresponding to current channel, wherein, the current channel is in addition to the passage
Passage；
Second release module 450, for when determination is using former reference frame corresponding to the current channel as the second reference frame
When, the internal storage location of second reconstructed frame is discharged to the public cache pool；Or when second reconstructed frame is made in determination
For second reference frame when, the internal storage location of former reference frame corresponding to the current channel is discharged to the public caching
Pond, in order to which next passage uses.
Specifically, in embodiments of the present invention, public cache pool can be divided into multiple buffer areas by division module 410,
First determining module 420 can be from one in the multiple buffer areas divided division module 410 in obtained public cache pool
Buffer area is defined as the internal storage location of the first reconstructed frame corresponding to the 1st passage.When it is determined that being referred to former corresponding to the 1st passage
When frame is as the first reference frame, i.e.,：When it is determined that not using first reconstructed frame as the first reference frame corresponding to the 1st passage
When, release module 430 discharges the internal memory of first reconstructed frame to the public cache pool, or works as and determine first reconstructed frame
As the 1st corresponding to passage during the first reference frame, the first release module 430 is by former reference frame corresponding to the 1st passage
Internal storage location discharge to the public cache pool.Second determining module 440 can discharge a upper passage to the public caching
Internal storage location in pond is defined as the internal storage location of the second reconstructed frame corresponding to current channel, and the current channel is except the 1st logical
Passage outside road.Then when it is determined that using former reference frame corresponding to current channel as during the second reference frame, i.e.,：When it is determined that will not
Second reconstructed frame is as corresponding to the current channel during the second reference frame, and the second release module 450 is by second reconstructed frame
Internal storage location is discharged to the public cache pool, or, when it is determined that using second reconstructed frame as second corresponding to the current channel
During reference frame, the second release module 450 discharges the internal storage location of former reference frame corresponding to the current channel public slow to this
Pond is deposited, and as the internal storage location of third reconstructed frame corresponding to next passage.
It should be understood that in embodiments of the present invention, not mathematically suitable between a upper passage, current channel and next passage
Secondary relation, but temporal logical relation.Such as：Current channel is the 5th passage, then a upper passage refers at the 5th
The previous moment that passage carries out the target image frame processing of the 5th passage completes the passage that its target image frame is handled, such as：
This passage can be the 4th passage, can be the 1st passage, can be the 8th passage, etc., but the present invention does not limit to
In this.And next passage refers to that the later moment in time that the target image frame processing of the 5th passage is completed in the 5th passage will
The passage of its target image frame processing is carried out, such as：This passage can be the 4th passage, can be the 2nd passage, can be with
It is the 8th passage, etc., but the invention is not limited in this.
Therefore, the device of allocated code passage internal memory provided in an embodiment of the present invention, by the way that a upper passage is discharged to this
Internal storage location in public cache pool is defined as the internal memory of reconstructed frame corresponding to current channel, and determines whether the reconstructed frame
Internal storage location is discharged to the public cache pool, as the internal storage location of reconstructed frame corresponding to next passage, to realize multiple passages
An internal storage location is multiplexed, so as to save the occupancy of internal memory, reduces internal memory cost.
It should be noted that in embodiments of the present invention, the size of each buffer area in multiple buffer areas needs to meet
Each requirement of the passage to resolution ratio in multiple passages.That is, when the public buffer area is divided into multiple buffer areas, need
Consider each requirement of the passage to resolution ratio in multiple passages.Each requirement of the passage to resolution ratio can be in multiple passages
Identical or different.When requirement difference of each passage to resolution ratio in multiple passages, according to resolution requirement
The size of highest that passage division buffer area, to guarantee to meet that each passage is wanted to resolution ratio in multiple passages
Ask, so as to realize sharing for the internal memory of reconstructed frame.
It should be understood that in embodiments of the present invention, former reference frame corresponding to the current channel refers to current channel when current
Carve handle the target image frame time base in reference frame, such as：The target image frame is the first frame original image, then former reference frame can
Be the first frame original image in itself.For another example：Any in four two field pictures before then former reference frame can be the 5th two field picture
Two field picture or multiple image, also or can be for the 5th two field picture in itself, but does not form any restriction to the embodiment of the present invention.
It should also be understood that in embodiments of the present invention, can be by Double Data Rate synchronous DRAM DDR part
Deposit as the public cache pool, but the embodiment of the present invention is not limited thereto, such as：Can also be by other memories, such as：ROM、
The partial memory of RAM, hard disk etc. is not limited this as the public cache pool, the present invention.
It should also be understood that the technical scheme of the embodiment of the present invention can apply to multi-channel coding system, can also be applied to
Multi-channel video image processing system, that is to say, that the technical scheme of the embodiment of the present invention can apply to frame and deposit what is switched
System or field, the present invention are not limited this.
Optionally, also include as one embodiment of the present of invention, described device 400：Processing module, for described current
Passage former reference frame according to corresponding to the current channel, the target image frame for handling the current channel obtain second weight
Structure frame.
Specifically, in embodiments of the present invention, the second determining module 440 discharges a upper passage to the public cache pool
In internal memory be defined as the internal storage location of the second reconstructed frame corresponding to current channel after, processing module can be used for current channel root
According to former reference frame corresponding to the current channel, the target image frame for handling the current channel obtains the second reconstructed frame.When it is determined that will
When former reference frame is as the second reference frame corresponding to the current channel, the internal storage location of second reconstructed frame is discharged to public slow
Pond is deposited, i.e.,：When it is determined that not using second reconstructed frame as during the second reference frame corresponding to the current channel, the second release module
450 discharge the internal storage location of second reconstructed frame to the public cache pool, or, when it is determined that regarding second reconstructed frame as this
Corresponding to current channel during the second reference frame, the second release module 450 is by the internal memory of former reference frame corresponding to the current channel
Unit is discharged to the public cache pool, and as the internal storage location of third reconstructed frame corresponding to next passage.
Similar, for first passage, the first determining module 420 is by multiple buffer areas in public cache pool
In a buffer area be defined as the 1st internal storage location of reconstructed frame corresponding to passage after, processing module can be used for the 1st
Passage former reference frame, the target image frame for handling the 1st passage according to corresponding to the 1st passage obtain the first reconstructed frame.
When it is determined that using former reference frame corresponding to the 1st passage as during the first reference frame, by the internal storage location of the first reconstructed frame discharge to
Public cache pool, i.e.,：When it is determined that not using first reconstructed frame as during the 1st the first reference frame corresponding to passage, first releases
Amplification module 430 discharges the internal storage location of first reconstructed frame to the public cache pool, or works as and determine first reconstructed frame
As the 1st corresponding to passage during the first reference frame, the first release module 430 is by former reference frame corresponding to the 1st passage
Internal storage location discharge to the public cache pool.
Optionally, be specifically used for as an alternative embodiment of the invention, the processing module, the current channel according to deserve
Former reference frame corresponding to prepass, coded treatment is carried out to the target image frame and obtains second reconstructed frame.That is, to this
When the target image frame of current channel is encoded, the residual error 1 that target image frame and former reference frame subtract each other to obtain is entered into line translation
And quantification treatment, residual error 2 is obtained, code stream obtained to the coding of residual error 2, while residual error 2 is added with former reference frame to obtain the second weight
Structure frame.
Specifically, in embodiments of the present invention, processing module is also particularly useful for first passage according to the 1st passage pair
The former reference frame answered, first reconstructed frame is obtained to the target image frame progress coded treatment of the 1st passage.
Optionally, be specifically used for as an alternative embodiment of the invention, the processing module, the current channel according to deserve
Former reference frame corresponding to prepass, noise reduction process is carried out to the target image frame and obtains second reconstructed frame.
Specifically, in embodiments of the present invention, processing module is also particularly useful for first passage according to the 1st passage pair
The former reference frame answered, first reconstructed frame is obtained to the target image frame progress noise reduction process of the 1st passage.
It should be understood that in embodiments of the present invention, device 400 according to embodiments of the present invention may correspond to according to of the invention real
Apply the method 100 of example and the executive agent of method 200, and above and other operation of the modules in device 400 and/or
Function is respectively in order to realize the corresponding flow of each method in Fig. 2 and Fig. 3, for sake of simplicity, will not be repeated here.
The embodiment of the present invention also provides a kind of device 500 of allocated code passage internal memory.As shown in figure 5, the device 500 wraps
Include processor 510, memory 520 and bus system 530.Wherein, processor 510 and memory 520 pass through the phase of bus system 530
Even, the memory 520 is used for store instruction, and the processor 510 is used for the instruction for performing the memory 520 storage.Wherein,
The processor 510 is used for：Public cache pool is divided into multiple buffer areas, the public cache pool it is unoccupied and
It can be utilized by multiple passages, and current first will be defined as from the buffer area in multiple buffer areas in public cache pool
The internal storage location of first reconstructed frame corresponding to individual passage, when it is determined that using former reference frame corresponding to first passage as first
During reference frame, the internal storage location of first reconstructed frame is discharged to the public cache pool, or when determination the first reconstructed frame conduct
Corresponding to first passage during the first reference frame, the internal storage location of former reference frame corresponding to first passage is discharged
To the public cache pool, a upper passage is discharged to the internal storage location in the public cache pool and is defined as corresponding to current channel
The internal storage location of second reconstructed frame, wherein, the current channel is passage in addition to first passage, when it is determined that by institute
When stating that former reference frame is as the second reference frame corresponding to current channel, the internal storage location of second reconstructed frame is discharged to described
Public cache pool, or when it is determined that using second reconstructed frame as during second reference frame, by corresponding to the current channel
The internal storage location of former reference frame is discharged to the public cache pool, and as the interior deposit receipt of third reconstructed frame corresponding to next passage
Member.
Therefore, the device of allocated code passage internal memory provided in an embodiment of the present invention, by the way that a upper passage is discharged to this
Internal storage location in public cache pool is defined as the internal storage location of reconstructed frame corresponding to current channel, and determines whether to reconstruct this
The internal storage location of frame is discharged to the public cache pool, multiple to realize as the internal storage location of reconstructed frame corresponding to next passage
One internal storage location of channel multiplexing, so as to save the occupancy of internal memory, reduce internal memory cost.
It should be understood that in embodiments of the present invention, the processor 510 can be CPU (Central
Processing Unit, CPU), the processor 510 can also be other general processors, digital signal processor (DSP), specially
With integrated circuit (ASIC), ready-made programmable gate array (FPGA) either other PLDs, discrete gate or crystal
Pipe logical device, discrete hardware components etc..General processor can be microprocessor or the processor can also be it is any often
Processor of rule etc..
The memory 520 can include read-only storage and random access memory, and to processor 510 provide instruction and
Data.The a part of of memory 520 can also include nonvolatile RAM.For example, memory 520 can also be deposited
Store up the information of device type.
The bus system 530 can also include power bus, controlling bus and status signal in addition to including data/address bus
Bus etc..But for the sake of clear explanation, various buses are all designated as bus system 530 in figure.
In implementation process, each step of the above method can pass through the integrated logic circuit of the hardware in processor 510
Or the instruction of software form is completed.The step of method with reference to disclosed in the embodiment of the present invention, can be embodied directly at hardware
Reason device performs completion, or performs completion with the hardware in processor and software module combination.Software module can be located at random
Memory, flash memory, read-only storage, the ability such as programmable read only memory or electrically erasable programmable memory, register
In the ripe storage medium in domain.The storage medium is located at memory 520, and processor 510 reads the information in memory 520, knot
Close the step of its hardware completes the above method.To avoid repeating, it is not detailed herein.
Alternatively, it is additionally operable to as one embodiment of the present of invention, processor 510, the current channel is worked as according to described
Former reference frame corresponding to prepass, the target image frame for handling the current channel obtain second reconstructed frame.
Optionally, be specifically used for as an alternative embodiment of the invention, processor 510, the current channel according to deserve
Former reference frame corresponding to prepass, coded treatment is carried out to the target image frame and obtains second reconstructed frame.
Specifically, in embodiments of the present invention, processing module is also particularly useful for first passage according to the 1st passage pair
The former reference frame answered, first reconstructed frame is obtained to the target image frame progress coded treatment of the 1st passage.
Alternatively, be specifically used for as an alternative embodiment of the invention, processor 510, the current channel according to deserve
Former reference frame corresponding to prepass, noise reduction process is carried out to the target image frame and obtains second reconstructed frame.
Specifically, in embodiments of the present invention, processing module is also particularly useful for first passage according to the 1st passage pair
The former reference frame answered, first reconstructed frame is obtained to the target image frame progress noise reduction process of the 1st passage.
It should be understood that device 500 according to embodiments of the present invention may correspond to method 100 according to embodiments of the present invention and side
Executive agent and device 500 according to embodiments of the present invention in method 200, and the modules in device 500 is above-mentioned
With other operation and/or functions respectively in order to realize the corresponding flow of each method in Fig. 2 and Fig. 3, for sake of simplicity, herein not
Repeat again.
Those of ordinary skill in the art are it is to be appreciated that the list of each example described with reference to the embodiments described herein
Member and algorithm steps, it can be realized with electronic hardware, computer software or the combination of the two, in order to clearly demonstrate hardware
With the interchangeability of software, the composition and step of each example are generally described according to function in the above description.This
A little functions are performed with hardware or software mode actually, application-specific and design constraint depending on technical scheme.Specially
Industry technical staff can realize described function using distinct methods to each specific application, but this realization is not
It is considered as beyond the scope of this invention.
It is apparent to those skilled in the art that for convenience of description and succinctly, foregoing description is
The specific work process of system, device and unit, may be referred to the corresponding process in preceding method embodiment, will not be repeated here.
In several embodiments provided herein, it should be understood that disclosed systems, devices and methods, can be with
Realize by another way.For example, device embodiment described above is only schematical, for example, the unit
Division, only a kind of division of logic function, can there is other dividing mode, such as multiple units or component when actually realizing
Another system can be combined or be desirably integrated into, or some features can be ignored, or do not perform.
In addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit, can also
It is that unit is individually physically present or two or more units are integrated in a unit.It is above-mentioned integrated
Unit can both be realized in the form of hardware, can also be realized in the form of SFU software functional unit.
If the integrated unit is realized in the form of SFU software functional unit and is used as independent production marketing or use
When, it can be stored in a computer read/write memory medium.Based on such understanding, technical scheme is substantially
The part to be contributed in other words to prior art, or all or part of the technical scheme can be in the form of software product
Embody, the computer software product is stored in a storage medium, including some instructions are causing a computer
Equipment (can be personal computer, server, or network equipment etc.) performs the complete of each embodiment methods described of the present invention
Portion or part steps.And foregoing storage medium includes：USB flash disk, mobile hard disk, read-only storage (ROM, Read-Only
Memory), random access memory (RAM, Random Access Memory), magnetic disc or CD etc. are various can store journey
The medium of sequence code.
The foregoing is only a specific embodiment of the invention, but protection scope of the present invention is not limited thereto, any
Those familiar with the art the invention discloses technical scope in, various equivalent modifications can be readily occurred in or replaced
Change, these modifications or substitutions should be all included within the scope of the present invention.Therefore, protection scope of the present invention should be with right
It is required that protection domain be defined.
Claims (10)
1. a kind of method of allocated code passage internal memory, the coding pass internal memory include reference frame internal memory and reconstructed frame it is interior
Deposit, it is characterised in that including：
Public cache pool is divided into multiple buffer areas, the public cache pool it is unoccupied and can by multiple passages profit
With；
A buffer area in multiple buffer areas in the public cache pool is defined as the first weight corresponding to first passage
The internal storage location of structure frame；
Determine the internal storage location of the first reference frame corresponding to the first passage；When it is determined that will be former corresponding to first passage
Reference frame is as during the first reference frame, the internal storage location of first reconstructed frame is discharged to institute corresponding to first passage
State public cache pool；Or,
When it is determined that using first reconstructed frame as during first reference frame, by former reference frame corresponding to first passage
Internal storage location discharge to the public cache pool；
A upper passage is discharged to the internal storage location in the public cache pool and is defined as the second reconstructed frame corresponding to current channel
Internal storage location, wherein, the current channel is passage in addition to first passage；
When it is determined that using former reference frame corresponding to the current channel as during the second reference frame corresponding to the current channel, by institute
The internal storage location for stating the second reconstructed frame is discharged to the public cache pool；Or,
When it is determined that using second reconstructed frame as during second reference frame, by former reference frame corresponding to the current channel
Internal storage location is discharged to the public cache pool.
2. according to the method for claim 1, it is characterised in that methods described also includes：
The current channel former reference frame according to corresponding to the current channel, the target image frame for handling the current channel obtain
To second reconstructed frame.
3. according to the method for claim 2, it is characterised in that the current channel is former according to corresponding to the current channel
Reference frame, the target image frame of the current channel is handled, obtain second reconstructed frame, including：
The current channel former reference frame according to corresponding to the current channel, coded treatment is carried out to the target image frame and obtained
To second reconstructed frame.
4. according to the method for claim 2, it is characterised in that the current channel is former according to corresponding to the current channel
Reference frame, the target image frame of the current channel is handled, obtain second reconstructed frame, including：
The current channel former reference frame according to corresponding to the current channel, noise reduction process is carried out to the target image frame and obtained
To second reconstructed frame.
5. method according to any one of claim 1 to 4, it is characterised in that each slow in the multiple buffer area
The size for depositing area meets each requirement of the passage to resolution ratio in the multiple passage.
6. a kind of device of allocated code passage internal memory, the coding pass internal memory include reference frame internal memory and reconstructed frame it is interior
Deposit, it is characterised in that described device includes：
Division module, for public cache pool to be divided into multiple buffer areas, the public cache pool is unoccupied and can be by
Multiple passages are utilized；
First determining module, for a buffer area in multiple buffer areas in the public cache pool to be defined as into first
The internal storage location of first reconstructed frame corresponding to passage；Determine the internal storage location of the first reference frame corresponding to the first passage；
First release module, for when it is determined that former reference frame is as the first reference frame corresponding to first passage, by described
The internal storage location of one reconstructed frame is discharged to the public cache pool；Or, when determination is using first reconstructed frame as described first
During reference frame, the internal storage location of former reference frame corresponding to first passage is discharged to the public cache pool；
Second determining module, it is defined as current channel for a upper passage to be discharged to the internal storage location in the public cache pool
The internal storage location of corresponding second reconstructed frame, wherein, the current channel is the passage in addition to first passage；
Second release module, for when it is determined that using former reference frame corresponding to the current channel as during the second reference frame, by institute
The internal storage location for stating the second reconstructed frame is discharged to the public cache pool；Or when determining using second reconstructed frame as described the
During two reference frames, the internal storage location of former reference frame corresponding to the current channel is discharged to the public cache pool.
7. device according to claim 6, it is characterised in that described device also includes：Processing module, for described current
Passage former reference frame according to corresponding to the current channel, the target image frame for handling the current channel obtain second weight
Structure frame.
8. device according to claim 7, it is characterised in that the processing module is specifically used for, the current channel root
According to former reference frame corresponding to the current channel, coded treatment is carried out to the target image frame and obtains second reconstructed frame.
9. device according to claim 7, it is characterised in that the processing module is specifically used for, the current channel root
According to former reference frame corresponding to the current channel, noise reduction process is carried out to the target image frame and obtains second reconstructed frame.
10. the device according to any one of claim 6 to 9, it is characterised in that each slow in the multiple buffer area
The size for depositing area meets each requirement of the passage to resolution ratio in the multiple passage.
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| CN1463550A (en) * | 2001-06-15 | 2003-12-24 | 成津C&C株式会社 | Method and appts. for data compression of multi-channel moving pictures |
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| CN104185982A (en) * | 2012-02-29 | 2014-12-03 | 远升科技股份有限公司 | Video processing method and video appliance implementing method |
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| CN1463550A (en) * | 2001-06-15 | 2003-12-24 | 成津C&C株式会社 | Method and appts. for data compression of multi-channel moving pictures |
| CN101557512A (en) * | 2009-05-19 | 2009-10-14 | 武汉长江通信产业集团股份有限公司 | Method for processing time delay when video terminal receives video data |
| CN102823245A (en) * | 2010-04-07 | 2012-12-12 | 文森索·利古奥里 | Video transmission system having reduced memory requirements |
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