JP4728083B2 - Media processing device - Google Patents

Description

  The present invention relates to a media processing device, and more particularly to a media processing device that performs media processing by a plurality of processors.

  2. Description of the Related Art Conventionally, as a media processing apparatus that processes media signals such as video and audio signals, a method for performing media processing by assigning each task to a plurality of CPUs is known. FIG. 7 is a block diagram showing a configuration of a conventional media processing apparatus. A conventional media processing apparatus includes a microcomputer block 101 and a data input / output unit 102. The microcomputer block 101 includes a plurality of CPUs 103a, 103b, and 103c. Each CPU 103 (represented as CPU 103 if CPU 103a, 103b and 103c are not particularly distinguished) processes the assigned task. The data input / output unit 102 exchanges media signals with the outside. Further, the microcomputer block 101 and the data input / output unit 102 exchange signals through the bus line 104.

  In the conventional media processing apparatus, since the processing capacity of each CPU 103 is fixed, each CPU 103 has extra processing capacity for the assigned task. Further, since the number of CPUs 103 is determined by hardware, the number of CPUs 103 to which tasks are assigned is also fixed. For example, when the microcomputer block 101 includes three CPUs 103a, 103b, and 103c, a plurality of tasks must be assigned to three or less CPUs. As a result, it is difficult for the conventional media processing apparatus to assign an optimal task to the processing capability of each CPU 103. Also, task assignment to each CPU 103 by software requires complicated control.

  Accordingly, when the conventional media processing apparatus has to perform media processing within the required time, the media processing may not be completed within the requested time. That is, it is difficult for a conventional media processing device to guarantee performance in a process that requires real-time performance such as compression or expansion of a video stream or an audio stream in an AV device.

  On the other hand, a method of assigning tasks to a plurality of virtual processors is known (for example, see Patent Document 1).

  The media processing device described in Patent Literature 1 performs media processing by assigning a plurality of tasks to a plurality of virtual processors. Accordingly, the media processing device described in Patent Literature 1 can perform processing by assigning a virtual processor having optimum processing capability to each task.

Further, media processing by each virtual processor of the media processing device described in Patent Document 1 is performed by dividing one cycle into a plurality of time slots and assigning each time slot to each virtual processor. The media processing device described in Patent Document 1 can maintain the load balance of processing executed by each virtual processor by managing the time slots. In other words, task assignment can be easily controlled by assigning each virtual processor with a time slot corresponding to the processing time required for the task assigned to each virtual processor. As a result, performance can be easily guaranteed in a process that requires real-time performance.
JP 2003-271399 A

  In general media processing, processing that requires real-time processing and processing that does not require real-time processing coexist. For example, real-time processing is not required in a single process that occurs irregularly such as a screen operation by a user. In this way, in general media processing, in addition to processing that requires real-time processing, single processing that does not require real-time processing occurs, and therefore the processing capability of the processor must be sufficiently high. That is, in the conventional media processing device, it is difficult to guarantee the performance of a process that requires real-time characteristics unless the processing capability of the processor is sufficiently high. There is a problem that it takes cost to keep the processing capacity of the processor sufficiently high. Therefore, the conventional media processing device cannot perform optimum processing without cost for processing in which processing that requires real-time processing and processing that does not require real-time processing coexist. That is, the conventional media processing apparatus has a problem that it is difficult to perform optimum processing for guaranteeing performance without cost for processing with different processing characteristics.

  SUMMARY An advantage of some aspects of the invention is that it provides a media processing apparatus that performs optimal processing for guaranteeing performance without incurring costs for processing having different processing characteristics.

  To achieve the above object, a media processing apparatus according to the present invention comprises media processing means for performing media processing, and control means for controlling the media processing means. Hardware control, and a plurality of virtual processors performance-divided in a time-sharing manner, and the control means includes a plurality of CPUs.

  As a result, the media processing apparatus according to the present invention performs media processing using the plurality of virtual processors by the media processing means. Further, the plurality of virtual processors are performance-divided in time division by hardware control according to the processing capability required for media processing. Further, the control means has a plurality of CPUs. As a result, the CPU performs single processing that does not require real-time processing, and the media processing means does not need to perform single processing that does not require real-time processing. Therefore, the media processing unit does not have to have a high processing capability higher than the processing capability necessary for media processing. That is, the cost of the media processing device can be reduced. Therefore, the media processing apparatus according to the present invention can perform optimum processing for guaranteeing performance without cost for processing having different processing characteristics.

  In addition, the control means is equipped with an OS corresponding to a multiprocessor and controls the entire system, the media processing includes a plurality of processing, and each virtual processor performs each assigned processing, Each virtual processor may be assigned a time slot according to the processing capability required for each assigned process.

  Thereby, in the media processing apparatus according to the present invention, the control means controls the entire system, and therefore the media processing apparatus can be easily controlled. Each virtual processor is assigned a plurality of processes included in the media process, and each virtual processor performs the assigned process. Media processing by each virtual processor is performed by dividing one cycle into a plurality of time slots and assigning each time slot to each virtual processor. The media processing device can maintain the load balance of the processing executed by each virtual processor by managing this time slot. That is, it is possible to easily guarantee performance in processing that requires real-time performance.

The CPUs may perform processing that does not require real-time performance.
Thus, in the media processing device according to the present invention, the plurality of CPUs included in the control means perform processing that does not need to guarantee the assigned real-time property. This eliminates the need for the media processing means to perform a single process that does not require real-time performance. Therefore, the media processing unit does not have to have a high processing capability higher than the processing capability necessary for media processing. That is, the cost of the media processing device can be reduced.

  In addition, each of the virtual processors may perform each of the processes that need to guarantee real-time properties.

  As a result, the media processing device according to the present invention performs a process in which a plurality of virtual processors need to guarantee the allocated real-time property. As a result, performance can be easily guaranteed for a process that needs to guarantee real-time performance. Therefore, the media processing apparatus according to the present invention performs optimum processing for guaranteeing performance without cost for processing in which processing that requires real-time processing and processing that does not require real-time processing are mixed. Can do.

Further, the processes performed by the CPUs may be managed by the OS.
Thereby, the media processing apparatus in this invention can control easily the process which several CPU performs.

  The media processing unit may include a plurality of physical processors, and each physical processor may include a plurality of virtual processors that are performance-divided in time division by hardware control.

  Thereby, in the design stage of the media processing apparatus in the present invention, the processing capability of the media processing means can be easily changed by changing the number of physical processors of the media processing means.

Each virtual processor may correspond to an arbitrary physical processor.
Thus, the media processing apparatus according to the present invention can easily perform allocation control even if the number of physical processors of the media processing means is changed. In media processing, the processing capabilities of a plurality of physical processors of the media processing means can be used effectively.

  The physical processors may be formed using at least one of the same function description, the same netlist, and the same shape layout mask.

  Thereby, the physical processor which a media processing means has can be used for design as an IP core. Thereby, the number of physical processors included in the media processing means can be easily changed in the design stage. Therefore, at the design stage, the processing capability of the media processing means can be changed to be scalable as required.

  Each CPU may be formed using at least one of the same function description, the same netlist, and the same shape layout mask.

  Thereby, CPU which control means has can be used for design as an IP core. As a result, the number of CPUs included in the control means can be easily changed in the design stage. Therefore, at the design stage, the processing capability of the control means can be changed in a scalable manner as required.

  The media processing may include at least one of compression or expansion of a video stream or an audio stream.

  Accordingly, the media processing apparatus according to the present invention performs processing including at least one of compression or expansion of the video stream or the audio stream, and the media processing means performs processing using a plurality of virtual processors. Further, the control means has a plurality of CPUs. As a result, the CPU performs single processing that does not require real-time processing, and the media processing means does not need to perform single processing that does not require real-time processing. Therefore, the media processing unit does not have to have a high processing capability higher than the processing capability necessary for media processing. That is, the cost of the media processing device can be reduced. Therefore, it is possible to perform an optimum process of guaranteeing the performance of the processing including at least one of the compression or expansion of the video stream or the audio stream without incurring the cost for the processing capability of the media processing unit. Therefore, the media processing device according to the present invention can optimally process a process including at least one of compression or expansion of a video stream or an audio stream and including processes having different processing characteristics.

The media processing apparatus may be formed on a single semiconductor substrate.
Thereby, the media processing apparatus in the present invention can be formed as a system LSI.

  The present invention can provide a media processing apparatus that performs optimum processing for guaranteeing performance without cost for processing having different processing characteristics.

  DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of a media processing apparatus according to the present invention will be described in detail with reference to the drawings.

(Embodiment 1)
The media processing apparatus according to the present embodiment has a plurality of processes in which real-time processing is required (hereinafter referred to as “real-time processing”). Processed by the virtual processor. Also, a plurality of CPUs included in the microcomputer block process a process that does not require real-time processing (hereinafter referred to as “non-real-time process”). Thereby, the media processing apparatus in this Embodiment can perform the optimal process of guaranteeing the performance of a real-time process and a non-real-time process without incurring cost.

FIG. 1 is a block diagram showing a configuration of a media processing apparatus according to the present embodiment.
The media processing apparatus shown in FIG. 1 is a one-chip system LSI formed on a semiconductor substrate that performs media processing of media signals such as video signals or audio signals, and includes a microcomputer block 1, a media processing block 2, and a stream. An I / O block 3, an AVI / O (Audio Visual Input Output) block 4, and a memory control block 5 are provided.

  The microcomputer block 1 includes a plurality of CPUs 6a, 6b, and 6c (in the case where the CPUs 6a, 6b, and 6c are not particularly distinguished from each other, they are represented as CPU 6). The microcomputer block 1 is equipped with an OS corresponding to a multiprocessor and controls the entire media processing apparatus. That is, the microcomputer block 1 controls the start and stop of media processing in the media processing block 2 via the control bus 9a. Further, the microcomputer block 1 controls input / output of signals of the stream I / O block 3, the AVI / O block 4 and the memory control block 5.

  Each CPU 6 performs assigned processing. Further, the processing of each CPU 6 is managed by an OS corresponding to the multiprocessor. For example, when the present media processing apparatus is mounted on an AV device such as a DVD recorder, the processing assigned to each CPU includes menu display based on user operations and the like, and user operations related to recording and playback (start, end, pause) Non-real time processing such as start processing, end processing, and pause processing of the real time task to the media processing block 2 based on fast forward playback and reverse playback).

  The media processing block 2 includes a processor block 7 and performs real-time processing such as compression or expansion of image / audio data such as a compressed image / audio stream under the control of the microcomputer block 1. The real-time processing includes, for example, audio compression processing, audio expansion processing, moving image compression processing, moving image expansion processing, and videophone processing.

  The processor block 7 includes a plurality of virtual processors 8a and 8b (in the case where the plurality of virtual processors 8a and 8b are not particularly distinguished, they are represented as virtual processors 8).

  The virtual processor 8 is a virtual processor in which the physical processor of the processor block 7 is performance-divided by time division by hardware control. The virtual processor 8 performs assigned media processing. Note that the media processing assigned to each virtual processor 8 is real-time processing.

  The stream I / O block 3 sends a stream signal input from the outside to the memory control block 5 via the data bus 9b. Here, the stream signal is, for example, a compressed video / audio stream. A peripheral device such as a storage medium or a network is connected to the stream I / O block 3. The stream I / O block 3 receives a stream signal from the memory control block 5 via the data bus 9b and outputs it to the outside.

  The AVI / O block 4 processes a media signal such as an image signal or an audio signal input from the outside. The AVI / O block 4 sends the processed media signal to the memory control block 5 via the data bus 9c. The AVI / O block 4 receives a media signal from the memory control block 5 via the data bus 9c and performs processing. The AVI / O block 4 outputs the processed signal to the outside. The processing performed in the AVI / O block 4 is media signal processing such as A / D conversion, D / A conversion, or data format conversion. The AVI / O block 4 is connected to a display device or a speaker.

  The memory control block 5 exchanges data between the media processing device and an external memory connected to the outside of the media processing device. The memory control block 5 stores the stream signal or media signal input from the outside via the stream I / O block 3 or the AVI / O block 4 in the external memory. The memory control block 5 stores the signal processed by the media processing block 2 in an external memory. That is, the memory control block 5 receives the signal processed by the media processing block 2 via the data bus 9e and stores it in the external memory. The signal input to the stream I / O block 3 is received via the data bus 9b and stored in the external memory. The signal input to the AVI / O block 4 is received via the data bus 9c and stored in the external memory. Further, the memory control block 5 reads out a signal stored in the external memory and outputs it to the microcomputer block 1, the media processing block 2, the stream I / O block 3 and the AVI / O block 4.

  FIG. 2 is a diagram schematically showing a configuration of tasks stored in an external memory connected to the media processing device.

  The external memory 21 shown in FIG. 2 stores a real-time task group 22 that is a task that requires real-time performance and a non-real-time task group 23 that does not require real-time performance. Each real-time task in the real-time task group 22 is assigned to an arbitrary virtual processor 8 in the media processing block 2. Each non-real-time task in the non-real-time task group 23 is assigned to an arbitrary CPU 6 of the microcomputer block 1. The external memory 21 is, for example, an SDRAM.

  For example, as shown in FIG. 2, in the real-time task group 22, each real-time task has a processing content (program module) 24 and a cycle number 25. The number of cycles 25 is the number of clock cycles required for each period in order to guarantee the performance of each real-time task. For the real-time task, in the processor block 7, a virtual processor 8 having a processing capability corresponding to the value of the cycle number 25 is formed. For example, in FIG. 2, in the task 26, the processing content 24 is image expansion and the number of cycles is 500. In this case, a virtual processor 8 having a processing capacity corresponding to 500 cycles is formed for each period, and a task 26 is assigned.

  FIG. 3 is a diagram showing task assignment of the media processing device in the present embodiment. When processing the tasks 26, 27 and 28 shown in FIG. 2, the processor block 7 forms three virtual processors 8a, 8b and 8c as shown in FIG. Here, one cycle (time unit used for processing of tasks 26, 27 and 28) is 1000 cycles. The processing capacity of the processor block 7 is expressed as 100%. In this case, since the cycle number 25 of the task 26 is 500 cycles, the processing capacity of the virtual processor 8a to which the task 26 is assigned is set to 50%. Since the number of cycles 25 of the task 27 is 200, the processing capacity of the virtual processor 8b to which the task 27 is assigned is set to 20%. Since the number of cycles 25 of the task 28 is 300 cycles, the processing capacity of the virtual processor 8c to which the task 28 is assigned is 30%. In this way, the media processing block 2 forms a virtual processor 8 having necessary processing capability for each task and performs processing. Therefore, the media processing apparatus according to the present embodiment does not need to leave a margin for the processing capability of the media processing block 2, and can allocate almost all of the processing capability to the real-time processing. In other words, the media processing block 2 can perform processing with an optimal virtual processor for the processing capability required for each task.

  FIG. 4 is a diagram illustrating processing timings of the plurality of virtual processors 8a, 8b, and 8c in the present embodiment. As shown in FIG. 4, media processing by the virtual processors 8 a, 8 b, and 8 c is performed by dividing one cycle into a plurality of time slots and assigning each time slot to each virtual processor 8. That is, each virtual processor 8a, 8b, and 8c is assigned a time slot according to the processing capability required for the assigned task. Each time slot is formed from a plurality of clock cycles. For example, as shown in FIG. 4, a time slot of 500 cycles corresponding to 50% of one cycle is allocated to the virtual processor 8a. The virtual processor 8b is assigned a 200-cycle time slot corresponding to 20% of one cycle. The virtual processor 8c is assigned a time slot of 300 cycles corresponding to 30% of one cycle. The media processing device according to the present embodiment can maintain the load balance of the processes executed by the virtual processors 8a, 8b and 8c by managing the time slots. That is, by assigning a time slot corresponding to the processing time required for the task assigned to each virtual processor 8 to each virtual processor 8, it is possible to easily control the process assignment. As a result, performance can be easily guaranteed in a process that requires real-time performance.

  A plurality of non-real-time tasks included in the non-real-time task group 23 stored in the external memory 21 shown in FIG. 2 are assigned to the plurality of CPUs 6 of the microcomputer block 1 and processed. For example, the processing content (program module) 29 of each non-real-time task of the non-real-time task group 23 is a recording start process in the task 30, a menu screen display in the task 31, and a recording end process in the task 32. . If processing of these non-real-time non-real-time tasks is performed in the media processing block 2, an excessive load is applied to the media processing block 2, and sufficiently high processing capacity is required to guarantee the performance of real-time processing. Become. In the media processing apparatus according to the present embodiment, each non-real time task of the non-real time task group 23 is assigned to each CPU 6 of the microcomputer block 1 for processing, so that no extra load is applied to the media processing block 2. Therefore, the processing capability of the media processing block 2 can be suppressed to the minimum necessary, and the cost can be reduced.

  As described above, in the media processing apparatus according to the present embodiment, the plurality of virtual processors 8 included in the processor block 7 of the media processing block 2 perform assigned real-time processing. As a result, it is possible to perform optimum processing for the processing capacity of the media processing block 2 and the processing amount required for the task to be processed. Therefore, the media processing device according to the present embodiment can easily guarantee performance for real-time processing. In the media processing apparatus according to the present embodiment, the plurality of CPUs 6 included in the microcomputer block 1 perform assigned non-real time processing. Thus, the media processing block 2 does not need to perform non-real time processing. Therefore, the media processing block 2 does not have to have a high processing capability higher than the processing capability necessary for media processing. That is, the cost of the media processing device can be reduced. Therefore, the media processing apparatus according to the present embodiment can perform an optimum process of guaranteeing performance without incurring costs for a process in which real-time processing and non-real-time processing are mixed. In other words, the media processing apparatus according to the present embodiment can perform an optimum process of guaranteeing performance without incurring costs for processes having different process characteristics.

  Although the media processing device according to the embodiment of the present invention has been described above, the present invention is not limited to this embodiment.

  For example, in the above description, processing that does not require real-time processing is assigned to the CPU 6 of the microcomputer block 1, but all processing that does not require real-time processing need not be assigned to the CPU 6. For example, a part or all of the processing that does not require real-time property may be assigned to one or a plurality of virtual processors 8 having fixed processing performance to perform the processing.

  In the above description, the media processing apparatus includes the memory control block 5 and the external memory 21 is connected.

  In the above description, the media processing apparatus is a one-chip LSI, but it may be formed of a plurality of chips.

  In the above description, each real-time task in the real-time task group 22 includes the number of cycles 25. However, the information is not limited to this as long as the processing amount of each real-time task can be determined. For example, it may be stored as processing amount information, or may be stored as a ratio to the processing capacity of the processor block 7.

(Embodiment 2)
The media processing apparatus according to the first embodiment includes one processor block 7 in the media processing block. In the second embodiment, a media processing apparatus including a plurality of processor blocks 7 in the media processing block will be described. .

  FIG. 5 is a block diagram illustrating a configuration of the media processing device according to the second embodiment. Elements similar to those of the media processing apparatus according to Embodiment 1 shown in FIG. 1 are denoted by the same reference numerals, and detailed descriptions thereof are omitted.

  As shown in FIG. 5, the media processing apparatus according to the second embodiment includes a plurality of processor blocks 7a, 7b and 7c in the media processing block 2 (if the processor blocks 7a, 7b and 7c are not particularly distinguished, the processor (Represented as block 7). The media processing block 2 in the second embodiment includes a plurality of processor blocks 7, but each virtual processor 8 corresponds to an arbitrary processor block 7.

  FIG. 6 is a diagram showing the allocation of processing to the virtual block 8 for a plurality of processor blocks 7. As shown in FIG. 6, the case where the media processing block 2 includes two processor blocks 7a and 7b will be described. In addition, the processing capacity of the processor blocks 7a and 7b is expressed as 100%. When a plurality of virtual processors 8a, 8b, 8c and 8d are formed in the processor blocks 7a and 7b, each virtual processor 8a, 8b, 8c and 8d has 200% which is the total processing capacity of the processor blocks 7a and 7b. The tasks 10a, 10b, 10c and 10d to be processed can be assigned according to the processing capacity required. That is, each virtual processor 8 according to the processing capability required for the tasks 10a, 10b, 10c and 10d can be formed in arbitrary processor blocks 7a and 7b. Thereby, even when there are a plurality of processor blocks 7, the assignment control to each virtual processor 7 is not complicated, and the assignment control can be easily performed as in the case of one virtual processor 7. .

  As described above, even when the number of the processor blocks 7 of the media processing block 2 is changed, the allocation control can be easily performed. In media processing, the processing capabilities of the plurality of processor blocks 7 of the media processing block 2 can be used effectively. In the design stage, the processor block 7 can be used as an IP core. That is, the processor block 7 is formed using at least one of the same function description, the same netlist, and the same shape layout mask. By using the same function description, the number of processor blocks 7 can be easily changed in the logic level design. By using the same netlist, the number of processor blocks 7 can be easily changed in circuit level design. Further, by using the same layout mask, the number of processor blocks 7 can be easily changed in layout design. By changing the number of processor blocks 7, the processing capability of the media processing block 2 can be changed to be scalable. Therefore, the LSI circuit design and layout design including the media processing apparatus according to the second embodiment can be easily performed.

  Similarly to the processor block 7, the CPU 6 of the microcomputer block 1 can be used as an IP core. That is, the CPU 6 is formed using at least one of the same function description, the same netlist, and the same shape layout mask. By using the same function description, the number of CPUs 6 can be easily changed in the logic level design. By using the same netlist, the number of CPUs 6 can be easily changed in circuit level design. Also, by using the same layout mask, the number of CPUs 6 can be easily changed in layout design. In the design stage, the processing capability of the microcomputer block 1 can be changed in a scalable manner by changing the number of CPUs 6. That is, the LSI circuit design and layout design including the media processing apparatus according to the present invention can be easily performed.

  The present invention can be applied to a media processing apparatus, and in particular, can be applied to a media processing apparatus used for audiovisual equipment such as AV equipment, audio communication equipment, and video communication equipment.

1 is a block diagram of a media processing device in Embodiment 1. FIG. It is a figure which shows typically the structure of the task stored in the external memory. FIG. 6 is a diagram illustrating assignment of tasks to virtual processors in the first embodiment. It is a figure which shows the allocation of the time slot to a virtual processor. FIG. 10 is a block diagram of a media processing device in a second embodiment. FIG. 10 is a diagram illustrating assignment of tasks to virtual processors in the second embodiment. It is a block diagram of the conventional media processing apparatus.

Explanation of symbols

1,101 Microcomputer block 2 Media processing block 3 Stream I / O block 4 AVI / O block 5 Memory control block 6, 6a, 6b, 6c, 103, 103a, 103b, 103c CPU
7, 7a, 7b, 7c Processor block 8, 8a, 8b, 8c, 8d Virtual processor 9a Control bus 9b, 9c, 9d, 104 Data bus 10a, 10b, 10c, 10d, 26, 27, 28, 30, 31, 32 Tasks 21 External memory 22 Real-time task group 23 Non-real-time task group 24, 29 Processing content 25 Number of cycles 102 Data input / output unit

Claims (8)

A media processing block for performing media processing having one cycle which is a unit of processing consisting of a plurality of time slots;
A microcomputer block for controlling the media processing block,
The media processing block comprises a physical processor;
The physical processor includes a plurality of virtual processors,
The microcomputer block includes a CPU,
By assigning each of the plurality of virtual processors to each of the plurality of time slots, defining the performance to be assigned as the number of clock cycles, and switching the plurality of time slots executing the number of clock cycles defined by hardware control , Dividing the processing capacity of the media processing block into the plurality of virtual processors,
The CPU performs non-real-time processing that does not require real-time performance,
A media processing apparatus, wherein at least one of the plurality of virtual processors is assigned to non-real time processing, thereby assigning processing capacity equal to or greater than the processing capacity of the microcomputer block to non-real time processing. The microcomputer block is equipped with a multiprocessor OS and controls the entire system.
The media processing includes a plurality of processing,
Each of the virtual processors performs the assigned processing,
The media processing apparatus according to claim 1, wherein each virtual processor is assigned a time slot according to a processing capability necessary for each assigned process. The microcomputer block includes a plurality of CPUs,
The media processing apparatus according to claim 1, wherein each of the CPUs performs non-real time processing. The virtual processors other than the virtual processors assigned to the non-real time processing among the plurality of virtual processors perform processing that needs to guarantee real-time performance. Media processing device. The media processing block comprises a plurality of physical processors,
Each media processor is provided with a plurality of virtual processors by which performance division was carried out by time division by hardware control. The media processing device according to any one of claims 1 to 4 characterized by things. 6. The media processing apparatus according to claim 5, wherein each of the physical processors is formed using at least one of the same function description, the same netlist, and a layout mask having the same shape. The media processing device according to any one of claims 1 to 6, wherein the media processing includes at least one of compression or decompression of a video stream or an audio stream. The media processing apparatus according to claim 1, wherein the media processing apparatus is formed on a single semiconductor substrate.

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