CN104681585B - Organic LED display device and its manufacture method - Google Patents
Organic LED display device and its manufacture method Download PDFInfo
- Publication number
- CN104681585B CN104681585B CN201410693939.0A CN201410693939A CN104681585B CN 104681585 B CN104681585 B CN 104681585B CN 201410693939 A CN201410693939 A CN 201410693939A CN 104681585 B CN104681585 B CN 104681585B
- Authority
- CN
- China
- Prior art keywords
- area
- storage
- electrode
- grid
- semiconductor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 14
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- 238000003860 storage Methods 0.000 claims abstract description 225
- 239000004065 semiconductor Substances 0.000 claims abstract description 137
- 230000004888 barrier function Effects 0.000 claims abstract description 77
- 238000003851 corona treatment Methods 0.000 claims description 17
- 230000005611 electricity Effects 0.000 claims description 15
- 239000000758 substrate Substances 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 239000010409 thin film Substances 0.000 claims description 6
- 239000010408 film Substances 0.000 claims description 4
- 229920002120 photoresistant polymer Polymers 0.000 claims description 3
- 239000003795 chemical substances by application Substances 0.000 claims 4
- 238000001259 photo etching Methods 0.000 claims 4
- 239000010410 layer Substances 0.000 description 136
- 101150037603 cst-1 gene Proteins 0.000 description 35
- 101150076592 CST3 gene Proteins 0.000 description 9
- 238000009413 insulation Methods 0.000 description 8
- 239000004020 conductor Substances 0.000 description 7
- 239000000463 material Substances 0.000 description 7
- UGFAIRIUMAVXCW-UHFFFAOYSA-N Carbon monoxide Chemical compound [O+]#[C-] UGFAIRIUMAVXCW-UHFFFAOYSA-N 0.000 description 6
- 239000011810 insulating material Substances 0.000 description 6
- 230000009467 reduction Effects 0.000 description 6
- 230000008901 benefit Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 239000000956 alloy Substances 0.000 description 3
- 229910045601 alloy Inorganic materials 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 229910052738 indium Inorganic materials 0.000 description 3
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 241000208340 Araliaceae Species 0.000 description 2
- 241001269238 Data Species 0.000 description 2
- 241000196324 Embryophyta Species 0.000 description 2
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 2
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 2
- 235000003140 Panax quinquefolius Nutrition 0.000 description 2
- 229910018503 SF6 Inorganic materials 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 239000011651 chromium Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 235000008434 ginseng Nutrition 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 239000011777 magnesium Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 description 2
- 229960000909 sulfur hexafluoride Drugs 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N acrylic acid group Chemical group C(C=C)(=O)O NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- HXFVOUUOTHJFPX-UHFFFAOYSA-N alumane;zinc Chemical compound [AlH3].[Zn] HXFVOUUOTHJFPX-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- -1 for example Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910001195 gallium oxide Inorganic materials 0.000 description 1
- 230000005283 ground state Effects 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000027756 respiratory electron transport chain Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
- TYHJXGDMRRJCRY-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) tin(4+) Chemical compound [O-2].[Zn+2].[Sn+4].[In+3] TYHJXGDMRRJCRY-UHFFFAOYSA-N 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
- H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Geometry (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Electroluminescent Light Sources (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
Organic LED display device and its manufacture method.OLED display includes：First oxide semiconductor layer, it includes the firstth area to the 4th area；First insulating barrier, it is on first oxide semiconductor layer；First grid, it is overlapped on first insulating barrier and completely with firstth area；First storage electrode, it extends and overlapping with secondth area from the first grid；Second insulating barrier, it covers the first grid and first storage electrode and exposes the 3rd area and the 4th area；First source electrode and the first drain electrode, it is on second insulating barrier and contacts the 3rd area and the 4th area；Light emitting diode, it is connected to first drain electrode, wherein, a part in secondth area of the edge of first storage electrode in addition to the center of first storage electrode is conductive, to form the second storage electrode, first storage electrode, second storage electrode and first insulating barrier constitute the first storage.
Description
The korean patent application No.10-2013-0144341's submitted this application claims on November 26th, 2013 in South Korea
Benefit of priority, the patent application is herein incorporated by reference.
Technical field
The present invention relates to a kind of Organic Light Emitting Diode (OLED) display device, more specifically it relates to a kind of memory capacity
The OLED display and its manufacture method of raising.
Background technology
Recently, as society enters the information age, the electric signal of all kinds is shown as to all kinds of visual pattern
Display device be rapidly developed.For example, liquid crystal display (LCD) device and Organic Light Emitting Diode (OLED) display device quilt
Introduce extensively, the substitute as cathode ray tube type display device.
It is emissive type as the OLED display of novel flat-plate display device.OLED display has excellent regard
The characteristics such as angle, contrast.Further, since OLED display does not need backlight assembly, thus OLED display have it is low heavy
Amount and low-power consumption.In addition, OLED display has the advantages that the high speed of response, low production cost.In addition, OLED display
All elements be solid-state phase, the ability that OLED display resists external impact is strong.Especially, have in terms of production cost
There is big advantage.The manufacturing process of OLED display is very simple, it is necessary to depositing device and sealed in unit.
In active array type OLED device, for controlling the voltage of electric current of pixel to be charged in storage, make
The size for obtaining electric current is maintained, until next frame.
Fig. 1 is the circuit diagram of a pixel region of the OLED display of correlation technique.
As shown in fig. 1, OLED display includes select lines GL along a first direction, the data along second direction
Line DL, switching thin-film transistor (TFT) Tsw, storage Cst, driving TFT Tdr and light emitting diode E.Select lines GL and
Data wire DL is intersected with each other to limit pixel region P.
Switch TFT Tsw are arranged on select lines GL and data wire DL cross section and are connected to select lines GL and data
Line DL.Driving TFT Tdr are electrically connected to switch TFT Tsw.
Driving TFT Tdr and storage Cst are connected to switch TFT Tsw and high level voltage VDD.Light emitting diode
E is connected to driving TFT Tdr and low level voltage VSS.
When switch TFT Tsw when being turned on by the gating signal that select lines GL applies, the data from data wire DL
Signal is applied to driving TFT Tdr grid and storage Cst electrode.When driving TFT Tdr factor datas signals and
During conducting, electric current is supplied from high level voltage VDD to light emitting diode E.As a result, light emitting diode E lights.In such case
Under, when driving TFT Tdr conductings, the size to light emitting diode E electric current is determined so that light emitting diode E can be produced
GTG.
Storage Cst is used for the voltage that driving TFT Tdr grid is kept when switching TFT Tsw cut-offs.Therefore,
Even if switching TFT Tsw cut-offs, the size to light emitting diode E electric current is also maintained to next frame.
In order to produce high-definition display device, it should increase the quantity of the pixel region P in unit area.That is, in high score
In resolution display device, pixel region P size reduces.
When pixel region P size reduces, storage Cst size also reduces, so that storage capacitance reduces.
When increasing storage Cst size to provide high storage capacitance, aperture ratio reduces.
The content of the invention
Therefore, this invention address that caused by a kind of limitation substantially eliminated due to correlation technique and shortcoming one or
The OLED display of more problems.
The supplementary features and advantage of the present invention will illustrate in the description that follows and according to description will part become it is aobvious and
It is clear to, or can be learnt by the practice of the present invention.Will be by special in written description and its claims and accompanying drawing
The structure pointed out realize and obtain the present invention these and other advantage.
According to the present invention, as implemented herein and be broadly described, a kind of organic LED display device includes：The
Monoxide semiconductor layer, it includes the firstth area to the 4th area；First insulating barrier, it is in first oxide semiconductor layer
On；First grid, it is overlapped on first insulating barrier and completely with firstth area；First storage electrode, it is from institute
State first grid extension and overlapping with secondth area；Second insulating barrier, it covers the first grid and described first and deposited
Storing up electricity pole and the 3rd area and the 4th area are exposed；First source electrode and first drain electrode, its on second insulating barrier simultaneously
And contact the 3rd area and the 4th area；Light emitting diode, it is connected to first drain electrode, wherein, except described
The part in secondth area of the edge of first storage electrode outside the center of the first storage electrode be it is conductive,
To form the second storage electrode, and first storage electrode, second storage electrode and first insulating barrier are constituted
First storage.
On the other hand, a kind of method for manufacturing organic LED display device, this method includes：The shape on substrate
Into oxide semiconductor layer；Form the first insulating pattern and grid in the firstth area of the oxide semiconductor layer, and
The second insulating pattern and the first storage electrode are formed in secondth area of the oxide semiconductor layer；By performing at plasma
Reason, reduces the part in secondth area on the inside of the edge of first storage electrode；Form insulating barrier, the insulating barrier
By the 3rd area and the 4th area in firstth area both sides of the oxide semiconductor layer expose and cover the grid and
First storage electrode；Source electrode and the drain electrode for contacting the 3rd area and the 4th area are formed on the insulating barrier；With
And formed and the light emitting diode for draining and being connected.
It is appreciated that overall description and described in detail below being all exemplary and illustrative and being intended to requiring above
The present invention of protection, which is provided, to be further illustrated.
Brief description of the drawings
Accompanying drawing is included to provide a further understanding of the present invention, is incorporated in this specification and constitutes the one of this specification
Part, accompanying drawing shows embodiments of the present invention and is used to illustrate principle of the invention together with the description.
Fig. 1 is the circuit diagram of a pixel region of the OLED display of correlation technique.
Fig. 2 is the circuit diagram of the OLED display according to the present invention.
Fig. 3 is the plan of a part for OLED display according to the first embodiment of the invention.
Fig. 4 A and Fig. 4 B are the plan and sectional view of the first storage in Fig. 3 respectively.
Fig. 5 is the sectional view intercepted along V-V' lines in Fig. 3.
Fig. 6 is the sectional view intercepted along VI-VI' lines in Fig. 3.
Fig. 7 is for illustrating plan the problem of in storage.
Fig. 8 A to Fig. 8 D are the sectional views for the manufacturing process for showing the first storage.
Fig. 9 is the plan of a part for OLED display second embodiment of the invention.
Figure 10 is the plan of the 3rd storage in Fig. 9.
Figure 11 is the sectional view intercepted along XI-XI' lines in Fig. 9.
Embodiment
Now, the preferred embodiment of the present invention is reference will now be made in detail to, the example of these embodiments is shown in the drawings.
Fig. 2 is the circuit diagram of the OLED display according to the present invention.
As shown in Figure 2, switching thin-film transistor is included in a pixel region according to the OLED display of the present invention
(TFT) Ts, driving TFT Td, with reference to TFT Tr, storage Cst and light emitting diode E.
In more detail, the select lines GL extended along a first direction and the data wire DL extended along second direction are handed over each other
Fork, to limit pixel region.Apply the power line VDD of high level voltage and to reference to TFT Tr in addition, being formed to driving TFT Td
Apply the reference line RL of reference voltage.
In each pixel region, switch TFT Ts, driving TFT Td are formed, with reference to TFT Tr, storage Cst and luminous
Diode E.
Switch TFT Ts grid and source electrode is connected respectively to select lines GL and data wire DL, to receive gating signal sum
It is believed that number.Driving TFT Td grid is connected to switch TFT Ts drain electrode.
Driving TFT Td drain electrode is connected to (that is, positive with reference to TFT Tr drain electrode and light emitting diode E first electrode
Pole), driving TFT Td source electrode is connected to power line VDD.Light emitting diode E second electrode (that is, negative electrode) is connected to low electricity
Ordinary telegram pressure.
Select lines GL is connected to reference to TFT Tr grid, reference line RL is connected to reference to TFT Tr source electrode.It can change
Source electrode and the position of drain electrode with reference to TFT " Tr ".That is, the source electrode with reference to TFT Tr is connected to driving TFTTd drain electrode, reference
TFT Tr drain electrode is connected to reference line RL.In addition, the grid with reference to TFT Tr may be connected to another signal line, and it is not connected to
To select lines GL.
Storage Cst includes the first storage Cst1 (in Fig. 3) and second storage Cst2 (Fig. 3
In).
First storage Cst1 the first storage electrode is electrically connected to switch TFT Ts drain electrode and driving TFT Td
Grid, the first storage Cst1 the second storage electrode is electrically connected to driving TFT Td drain electrode.
In addition, the second storage Cst2 the first storage electrode is electrically connected to driving TFT Td drain electrode, second deposits
Storing up electricity container Cst2 the second storage electrode is electrically connected to switch TFT Ts drain electrode and driving TFT Td grid.
Switch TFT Ts are switched because of gating signal, are provided data-signal with the grid to driving TFT Td, are driven TFT
Td factor data signals are switched, to control the electric current for being passed through light emitting diode E.Electric current for controlling light emitting diode E
Voltage is charged in storage Cst so that the size of electric current is maintained to next frame.
When switch TFT Ts by the gating signal that select lines GL applies when being turned on, the data from data wire DL are believed
Number it is applied to driving TFT Td grid so that driving TFT Td conductings.When driving TFT Td factor datas signals and turn on,
Electric current is supplied from power line VDD to light emitting diode E.As a result, light emitting diode E lights.In this case, as driving TFT
When Td is turned on, the size to light emitting diode E electric current is determined so that light emitting diode E can produce GTG.
Storage Cst is used for the voltage that driving TFT Td grid is kept when switching TFT Tsw cut-offs.Therefore,
Even if switching TFT Tsw cut-offs, the size to light emitting diode E electric current is also maintained to next frame.
When with reference to TFT Tr conductings, driving TFT Td drain electrode is connected to reference to TFT Tr drain electrode so that driving TFT
Td characteristic deviation reduces.That is, because the characteristic deviation for driving TFT Td is reduced to most because there is three TFT in a pixel region
It is small, therefore the aperture ratio raising of OLED display.On the other hand, it can omit and refer to TFTTr.
In the present invention, storage Cst storage capacitance increases or is maximized, and aperture ratio does not reduce.Knot
There is provided the high-resolution OLED display that aperture ratio is improved for fruit.Further, since driving TFT Td deviation reduces, thus it is anti-
The luminance difference of OLED display is stopped.
Fig. 3 is the plan of a part for OLED display according to the first embodiment of the invention, Fig. 4 A and figure
4B is the plan and sectional view of the first storage in Fig. 3 respectively.
As shown in Figure 3, in OLED display according to the first embodiment of the invention, select lines GL and data
Line DL is intersected with each other, to limit pixel region.In addition, power line VDD and data wire DL are separated and parallel to data wire DL, with
Intersect with select lines GL, reference line RL and select lines GL are separated and parallel to select lines GL, with data wire DL and electric power
Line VDD intersects.
In each pixel region, switch TFT Ts (in Fig. 2), driving TFT Td (in Fig. 2) are formed, with reference to TFT Tr (Fig. 2
In), storage Cst (in Fig. 2) and light emitting diode E (in Fig. 2).
TFT Td are driven to include the first oxide semiconductor layer 110, first grid 142, the first source electrode 162 and the first drain electrode
164, switch TFT Ts include the second oxide semiconductor layer 120, second grid 144, the second source electrode 166 and the second drain electrode 168.
With reference to the Fig. 5 for the sectional view intercepted along V-V' lines for being Fig. 3, the firstth area of the first oxide semiconductor layer 110
111 contact the respectively with the overlapping raceway groove to serve as driving TFT Td of first grid 142, the first source electrode 162 and the first drain electrode 164
The 3rd area 113 and the 4th area 114 in the both sides of the firstth area 111 of monoxide semiconductor layer 110.In this case, first
Oxide semiconductor material in 3rd area 113 of oxide semiconductor layer 110 and the 4th area 114 is reduced so that the 3rd area
113 and the conductive matter in the 4th area 114.
That is, the first gate insulation layer 130 and first grid 142 are stacked on the first area 111 of the first oxide semiconductor layer 110
On, and the second insulating barrier 150 is formed to cover first grid 142, the second insulating barrier 150 is included the first oxide half respectively
The first semiconductor interface contact hole 151 and the second semiconductor interface contact hole that 3rd area 113 of conductor layer 110 and the 4th area 114 expose
152.First source electrode 162 and the first drain electrode 164 form on the second insulating barrier 150 and pass through the first semiconductor interface contact hole respectively
151 and second semiconductor interface contact hole 152 contact the first oxide semiconductor layer 110 the 3rd area 113 and the 4th area 114.At this
Plant under situation, in the step of forming the first insulating barrier 130 and first grid 142, the 3rd of the first oxide semiconductor layer 110 the
It is each because corona treatment is reduced into conduction in area 114 of area 113 and the 4th.First insulating barrier 130 can be that grid are exhausted
Edge layer, the second insulating barrier 150 can be interlayer insulating film.
With reference to the Fig. 6 for the sectional view intercepted along VI-VI' lines for being Fig. 3, the first of the second oxide semiconductor layer 120
Area 121 and the overlapping raceway groove to serve as switch TFT Ts of second grid 144, the second source electrode 166 and the second drain electrode 168 are contacted respectively
Second oxide semiconductor layer 120 in the second area 122 of the both sides of the firstth area 121 and the 3rd area 123.In this case,
Oxide semiconductor material in second area 122 of dioxide semiconductor layer 120 and the 3rd area 123 is reduced so that second
The conductive matter in 122 and the 3rd area of area 123.
That is, the first gate insulation layer 130 and second grid 144 are stacked on the first area 121 of the second oxide semiconductor layer 120
On, and the second insulating barrier 150 is formed to cover second grid 144, the second insulating barrier 150 also includes respectively by the second oxide
The 3rd semiconductor interface contact hole 153 and the 4th semiconductor interface contact hole that second area 122 of semiconductor layer 120 and the 3rd area 123 expose
154.Second source electrode 166 and the second drain electrode 168 form on the second insulating barrier 150 and pass through the 3rd semiconductor interface contact hole respectively
153 and the 4th semiconductor interface contact hole 154 contact the second oxide semiconductor layer 120 the second area 122 and the 3rd area 123.At this
Plant under situation, in the step of forming the first insulating barrier 130 and second grid 144, the second of the second oxide semiconductor layer 120
It is each because corona treatment is reduced into conduction in area 123 of area 122 and the 3rd.
Fig. 3 is referred again to, includes trioxide semiconductor layer, the 3rd grid 148, the and of the 3rd source electrode 172 with reference to TFT Tr
3rd drain electrode 174.In figure 3, it is identical with reference to TFT Tr the 3rd drain electrode 174 and driving TFT Td the first drain electrode 164
Element.Alternatively, it is formed as being separated from each other with reference to TFT Tr the 3rd drain electrode 174 and driving TFT Td the first drain electrode 164
And it is electrically connected to each other by connecting pattern.In addition, in figure 3, trioxide semiconductor layer is the first oxide semiconductor
A part for layer 110.Alternatively, trioxide semiconductor layer can be formed to separate with the first oxide semiconductor layer 110.
Fig. 5 is referred again to, the 6th area 116 of the first oxide semiconductor layer 110 and the 3rd grid 148 overlap to serve as reference
TFT Tr raceway groove, the 3rd source electrode 172 and the 3rd drain electrode 174 contact respectively the first oxide semiconductor layer 110 in the 6th area
4th area 114 of 116 both sides and SECTOR-SEVEN 117.One end of 3rd source electrode 172 passes through the 5th semiconductor interface contact hole 156 contact the
Monoxide semiconductor layer 110, the other end of the 3rd source electrode 172 contacts reference line RL by reference to contact hole 157.In this feelings
Under shape, the oxide semiconductor material in the 4th area 114 and SECTOR-SEVEN 117 of the first oxide semiconductor layer 110 is reduced, and is made
Obtain the 4th area 114 and the conductive matter of SECTOR-SEVEN 117.
Fig. 3 is referred again to, switch TFT Ts are electrically connected to select lines GL and data wire DL and are arranged on select lines GL sums
According to line DL cross section.That is, the second grid 144 of switch TFT Ts is connected to select lines GL, switch TFT Ts the second source
Pole 166 is connected to data wire DL.
Driving TFT Td first grid 142 is electrically connected to switch TFT Ts the second drain electrode 168.That is, from switch TFT
The Ts extension 170 of the extension of the second drain electrode 168 and driving TFT Td first grid 142 are carried out by grid contact hole 155
Contact so that driving TFT Td first grid 142 is electrically connected to switch TFT Ts the second drain electrode 168.In more detail, switch
The extension 146 of the contact of the extension 170 driving TFT Td of TFT Ts the second drain electrode 168 first grid 142.Separately
Outside, driving TFT Td the first source electrode 162 is connected to power line VDD, and driving TFT Td the first drain electrode 164 is connected to reference
TFT Tr the 3rd drain electrode 174.
In figure 3, TFT Td are driven and TFT Tr common drains are referred to.Alternatively, driving TFT Td the first drain electrode 164
It can be formed to be separated and can electrically connect with the 3rd drain electrode 174 with reference to TFT Tr.
Select lines GL is connected to reference to TFT Tr the 3rd grid 148, ginseng is connected to reference to TFT Tr the 3rd source electrode 172
Examine line RL.
First grid 142, the grid 148 of second grid 144 and the 3rd, the extension 146 of first grid 146, the first source
Pole 162, the second source electrode 166 and the 3rd source electrode 172, first drain electrode the 164, second drain electrode 168 and the 3rd drain electrode 172, second drain
168 extension 170 include low-resistance metal material, for example, aluminium (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr) and
Their alloy.
Light emitting diode E is connected to driving TFT Td the first drain electrode 164 and including anode, organic luminous layer and the moon
Pole.For example, anode is connected to driving TFT Td the first drain electrode 164.In OLED display, the light from organic luminous layer
Through anode and substrate 101 or through negative electrode.That is, OLED display is bottom emissive type or top emission structure.
Anode includes the conductive material of relatively high work function, and negative electrode includes the conductive material of relatively low work function.For example, positive
Pole may include the transparent conductive material of such as indium tin oxide (ITO) or indium-zinc oxide (IZO).Negative electrode may include Al, magnesium
(Mg), silver-colored (Ag), golden (Au) and their alloy.
In top emission structure OLED display, negative electrode has relatively small thickness, with about 45% to 50%
Light transmittance.In addition, in top emission structure OLED display, anode may also include the anti-of opaque reflective conductive material
Penetrate layer.For example, reflecting layer includes aluminium-palladium-copper (APC) alloy, anode may include ITO/APC/ITO three-decker.
Organic luminous layer has single layer structure.On the other hand, in order to strengthen luminous efficiency, organic luminous layer may include to stack
The sandwich construction of hole injection layer, hole transmission layer, luminous material layer, electron transfer layer and electron injecting layer on anode.
Organic luminous layer includes emitting red light pattern, green emitting pattern and blue-light-emitting pattern in pixel region.
In Organic Light Emitting Diode E, the hole from anode and the electronics from negative electrode are combined in organic luminous layer,
To produce exciton.Exciton is transformed into ground state from excitation state so that organic luminous layer lights.
Organic Light Emitting Diode E may be formed to be formed with above driving TFT Td substrate 101 (in Fig. 5) above, or
It may be formed on the opposing substrate (counter substrate, not shown) of substrate 101.
Storage Cst includes the first storage Cst1.A part for first oxide semiconductor layer 110 and
The extension of one grid 142 is overlapped, to form the first storage Cst1.
Reference picture 4A and Fig. 4 B, the first storage Cst1 include the side of the extension 146 as first grid 142
First storage electrode 149 of edge point and as the first semiconductor layer 110 the second area 112 marginal portion the second storage electricity
Pole 118.During the step of forming extension 146 of first grid 142 or after this, the first oxide semiconductor layer
110 are reduced because of corona treatment.In this case, stop is served as due to the extension 146 of first grid 142 to cover
Edge part in mould, therefore the second area 112 of the first oxide semiconductor layer 110 in addition to the core in the second area 112
Divide and be reduced into conduction.That is, because the core in the second area 112 is exhausted by the extension 146 and first of first grid 142
Edge layer 130 stops, therefore the core in the second area 112 is not reduced and keeps non-conductive property.
The width that second storage electrode 118 is started at from the edge termination of the extension 146 of first grid 142 is about
1.5 micron.
Therefore, as first grid 142 extension 146 marginal portion the first storage electrode 149, deposit with first
Second storage electrode of the marginal portion in overlapping the second area 112 as the first oxide semiconductor layer 110 in storing up electricity pole 149
118 and first the first insulating barrier 130 between storage electrode 149 and the second storage electrode 118 constitute the first storage
Cst1。
In addition, storage Cst also includes the second storage Cst2.Reference picture 5 and Fig. 6, the second storage capacitance
Device Cst2 includes the 3rd storage electrode in the 5th conductive area 115 as the first oxide semiconductor layer 110, as the second leakage
4th storage electrode of the extension 170 of pole 168 and be used as between the 3rd storage electrode and the 4th storage electrode electricity Jie
Second insulating barrier 150 of matter layer.
In the OLED display of the present invention, due to Cst2 points of the first storage Cst1 and the second storage
The second area 112 and the 5th area 115 of the first oxide semiconductor layer 110 are not used as the second storage electrode and the 3rd storage electricity
Pole, so storage capacitance increases or is maximized, and aperture ratio does not reduce.
In this case, the edge of the extension 146 due to the first storage Cst1 along first grid 142
Part is formed, therefore the area of the first storage electrode 149 and the second storage electrode 118 is relatively small.However, due to being deposited as first
First insulating barrier 130 of storing up electricity container Cst1 dielectric layer has relatively small thickness, therefore the first storage Cst1
With enough storage capacitances.
Second storage Cst2 includes being used as the dielectric layer between the 3rd storage electrode and the 4th storage electrode
Second insulating barrier 150, and the first storage Cst1 include as the first storage electrode 149 and the second storage electrode 118 it
Between dielectric layer the first insulating barrier 130.First insulating barrier 130 is formed by inorganic insulating material and with first thickness.
Second insulating barrier 150 is formed by organic insulation and with the second thickness bigger than first thickness.Therefore, although first deposits
Storing up electricity container Cst1 the first storage electrode 149 and the area of the second storage electrode 118 are less than the second storage Cst2's
The area of 3rd storage electrode and the 4th storage electrode, but the first storage Cst1 and the second storage Cst2 have
Identical storage capacitance on approximately or substantially.
In more detail, the first insulating barrier 130 formed by inorganic insulating material (for example, Si oxide or silicon nitride) and
With about 100 angstroms to 200 angstroms of first thickness.On the other hand, the second insulating barrier 150 by organic insulation (for example, photosensitive
Acrylic, photo-acryl) formed and with about 300 angstroms to 600 angstroms of second thickness.In order that in source electrode and drain electrode
Each parasitic capacitance between grid it is minimum and ladder difference of with following element is minimum, with organic insulation by the
It is thicker that two insulating barriers 150 are formed.
First insulating barrier 130 and the second insulating barrier 150 each act as the first storage Cst1 and the second storage capacitance
Device Cst2 dielectric layer, storage capacitance " C " is provided with following equation：
C=ε × A/d
(ε：Dielectric constant, A：The area of storage electrode, d：The distance between storage electrode)
Storage capacitance " C " is directly proportional and electric with storage to the dielectric constant " ε " of storage electrode area " A " and dielectric layer
" d " is inversely proportional for the distance between pole.Electrode area " A " is bigger, and dielectric constant " ε " is the distance between high and storage electrode " d "
It is smaller, storage capacitance " C " increase.
IncludingExtremelyFirst thickness the first insulating barrier 130 the first storage Cst1 in
The distance between one storage electrode 149 and the second storage electrode 118 are to includeExtremelySecond thickness second
About the three of the distance between the 3rd storage electrode and the 4th storage electrode in second storage Cst2 of insulating barrier 150
/ mono- (1/3).Therefore, when the first storage Cst1 area is equal to the second storage Cst2 area, the
One storage Cst1 storage capacitance is three times of the second storage Cst2 storage capacitance.
Therefore, although the first storage Cst1 area is less than the second storage Cst2 area, the
One storage Cst1 has enough storage capacitances.As a result, in the case where the reduction of aperture ratio is minimized, storage
Electric capacity is maximum.
Fig. 4 A are referred again to, the first storage Cst1 formation is in a part for the first oxide semiconductor layer 110.
Under this situation, driving TFT Td current path should be not stored capacitor Cst1 stops.That is, first grid 142
Extension 146 including the first storage electrode 149 is not across the first oxide semiconductor layer 110.In other words, in driving
The both sides of the extension 146 of first grid 142 in TFT Td current path are arranged on the first oxide semiconductor layer 110
It is internal.
For example, as shown in being used to illustrate Fig. 7 of plan the problem of in storage, when driving TFT Td electricity
The side of the extension 146 of first grid 142 in logical circulation road is across the first oxide semiconductor layer 110 to protrude past
During monoxide semiconductor layer 110, it is blocked from the electric current of the first source electrode 162 to the first drain electrode 164.In this case,
The extension 146 of one grid 142 acts also as driving TFT Td grid so that the second of the first oxide semiconductor layer 110
Serve as driving TFT Td raceway groove in area 112.As a result, required raceway groove is not provided, driving TFT Td property changes.
In order to prevent problem above, the extension 146 including the first storage electrode 149 of first grid 142 not across
Cross the first oxide semiconductor layer 110.
In other words, the second area 112 of the first oxide semiconductor layer 110 has the first length relative to first direction
" d1 ", first direction with first source electrode 162 and the first drain electrode 164 are connected along the first oxide semiconductor layer 110 second
Direction intersects, overlapping region (that is, the first storage electrode 149 between the area 112 of extension 146 and second of first grid 142
And the second overlapping region between area 112) there is the second length " d2 " relative to first direction.Second length " d2 " is less than first
Length " d1 ".
As shown in Figure 7, when the 3rd length " d3 " in the second area 112 be equal to the first storage electrode 149 and the second area 112 it
Between overlapping region the 4th length " d4 " when, the current path between the first source electrode 162 and the first drain electrode 164 is blocked so that
Drive TFT Td property-deterioration.
Fig. 8 A to Fig. 8 D are the sectional views for the manufacturing process for showing the first storage.
As shown in Figure 8 A, oxide semiconductor layer is deposited on the substrate 101 and is patterned by mask process,
Include first oxide semiconductor layer 110 (in Fig. 5) in the second area 112 to be formed.For example, oxide semiconductor material may include
Indium gallium zinc oxide (IGZO), indium tin zinc oxide (ITZO), indium-zinc oxide (IZO), indium gallium oxide (IGO) and indium aluminium zinc
One kind in oxide (IAZO).
Next, as seen in fig. 8b, inorganic insulating material layer 132 and metal level 134 are sequentially deposited in the first oxygen
In second area 112 of compound semiconductor layer 110, photoresist (photoresist, PR) pattern 190 is formed on metal level 134,
With the extension 146 corresponding to first grid 142 (in Fig. 5) (in Fig. 5).Inorganic insulating material layer 132 may include that silicon is aoxidized
Thing or silicon nitride.
Next, as seen in fig. 8 c, (the figure of inorganic insulating material layer 132 is etched using PR patterns 190 as etching mask
In 8B) and metal level 134 (in Fig. 8 B), to form the insulating barrier 130 of extension 146 and first of first grid 142.
Next, as seen in fig. 8d, using in PR patterns 190, the insulating barrier 130 of extension 146 and first at least
One, as mask is stopped, corona treatment is performed to the second area 112 of the first oxide semiconductor layer 110, to reduce the
Second area 112 of monoxide semiconductor layer 110.For example, corona treatment uses sulfur hexafluoride (SF6) gas or tetrafluoride
Second area 112 of the first oxide semiconductor layer of carbon (CF4) gas reduction 110.In this case, PR patterns are being eliminated
After 190, corona treatment can perform.
Due to that a part for the first oxide semiconductor layer 110 should be reduced by corona treatment, therefore first
The extension 146 of insulating barrier 130 and first grid 142 is of similar shape.That is, the first insulating barrier 130 and first grid
142 extension 146 has substantially the same island-like shape.
The first oxide semiconductor layer 110, the extension 146 of first grid 142 are reduced by using corona treatment
The first outside oxide semiconductor layer 110 is reduced.In addition, the gas reduction first grid 142 for passing through corona treatment
The lower section of extension 146 the first oxide semiconductor layer 110 interior section.That is, by corona treatment, the first oxygen
Second area 112 of compound semiconductor layer 110 is divided into the center 112a not being reduced and is reduced into the edge of conduction
Area 112b, marginal zone 112b serve as the second storage electrode 118 (Fig. 4 B).
Therefore it provides the first storage Cst1 including the first insulating barrier 130 as dielectric layer, OLED are shown
The reduction that the storage Cst of device has enough storage capacitances and aperture ratio is prevented from or is minimized.
Fig. 9 is the plan of a part for OLED display second embodiment of the invention.Figure 10 is Fig. 9
In the 3rd storage plan, Figure 11 is the sectional view intercepted along XI-XI' lines in Fig. 9.
As shown in FIG. 9 to 11, in OLED display second embodiment of the invention, select lines GL
It is intersected with each other with data wire DL, to limit pixel region.In addition, power line VDD and data wire DL is separated and parallel to data
Line DL, to intersect with select lines GL, reference line RL and select lines GL are separated and parallel to select lines GL, with data wire DL
Intersect with power line VDD.
In each pixel region, switch TFT Ts (in Fig. 2), driving TFT Td (in Fig. 2) are formed, with reference to TFT Tr (Fig. 2
In), storage Cst (in Fig. 2) and light emitting diode E (in Fig. 2).
TFT Td are driven to include the first oxide semiconductor layer 210, first grid 242, the first source electrode 262 and the first drain electrode
264, switch TFT Ts include the second oxide semiconductor layer 220, second grid 244, the second source electrode 266 and the second drain electrode 268.
First area's (not shown) of the first oxide semiconductor layer 210 overlaps to serve as driving TFT with first grid 242
Td raceway groove, the first source electrode 262 and the first drain electrode 264 contact (not showing in the firstth area for the first oxide semiconductor layer 210 respectively
Go out) the 3rd area of both sides and the 4th area's (not shown).In this case, the 3rd area of the first oxide semiconductor layer 210 and
Oxide semiconductor material in 4th area's (not shown) is reduced so that the 3rd area and the 4th area's (not shown) are conductive
Matter.
That is, the first gate insulation layer 230 and first grid 242 are stacked on the firstth area of the first oxide semiconductor layer 210 (not
Show) on, and the second insulating barrier 250 is formed to cover first grid 242, the second insulating barrier 250 is included respectively by the first oxygen
The first semiconductor interface contact hole 251 and the second semiconductor that 3rd area of compound semiconductor layer 110 and the 4th area's (not shown) expose
Contact hole 252.First source electrode 262 and the first drain electrode 264 form on the second insulating barrier 250 and pass through the first semiconductor respectively
The 3rd area and the 4th area that the semiconductor interface contact hole 252 of contact hole 251 and second contacts the first oxide semiconductor layer 210 (do not show
Go out).In this case, in the step of forming the first insulating barrier 230 and first grid 242, the first oxide semiconductor layer
It is each because corona treatment is reduced into conduction in 210 the 3rd area and the 4th area's (not shown).First insulating barrier 230
Can be gate insulation layer, the second insulating barrier 250 can be interlayer insulating film.
First area's (not shown) of the second oxide semiconductor layer 220 overlaps to serve as switch TFT with second grid 244
Ts raceway groove, the second source electrode 266 and the second drain electrode 268 contact (not showing in the firstth area for the second oxide semiconductor layer 220 respectively
Go out) the secondth area of both sides and the 3rd area's (not shown).In this case, the secondth area of the second oxide semiconductor layer 220 and
Oxide semiconductor material in 3rd area's (not shown) is reduced so that the secondth area and the 3rd area's (not shown) are conductive
Matter.
That is, the first gate insulation layer 230 and second grid 244 are stacked on the firstth area of the second oxide semiconductor layer 220 (not
Show) on, and the second insulating barrier 250 is formed to cover second grid 244, the second insulating barrier 250 also includes respectively by second
The 3rd semiconductor interface contact hole 153 and the 4th half that secondth area of oxide semiconductor layer 220 and the 3rd area's (not shown) expose is led
Body contact hole 154.Second source electrode 266 and the second drain electrode 268 are formed on the second insulating barrier 250 and led respectively by the 3rd half
The semiconductor interface contact hole 254 of body contact hole 253 and the 4th contacts the secondth area and the 3rd area of the second oxide semiconductor layer 220 (not
Show).In this case, in the step of forming the first insulating barrier 230 and second grid 244, the second oxide semiconductor
It is each because corona treatment is reduced into conduction in the secondth area and the 3rd area's (not shown) of floor 220.
Include trioxide semiconductor layer, the 3rd grid 248, the 3rd source electrode 272 and the 3rd drain electrode with reference to TFT Tr
274.In fig .9, it is identical element with reference to TFT Tr the 3rd drain electrode 274 and driving TFT Td the first drain electrode 264.It is alternative
Ground, is formed as being separated from each other and by even with reference to TFT Tr the 3rd drain electrode 274 and driving TFT Td the first drain electrode 264
Map interlinking case is electrically connected to each other.In addition, in fig .9, trioxide semiconductor layer is one of the first oxide semiconductor layer 210
Point.Alternatively, trioxide semiconductor layer can be formed to separate with the first oxide semiconductor layer 110.
The 6th area's (not shown) and the 3rd grid 248 of first oxide semiconductor layer 210 are overlapping to refer to TFT to serve as
Tr raceway groove, the 3rd source electrode 272 and the 3rd drain electrode 274 contact (not showing in the 6th area for the first oxide semiconductor layer 210 respectively
Go out) the 4th area's (not shown) and SECTOR-SEVEN (not shown) of both sides.One end of 3rd source electrode 272 passes through the 5th semiconductor interface contact hole
256 the first oxide semiconductor layers 210 of contact, the other end of the 3rd source electrode 272 contacts reference line by reference to contact hole 257
RL.In this case, the oxidation in the 4th area's (not shown) and SECTOR-SEVEN (not shown) of the first oxide semiconductor layer 210
Thing semi-conducting material is reduced so that the 4th area and the conductive matter of SECTOR-SEVEN (not shown).
Switch TFT Ts are electrically connected to select lines GL and data wire DL and the friendship for being arranged on select lines GL and data wire DL
Fork point.That is, the second grid 244 of switch TFT Ts is connected to select lines GL, and switch TFT Ts the second source electrode 266 is connected to
Data wire DL.
Driving TFT Td first grid 242 is electrically connected to switch TFT Ts the second drain electrode 268.That is, from switch TFT
The Ts extension 270 of the extension of the second drain electrode 268 and driving TFT Td first grid 242 are carried out by grid contact hole 255
Contact so that driving TFT Td first grid 242 is electrically connected to switch TFT Ts the second drain electrode 268.In more detail, switch
First extension 246 of the contact of the extension 270 driving TFT Td of TFT Ts the second drain electrode 268 first grid 242.
In addition, driving TFT Td the first source electrode 262 is connected to power line VDD, driving TFT Td the first drain electrode 264 is connected to reference
TFT Tr the 3rd drain electrode 274.
In fig .9, TFT Td are driven and TFT Tr common drains are referred to.Alternatively, driving TFT Td the first drain electrode 264
It can be formed to be separated and can electrically connect with the 3rd drain electrode 274 with reference to TFT Tr.
Select lines GL is connected to reference to TFT Tr the 3rd grid 248, ginseng is connected to reference to TFT Tr the 3rd source electrode 272
Examine line RL.
Light emitting diode E is connected to driving TFT Td the first drain electrode 264 and including anode, organic luminous layer and the moon
Pole.For example, anode is connected to driving TFT Td the first drain electrode 264.In OLED display, the light from organic luminous layer
Through anode and substrate 201 or through negative electrode.That is, OLED display is bottom emissive type or top emission structure.
Organic Light Emitting Diode E may be formed at the top of substrate 201 for being formed with driving TFT Td above, or may be formed at
On the opposing substrate (not shown) of substrate 201.
Storage Cst includes the first storage Cst1.A part for first oxide semiconductor layer 210 and
First extension 246 of one grid 242 is overlapped, to form the first storage Cst1.
First storage Cst1 includes the of the marginal portion of the first extension 246 as first grid 242
One storage electrode (not shown) and as the first oxide semiconductor layer 210 second area's (not shown) marginal portion second
Storage electrode (not shown).During the step of forming the first extension 246 of first grid 242 or after this, first
Oxide semiconductor layer 210 is reduced because of corona treatment.In this case, due to the first extension of first grid 242
Serve as in stop mask, therefore second area's (not shown) of the first oxide semiconductor layer except the secondth area (does not show part 246
Go out) core outside marginal portion be reduced into conduction.That is, because the core of second area's (not shown) is by
First extension 246 of one grid 242 and the first insulating barrier 230 stop, therefore the core of second area's (not shown) does not have
It is reduced and keeps non-conductive property.
The width that second storage electrode (not shown) is started at from the edge termination of the first extension 246 of first grid 242
Degree is about 1.5 microns.
Therefore, (do not show as the first storage electrode of the marginal portion of the first extension 246 of first grid 242
Go out), with the first storage electrode (not shown) overlap second area's (not shown) as the first oxide semiconductor layer 210 side
The the second storage electrode (not shown) and the first storage electrode (not shown) of edge point and the second storage electrode (not shown) it
Between the first insulating barrier 230 constitute the first storage Cst1.
In addition, storage Cst also includes the second storage Cst2.Second storage Cst2 includes conduct
3rd storage electrode of the 5th conductive area's (not shown) of the first oxide semiconductor layer 210, prolonging as the second drain electrode 268
4th storage electrode of extending portion points 270 and the as the dielectric layer between the 3rd storage electrode and the 4th storage electrode
Two insulating barriers 250.
In addition, storage Cst also includes the 3rd storage Cst.3rd storage Cst includes the first half
A part for conductor layer 210 and the second extension 247 of first grid 242.
That is, the 3rd storage Cst includes the marginal portion of the second extension 247 as first grid 242
5th storage electrode 282 and as with the second extension 247 (that is, the 5th storage electrode 282) of first grid 242 overlap
6th storage electrode 284 of the marginal portion of the first oxide semiconductor layer 210.Forming the second extension of first grid 242
During the step of part 247 or after this, the first oxide semiconductor layer 210 is reduced because of corona treatment.This
Under situation, because stop mask is served as in the second extension 247 of first grid 242, therefore except the first oxide semiconductor
The marginal portion of the first oxide semiconductor layer 210 outside the core of layer 210 is reduced into conduction.That is, due to
The core of monoxide semiconductor layer 210 is hindered by the second extension 247 of first grid 242 and the first insulating barrier 230
Keep off, therefore the core of the first oxide semiconductor layer 210 is not reduced and keeps non-conductive property.
The width that 6th storage electrode 284 is started at from the edge termination of the second extension 247 of first grid 242 is big
About 1.5 microns.
Therefore, as first grid 242 the second extension 247 marginal portion the 5th storage electrode 282, with the
6th storage electrode 284 of the overlapping marginal portion as the first oxide semiconductor layer 210 of five storage electrodes 282 and
The first insulating barrier 230 between 5th storage electrode 282 and the 6th storage electrode 284 constitutes the 3rd storage Cst3.
In OLED display second embodiment of the invention, due to the first storage Cst1,
Two storage Cst2 and the 3rd storage Cst3 use a part of conduct of the first oxide semiconductor layer 210 respectively
Second storage electrode, the 3rd storage electrode and the 6th storage electrode, therefore storage capacitance increase or be maximized, and aperture ratio does not have
There is reduction.
In this case, due to each along in the first storage Cst1 and the 3rd storage Cst3
First extension 246 of one grid 242 and the marginal portion of the second extension 247 are formed, therefore the first storage
Cst1 and the 3rd storage Cst3 area are relatively small.However, due to being deposited as the first storage Cst1 and the 3rd
First insulating barrier 230 of storing up electricity container Cst3 dielectric layer has relatively small thickness, therefore the first storage Cst1
There is enough storage capacitances with the 3rd storage Cst3.
It is each including being used as the first of dielectric layer in first storage Cst1 and the 3rd storage Cst3
Insulating barrier 230.First insulating barrier 230 is formed by inorganic insulating material and with relatively small thickness.Therefore, although first deposits
Storing up electricity container Cst1 and the 3rd storage Cst3 area are relatively small, but the storage electricity of the first storage Cst1 and the 3rd
Container Cst3 has enough storage capacitances.
As described above, in the OLED display of the present invention, using storage electrode as stop mask by oxide half
Conductor layer is reduced into conduction, and the part being reduced of oxide semiconductor layer is used as storage electrode.I.e., it is not necessary to depositing in addition
Storing up electricity pole.Therefore, storage capacitance increases, and aperture ratio does not reduce.
Further, since the first storage and the 3rd storage are including relatively small as the thickness of dielectric layer
First insulating barrier, therefore storage has enough storage capacitances in the case where electrode area is relatively small.Therefore, OLED
The reduction of the aperture ratio of display device is minimized or is prevented from.
It will be apparent to those skilled in the art without departing from the spirit or scope of the present invention, can be in this hair
The bright middle various modification and variation of progress.Therefore, it is contemplated that covering the modification and variant of the present invention, as long as they
In the range of appended claims and its equivalent.
Claims (10)
1. a kind of organic LED display device, the organic LED display device includes：
First oxide semiconductor layer, it includes the firstth area, the secondth area, the 3rd area and the 4th area；
First insulating barrier, it is on first oxide semiconductor layer；
First grid, it is overlapped on first insulating barrier and completely with firstth area；
First storage electrode, it extends and overlapping with secondth area from the first grid；
Second insulating barrier, it covers the first grid and first storage electrode, and by the 3rd area and the 4th area
Expose；
First source electrode and the first drain electrode, it is on second insulating barrier and contacts the 3rd area and the 4th area；
Light emitting diode, it is connected to first drain electrode,
Wherein, described the second of the edge of first storage electrode in addition to the center of first storage electrode
The part in area is conductive, to form the second storage electrode, and first storage electrode and second storage electrode
And first insulating barrier constitutes the first storage.
2. organic LED display device according to claim 1, wherein, secondth area is relative to first direction
With the first length, the first direction is with first source electrode and first drain electrode are partly led along first oxide
The second direction of body layer connection is intersected, and overlapping region between first storage electrode and secondth area is relative to described the
One direction has the second length, wherein, second length is less than first length.
3. organic LED display device according to claim 1, wherein, first insulating barrier has the first thickness
Degree, and second insulating barrier has the second thickness more than the first thickness.
4. organic LED display device according to claim 1, the organic LED display device is also
Including：
Second oxide semiconductor layer, it is below first insulating barrier；
Second grid, it is on first insulating barrier and overlapping with second oxide semiconductor layer；
Second source electrode and the second drain electrode, it is on second insulating barrier and contacts second oxide semiconductor layer respectively
The first side and the second side；And
Extension, the described second drain electrode is connected by it from the described second drain electrode extension with the first grid,
Wherein, the 5th area of the extension and first oxide semiconductor layer is overlapped, the 5th area be it is conductive,
Wherein, the extension, the 5th area and second insulating barrier constitute the second storage.
5. organic LED display device according to claim 4, the organic LED display device is also
Including：
Select lines, it extends along third direction；
Data wire, it extends along fourth direction, to intersect with the select lines；And
Power line, it extends parallel to one in the select lines and the data wire,
Wherein, the second grid is connected to the select lines, and second source electrode is connected to the data wire, wherein, it is described
First source electrode is connected to the power line.
6. organic LED display device according to claim 5, wherein, first oxide semiconductor layer,
The first grid, first source electrode and first drain electrode constitute driving thin film transistor (TFT), and second oxide
Semiconductor layer, the second grid, second source electrode and second drain electrode constitute switching thin-film transistor, and
The organic LED display device also includes：
Reference line, it is parallel to another extension in the select lines and the data wire；
Reference thin film transistor, it is connected to the select lines, first drain electrode and the reference line, to control the driving
The threshold voltage of thin film transistor (TFT).
7. organic LED display device according to claim 4, the organic LED display device is also
Including the 3rd storage electrode, the 3rd storage electrode extend from the first grid and with first oxide semiconductor
6th area of floor is overlapped,
Wherein, the described 6th of the edge of the 3rd storage electrode in addition to the center of the 3rd storage electrode the
The part in area is conductive, to form the 4th storage electrode, and the 3rd storage electrode and the 4th storage electrode
And first insulating barrier constitutes the 3rd storage.
8. a kind of method for manufacturing organic LED display device, this method comprises the following steps：
Oxide semiconductor layer is formed on substrate；
The first insulating pattern and grid are formed in the firstth area of the oxide semiconductor layer and is partly led in the oxide
The second insulating pattern and the first storage electrode are formed in secondth area of body floor；
By performing corona treatment, one of secondth area on the inside of the edge of first storage electrode is reduced
Point, the part being reduced in secondth area is conductive；
Form insulating barrier, the insulating barrier is by the 3rd area of the both sides in firstth area of the oxide semiconductor layer and the
4th area expose, and cover the grid and first storage electrode；
Source electrode and the drain electrode for contacting the 3rd area and the 4th area are formed on the insulating barrier；And
Formed and the light emitting diode for draining and being connected.
9. method according to claim 8, wherein, in described first in addition to the center of first storage electrode
The part in secondth area of the edge of storage electrode is reducing the first storage electricity by performing corona treatment
It is reduced in a part of step in secondth area on the inside of the edge of pole so that the part that is reduced forms the
Two storage electrodes, and
Wherein, first storage electrode and second storage electrode and first insulating barrier constitute the first storage capacitance
Device.
10. method according to claim 8, wherein, form institute in firstth area of the oxide semiconductor layer
State the first insulating pattern and the grid and to form described second in secondth area of the oxide semiconductor layer exhausted
The step of edge pattern and first storage electrode, includes：
Dielectric film and metal level are sequentially formed in the oxide semiconductor layer；
Correspond to firstth area and secondth area on the metal level and form the first photoetching agent pattern and the second photoresist
Pattern；And
The metal level and the dielectric film are etched with shape using first photoetching agent pattern and second photoetching agent pattern
Into first insulating pattern, second insulating pattern, the grid and first storage electrode,
Wherein, the corona treatment uses at least one in second photoetching agent pattern and first storage electrode
As stop mask, and use SF6Gas or CF4Gas.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2013-0144341 | 2013-11-26 | ||
| KR20130144341 | 2013-11-26 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN104681585A CN104681585A (en) | 2015-06-03 |
| CN104681585B true CN104681585B (en) | 2017-10-20 |
Family
ID=53316418
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410693939.0A Active CN104681585B (en) | 2013-11-26 | 2014-11-26 | Organic LED display device and its manufacture method |
Country Status (2)
| Country | Link |
|---|---|
| KR (1) | KR102407538B1 (en) |
| CN (1) | CN104681585B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3477705B1 (en) * | 2017-10-30 | 2021-04-07 | LG Display Co., Ltd. | Display device |
| CN210607259U (en) * | 2019-12-13 | 2020-05-22 | 北京京东方技术开发有限公司 | Display substrate and display device |
| CN111584577A (en) * | 2020-05-14 | 2020-08-25 | 深圳市华星光电半导体显示技术有限公司 | Display panel and manufacturing method thereof |
| KR20220113566A (en) * | 2021-02-05 | 2022-08-16 | 삼성디스플레이 주식회사 | Display device |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101847631A (en) * | 2009-03-27 | 2010-09-29 | 株式会社半导体能源研究所 | Semiconductor device, display unit and electronic equipment |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100899158B1 (en) * | 2002-09-05 | 2009-05-27 | 엘지디스플레이 주식회사 | Active Matrix Organic Electro-Luminescence Display Panel And Method Of Fabricating The Same |
| TWI353467B (en) * | 2003-01-08 | 2011-12-01 | Samsung Electronics Co Ltd | Polysilicon thin film transistor array panel and m |
| KR101212153B1 (en) * | 2005-12-30 | 2012-12-13 | 엘지디스플레이 주식회사 | Organic Electroluminescence Display Device Method For The Same |
| KR101493086B1 (en) * | 2008-05-16 | 2015-02-13 | 엘지디스플레이 주식회사 | Organic electro-luminescence display device and manufacturing method thereof |
| KR101458373B1 (en) * | 2008-10-24 | 2014-11-06 | 엘지디스플레이 주식회사 | Organic electroluminescent display device |
| CN103403849B (en) * | 2011-02-28 | 2016-08-03 | 夏普株式会社 | Semiconductor device and manufacture method thereof and display device |
| KR20130037035A (en) * | 2011-10-05 | 2013-04-15 | 엘지디스플레이 주식회사 | Array substrate and method of fabricating the same |
| KR101995218B1 (en) * | 2012-03-27 | 2019-07-02 | 엘지디스플레이 주식회사 | Organic light-emitting display device |
| KR20130111872A (en) * | 2012-04-02 | 2013-10-11 | 삼성디스플레이 주식회사 | Thin film transistor, thin film transistor array panel including the same and manufacturing method thereof |
| KR20150044327A (en) * | 2013-10-16 | 2015-04-24 | 삼성디스플레이 주식회사 | Field relaxation thin film transistor, method of manufacturing the same and display apparatus including the same |
-
2014
- 2014-11-20 KR KR1020140162848A patent/KR102407538B1/en active IP Right Grant
- 2014-11-26 CN CN201410693939.0A patent/CN104681585B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101847631A (en) * | 2009-03-27 | 2010-09-29 | 株式会社半导体能源研究所 | Semiconductor device, display unit and electronic equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20150061579A (en) | 2015-06-04 |
| KR102407538B1 (en) | 2022-06-13 |
| CN104681585A (en) | 2015-06-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10651258B2 (en) | Organic light emitting display device with improved aperture ratio | |
| US11489029B2 (en) | Transparent display substrate including capacitor overlapping driving and switching TFTs, and manufacturing method therefor | |
| CN107783690B (en) | Organic light emitting display, method of manufacturing the same, and display device | |
| CN104733499B (en) | Organic LED display device and its manufacturing method | |
| US7705817B2 (en) | Organic light emitting diode display device and fabricating method thereof | |
| KR20180068634A (en) | Organic light emitting display | |
| JP2019121598A (en) | Top emission type organic light emitting diode display device | |
| CN105789266A (en) | OLED array substrate, making method thereof and display device | |
| CN110047874B (en) | Display device | |
| CN106997893B (en) | Organic light emitting display device and method of manufacturing the same | |
| CN111682031B (en) | Display substrate, preparation method thereof and display device | |
| KR101619158B1 (en) | Thin Film Transistor Substrate and Organic Light Emitting Device Using That Same | |
| TWI590215B (en) | Display panel | |
| US11882717B2 (en) | Display device having an auxiliary wiring | |
| CN104681585B (en) | Organic LED display device and its manufacture method | |
| CN109427820A (en) | A kind of substrate and preparation method thereof, display panel | |
| CN115485853A (en) | Display substrate, manufacturing method thereof and display device | |
| US9054061B1 (en) | Organic light emitting diode display device and method of fabricating the same | |
| US12133428B2 (en) | Display substrate and display device | |
| US9029865B2 (en) | Organic light emitting diode display and method for manufacturing the same | |
| KR102119572B1 (en) | Thin film transistor array substrate and method for fabricating the same | |
| CN115552614A (en) | Display substrate and display device | |
| KR102173492B1 (en) | Organic light emitting diode device and method of fabricating the same | |
| CN221057431U (en) | Display device | |
| KR20190053585A (en) | Display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |