CN104681538B - Contact hole and forming method thereof - Google Patents
Contact hole and forming method thereof Download PDFInfo
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- CN104681538B CN104681538B CN201310612577.3A CN201310612577A CN104681538B CN 104681538 B CN104681538 B CN 104681538B CN 201310612577 A CN201310612577 A CN 201310612577A CN 104681538 B CN104681538 B CN 104681538B
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Abstract
A kind of contact hole of present invention offer and forming method thereof, the forming method of the contact hole, including：Substrate is provided；Form grid, source region and drain region；Form interlayer dielectric layer；Contact hole is formed in interlayer dielectric layer；Layer of dielectric material and mask layer are formed in contact hole；Remove the layer of dielectric material positioned at contact hole side wall upper part；Remove the mask layer；Layer of dielectric material is removed, remaining layer of dielectric material is respectively positioned on the bottom of contact hole side wall；Conductive plunger is formed in the contact hole.The present invention also provides a kind of contact hole, including substrate, grid, source region and drain region；Interlayer dielectric layer and contact hole；Located at the layer of dielectric material of the contact hole lower sidewall, and the conductive plunger in the contact hole.The beneficial effects of the present invention are：The distance of grid and conductive plunger is increased, after conductive plunger is formed, the parasitic capacitance between grid and conductive plunger is reduced.
Description
Technical field
The present invention relates to semiconductor applications, and in particular to a kind of contact hole and forming method thereof.
Background technology
At present, in the manufacturing process of semiconductor devices, contact hole is interconnected as multiple layer metal interlayer and device is active
The passage connected between area and external circuitry, has important effect in device architecture composition.With semiconductor technology not
Disconnected to improve, the size of contact hole constantly reduces, and the size of process requirements contact hole also accordingly diminishes, the manufacture difficulty of contact hole
Correspondingly increase.
Formed contact hole before, it is necessary in the substrate of semiconductor formed source region, drain region, the metal silicide on surface,
Grid structure on substrate and the interlayer dielectric layer (Interlayer Dielectric, ILD) for being covered in grid structure.
, it is necessary to define the size of contact hole by the graphical interlayer dielectric layer when forming the contact hole；And for being formed
For the contact hole in source region or drain region, size not only has influence on whether contact hole easily forms, can also be to the device in substrate
Impact.
Exemplified by generating the contact hole in source region or drain region, for the making of contact hole, contact
The size in hole is bigger, comes in contact hole and disconnects problem（contact open）Probability it is smaller；But, larger-size contact hole
The performance of semiconductor devices may be impacted.
The content of the invention
The problem of present invention is solved is to provide a kind of contact hole and forming method thereof, can reduce to semiconductor devices
On the premise of performance is impacted, increase the size of the contact hole as far as possible.
To solve the above problems, the present invention provides a kind of forming method of contact hole, including：
Substrate is provided；
Grid is formed over the substrate；
Source region and drain region are formed in substrate between grid；
Interlayer dielectric layer is formed on the substrate and grid；
The contact hole being located between the grid is formed in the interlayer dielectric layer, to expose the source region or leakage
Area；
Layer of dielectric material is formed in the inwall of the contact hole and bottom surface；
Mask layer is filled in the contact hole for being formed with the layer of dielectric material；
Using the mask layer as mask, the layer of dielectric material positioned at contact hole side wall upper part is removed；
Remove the mask layer；
The layer of dielectric material positioned at the contact hole bottom surface is removed, remaining layer of dielectric material is respectively positioned on the contact hole
The bottom of side wall, and direction of the remaining layer of dielectric material along contact hole side wall covers the grid；
Conductive plunger is formed in the contact hole.
Optionally, forming method as claimed in claim 1, it is characterised in that after the step of forming grid, is formed
Before source region and drain region, in addition to：Side wall is formed respectively in the side wall of the grid；In the step of forming contact hole, lean on
The side wall of the nearly contact hole is removed or part is removed.
Optionally, before the step of forming interlayer dielectric layer, grid, source region, drain region and substrate overlying are additionally included in
Lid contact etch stop layer.
Optionally, the step of forming contact hole includes, and the contact hole is exposed the side wall of the grid.
Optionally, the step of forming layer of dielectric material includes, and the layer of dielectric material is formed using low-K material.
Optionally, the layer of dielectric material includes silicon, includes at least one of oxygen or carbon.
Optionally, the step of forming layer of dielectric material includes：The thickness of the layer of dielectric material is set to be not more than the contact
/ 3rd of hole aperture.
Optionally, in the step of forming mask layer, the mask layer is that bottom antireflective coating or deep UV are inhaled
Receive oxide skin(coating).
Optionally, the step of removing positioned at the layer of dielectric material of contact hole side wall upper part includes：Make remaining Jie after removal
Height of the material bed of material along contact hole sidewall direction is at least over 50 nanometers of grid..
Optionally, the step of removing positioned at the layer of dielectric material of contact hole side wall upper part includes：Removed using dry etching
The layer of dielectric material.
Optionally, the mask layer is bottom antireflective coating, or deep UV absorbs oxide skin(coating)；Remove mask layer
The step of include：The mask layer is removed using the plasma gas containing nitrogen and hydrogen.
Optionally, in the step of removing mask layer, the mask layer, the etching of wet etching are removed using wet etching
Agent uses TMAH.
Optionally, in the step of removing the layer of dielectric material of contact hole bottom surface, removed using dry etching and be located at contact
Layer of dielectric material described in bottom hole face.
In addition, the present invention also provides a kind of contact hole, including：
Substrate, the substrate is provided with no less than one grid, the substrate that grid exposes and is provided with source region and drain region；
It is formed at the interlayer dielectric layer on the substrate and grid；
It is formed at the contact hole in the interlayer dielectric layer, the contact hole is located between the grid, and by the source
Area or drain region expose；
Located at the layer of dielectric material of the contact hole lower sidewall, side of the layer of dielectric material along contact hole side wall
To the covering grid；
It is filled in the conductive plunger in the contact hole.
Optionally, between the interlayer dielectric layer and substrate, it is additionally provided with contact hole between the interlayer dielectric layer and grid
Etching stopping layer.
Optionally, the layer of dielectric material is low-K material layer.
Optionally, the layer of dielectric material includes silicon, includes at least one of oxygen or carbon.
Compared with prior art, technical scheme has advantages below：
The contact hole being located between the grid is formed in the interlayer dielectric layer, to expose the source region or leakage
Area, in contact hole side, the bottom of wall there remains a part of layer of dielectric material, and this certain media material layer, which is played, has isolated grid
With the effect of conductive plunger, therefore formed contact hole when can be come in contact with the larger contact hole of manufactured size with reducing
The probability that conductive plunger in hole disconnects；Simultaneously as the remaining layer of dielectric material can also increase grid and conductive plunger
Spacing, therefore the parasitic capacitance between grid and conductive plunger can also be reduced, to optimize the performance of semiconductor devices.
Further, due to when forming the contact hole, eliminating part side wall, it is hereby achieved that large-size connects
Contact hole, and then reduce the probability of the disconnection of the conductive plunger in contact hole.
Further, the low-K material using K values less than 3 can further reduce grid with leading as the layer of dielectric material
Parasitic capacitance between electric plug.
Further, when forming the contact hole, the contact hole side wall of formation, which exposes the grid, to be meaned into one
Step increases the aperture of the contact hole.
Brief description of the drawings
Fig. 1 is the schematic flow sheet of the embodiment of forming method one of contact hole of the present invention.
Fig. 2 to Fig. 8 is structural representation of the contact hole in each step in Fig. 1.
Embodiment
Because the size of existing semiconductor devices constantly reduces, the several of hole disconnection problem are come in contact when forming contact hole
Rate is greatly increased.And if increasing the opening size of contact hole to prevent from disconnecting.Then it is easily caused and is formed in the contact hole
Grid and the phenomenon of conductive plunger short circuit occur after conductive plunger.
Therefore, the present invention provides a kind of forming method of contact hole, in contact hole side, remaining medium is formed at the bottom of wall
Material layer, the remaining layer of dielectric material is covering the grid along sidewall direction.Larger contact hole can be so formed, and
And due to the effect being dielectrically separated from of remaining layer of dielectric material, moreover it is possible to avoid the short circuit occurred between grid and conductive plunger from showing
As.
With reference to Fig. 1, it is the schematic flow sheet of the embodiment of forming method one of contact hole of the present invention, comprises the following steps：
Step S1 forms grid over the substrate there is provided substrate, and forms source region and drain region in the substrate；
Step S2, interlayer dielectric layer is formed on the substrate and grid；
Step S3, forms contact hole to expose the source region or drain region in the interlayer dielectric layer；
Step S4, layer of dielectric material is formed in the inwall of the contact hole and bottom surface；
Step S5, bottom antireflective coating is filled in the contact hole for being formed with the layer of dielectric material（BARC）；
Step S6, using the bottom antireflective coating as mask, removes the layer of dielectric material positioned at contact hole side wall upper part；
Step S7, removes the bottom antireflective coating；
Step S8, removes the layer of dielectric material positioned at the contact hole bottom surface, remaining layer of dielectric material is respectively positioned on institute
The bottom of contact hole side wall is stated, and direction of the remaining layer of dielectric material along contact hole side wall covers the grid；
Step S9, conductive plunger is formed in the contact hole.
By above-mentioned steps, the size of contact hole can do more, the probability that reduction contact hole disconnects；In the contact
It is short that the layer of dielectric material formed in hole positioned at contact hole inner wall lower can avoid the conductive plunger being subsequently formed from occurring with grid
Road, also, formed in the contact hole after conductive plunger, the distance of conductive plunger and the grid beside contact hole increases, and leads
Parasitic capacitance between electric plug and grid reduces；Meanwhile, the parasitic capacitance can further be reduced using layer of dielectric material.
It is understandable to enable the above objects, features and advantages of the present invention to become apparent, below in conjunction with the accompanying drawings to the present invention
Specific embodiment be described in detail.
With reference to Fig. 2, performing step 1, there is provided substrate（Not shown in figure）, grid 110 is formed over the substrate；In this reality
Apply in example, the grid 110 is polysilicon gate, still, and the present invention is not intended to be limited in any to this.
And source region and drain region are formed in the substrate（Not shown in figure）.This step is technological means commonly used in the art, this
Invention will not be described here.
It should be noted that in the present embodiment, when forming the grid 110, also the grid 110 top surface with
And silicide layer 112 and 113 is respectively formed with source region, drain region, and the side wall of grid 110 is also formed with side wall 111.
The side wall 111 is using silicon nitride as material, and still, this is not limited by the present invention.
The side wall 111, silicide layer 112 and 113 can be formed using existing material and forming method.
It should be noted that the side wall 111 will be partially removed in the step of being subsequently formed contact hole.
Step 2 is continued executing with, interlayer dielectric layer 130 is formed on the substrate and grid 110.
In the present embodiment, the interlayer dielectric layer 130 is silica dioxide medium layer, but the present invention is not limited this
System.
It is also the state of the art to form the interlayer dielectric layer 130, formation of the present invention to interlayer dielectric layer 130
Method and the material used are not intended to be limited in any.
In the present embodiment, before the interlayer dielectric layer 130 is formed, in addition to it is following step by step：
One layer of contact etch stop layer is covered on the substrate and grid 110（CESL）120, to be subsequently formed
The grid 110 is protected in the step of contact hole not by etch effects.
In the present embodiment, the contact etch stop layer using silicon nitride as material, still, the present invention to this not
It is construed as limiting.
With continued reference to Fig. 2, step S3 is performed, it is described to expose that contact hole 131 is formed in the interlayer dielectric layer 130
Source region or drain region.
In the present embodiment, removal part interlayer dielectric layer, contact etch is needed to stop due to forming the contact hole 131
The only side wall of layer and grid 110, in the present embodiment, the side wall of the contact etch stop layer and grid 110 is adopted
With silicon nitride as material, in the present embodiment, the contact hole 131 is formed in two steps：
Step S31, removes part interlayer dielectric layer, exposes the contact etch stop layer 120；
The side wall of step S32, the described part contact etch stop layer 120 of removal and grid 110.
But, how the present invention is to remove the side wall of interlayer dielectric layer, contact etch stop layer and grid 110 with shape
It is not construed as limiting into the contact hole 131.
The size of the contact hole 131 is not more than the spacing between two grids 110, and otherwise grid will be caused in itself to damage
Wound.
In the present embodiment, the contact hole 131 exposes the side wall of the grid 110, to obtain larger size, as far as possible
Reduce the probability that the conductive plunger being formed in contact hole disconnects, meanwhile, the larger size of contact hole 131 can be reduced to photoetching
The requirement of resolution, obtains preferable litho pattern；In addition, in etching, because the less depth-width ratio of contact hole 131, by-product
Thing is easily pulled away, and obtains larger process window（process window）.
With reference to Fig. 3, step S4 is performed, layer of dielectric material 140 is formed in the inwall of the contact hole 131 and bottom surface.
The purpose of this step is, after conductive plunger is subsequently formed（The conductive plunger is formed at described in step S9
In contact hole 131）, the layer of dielectric material 140 can play buffer action to grid 110 and conductive plunger, on the one hand, be situated between
The material bed of material 140 can keep apart grid 110 and conductive plunger to prevent short circuit, on the other hand, increase grid 110
Spacing between conductive plunger, to reduce the parasitic capacitance between grid 110 and conductive plunger.
In the present embodiment, the layer of dielectric material 140 is less than 3 low-K material using K values, and relatively low K values can enter one
Step reduces the parasitic capacitance between grid 110 and conductive plunger.
In the present embodiment, the low-K material includes silicon, includes at least one of oxygen or carbon.But, this hair
It is bright without limitation.
It should be noted that being only the material used in the present embodiment using low-K material, in the other embodiment of the present invention
In, it would however also be possible to employ other materials that can play buffer action form the layer of dielectric material 140.
If the thickness of the layer of dielectric material 140 is excessive, thicker layer of dielectric material 140 easily makes capped contact
The depth-to-width ratio in hole 131 becomes too much, is unfavorable in subsequent step continuously forming bottom anti-reflective painting in the contact hole 131
Layer.So, in the present embodiment, the thickness of the layer of dielectric material 140 be not more than the aperture of contact hole 131 three/
One.
But the present invention is not limited to the minimum thickness of layer of dielectric material 140, the thickness is decided according to the actual requirements,
As long as the layer of dielectric material 140 can realize effective insulation between grid 110 and the conductive plunger being subsequently formed.
Further, since in the present embodiment, expose the side wall of grid 110 when forming the contact hole 131, that is,
Say, in the step of forming contact hole 131, the side wall 111 and contact etch between layer of dielectric material 140 and grid 110 are stopped
Only the part of layer 120 is removed（Or remove completely）, after the layer of dielectric material 140 is formed, the layer of dielectric material 140 is with exposing
Partial grid 110 is contacted.But, the present invention is without limitation, in other embodiments of the invention or only
The side wall 111 is thinned, the purpose for reducing parasitic capacitance so can be also reached.
With reference to Fig. 4, step S5 is performed, bottom anti-reflective is filled in the contact hole 131 for being formed with the layer of dielectric material 140
Penetrate coating 150.
The bottom antireflective coating 150 is covered as mask layer its role is to the etching as layer of dielectric material 140
Mould, its reason is as follows：
It is contemplated that retaining the layer of dielectric material positioned at the sidewall bottom of contact hole 131, and remove the side of contact hole 131
The layer of dielectric material 140 on wall top and the layer of dielectric material 140 of the bottom surface of contact hole 131, due to the side wall upper part of contact hole 131
Layer of dielectric material 140 is different from the removed height of layer of dielectric material 140 of the bottom surface of contact hole 131, so needing to form described
Bottom antireflective coating 150 first removes the first half of layer of dielectric material 140 so that the latter half of layer of dielectric material 140 to be covered
Point, the layer of dielectric material 140 positioned at the bottom surface of contact hole 131 is exposed again afterwards, and then removes.
It should be noted that, although the bottom antireflective coating 150 of organic matter is used in the present embodiment, to improve photoetching
In line width resolution.But the invention is not limited in this regard, in other embodiments of the invention, the bottom anti-reflective are applied
Layer 150 may alternatively be other materials, such as can also absorb oxide skin(coating) using deep UV（DUO）It is used as mask layer.
With reference to Fig. 5, step S6 is performed, is mask with the bottom antireflective coating 150, removed and be located at the side of contact hole 131
The layer of dielectric material 140 on wall top.
Because remaining layer of dielectric material 140 also needs to perform etching in subsequent step, while the medium finally retained
Height of the material layer 140 along the sidewall direction of contact hole 131 should be greater than the height of the grid 110（Otherwise isolated gate is not reached
With the effect for the conductive plunger being subsequently formed）.So, in this step, remaining layer of dielectric material 140 is along contact hole after removal
The height of 131 sidewall directions exceedes at least 50 nanometers of grid 110.
In addition, in the present embodiment, the layer of dielectric material 140 is removed using dry etching.But the present invention is for such as
What, which removes the layer of dielectric material 140, is not restricted.
With reference to Fig. 6, step S7 is performed, the antireflection material layer 150 is removed.The purpose of this step is to be situated between remaining
The material bed of material 140 is completely exposed, in order to remove layer of dielectric material 140 in a subsequent step in the bottom of contact hole 131
Part.
In the present embodiment, the antireflection material layer 150 is removed using the plasma gas containing nitrogen and hydrogen,
This gas can preferably remove the antireflection material layer 150, while reduce influences on the layer of dielectric material 140 of surrounding.
But, the present invention is not limited to this, and the antireflection material layer 150 can also be removed using other method.
Such as, in other embodiments of the invention, the antireflection material layer 150, etchant can also be removed using wet etching
TMAH can be used（TMAH）.
With reference to Fig. 7, step S8 is performed, the layer of dielectric material positioned at the bottom surface of contact hole 131 is removed, makes remaining medium
Material layer 140 is respectively positioned on the bottom of the side wall of contact hole 131, and the remaining layer of dielectric material 140 is along the side of contact hole 131
The direction of wall covers the grid 110.
In the step of formation contact hole 131 before, in order to further increase the size of contact hole 131, and make
Grid 110 exposes, in this step, and remaining layer of dielectric material 140 can be covered along the direction of the side wall of contact hole 131
The grid 110, was prevented in the step of being subsequently formed conductive plunger, and with the conductive plunger short circuit occurs for grid 110.
In the present embodiment, the layer of dielectric material 140 is removed using dry etching.
With reference to Fig. 8, step S9 is performed, conductive plunger 160 is formed in the contact hole 131.
In the present embodiment, the conductive plunger 160 be aluminium connector, can plating or sputtering sedimentation by way of
Aluminum is filled in the contact hole 131, to form aluminium connector in the contact hole 131.
Because grid 110 is on the direction of contact hole 131（It is horizontally oriented in figure）With the conductive plunger
Layer of dielectric material 140 is separated between 160, the layer of dielectric material 140 can increase grid 110 and the conductive plunger 160
Between spacing, so as to reduce the parasitic capacitance between grid 110 and the conductive plunger 160.
Meanwhile, layer of dielectric material 140 is that low-K material of the K values less than 3 is formed, the layer of dielectric material with relatively low K values
140 can further reduce the parasitic capacitance between grid 110 and the conductive plunger 160.
The material for forming the method conductive plunger 160 of the conductive plunger 160 is the state of the art, and the present invention exists
This is not repeated.
Please continue to refer to Fig. 8, the present invention also provides a kind of contact hole, including：
Substrate（Not shown in figure）, the substrate, which is provided with to be no less than in a grid 110, substrate, is provided with source region and drain region
（Not shown in figure）；
It is formed at the interlayer dielectric layer 130 on the substrate and grid；
Be formed at the contact hole 131 in the interlayer dielectric layer 130, the contact hole 131 be located at the grid 110 it
Between, and the source region or drain region are exposed；
Located at the layer of dielectric material 140 of the lower sidewall of contact hole 131, the layer of dielectric material 140 connects along described
The direction of the side wall of contact hole 131 covers the grid 110.
It is filled in the conductive plunger 160 in the contact hole 131.
Because 140 layer of dielectric material can also increase the spacing of grid 110 and conductive plunger 160, therefore it can also subtract
Small parasitic capacitance between grid 110 and conductive plunger 160, to optimize the performance of semiconductor devices.
In the present embodiment, because the bottom of the contact hole 131 is provided with layer of dielectric material 140, filled out in contact hole 131
Fill after the conductive plunger 160, the conductive plunger 160 be shaped as it is up big and down small fall " convex " shape structure（With reference to Fig. 8）.
In the present embodiment, side wall is additionally provided with side side wall of the grid 110 away from the conductive plunger 160, institute
Side wall of the grid 110 close to the side of conductive plunger 160 is stated directly to contact with the layer of dielectric material 140 at least in part,
That is, contact hole 131 can be larger-size contact hole, the probability of the disconnection of conductive plunger 160 is reduced.
In addition, the top surface and source region of grid 110, the surface in drain region are respectively equipped with silicide layer 112 and 113.It is described
Silicide layer 112 and 113 is used to reduce the connection resistance between source region, drain region and the conductive plunger 160.
In addition, being additionally provided between the interlayer dielectric layer 130 and substrate, between the interlayer dielectric layer 130 and grid 110
Contact etch stop layer 120.
In the present embodiment, the layer of dielectric material 140 is the low-K material layer that K values are less than 3, for example：The low-K material
Silicon is included in layer, includes at least one of oxygen or carbon.It can enter one as layer of dielectric material 140 using low-K material layer
Step reduces parasitic capacitance between grid 110 and conductive plunger 160.
In the present embodiment, height of the layer of dielectric material 140 along contact hole sidewall direction is received at least over grid 50
Rice, can so be effectively isolated the grid 110 and the conductive plunger 160.
It should be noted that contact hole of the present invention can be, but not limited to the formation of contact hole provided by the present invention
Method is obtained.
Although present disclosure is as above, the present invention is not limited to this.Any those skilled in the art, are not departing from this
In the spirit and scope of invention, it can make various changes or modifications, therefore protection scope of the present invention should be with claim institute
The scope of restriction is defined.
Claims (16)
1. a kind of forming method of contact hole, it is characterised in that including：
Substrate is provided；
Grid is formed over the substrate；
Source region and drain region are formed in substrate between grid；
Interlayer dielectric layer is formed on the substrate and grid；
The contact hole being located between the grid is formed in the interlayer dielectric layer, to expose the source region or drain region；
Layer of dielectric material is formed in the inwall of the contact hole and bottom surface；
Mask layer is filled in the contact hole for being formed with the layer of dielectric material；
Using the mask layer as mask, the layer of dielectric material positioned at contact hole side wall upper part is removed；
Remove the mask layer；
The layer of dielectric material positioned at the contact hole bottom surface is removed, remaining layer of dielectric material is respectively positioned on contact hole side wall
Bottom, and direction of the remaining layer of dielectric material along contact hole side wall covers the grid；
Conductive plunger is formed in the contact hole；
Wherein, after the step of forming grid, formed before source region and drain region, in addition to：In the side wall point of the grid
Side wall is not formed；In the step of forming contact hole, it is removed close to the side wall of the contact hole or part is removed.
2. forming method as claimed in claim 1, it is characterised in that before the step of forming interlayer dielectric layer, in addition to
Contact etch stop layer is covered on grid, source region, drain region and substrate.
3. forming method as claimed in claim 1, it is characterised in that the step of forming contact hole includes, and makes the contact hole
Expose the side wall of the grid.
4. forming method as claimed in claim 1, it is characterised in that the step of forming layer of dielectric material includes, using low K materials
Material forms the layer of dielectric material.
5. the forming method as described in claim 1 or 4, it is characterised in that the layer of dielectric material includes silicon, in addition to oxygen
Or at least one of carbon.
6. forming method as claimed in claim 1, it is characterised in that the step of forming layer of dielectric material includes：Make to be given an account of
The thickness of the material bed of material is not more than 1/3rd of the aperture of contact hole.
7. forming method as claimed in claim 1, it is characterised in that in the step of forming mask layer, the mask layer is
Bottom antireflective coating or deep UV absorb oxide skin(coating).
8. forming method as claimed in claim 1, it is characterised in that remove the layer of dielectric material positioned at contact hole side wall upper part
The step of include：Make after removal height of the remaining layer of dielectric material along contact hole sidewall direction at least over 50 nanometers of grid.
9. forming method as claimed in claim 1, it is characterised in that remove the layer of dielectric material positioned at contact hole side wall upper part
The step of include：The layer of dielectric material is removed using dry etching.
10. forming method as claimed in claim 1, it is characterised in that the mask layer is bottom antireflective coating, Huo Zheshen
Ultraviolet radiation absorption oxide skin(coating)；The step of removing mask layer includes：Institute is removed using the plasma gas containing nitrogen and hydrogen
State mask layer.
11. forming method as claimed in claim 1, it is characterised in that in the step of removing mask layer, using wet etching
The mask layer is removed, the etchant of wet etching uses TMAH.
12. forming method as claimed in claim 1, it is characterised in that in the step for the layer of dielectric material for removing contact hole bottom surface
In rapid, removed using dry etching and be located at layer of dielectric material described in contact hole bottom surface.
13. a kind of contact hole, it is characterised in that including：
Substrate, the substrate is provided with no less than one grid, the substrate that grid exposes and is provided with source region and drain region；
It is formed at the interlayer dielectric layer on the substrate and grid；
Be formed at the contact hole in the interlayer dielectric layer, the contact hole is located between the grid, and by the source region or
Person drain region exposes；
Located at the layer of dielectric material of the contact hole lower sidewall, direction covering institute of the layer of dielectric material along contact hole side wall
State grid；
It is filled in the conductive plunger in the contact hole；
Wherein, after the step of forming grid, formed before source region and drain region, side is formed respectively in the side wall of the grid
Wall；In the step of forming contact hole, it is removed close to the side wall of the contact hole or part is removed.
14. contact hole as claimed in claim 13, it is characterised in that between the interlayer dielectric layer and substrate, the interlayer
Contact etch stop layer is additionally provided between dielectric layer and grid.
15. contact hole as claimed in claim 13, it is characterised in that the layer of dielectric material is low-K material layer.
16. contact hole as claimed in claim 13, it is characterised in that the layer of dielectric material includes silicon, in addition to oxygen or
At least one of person's carbon.
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| CN201310612577.3A CN104681538B (en) | 2013-11-26 | 2013-11-26 | Contact hole and forming method thereof |
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| CN104681538B true CN104681538B (en) | 2017-09-22 |
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|---|---|---|---|---|
| CN1202003A (en) * | 1997-06-10 | 1998-12-16 | 三星电子株式会社 | Method for manufacturing semiconductor memory device for preventing bit line oxidation and semiconductor memory device |
| TW461039B (en) * | 2000-11-14 | 2001-10-21 | United Microelectronics Corp | Method for manufacturing self-aligned contact of MOS device and structure manufactured by the same |
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