CN104659180B - Bloom extraction efficiency GaN base LED transparent electrode structure and preparation method - Google Patents
Bloom extraction efficiency GaN base LED transparent electrode structure and preparation method Download PDFInfo
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- 238000000605 extraction Methods 0.000 title claims abstract description 26
- 238000002360 preparation method Methods 0.000 title claims abstract description 12
- 239000002061 nanopillar Substances 0.000 claims abstract description 54
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 46
- 238000005530 etching Methods 0.000 claims description 42
- 239000002096 quantum dot Substances 0.000 claims description 31
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 13
- 238000000137 annealing Methods 0.000 claims description 10
- 238000001039 wet etching Methods 0.000 claims description 10
- 230000003287 optical effect Effects 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 9
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 238000001312 dry etching Methods 0.000 claims description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 7
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 6
- 239000000377 silicon dioxide Substances 0.000 claims description 5
- 238000005566 electron beam evaporation Methods 0.000 claims description 4
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 4
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 1
- 229910052710 silicon Inorganic materials 0.000 claims 1
- 239000010703 silicon Substances 0.000 claims 1
- 238000000034 method Methods 0.000 abstract description 17
- 230000006978 adaptation Effects 0.000 abstract description 2
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- 238000005516 engineering process Methods 0.000 description 6
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- 235000009566 rice Nutrition 0.000 description 3
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000284 extract Substances 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 238000004020 luminiscence type Methods 0.000 description 2
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- 239000000463 material Substances 0.000 description 2
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- 238000009738 saturating Methods 0.000 description 2
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- 229910052905 tridymite Inorganic materials 0.000 description 2
- 208000027418 Wounds and injury Diseases 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/42—Transparent materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
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Abstract
The present invention relates to a kind of transparent electrode structure and preparation method, especially a kind of bloom extraction efficiency GaN base LED transparent electrode structure and preparation method, belong to the technical field of LED semiconductor devices.According to technical scheme provided by the invention, the bloom extraction efficiency GaN base LED transparent electrode structure, including GaN substrate；ITO layer on nano-pillar layer and the covering nano-pillar layer is set in the GaN substrate；The nano-pillar layer includes some nano-pillars, and ITO layer is covered in nano-pillar, and is filled in the post clearance hole of nano-pillar both sides, to cause ITO layer and GaN substrate Ohmic contact.The method can significantly improve the light extraction efficiency of GaN base forward LED, and technological operation is convenient, and cost is low, wide adaptation range, securely and reliably.
Description
Technical field
The present invention relates to a kind of transparent electrode structure and preparation method, especially a kind of bloom extraction efficiency GaN base LED is saturating
Prescribed electrode structure and preparation method, belong to the technical field of LED semiconductor devices.
Background technology
Development of the popularization of following solid state lighting application depending on specular removal GaN base LED technologies of preparing.Restrict GaN base just
Fill the high index of refraction that one of basic obstacle of LED performance boosts is its constituent material (relative to external agency).Due to GaN base material
Expect the significant difference between (n=2.3) and air dielectric (n=1) refractive index, cause the light escape cone angle of GaN base forward LED inclined
Small, most of light is difficult to be emitted and be lost from device inside, limits the light extraction efficiency of device.So all the time, largely
Research work be devoted to how to improve the light extraction efficiency of device, generate such as ITO surface coarsenings, gradient index in succession
The sides such as rate layer, graphical sapphire substrate, hot acid side wall burn into omnidirectional reflector, photonic crystal, device geometries optimization
Method.
From roughlly speaking, because top surface light extraction accounting is maximum in GaN base forward LED light extraction, therefore change device topmost surface shape
Looks increase light exit probability is one of effective way for lifting device efficiency.Once had been reported that thick using natural lithography pattern technology
Change ito transparent electrode layer；Adjust MOCVD epitaxy growth conditions and form p-GaN surface micro-pits；P-GaN surface chemistries growth ZnO receives
The methods of rice post, can significantly improve light extraction, it should be noted that the above method itself also has obvious shortcoming and defect.
ITO roughening is usually required by dry etching, it will usually causes the deterioration of ITO electric properties；Extension roughening p-GaN surfaces can be
Growth quality and doping efficiency are sacrificed to a certain extent；Chemically grown ZnO nano post technique is complicated, and the tack of nano-pillar
Also it is difficult to ensure that.Up to the present, the preparation method that resultant effect is good and operation is simple, which but rarely has, to be referred to.Therefore, compel
One kind will be developed by, which being essential, can be obviously improved light extraction efficiency, and device will not be negatively affected other characteristics again, and raw
Produce the preferable new method of feasibility.
The content of the invention
The purpose of the present invention is to overcome the deficiencies in the prior art, there is provided a kind of bloom extraction efficiency GaN base LED is saturating
Prescribed electrode structure and preparation method, it can significantly improve the light extraction efficiency of GaN base forward LED, and technological operation is convenient, cost
It is low, wide adaptation range, securely and reliably.
According to technical scheme provided by the invention, the bloom extraction efficiency GaN base LED transparent electrode structure, including GaN
Substrate；ITO layer on nano-pillar layer and the covering nano-pillar layer is set in the GaN substrate；The nano-pillar layer bag
Include some nano-pillars, ITO layer is covered in nano-pillar, and is filled in the post clearance hole of nano-pillar both sides, with cause ITO layer with
GaN substrate Ohmic contact.
The nano-pillar is silicon nitride nano post, and the height of nano-pillar, diameter are respectively positioned on 1/4 λ~λ, wherein, λ is GaN base
The optical wavelength of LED light extractions.
A kind of preparation method of bloom extraction efficiency GaN base LED transparent electrode structure, the preparation of the transparent electrode structure
Method comprises the following steps：
GaN substrate is provided, and nanometer body layer is set in the GaN substrate a,；
Etching mask layer is set on above-mentioned nanometer body layer, and the etching mask layer is covered on nanometer body layer b,；
C, nano thin-layer is set on above-mentioned etching mask layer；
D, above-mentioned nano thin-layer is annealed, to be agglomerated into densely arranged some nano dots on etching mask layer,
Nanometer spot hole is formed in the outside of nano dot；
E, it is mask using nano dot, dry etching is carried out to etching mask layer and nanometer body layer, with removal and nanometer
Part nanometer body layer below the point corresponding etching mask layer in hole site and the etching mask layer, to obtain being located at nanometer
The etch mask block of point lower section；
F, above-mentioned nano dot is removed, and wet etching is carried out to nanometer body layer using the etch mask block, is carved with removing
Lose the nanometer body layer on the outside of mask block；
G, remove above-mentioned etch mask block and obtain some mutually discrete nano-pillars；
H, ITO layer is deposited in above-mentioned nano-pillar, and the ITO layer is annealed, to cause ITO layer and GaN substrate
Ohmic contact.
The GaN substrate is P-GaN substrates, and nanometer body layer is the silicon nitride layer being deposited on by PECVD in GaN substrate.
The etching mask layer is the silicon dioxide layer being deposited on by PECVD on nano-pillar layer.
The nano thin-layer is the Ag layers by electron beam evaporation or magnetron sputtering.The nano thin-layer anneals to form nanometer
450 DEG C -550 DEG C of the temperature range of point.
A diameter of 200nm~500nm of the nano dot.ITO layer is annealed to cause ITO layer and GaN substrate Europe
The annealing temperature of nurse contact is 450 DEG C -650 DEG C.
The nano-pillar is silicon nitride nano post, and the height of nano-pillar, diameter are respectively positioned on 1/4 λ~λ, wherein, λ is GaN base
The optical wavelength of LED light extractions.
The invention has the advantages that：
1st, transparent electrode structure is made up of the nano-pillar structure and covering ITO layer thereon of submicron-scale in GaN substrate, no
Need to change GaN substrate surface topography, in the absence of the risk of GaN base dash-board injury.In the range of GaN base LED luminescence bands, use
Si3N4Nano-pillar and ITO layer refractive index it is essentially identical, close to the refractive index of GaN substrate, it is possible to prevente effectively from optical microstructures
Fresnel reflection loss between LED component.
2nd, highdensity Si is obtained using natural lithography graph technology3N4Optical microstructures, low production cost, graphic scale
Very little size is easily controlled, and distribution is concentrated, and repeatability is high.With reference to PEVCD to Si3N4The accurate control of deposit thickness, is realized to optics
The light of micro-structural physical dimension extracts optimization, improves the exit probability of GaN base LED internal illuminations to greatest extent.
3rd, using the lossless graph transfer method of wet etching after first dry method, vertically turn by the excellent figure of dry etching
Move and speed control characteristic, by natural lithography pattern transfer to the etching mask layer of submicron-scale, and remove graphics field
Most of nanometer body layer, finally by SiO2With Si3N4Between selective wet etching remaining nanometer body layer is gone completely
Remove, obtain nano-pillar, fundamentally avoid causing surface damage to p-GaN substrates, do not interfere with LED electrology characteristic.
Brief description of the drawings
Fig. 1 is the schematic diagram of existing transparent electrode structure.
Fig. 2 is the schematic diagram of the transparent electrode structure of the present invention.
Fig. 3~Figure 13 is the specific implementation process step sectional view that the present invention prepares transparent click structure, wherein
Fig. 3 is the sectional view of GaN substrate of the present invention.
Fig. 4 obtains the sectional view after nanometer body layer for the present invention in GaN substrate.
Fig. 5 obtains the sectional view after etching mask layer for the present invention on nanometer body layer.
Fig. 6 obtains the sectional view after nano thin-layer for the present invention on etching mask layer.
Fig. 7 is that the present invention is annealed to obtain sectional view after nano dot to nano thin-layer.
Fig. 8 is that the present invention using nano dot is that mask etching obtains the sectional view after etch mask block.
Fig. 9 is that the present invention removes the sectional view after nano dot.
Figure 10 is the sectional view after the present invention is performed etching using etch mask block to nanometer body layer.
Figure 11 obtains the sectional view after nano-pillar for the present invention.
Figure 12 is that the present invention sets the sectional view after ITO layer in nano-pillar.
Figure 13 is that the present invention carries out annealing to ITO layer so that ITO layer and the sectional view after GaN substrate Ohmic contact.
Description of reference numerals：1-GaN substrates, 2- nano-pillars, 3- posts clearance hole, 4-ITO layers, 5- nanometer bodies layer, 6- etchings
Mask layer, 7- nano thin-layers, 8- nano dots, 9- nanometers spot hole, the etched holes of 10- first, the etched holes of 11- second, 12- etch masks
Block and 20-ITO flat beds.
Embodiment
With reference to specific drawings and examples, the invention will be further described.
As shown in Figure 1：For the schematic diagram of existing LED transparent electrode structure, ITO flat beds are set specially in GaN substrate 1
20, ITO flat beds 20 and the Ohmic contact of GaN substrate 1, the transparent electrode structure of such a structure have relatively low light extraction efficiency.
As shown in Fig. 2 in order to obtain bloom extraction efficiency, the present invention includes GaN substrate 1；Set in the GaN substrate 1
Put the ITO layer 4 on nano-pillar layer and the covering nano-pillar layer；The nano-pillar layer includes some nano-pillars 2, and ITO layer 4 is covered
Cover in nano-pillar 2, and be filled in the post clearance hole 3 of the both sides of nano-pillar 2, to cause 1 ohm of ITO layer 4 and GaN substrate to connect
Touch.
Specifically, the nano-pillar 2 is silicon nitride nano post, in the range of GaN base LED luminescence bands, silicon nitride nano
The refractive index of the refractive index of post 2 and ITO layer 4 is essentially identical, and is protruded close to the refractive index of GaN substrate 1, nano-pillar 2 in GaN base
On plate 1, and mutually it is not connected between the nano-pillar 2 in GaN substrate 1, i.e., post clearance hole 3 penetrates nano-pillar 2 and can receive all
Rice post 2 forms mutually discrete shape, and using the geometry of nano-pillar 2, it is several can to increase the outgoing that lighted in GaN base LED
Rate, it is possible to prevente effectively from the Fresnel reflection loss between optical microstructures and LED component, that is, reach and obtain bloom extraction efficiency
Purpose.
Usually, the height of nano-pillar 2, diameter are respectively positioned on 1/4 λ~λ, wherein, λ is the optical wavelength of GaN base LED light extractions,
After the height of nano-pillar 2, diameter match with optical wavelength, the maximization of light extraction can be further assured that.
As shown in Fig. 3~Figure 13, above-mentioned bloom extraction efficiency GaN base LED transparent electrode structure can pass through following techniques
Step is prepared, and specific steps include：
GaN substrate 1 is provided, and nanometer body layer 5 is set in the GaN substrate 1 a,；
As shown in Figure 3 and Figure 4, the GaN substrate 1 is P-GaN substrates, and nanometer body layer 5 is to be deposited on GaN by PECVD
Silicon nitride layer on substrate 1.The thickness of nanometer body layer 5 goes out between 1/4 times~1 times of optical wavelength in GaN base LED.Usually,
GaN base LED wave-length coverage is 400nm-600nm, and the thickness range that is to say nanometer body layer 5 is 100-600nm.
Etching mask layer 6 is set on above-mentioned nanometer body layer 5, and the etching mask layer 6 is covered on nanometer body layer 5 b,；
As shown in figure 5, the etching mask layer 6 is the silicon dioxide layer being deposited on by PECVD on nano-pillar layer 5.One
As, more than 1/4 times in the thickness of nano-pillar layer 5 of the thickness of etching mask layer 6.
Nano thin-layer 7 is set on above-mentioned etching mask layer 6 c,；
As shown in fig. 6, the nano thin-layer 7 is the Ag layers by electron beam evaporation or magnetron sputtering.
D, above-mentioned nano thin-layer 7 is annealed, to be agglomerated into densely arranged some nano dots on etching mask layer 6
8, form nanometer spot hole 9 in the outside of nano dot 8；
As shown in fig. 7, the nano thin-layer 7, which is annealed, forms 450 DEG C -550 DEG C of the temperature range of nano dot 8, annealing way
For short annealing (RTA).The thickness of nano thin-layer 7 is related to the diameter of nano dot 8, and a diameter of 200nm of the nano dot 8~
500nm.After annealing forms nano dot 8, nature litho pattern can be obtained on etching mask layer 6.Reunite in nano thin-layer 7
After forming nano dot 8, nano dot hole 9 is obtained in the outside of nano dot 8, can etching mask layer 6 by nanometer spot hole 9
Divide exposed.The specific embodiment annealed to Ag nano thin-layers 7 to agglomerate into nano dot 8 is those skilled in the art institute
It is known, no longer it is described in detail herein.
E, it is mask using nano dot 8, dry etching is carried out to etching mask layer 6 and nanometer body layer 5, to remove and receive
The corresponding etching mask layer 6 in rice spot hole 9 position and the part nanometer body layer 5 of the lower section of the etching mask layer 6, to obtain in place
Etch mask block 12 in the lower section of nano dot 8；
As shown in figure 8, because etching mask layer 6 can be carried out partial denudation by nanometer spot hole 9, screening is used as by the use of nano dot 8
After keeping off mask, exposed etching mask layer 6 and the nanometer body layer of the lower section of exposed etching mask layer 6 can be removed by dry etching
5, the thickness of remaining nanometer body layer 5 can be selected according to process conditions such as etch periods.Because the etching of exposed part is covered
Film layer 6 is etched away, and therefore, below nano dot 8 and can be formed etching with the etching mask layer 6 of the contact portion of nano dot 8 and be covered
Film block 12, at the same time, the first etched hole 10 is formed in the outside of nano dot 8 and etch mask block 12, pass through the first etching
Hole 10 can make it that the nanometer body layer 5 of appropriate section is exposed.
F, above-mentioned nano dot 8 is removed, and wet etching is carried out to nanometer body layer 5 using the etch mask block 12, to go
Except the nanometer body layer 5 in the outside of etch mask block 12；
As shown in Figure 9 and Figure 10, after removing nano dot 8, the surface exposure of etch mask block 12, etch mask block 12 is utilized
For mask, using the nanometer body layer 5 of the above-mentioned exposed part of wet etching, by the nanometer below the above-mentioned bottom hole of first etched hole 10
Body layer 5 performs etching removal, can be by the surface exposure of GaN substrate 1 by the second etched hole 11 to obtain the second etched hole 11.
Usually, dust technology can be used by removing nano dot 8, and wet etching is carried out to nanometer body layer 5 using heating phosphoric acid,diluted, specific work
Skill process and condition are known to those skilled in the art, and here is omitted.
G, remove above-mentioned etch mask block 12 and obtain some mutually discrete nano-pillars 2；
As shown in figure 11, due to removing the nanometer body layer 5 on the outside of etch mask block 12 using wet etching, so as to obtain
Nanometer body layer 5 immediately below etch mask block 12, it is mutual by post clearance hole 3 between nano-pillar 2 so as to obtain some nano-pillars 2
It is not connected to.The height of nano-pillar 2 is consistent with the thickness of nanometer body layer 5.BOE solution can be used for etch mask block 12,
Specific removal process is known to those skilled in the art.
H, ITO layer 4 is deposited in above-mentioned nano-pillar 2, and the ITO layer 4 is annealed, to cause ITO layer 4 and GaN
The Ohmic contact of substrate 1.
As shown in Figure 12 and Figure 13, ITO layer 4 is annealed to cause the annealing of ITO layer 4 and the Ohmic contact of GaN substrate 1
Temperature is 450 DEG C -650 DEG C, and the deposition process of ITO layer 4 can be electron beam evaporation, reaction and plasma deposition or magnetron sputtering；ITO
The method for annealing of layer 4 is furnace anneal or short annealing.ITO layer 4 is annealed so that ITO layer 4 connects for 1 ohm with GaN substrate
Tactile specific embodiment is that here is omitted known to those skilled in the art.
The transparent electrode structure of the present invention is by ITO of the structure of nano-pillar 2 of submicron-scale in GaN substrate 1 with covering thereon
Layer 4 is formed, it is not necessary to changes the surface topography of GaN substrate 1, the risk damaged in the absence of GaN substrate 1.In the luminous ripples of GaN base LED
In segment limit, using Si3N4Nano-pillar 2 and the refractive index of ITO layer 4 it is essentially identical, close to the refractive index of GaN substrate 1, Ke Yiyou
Effect avoids the Fresnel reflection loss between optical microstructures and LED component.
Highdensity Si is obtained using natural lithography graph technology3N4Optical microstructures, low production cost, dimension of picture
Size is easily controlled, and distribution is concentrated, and repeatability is high.With reference to PEVCD to Si3N4The accurate control of deposit thickness, is realized micro- to optics
The light of geometrical scale extracts optimization, improves the exit probability of GaN base LED internal illuminations to greatest extent.
Using the lossless graph transfer method of wet etching after first dry method, vertically shifted by the excellent figure of dry etching
With speed control characteristic, by the natural lithography pattern transfer of submicron-scale to etching mask layer 6, and graphics field is removed
Most of nanometer body layer 5, finally by SiO2With Si3N4Between selective wet etching remaining nanometer body layer 5 is gone completely
Remove, obtain nano-pillar 2, fundamentally avoid causing surface damage to p-GaN substrates 1, do not interfere with LED electrology characteristic.
Claims (1)
1. a kind of preparation method of bloom extraction efficiency GaN base LED transparent electrode structure, it is characterized in that, the transparency electrode knot
The preparation method of structure comprises the following steps：
(a) GaN substrate (1), is provided, and nanometer body layer (5) is set in the GaN substrate (1)；
(b) etching mask layer (6), is set on above-mentioned nanometer body layer (5), and the etching mask layer (6) is covered in nanometer body layer
(5) on；
(c) nano thin-layer (7), is set on above-mentioned etching mask layer (6)；
(d), above-mentioned nano thin-layer (7) is annealed, to be agglomerated into densely arranged some nanometers on etching mask layer (6)
Point (8), nanometer spot hole (9) is formed in the outside of nano dot (8)；
(e) it is, mask using nano dot (8), dry etching is carried out to etching mask layer (6) and nanometer body layer (5), removes
Part nanometer body layer below the etching mask layer (6) and the etching mask layer (6) corresponding with nanometer spot hole (9) position
(5), to obtain the etch mask block (12) below the nano dot (8)；
(f) above-mentioned nano dot (8), is removed, and wet etching is carried out to nanometer body layer (5) using the etch mask block (12),
To remove the nanometer body layer (5) on the outside of etch mask block (12)；
(g), remove above-mentioned etch mask block (12) and obtain some mutually discrete nano-pillars (2)；
(h) ITO layer (4), is deposited in above-mentioned nano-pillar (2), and the ITO layer (4) is annealed, to cause ITO layer (4)
With GaN substrate (1) Ohmic contact；
The nano-pillar (2) is silicon nitride nano post, and the height of nano-pillar (2), diameter are respectively positioned on 1/4 λ~λ, wherein, λ GaN
The optical wavelength of base LED light extractions；
The GaN substrate (1) is P-GaN substrates, and nanometer body layer (5) is the nitridation being deposited on by PECVD in GaN substrate (1)
Silicon layer；
The etching mask layer (6) is the silicon dioxide layer being deposited on by PECVD on nano-pillar layer (5)；
The nano thin-layer (7) is the Ag layers by electron beam evaporation or magnetron sputtering；
Nano thin-layer (7) annealing forms 450 DEG C -550 DEG C of the temperature range of nano dot (8)；
A diameter of 200nm~500nm of the nano dot (8)；
The annealing temperature annealed to ITO layer (4) to cause ITO layer (4) and GaN substrate (1) Ohmic contact is 450 DEG C -650
℃。
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| CN101320766A (en) * | 2007-06-05 | 2008-12-10 | 台达电子工业股份有限公司 | Current-diffusing layer, LED device and its preparing process |
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| CN204407352U (en) * | 2015-03-10 | 2015-06-17 | 江苏新广联半导体有限公司 | High light extraction efficiency GaN base LED transparent electrode structure |
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| CN101320766A (en) * | 2007-06-05 | 2008-12-10 | 台达电子工业股份有限公司 | Current-diffusing layer, LED device and its preparing process |
| CN103094434A (en) * | 2012-11-27 | 2013-05-08 | 南京大学 | Preparation method of nano array pattern through inductive coupling plasma (ICP) GaN-based multiple quantum wells |
| CN204407352U (en) * | 2015-03-10 | 2015-06-17 | 江苏新广联半导体有限公司 | High light extraction efficiency GaN base LED transparent electrode structure |
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Effective date of registration: 20180314 Address after: 214192 Wuxi, Xishan Province Economic Development Zone, North Road, unity, No. 18, No. Co-patentee after: Jiangsu Xinguanglian Semiconductors Co., Ltd. Patentee after: Jiangsu Xinguanglian Technology Co., Ltd. Address before: 214192 Wuxi, Xishan Province Economic Development Zone, North Road, unity, No. 18, No. Patentee before: Jiangsu Xinguanglian Semiconductors Co., Ltd. |