CN104659180A - Transparent electrode structure of GaN-based LED (Light Emitting Diode) with high light extraction efficiency and preparation method thereof - Google Patents

Transparent electrode structure of GaN-based LED (Light Emitting Diode) with high light extraction efficiency and preparation method thereof Download PDF

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CN104659180A
CN104659180A CN201510104382.7A CN201510104382A CN104659180A CN 104659180 A CN104659180 A CN 104659180A CN 201510104382 A CN201510104382 A CN 201510104382A CN 104659180 A CN104659180 A CN 104659180A
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CN104659180B (en
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李睿
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Jiangsu Xinguanglian Semiconductors Co., Ltd.
Jiangsu Xinguanglian Technology Co., Ltd.
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/83Electrodes
    • H10H20/832Electrodes characterised by their material
    • H10H20/833Transparent materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/83Electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • H10H20/032Manufacture or treatment of electrodes

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Abstract

The invention relates to a transparent electrode structure and a preparation method thereof, particularly relates to a transparent electrode structure of a GaN-based LED (Light Emitting Diode) with high light extraction efficiency and a preparation method thereof and belongs to the technical field of LED semiconductor devices. According to the technical scheme provided by the invention, the transparent electrode structure comprises a GaN substrate, wherein the GaN substrate is provided with a nano column layer and an ITO (Indium Tin Oxide) layer covering the nano column layer; the nano column layer comprises a plurality of nano columns; the ITO layer covers on the nano columns and column disconnecting holes at the two sides of the nano columns are filled with the ITO layer, so that the ITO layer and the GaN substrate are contacted. The transparent electrode structure has the advantages that the light extraction efficiency of the GaN-based positive LED can be obviously improved, the process operation is convenient, the cost is low, the application range is wide, and the safe and reliable effects are achieved.

Description

高光抽取效率GaN基LED透明电极结构及制备方法High light extraction efficiency GaN-based LED transparent electrode structure and preparation method

技术领域technical field

本发明涉及一种透明电极结构及制备方法,尤其是一种高光抽取效率GaN基LED透明电极结构及制备方法,属于LED半导体器件的技术领域。The invention relates to a transparent electrode structure and a preparation method, in particular to a high light extraction efficiency GaN-based LED transparent electrode structure and a preparation method, belonging to the technical field of LED semiconductor devices.

背景技术Background technique

未来固体照明应用的普及取决于高光效GaN基LED制备技术的发展。制约GaN基正装LED性能提升的基本障碍之一是其构成材料的高折射率(相对于外部介质)。由于GaN基材料(n=2.3)和空气介质(n=1)折射率之间的显著差异,造成GaN基正装LED的光逃逸锥角偏小,大部分光难以从器件内部出射而损耗,限制了器件的光抽取效率。所以一直以来,大量的研究工作都致力于如何提高器件的光抽取效率,相继产生了诸如ITO表面粗化、渐变折射率层、图形化蓝宝石衬底、热酸侧壁腐蚀、全向反射镜、光子晶体、器件几何形状优化等方法。The popularity of solid-state lighting applications in the future depends on the development of high-efficiency GaN-based LED preparation technology. One of the fundamental obstacles restricting the performance improvement of GaN-based front-mount LEDs is the high refractive index (relative to the external medium) of its constituent materials. Due to the significant difference in the refractive index between the GaN-based material (n=2.3) and the air medium (n=1), the light escape cone angle of the GaN-based front-mount LED is relatively small, and most of the light is difficult to exit from the device and be lost. the light extraction efficiency of the device. Therefore, a lot of research work has been devoted to how to improve the light extraction efficiency of the device, such as ITO surface roughening, graded index layer, patterned sapphire substrate, hot acid sidewall etching, omnidirectional mirror, Photonic crystals, device geometry optimization and other methods.

从大体上讲,由于GaN基正装LED出光中顶面出光占比最大,因此改变器件顶面形貌增大光出射几率是提升器件效率的有效途径之一。曾有报道利用自然光刻图形化技术粗化ITO透明电极层;调整MOCVD外延生长条件形成p-GaN表面微坑;p-GaN表面化学生长ZnO纳米柱等方法都能显著提高出光,但值得注意的是上述方法自身亦存在明显的缺点和不足。ITO粗化通常需要借助干法蚀刻,通常会造成ITO电学性能的劣化;外延粗化p-GaN表面会在一定程度上牺牲生长质量和掺杂效率;化学生长ZnO纳米柱工艺繁复,并且纳米柱的附着性也难以保证。到目前为止,综合效果良好且操作简单易行的制备方法却鲜有提及。因此,迫切需要开发一种即能够显著提升光抽取效率,又不会对器件其他特性带来负面影响,且生产可行性较好的新方法。Generally speaking, since GaN-based front-mount LEDs account for the largest proportion of light emitted from the top surface, changing the top surface morphology of the device to increase the probability of light emission is one of the effective ways to improve device efficiency. It has been reported that using natural lithographic patterning technology to roughen the ITO transparent electrode layer; adjusting the MOCVD epitaxial growth conditions to form p-GaN surface micropits; What is more, there are also obvious shortcomings and deficiencies in the above-mentioned method itself. ITO roughening usually requires dry etching, which usually causes the deterioration of the electrical properties of ITO; epitaxial roughening of the p-GaN surface will sacrifice growth quality and doping efficiency to a certain extent; chemical growth of ZnO nanocolumns is complicated, and nanocolumns Adhesion is also difficult to guarantee. So far, the preparation methods with good comprehensive effect and simple operation are rarely mentioned. Therefore, there is an urgent need to develop a new method that can significantly improve the light extraction efficiency without negatively affecting other device characteristics and has better production feasibility.

发明内容Contents of the invention

本发明的目的是克服现有技术中存在的不足,提供一种高光抽取效率GaN基LED透明电极结构及制备方法,其能显著提高GaN基正装LED的光抽取效率,工艺操作方便,成本低,适应范围广,安全可靠。The purpose of the present invention is to overcome the deficiencies in the prior art and provide a GaN-based LED transparent electrode structure and preparation method with high light extraction efficiency, which can significantly improve the light extraction efficiency of GaN-based formal LEDs, with convenient process operation and low cost. Wide adaptability, safe and reliable.

按照本发明提供的技术方案,所述高光抽取效率GaN基LED透明电极结构,包括GaN基板;在所述GaN基板上设置纳米柱层以及覆盖所述纳米柱层上的ITO层;所述纳米柱层包括若干纳米柱,ITO层覆盖在纳米柱上,并填充在纳米柱两侧的柱隔离孔内,以使得ITO层与GaN基板欧姆接触。According to the technical solution provided by the present invention, the high light extraction efficiency GaN-based LED transparent electrode structure includes a GaN substrate; a nano-column layer is arranged on the GaN substrate and an ITO layer covering the nano-column layer; the nano-column The layer includes several nano-columns, and the ITO layer covers the nano-columns and fills the column isolation holes on both sides of the nano-columns, so that the ITO layer is in ohmic contact with the GaN substrate.

所述纳米柱为氮化硅纳米柱,纳米柱的高度、直径均位于1/4λ~λ,其中,λ为GaN基LED出光的光波长。The nano-column is a silicon nitride nano-column, and the height and diameter of the nano-column are between 1/4λ˜λ, where λ is the wavelength of light emitted by the GaN-based LED.

一种高光抽取效率GaN基LED透明电极结构的制备方法,所述透明电极结构的制备方法包括如下步骤:A method for preparing a GaN-based LED transparent electrode structure with high light extraction efficiency, the method for preparing the transparent electrode structure includes the following steps:

a、提供GaN基板,并在所述GaN基板上设置纳米体层;a. Providing a GaN substrate, and disposing a nanobody layer on the GaN substrate;

b、在上述纳米体层上设置刻蚀掩膜层,所述刻蚀掩膜层覆盖在纳米体层上;b. setting an etching mask layer on the nanobody layer, and the etching mask layer covers the nanobody layer;

c、在上述刻蚀掩膜层上设置纳米薄层;c. setting a nano-thin layer on the etching mask layer;

d、对上述纳米薄层进行退火,以在刻蚀掩膜层上团聚成密集排布的若干纳米点,在纳米点的外侧形成纳米点孔;d, annealing the nano-thin layer to agglomerate a number of nano-dots densely arranged on the etching mask layer, and form nano-dot holes outside the nano-dots;

e、利用纳米点为掩膜,对刻蚀掩膜层以及纳米体层进行干法刻蚀,以去除与纳米点孔位置相对应的刻蚀掩膜层以及所述刻蚀掩膜层下方的部分纳米体层,以得到位于纳米点下方的刻蚀掩膜块;e. Using the nano-dots as a mask, dry-etching the etching mask layer and the nanobody layer to remove the etching mask layer corresponding to the position of the nano-dot hole and the underside of the etching mask layer part of the nanobody layer to obtain an etch mask block located under the nanodots;

f、去除上述纳米点,并利用所述刻蚀掩膜块对纳米体层进行湿法刻蚀,以去除刻蚀掩膜块外侧的纳米体层;f. removing the above-mentioned nano-dots, and performing wet etching on the nanobody layer by using the etching mask block, so as to remove the nanobody layer outside the etching mask block;

g、去除上述刻蚀掩膜块得到若干相互不连接的纳米柱;g, removing the above-mentioned etching mask block to obtain a number of disconnected nanocolumns;

h、在上述纳米柱上沉积ITO层,并对所述ITO层进行退火,以使得ITO层与GaN基板欧姆接触。h. Depositing an ITO layer on the above-mentioned nanocolumns, and annealing the ITO layer, so that the ITO layer is in ohmic contact with the GaN substrate.

所述GaN基板为P-GaN基板,纳米体层为通过PECVD沉积在GaN基板上的氮化硅层。The GaN substrate is a P-GaN substrate, and the nanobody layer is a silicon nitride layer deposited on the GaN substrate by PECVD.

所述刻蚀掩膜层为通过PECVD沉积在纳米柱层上的二氧化硅层。The etching mask layer is a silicon dioxide layer deposited on the nanocolumn layer by PECVD.

所述纳米薄层为通过电子束蒸发或磁控溅射的Ag层。所述纳米薄层退火形成纳米点的温度范围450℃-550℃。The nano-thin layer is an Ag layer evaporated by electron beam or magnetron sputtering. The temperature range of the annealing of the nano-thin layer to form nano-dots is 450°C-550°C.

所述纳米点的直径为200nm~500nm。对ITO层进行退火以使得ITO层与GaN基板欧姆接触的退火温度为450℃-650℃。The diameter of the nano-dot is 200nm-500nm. The annealing temperature for annealing the ITO layer so that the ITO layer is in ohmic contact with the GaN substrate is 450° C.-650° C.

所述纳米柱为氮化硅纳米柱,纳米柱的高度、直径均位于1/4λ~λ,其中,λ为GaN基LED出光的光波长。The nano-column is a silicon nitride nano-column, and the height and diameter of the nano-column are between 1/4λ˜λ, where λ is the wavelength of light emitted by the GaN-based LED.

本发明具有如下优点:The present invention has the following advantages:

1、透明电极结构由GaN基板上亚微米尺度的纳米柱构和覆盖其上的ITO层构成,不需要改变GaN基板表面形貌,不存在GaN基板损伤的风险。在GaN基LED发光波段范围内,采用Si3N4的纳米柱与ITO层折射率基本相同,接近GaN基板的折射率,可以有效避免光学微结构与LED器件之间的菲涅尔反射损失。1. The transparent electrode structure is composed of submicron-scale nano-column structure on the GaN substrate and the ITO layer covering it. It does not need to change the surface morphology of the GaN substrate, and there is no risk of damage to the GaN substrate. In the GaN-based LED light-emitting wavelength range, the refractive index of the Si 3 N 4 nanocolumn is basically the same as that of the ITO layer, which is close to the refractive index of the GaN substrate, which can effectively avoid the Fresnel reflection loss between the optical microstructure and the LED device.

2、利用自然光刻图形技术获得高密度的Si3N4光学微结构,生产成本低廉,图形尺寸大小容易控制,分布集中,重复性高。结合PEVCD对Si3N4沉积厚度的精确控制,实现对光学微结构几何尺寸的光抽取优化,最大限度的提高GaN基LED内部发光的出射几率。2. High-density Si 3 N 4 optical microstructures are obtained by using natural photolithographic patterning technology, which has low production cost, easy control of pattern size, concentrated distribution, and high repeatability. Combined with the precise control of the deposition thickness of Si 3 N 4 by PEVCD, the light extraction optimization of the geometric size of the optical microstructure is realized, and the emission probability of the internal light emitted by the GaN-based LED is maximized.

3、采用先干法后湿法蚀刻的无损图形转移方法,借助干法蚀刻优良的图形垂直转移和速率控制特性,将亚微米尺度的自然光刻图形转移至刻蚀掩膜层上,并去除图形区域的大部分纳米体层,最后借助SiO2与Si3N4之间的选择性湿法腐蚀将剩余纳米体层完全去除,得到纳米柱,从根本上避免对p-GaN基板造成表面损伤,不会影响LED的电学特性。3. Using the non-destructive pattern transfer method of dry etching first and then wet etching, with the help of dry etching's excellent vertical transfer and rate control characteristics, the submicron-scale natural photolithography pattern is transferred to the etching mask layer, and removed Most of the nanobody layer in the pattern area, and finally the remaining nanobody layer is completely removed by selective wet etching between SiO 2 and Si 3 N 4 to obtain nanopillars, which fundamentally avoids surface damage to the p-GaN substrate , will not affect the electrical characteristics of the LED.

附图说明Description of drawings

图1为现有透明电极结构的示意图。FIG. 1 is a schematic diagram of a conventional transparent electrode structure.

图2为本发明的透明电极结构的示意图。Fig. 2 is a schematic diagram of the transparent electrode structure of the present invention.

图3~图13为本发明制备透明点击结构的具体实施工艺步骤剖视图,其中Figures 3 to 13 are cross-sectional views of specific implementation process steps for preparing a transparent click structure in the present invention, wherein

图3为本发明GaN基板的剖视图。Fig. 3 is a cross-sectional view of the GaN substrate of the present invention.

图4为本发明在GaN基板上得到纳米体层后的剖视图。FIG. 4 is a cross-sectional view of a nanobody layer obtained on a GaN substrate according to the present invention.

图5为本发明在纳米体层上得到刻蚀掩膜层后的剖视图。Fig. 5 is a cross-sectional view of the present invention after obtaining an etching mask layer on the nanobody layer.

图6为本发明在刻蚀掩膜层上得到纳米薄层后的剖视图。FIG. 6 is a cross-sectional view of the present invention after obtaining a nano-thin layer on the etching mask layer.

图7为本发明对纳米薄层进行退火得到纳米点后的剖视图。Fig. 7 is a cross-sectional view of nano dots obtained by annealing the nano thin layer according to the present invention.

图8为本发明利用纳米点为掩膜刻蚀得到刻蚀掩膜块后的剖视图。FIG. 8 is a cross-sectional view of an etching mask block obtained by etching using nano dots as a mask according to the present invention.

图9为本发明去除纳米点后的剖视图。Fig. 9 is a cross-sectional view of the present invention after nano-dots are removed.

图10为本发明利用刻蚀掩膜块对纳米体层进行刻蚀后的剖视图。FIG. 10 is a cross-sectional view of the nanobody layer etched by using an etching mask block according to the present invention.

图11为本发明得到纳米柱后的剖视图。Fig. 11 is a cross-sectional view of nanocolumns obtained in the present invention.

图12为本发明在纳米柱上设置ITO层后的剖视图。Fig. 12 is a cross-sectional view of the present invention after an ITO layer is disposed on the nanocolumn.

图13为本发明对ITO层进行退火使得ITO层与GaN基板欧姆接触后的剖视图。13 is a cross-sectional view of the present invention after the ITO layer is annealed so that the ITO layer is in ohmic contact with the GaN substrate.

附图标记说明:1-GaN基板、2-纳米柱、3-柱隔离孔、4-ITO层、5-纳米体层、6-刻蚀掩膜层、7-纳米薄层、8-纳米点、9-纳米点孔、10-第一刻蚀孔、11-第二刻蚀孔、12-刻蚀掩膜块以及20-ITO平层。Explanation of reference numerals: 1-GaN substrate, 2-nanocolumn, 3-column isolation hole, 4-ITO layer, 5-nanometer body layer, 6-etching mask layer, 7-nanometer thin layer, 8-nanometer point , 9-nano dot hole, 10-first etching hole, 11-second etching hole, 12-etching mask block and 20-ITO flat layer.

具体实施方式Detailed ways

下面结合具体附图和实施例对本发明作进一步说明。The present invention will be further described below in conjunction with specific drawings and embodiments.

如图1所示:为现有LED透明电极结构的示意图,具体为在GaN基板1上设置ITO平层20,ITO平层20与GaN基板1欧姆接触,此种结构的透明电极结构具有较低的光抽取效率。As shown in Fig. 1: it is the schematic diagram of existing LED transparent electrode structure, specifically is to arrange ITO flat layer 20 on GaN substrate 1, and ITO flat layer 20 is in ohmic contact with GaN substrate 1, and the transparent electrode structure of this kind of structure has lower light extraction efficiency.

如图2所示,为了获得高光抽取效率,本发明包括GaN基板1;在所述GaN基板1上设置纳米柱层以及覆盖所述纳米柱层上的ITO层4;所述纳米柱层包括若干纳米柱2,ITO层4覆盖在纳米柱2上,并填充在纳米柱2两侧的柱隔离孔3内,以使得ITO层4与GaN基板1欧姆接触。As shown in Figure 2, in order to obtain high light extraction efficiency, the present invention comprises GaN substrate 1; On described GaN substrate 1, arrange nanocolumn layer and cover the ITO layer 4 on described nanocolumn layer; Described nanocolumn layer comprises several The nano-column 2 , the ITO layer 4 covers the nano-column 2 and fills the column isolation holes 3 on both sides of the nano-column 2 , so that the ITO layer 4 is in ohmic contact with the GaN substrate 1 .

具体地,所述纳米柱2为氮化硅纳米柱,在GaN基LED发光波段范围内,氮化硅纳米柱2的折射率与ITO层4的折射率基本相同,且接近GaN基板1的折射率,纳米柱2凸出在GaN基板1上,且GaN基板1上的纳米柱2间相互不连接,即柱隔离孔3贯通纳米柱2且能将所有的纳米柱2形成相互不连接的形状,利用纳米柱2的几何形状,可以增大GaN基LED内发光出射几率,可以有效避免光学微结构与LED器件之间的菲涅尔反射损失,即达到获得高光抽取效率的目的。Specifically, the nanocolumn 2 is a silicon nitride nanocolumn, and within the GaN-based LED light-emitting wavelength range, the refractive index of the silicon nitride nanocolumn 2 is basically the same as that of the ITO layer 4, and is close to the refractive index of the GaN substrate 1. The nano-column 2 protrudes on the GaN substrate 1, and the nano-column 2 on the GaN substrate 1 is not connected to each other, that is, the column isolation hole 3 penetrates the nano-column 2 and can form all the nano-columns 2 into a shape that is not connected to each other. , using the geometric shape of the nano-column 2 can increase the probability of emitting light in the GaN-based LED, and can effectively avoid the Fresnel reflection loss between the optical microstructure and the LED device, that is, to achieve the purpose of obtaining high light extraction efficiency.

一般地,纳米柱2的高度、直径均位于1/4λ~λ,其中,λ为GaN基LED出光的光波长,纳米柱2的高度、直径与光波长匹配后,能进一步地确保出光的最大化。Generally, the height and diameter of the nanocolumn 2 are between 1/4λ∼λ, where λ is the light wavelength of the GaN-based LED. After the height and diameter of the nanocolumn 2 are matched with the light wavelength, the maximum light output can be further ensured. change.

如图3~图13所示,上述高光抽取效率GaN基LED透明电极结构可以通过下述工艺步骤制备得到,具体步骤包括:As shown in Figures 3 to 13, the above GaN-based LED transparent electrode structure with high light extraction efficiency can be prepared through the following process steps, and the specific steps include:

a、提供GaN基板1,并在所述GaN基板1上设置纳米体层5;a, providing a GaN substrate 1, and disposing a nanobody layer 5 on the GaN substrate 1;

如图3和图4所示,所述GaN基板1为P-GaN基板,纳米体层5为通过PECVD沉积在GaN基板1上的氮化硅层。纳米体层5的厚度在GaN基LED出光波长的1/4倍~1倍之间。一般地,GaN基LED的波长范围为400nm-600nm,也即是纳米体层5的厚度范围为100-600nm。As shown in FIGS. 3 and 4 , the GaN substrate 1 is a P-GaN substrate, and the nanobody layer 5 is a silicon nitride layer deposited on the GaN substrate 1 by PECVD. The thickness of the nanobody layer 5 is between 1/4 and 1 time of the light emission wavelength of the GaN-based LED. Generally, the wavelength range of the GaN-based LED is 400nm-600nm, that is, the thickness of the nanobody layer 5 is 100-600nm.

b、在上述纳米体层5上设置刻蚀掩膜层6,所述刻蚀掩膜层6覆盖在纳米体层5上;b. setting an etching mask layer 6 on the nanobody layer 5, and the etching mask layer 6 covers the nanobody layer 5;

如图5所示,所述刻蚀掩膜层6为通过PECVD沉积在纳米柱层5上的二氧化硅层。一般地,刻蚀掩膜层6的厚度在纳米柱层5厚度的1/4倍以上。As shown in FIG. 5 , the etching mask layer 6 is a silicon dioxide layer deposited on the nanocolumn layer 5 by PECVD. Generally, the thickness of the etching mask layer 6 is more than 1/4 of the thickness of the nano-column layer 5 .

c、在上述刻蚀掩膜层6上设置纳米薄层7;c. setting a nano-thin layer 7 on the etching mask layer 6;

如图6所示,所述纳米薄层7为通过电子束蒸发或磁控溅射的Ag层。As shown in FIG. 6 , the nano-thin layer 7 is an Ag layer by electron beam evaporation or magnetron sputtering.

d、对上述纳米薄层7进行退火,以在刻蚀掩膜层6上团聚成密集排布的若干纳米点8,在纳米点8的外侧形成纳米点孔9;d, annealing the nano-thin layer 7 to agglomerate a plurality of nano-dots 8 densely arranged on the etching mask layer 6, and form nano-dot holes 9 outside the nano-dots 8;

如图7所示,所述纳米薄层7退火形成纳米点8的温度范围450℃-550℃,退火方式为快速退火(RTA)。纳米薄层7的厚度与纳米点8的直径相关,所述纳米点8的直径为200nm~500nm。经过退火形成纳米点8后,能在刻蚀掩膜层6上获得自然光刻图形。在纳米薄层7团聚形成纳米点8后,在纳米点8的外侧即得到纳米点孔9,通过纳米点孔9能使得刻蚀掩膜层6部分裸露。对Ag纳米薄层7进行退火以团聚形成纳米点8的具体工艺过程为本技术领域人员所熟知,此处不再详述。As shown in FIG. 7 , the annealing temperature range of the nano-thin layer 7 to form the nano-dots 8 is 450° C.-550° C., and the annealing method is rapid annealing (RTA). The thickness of the nano-thin layer 7 is related to the diameter of the nano-dot 8, and the diameter of the nano-dot 8 is 200nm-500nm. After the nano-dots 8 are formed by annealing, a natural photolithography pattern can be obtained on the etching mask layer 6 . After the nano-thin layers 7 are aggregated to form nano-dots 8 , nano-dot holes 9 are obtained outside the nano-dots 8 , and the etching mask layer 6 can be partially exposed through the nano-dot holes 9 . The specific process of annealing the Ag nano-thin layer 7 to agglomerate to form nano-dots 8 is well known to those skilled in the art, and will not be described in detail here.

e、利用纳米点8为掩膜,对刻蚀掩膜层6以及纳米体层5进行干法刻蚀,以去除与纳米点孔9位置相对应的刻蚀掩膜层6以及所述刻蚀掩膜层6下方的部分纳米体层5,以得到位于纳米点8下方的刻蚀掩膜块12;e. Using the nano-dots 8 as a mask, dry-etch the etching mask layer 6 and the nanobody layer 5 to remove the etching mask layer 6 corresponding to the position of the nano-dot hole 9 and the etching Part of the nanobody layer 5 below the mask layer 6, so as to obtain an etching mask block 12 located below the nanodot 8;

如图8所示,由于纳米点孔9能将刻蚀掩膜层6进行部分裸露,利用纳米点8作为遮挡掩膜后,通过干法刻蚀能去除裸露的刻蚀掩膜层6以及裸露刻蚀掩膜层6下方的纳米体层5,剩余纳米体层5的厚度可以根据刻蚀时间等工艺条件进行选择。由于裸露部分的刻蚀掩膜层6被刻蚀掉,因此,在纳米点8下方且与纳米点8接触部分的刻蚀掩膜层6会形成刻蚀掩膜块12,与此同时,在纳米点8以及刻蚀掩膜块12的外侧形成第一刻蚀孔10,通过第一刻蚀孔10能使得相应部分的纳米体层5裸露。As shown in Figure 8, since the nano-dot hole 9 can partially expose the etching mask layer 6, after using the nano-dot 8 as a blocking mask, the exposed etching mask layer 6 and the exposed etching mask layer 6 can be removed by dry etching. The nanobody layer 5 below the mask layer 6 is etched, and the thickness of the remaining nanobody layer 5 can be selected according to process conditions such as etching time. Because the etching mask layer 6 of the exposed part is etched away, therefore, the etching mask layer 6 below the nano-dot 8 and in contact with the nano-dot 8 will form an etching mask block 12, and at the same time, The outer sides of the nano dots 8 and the etching mask block 12 form a first etching hole 10 through which the corresponding part of the nanobody layer 5 can be exposed.

f、去除上述纳米点8,并利用所述刻蚀掩膜块12对纳米体层5进行湿法刻蚀,以去除刻蚀掩膜块12外侧的纳米体层5;f. Remove the above-mentioned nano-dots 8, and use the etching mask block 12 to wet-etch the nano-body layer 5, to remove the nano-body layer 5 outside the etching mask block 12;

如图9和图10所示,去除纳米点8后,刻蚀掩膜块12的表面裸露,利用刻蚀掩膜块12为掩膜,采用湿法刻蚀上述裸露部分的纳米体层5,以将上述第一刻蚀孔10孔底下方的纳米体层5进行刻蚀去除,以得到第二刻蚀孔11,通过第二刻蚀孔11能将GaN基板1的表面裸露。一般地,去除纳米点8可以采用稀硝酸,对纳米体层5进行湿法刻蚀采用加热稀磷酸,具体工艺过程以及条件均为本技术领域人员所熟知,此处不再赘述。As shown in Figures 9 and 10, after removing the nano-dots 8, the surface of the etching mask block 12 is exposed, and using the etching mask block 12 as a mask, the nano-body layer 5 of the above-mentioned exposed part is etched by a wet method, The nanobody layer 5 below the bottom of the first etching hole 10 is removed by etching to obtain a second etching hole 11 through which the surface of the GaN substrate 1 can be exposed. Generally, dilute nitric acid can be used to remove the nano-dots 8 , and heated dilute phosphoric acid can be used to wet-etch the nano-body layer 5 . The specific process and conditions are well known to those skilled in the art and will not be repeated here.

g、去除上述刻蚀掩膜块12得到若干相互不连接的纳米柱2;g, removing the above-mentioned etching mask block 12 to obtain a number of nano-pillars 2 that are not connected to each other;

如图11所示,由于采用湿法刻蚀去除刻蚀掩膜块12外侧的纳米体层5,从而能得到刻蚀掩膜块12正下方的纳米体层5,从而得到若干纳米柱2,纳米柱2间通过柱隔离孔3相互不连接。纳米柱2的高度与纳米体层5的厚度相一致。对于刻蚀掩膜块12可以采用BOE溶液,具体去除过程为本技术领域人员所熟知。As shown in FIG. 11, since the nanobody layer 5 on the outside of the etching mask block 12 is removed by wet etching, the nanobody layer 5 directly below the etching mask block 12 can be obtained, thereby obtaining several nanocolumns 2, The nanopillars 2 are not connected to each other through the column isolation holes 3 . The height of the nanopillar 2 is consistent with the thickness of the nanobody layer 5 . A BOE solution may be used for etching the mask block 12 , and the specific removal process is well known to those skilled in the art.

h、在上述纳米柱2上沉积ITO层4,并对所述ITO层4进行退火,以使得ITO层4与GaN基板1欧姆接触。h. Depositing an ITO layer 4 on the nanocolumn 2 and annealing the ITO layer 4 so that the ITO layer 4 is in ohmic contact with the GaN substrate 1 .

如图12和图13所示,对ITO层4进行退火以使得ITO层4与GaN基板1欧姆接触的退火温度为450℃-650℃,ITO层4沉积方法可以是电子束蒸发、反应等离子沉积或磁控溅射;ITO层4的退火方法为炉管退火或快速退火。对ITO层4进行退火,使得ITO层4与GaN基板1欧姆接触的具体工艺过程为本技术领域人员所熟知,此处不再赘述。As shown in Figures 12 and 13, the annealing temperature for annealing the ITO layer 4 so that the ITO layer 4 is in ohmic contact with the GaN substrate 1 is 450°C-650°C, and the deposition method of the ITO layer 4 can be electron beam evaporation, reactive plasma deposition or magnetron sputtering; the annealing method of the ITO layer 4 is furnace tube annealing or rapid annealing. The specific process of annealing the ITO layer 4 to make the ohmic contact between the ITO layer 4 and the GaN substrate 1 is well known to those skilled in the art and will not be repeated here.

本发明的透明电极结构由GaN基板1上亚微米尺度的纳米柱2构和覆盖其上的ITO层4构成,不需要改变GaN基板1表面形貌,不存在GaN基板1损伤的风险。在GaN基LED发光波段范围内,采用Si3N4的纳米柱2与ITO层4折射率基本相同,接近GaN基板1的折射率,可以有效避免光学微结构与LED器件之间的菲涅尔反射损失。The transparent electrode structure of the present invention is composed of submicron scale nano-columns 2 on the GaN substrate 1 and the ITO layer 4 covering it, without changing the surface morphology of the GaN substrate 1 and without the risk of damage to the GaN substrate 1 . Within the GaN-based LED light-emitting wavelength range, the refractive index of the nanocolumn 2 using Si 3 N 4 is basically the same as that of the ITO layer 4, which is close to the refractive index of the GaN substrate 1, which can effectively avoid the Fresnel between the optical microstructure and the LED device. reflection loss.

利用自然光刻图形技术获得高密度的Si3N4光学微结构,生产成本低廉,图形尺寸大小容易控制,分布集中,重复性高。结合PEVCD对Si3N4沉积厚度的精确控制,实现对光学微结构几何尺寸的光抽取优化,最大限度的提高GaN基LED内部发光的出射几率。The high-density Si 3 N 4 optical microstructure is obtained by using the natural photolithographic patterning technology, the production cost is low, the pattern size is easy to control, the distribution is concentrated, and the repeatability is high. Combined with the precise control of the deposition thickness of Si 3 N 4 by PEVCD, the light extraction optimization of the geometric size of the optical microstructure is realized, and the emission probability of the internal light emitted by the GaN-based LED is maximized.

采用先干法后湿法蚀刻的无损图形转移方法,借助干法蚀刻优良的图形垂直转移和速率控制特性,将亚微米尺度的自然光刻图形转移至刻蚀掩膜层6上,并去除图形区域的大部分纳米体层5,最后借助SiO2与Si3N4之间的选择性湿法腐蚀将剩余纳米体层5完全去除,得到纳米柱2,从根本上避免对p-GaN基板1造成表面损伤,不会影响LED的电学特性。Using the non-destructive pattern transfer method of dry etching first and then wet etching, with the help of dry etching's excellent pattern vertical transfer and rate control characteristics, the submicron-scale natural photolithographic pattern is transferred to the etching mask layer 6, and the pattern is removed Most of the nanobody layer 5 in the region, and finally the remaining nanobody layer 5 is completely removed by means of selective wet etching between SiO 2 and Si 3 N 4 to obtain nanopillars 2, which fundamentally avoids damage to the p-GaN substrate 1 Cause surface damage, will not affect the electrical characteristics of the LED.

Claims (10)

1.一种高光抽取效率GaN基LED透明电极结构,包括GaN基板(1);其特征是:在所述GaN基板(1)上设置纳米柱层以及覆盖所述纳米柱层上的ITO层(4);所述纳米柱层包括若干纳米柱(2),ITO层(4)覆盖在纳米柱(2)上,并填充在纳米柱(2)两侧的柱隔离孔(3)内,以使得ITO层(4)与GaN基板(1)欧姆接触。1. A high light extraction efficiency GaN-based LED transparent electrode structure, comprising a GaN substrate (1); It is characterized in that: a nano-column layer is set on the GaN substrate (1) and an ITO layer covering the nano-column layer ( 4); the nanocolumn layer includes several nanocolumns (2), and the ITO layer (4) is covered on the nanocolumn (2), and is filled in the column isolation holes (3) on both sides of the nanocolumn (2), to The ITO layer (4) is brought into ohmic contact with the GaN substrate (1). 2.根据权利要求1所述的高光抽取效率GaN基LED透明电极结构,其特征是:所述纳米柱(2)为氮化硅纳米柱,纳米柱(2)的高度、直径均位于1/4λ~λ,其中,λ为GaN基LED出光的光波长。2. The high light extraction efficiency GaN-based LED transparent electrode structure according to claim 1, characterized in that: the nanocolumn (2) is a silicon nitride nanocolumn, and the height and diameter of the nanocolumn (2) are all located at 1/2. 4λ˜λ, where λ is the wavelength of light emitted by the GaN-based LED. 3.一种高光抽取效率GaN基LED透明电极结构的制备方法,其特征是,所述透明电极结构的制备方法包括如下步骤:3. A method for preparing a GaN-based LED transparent electrode structure with high light extraction efficiency, characterized in that, the method for preparing the transparent electrode structure comprises the steps: (a)、提供GaN基板(1),并在所述GaN基板(1)上设置纳米体层(5);(a), providing a GaN substrate (1), and setting a nanobody layer (5) on the GaN substrate (1); (b)、在上述纳米体层(5)上设置刻蚀掩膜层(6),所述刻蚀掩膜层(6)覆盖在纳米体层(5)上;(b), setting an etching mask layer (6) on the nanobody layer (5), and the etching mask layer (6) covers the nanobody layer (5); (c)、在上述刻蚀掩膜层(6)上设置纳米薄层(7);(c), setting nano-thin layer (7) on above-mentioned etching mask layer (6); (d)、对上述纳米薄层(7)进行退火,以在刻蚀掩膜层(6)上团聚成密集排布的若干纳米点(8),在纳米点(8)的外侧形成纳米点孔(9);(d), the above-mentioned nano-thin layer (7) is annealed to agglomerate into several nano-dots (8) densely arranged on the etching mask layer (6), and form nano-dots outside the nano-dots (8) hole(9); (e)、利用纳米点(8)为掩膜,对刻蚀掩膜层(6)以及纳米体层(5)进行干法刻蚀,以去除与纳米点孔(9)位置相对应的刻蚀掩膜层(6)以及所述刻蚀掩膜层(6)下方的部分纳米体层(5),以得到位于纳米点(8)下方的刻蚀掩膜块(12);(e), using the nano-dot (8) as a mask, dry etching the etching mask layer (6) and the nano-body layer (5), to remove the etching corresponding to the position of the nano-dot hole (9) Etching the mask layer (6) and part of the nanobody layer (5) below the etching mask layer (6), to obtain an etching mask block (12) positioned below the nano dot (8); (f)、去除上述纳米点(8),并利用所述刻蚀掩膜块(12)对纳米体层(5)进行湿法刻蚀,以去除刻蚀掩膜块(12)外侧的纳米体层(5);(f), remove above-mentioned nano dots (8), and utilize described etching mask block (12) to carry out wet etching to nanobody layer (5), to remove the nano soma(5); (g)、去除上述刻蚀掩膜块(12)得到若干相互不连接的纳米柱(2);(g), removing the above-mentioned etching mask block (12) to obtain several disconnected nanocolumns (2); (h)、在上述纳米柱(2)上沉积ITO层(4),并对所述ITO层(4)进行退火,以使得ITO层(4)与GaN基板(1)欧姆接触。(h) Depositing an ITO layer (4) on the above-mentioned nanocolumn (2), and annealing the ITO layer (4), so that the ITO layer (4) is in ohmic contact with the GaN substrate (1). 4.根据权利要求3所述高光抽取效率GaN基LED透明电极结构的制备方法,其特征是:所述GaN基板(1)为P-GaN基板,纳米体层(5)为通过PECVD沉积在GaN基板(1)上的氮化硅层。4. according to the preparation method of the GaN-based LED transparent electrode structure with high light extraction efficiency described in claim 3, it is characterized in that: the GaN substrate (1) is a P-GaN substrate, and the nanobody layer (5) is deposited on GaN by PECVD A silicon nitride layer on a substrate (1). 5.根据权利要求3所述高光抽取效率GaN基LED透明电极结构的制备方法,其特征是:所述刻蚀掩膜层(6)为通过PECVD沉积在纳米柱层(5)上的二氧化硅层。5. According to the preparation method of the GaN-based LED transparent electrode structure with high light extraction efficiency according to claim 3, it is characterized in that: the etching mask layer (6) is a carbon dioxide deposited on the nano-column layer (5) by PECVD. silicon layer. 6.根据权利要求3所述高光抽取效率GaN基LED透明电极结构的制备方法,其特征是:所述纳米薄层(7)为通过电子束蒸发或磁控溅射的Ag层。6. The method for preparing a GaN-based LED transparent electrode structure with high light extraction efficiency according to claim 3, characterized in that: the nano-thin layer (7) is an Ag layer evaporated by electron beam or magnetron sputtering. 7.根据权利要求6所述高光抽取效率GaN基LED透明电极结构的制备方法,其特征是:所述纳米薄层(7)退火形成纳米点(8)的温度范围450℃-550℃。7. The method for preparing a GaN-based LED transparent electrode structure with high light extraction efficiency according to claim 6, characterized in that: the temperature range for the annealing of the nano-thin layer (7) to form the nano-dots (8) is 450°C-550°C. 8.根据权利要求3所述高光抽取效率GaN基LED透明电极结构的制备方法,其特征是:所述纳米点(8)的直径为200nm~500nm。8. The method for preparing a GaN-based LED transparent electrode structure with high light extraction efficiency according to claim 3, characterized in that: the diameter of the nano-dots (8) is 200nm-500nm. 9.根据权利要求3所述高光抽取效率GaN基LED透明电极结构的制备方法,其特征是:对ITO层(4)进行退火以使得ITO层(4)与GaN基板(1)欧姆接触的退火温度为450℃-650℃。9. The method for preparing a GaN-based LED transparent electrode structure with high light extraction efficiency according to claim 3, characterized in that: the ITO layer (4) is annealed so that the ITO layer (4) is in ohmic contact with the GaN substrate (1) The temperature is 450°C-650°C. 10.根据权利要求3所述高光抽取效率GaN基LED透明电极结构的制备方法,其特征是:所述纳米柱(2)为氮化硅纳米柱,纳米柱(2)的高度、直径均位于1/4λ~λ,其中,λ为GaN基LED出光的光波长。10. The method for preparing a GaN-based LED transparent electrode structure with high light extraction efficiency according to claim 3, characterized in that: the nanocolumn (2) is a silicon nitride nanocolumn, and the height and diameter of the nanocolumn (2) are located at 1/4λ˜λ, where λ is the wavelength of light emitted by the GaN-based LED.
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CN103094434A (en) * 2012-11-27 2013-05-08 南京大学 Preparation method of nano array pattern through inductive coupling plasma (ICP) GaN-based multiple quantum wells
CN103500778A (en) * 2013-10-23 2014-01-08 山东大学 A method of embedding TiO2 nanorod pattern array to improve LED luminous efficiency
CN204407352U (en) * 2015-03-10 2015-06-17 江苏新广联半导体有限公司 High light extraction efficiency GaN base LED transparent electrode structure

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CN108550450A (en) * 2018-04-19 2018-09-18 中国科学院新疆理化技术研究所 A kind of thermosensitive film preparation method with adiabatic buffer layer structure

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