CN104659180A - Transparent electrode structure of GaN-based LED (Light Emitting Diode) with high light extraction efficiency and preparation method thereof - Google Patents
Transparent electrode structure of GaN-based LED (Light Emitting Diode) with high light extraction efficiency and preparation method thereof Download PDFInfo
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- CN104659180A CN104659180A CN201510104382.7A CN201510104382A CN104659180A CN 104659180 A CN104659180 A CN 104659180A CN 201510104382 A CN201510104382 A CN 201510104382A CN 104659180 A CN104659180 A CN 104659180A
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- 238000000605 extraction Methods 0.000 title claims abstract description 26
- 238000002360 preparation method Methods 0.000 title claims abstract description 19
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 56
- 239000002061 nanopillar Substances 0.000 claims description 57
- 238000005530 etching Methods 0.000 claims description 39
- 239000002096 quantum dot Substances 0.000 claims description 34
- 230000003287 optical effect Effects 0.000 claims description 12
- 238000001039 wet etching Methods 0.000 claims description 10
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 9
- 238000000137 annealing Methods 0.000 claims description 9
- 238000007598 dipping method Methods 0.000 claims description 9
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 9
- 238000001312 dry etching Methods 0.000 claims description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 6
- 238000005566 electron beam evaporation Methods 0.000 claims description 4
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 4
- 235000012239 silicon dioxide Nutrition 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 abstract description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 abstract 1
- 238000011112 process operation Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 13
- 238000005516 engineering process Methods 0.000 description 6
- 238000001459 lithography Methods 0.000 description 6
- 230000007704 transition Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000004020 luminiscence type Methods 0.000 description 3
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012876 topography Methods 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 230000004308 accommodation Effects 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 239000004038 photonic crystal Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/42—Transparent materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
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- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention relates to a transparent electrode structure and a preparation method thereof, particularly relates to a transparent electrode structure of a GaN-based LED (Light Emitting Diode) with high light extraction efficiency and a preparation method thereof and belongs to the technical field of LED semiconductor devices. According to the technical scheme provided by the invention, the transparent electrode structure comprises a GaN substrate, wherein the GaN substrate is provided with a nano column layer and an ITO (Indium Tin Oxide) layer covering the nano column layer; the nano column layer comprises a plurality of nano columns; the ITO layer covers on the nano columns and column disconnecting holes at the two sides of the nano columns are filled with the ITO layer, so that the ITO layer and the GaN substrate are contacted. The transparent electrode structure has the advantages that the light extraction efficiency of the GaN-based positive LED can be obviously improved, the process operation is convenient, the cost is low, the application range is wide, and the safe and reliable effects are achieved.
Description
Technical field
The present invention relates to a kind of transparent electrode structure and preparation method, especially a kind of high light extraction efficiency GaN base LED transparent electrode structure and preparation method, belong to the technical field of LED semiconductor device.
Background technology
The universal development depending on specular removal GaN base LED technology of preparing of following solid state lighting application.One of basic obstacle of restriction GaN base forward LED performance boost is the high index of refraction (relative to external agency) of its constituent material.Due to the significant difference between GaN base material (n=2.3) and air dielectric (n=1) refractive index, cause the light escape cone angle of GaN base forward LED less than normal, major part light is difficult to the loss from device inside outgoing, limits the light extraction efficiency of device.So all the time, the light extraction efficiency how improving device is all devoted in a large amount of research work, in succession creates the methods such as such as ITO surface coarsening, graded index layer, graphical sapphire substrate, hot acid sidewall burn into omnidirectional reflector, photonic crystal, device geometries optimization.
From roughlly speaking, because in the bright dipping of GaN base forward LED, end face bright dipping accounting is maximum, therefore changing device topmost surface pattern increase light exit probability is one of effective way of boost device efficiency.Once report was had to utilize natural lithography pattern technology alligatoring ito transparent electrode layer; Adjustment MOCVD epitaxy growth conditions forms p-GaN surface micro-pit; The methods such as p-GaN surface chemistry growth ZnO nano post can significantly improve bright dipping, but it should be noted that said method self also exists obvious shortcoming and defect.ITO alligatoring needs usually by dry etching, usually can cause the deterioration of ITO electric property; Growth quality and doping efficiency can be sacrificed to a certain extent in extension alligatoring p-GaN surface; Chemically grown ZnO nano post technique is complicated, and the tack of nano-pillar is also difficult to ensure.Up to the present, the good and preparation method that operation is simple of resultant effect but rarely has and mentions.Therefore, namely can significantly promote light extraction efficiency in the urgent need to developing one, negative effect can not be brought to other characteristics of device again, and the good new method of producing feasibility.
Summary of the invention
The object of the invention is to overcome the deficiencies in the prior art, provide a kind of high light extraction efficiency GaN base LED transparent electrode structure and preparation method, it can significantly improve the light extraction efficiency of GaN base forward LED, technological operation is convenient, cost is low, wide accommodation, safe and reliable.
According to technical scheme provided by the invention, described high light extraction efficiency GaN base LED transparent electrode structure, comprises GaN substrate; Described GaN substrate arranges nano-pillar layer and covers the ITO layer on described nano-pillar layer; Described nano-pillar layer comprises some nano-pillar, and ITO layer covers in nano-pillar, and is filled in the post clearance hole of nano-pillar both sides, to make ITO layer and GaN substrate ohmic contact.
Described nano-pillar is silicon nitride nano post, and height, the diameter of nano-pillar are all positioned at 1/4 λ ~ λ, and wherein, λ is the optical wavelength of GaN base LED bright dipping.
A preparation method for high smooth extraction efficiency GaN base LED transparent electrode structure, the preparation method of described transparent electrode structure comprises the steps:
A, provide GaN substrate, and nanometer body layer is set in described GaN substrate;
B, on above-mentioned nanometer body layer, arrange etching mask layer, described etching mask layer covers on nanometer body layer;
C, nano thin-layer is set on above-mentioned etching mask layer;
D, above-mentioned nano thin-layer to be annealed, to be agglomerated into densely arranged some nano dots on etching mask layer, form nanometer spot hole in the outside of nano dot;
E, utilize nano dot for mask, dry etching is carried out to etching mask layer and nanometer body layer, to remove the part nanometer body layer below the etching mask layer corresponding with nano dot hole site and described etching mask layer, to obtain the etch mask block be positioned at below nano dot;
F, remove above-mentioned nano dot, and utilize described etch mask block to carry out wet etching to nanometer body layer, to remove the nanometer body layer outside etch mask block;
G, remove above-mentioned etch mask block and obtain some mutually discrete nano-pillar;
H, in above-mentioned nano-pillar, deposit ITO layer, and described ITO layer is annealed, to make ITO layer and GaN substrate ohmic contact.
Described GaN substrate is P-GaN substrate, and nanometer body layer is the silicon nitride layer be deposited on by PECVD in GaN substrate.
Described etching mask layer is the silicon dioxide layer be deposited on by PECVD on nano-pillar layer.
Described nano thin-layer is the Ag layer by electron beam evaporation or magnetron sputtering.Described nano thin-layer annealing forms the temperature range 450 DEG C-550 DEG C of nano dot.
The diameter of described nano dot is 200nm ~ 500nm.Anneal to make the annealing temperature of ITO layer and GaN substrate ohmic contact to be 450 DEG C-650 DEG C to ITO layer.
Described nano-pillar is silicon nitride nano post, and height, the diameter of nano-pillar are all positioned at 1/4 λ ~ λ, and wherein, λ is the optical wavelength of GaN base LED bright dipping.
Tool of the present invention has the following advantages:
1, transparent electrode structure is made up of the nano-pillar structure of submicron-scale in GaN substrate and the ITO layer covered on it, does not need to change GaN substrate surface topography, there is not the risk of GaN substrate damage.Within the scope of GaN base LED luminescence band, adopt Si
3n
4nano-pillar substantially identical with ITO layer refractive index, close to the refractive index of GaN substrate, effectively can avoid the Fresnel reflection loss between optical microstructures and LED component.
2, natural lithography graph technology is utilized to obtain highdensity Si
3n
4optical microstructures, low production cost, dimension of picture size easily controls, and distribution is concentrated, and repeatability is high.In conjunction with PEVCD to Si
3n
4the accurate control of deposit thickness, realizes extracting the light of optical microstructures physical dimension optimizing, improves the exit probability of GaN base LED internal illumination to greatest extent.
3, the harmless graph transfer method of wet etching after first dry method is adopted, the figure vertical transitions excellent by dry etching and speed control characteristic, by the natural lithography Graphic transitions of submicron-scale on etching mask layer, and remove most of nanometer body layer of graphics field, finally by SiO
2with Si
3n
4between selective wet etching residue nanometer body layer is removed completely, obtain nano-pillar, fundamentally avoid causing surface damage to p-GaN substrate, the electrology characteristic of LED can not be affected.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of existing transparent electrode structure.
Fig. 2 is the schematic diagram of transparent electrode structure of the present invention.
Fig. 3 ~ Figure 13 is the concrete implementing process step cutaway view that the present invention prepares transparent click structure, wherein
Fig. 3 is the cutaway view of GaN substrate of the present invention.
Fig. 4 is the cutaway view after the present invention obtains nanometer body layer in GaN substrate.
Fig. 5 is the cutaway view after the present invention obtains etching mask layer on nanometer body layer.
Fig. 6 is the cutaway view after the present invention obtains nano thin-layer on etching mask layer.
To be the present invention to anneal the cutaway view after obtaining nano dot to nano thin-layer Fig. 7.
Fig. 8 is that the present invention utilizes nano dot to obtain the cutaway view after etch mask block for mask etching.
Fig. 9 is the cutaway view after the present invention removes nano dot.
Figure 10 is the cutaway view after the present invention utilizes etch mask block to etch nanometer body layer.
Figure 11 is the cutaway view after the present invention obtains nano-pillar.
Figure 12 is the cutaway view after the present invention arranges ITO layer in nano-pillar.
To be the present invention to anneal the cutaway view after making ITO layer and GaN substrate ohmic contact to ITO layer Figure 13.
Description of reference numerals: 1-GaN substrate, 2-nano-pillar, 3-post clearance hole, 4-ITO layer, 5-nanometer body layer, 6-etching mask layer, 7-nano thin-layer, 8-nano dot, 9-nanometer spot hole, 10-first etched hole, 11-second etched hole, 12-etch mask block and 20-ITO flat bed.
Embodiment
Below in conjunction with concrete drawings and Examples, the invention will be further described.
As shown in Figure 1: be the schematic diagram of existing LED transparent electrode structure, be specially and arrange ITO flat bed 20, ITO flat bed 20 and GaN substrate 1 ohmic contact in GaN substrate 1, the transparent electrode structure of this kind of structure has lower light extraction efficiency.
As shown in Figure 2, in order to obtain high light extraction efficiency, the present invention includes GaN substrate 1; The ITO layer 4 described GaN substrate 1 arranging nano-pillar layer and covers on described nano-pillar layer; Described nano-pillar layer comprises some nano-pillar 2, and ITO layer 4 covers in nano-pillar 2, and is filled in the post clearance hole 3 of nano-pillar 2 both sides, to make ITO layer 4 and GaN substrate 1 ohmic contact.
Particularly, described nano-pillar 2 is silicon nitride nano post, within the scope of GaN base LED luminescence band, the refractive index of silicon nitride nano post 2 is substantially identical with the refractive index of ITO layer 4, and close to the refractive index of GaN substrate 1, nano-pillar 2 is protruded in GaN substrate 1, and mutually do not connect between nano-pillar 2 in GaN substrate 1, the i.e. through nano-pillar of post clearance hole 32 and all nano-pillar 2 can be formed mutually discrete shape, utilize the geometry of nano-pillar 2, luminous exit probability in GaN base LED can be increased, effectively can avoid the Fresnel reflection loss between optical microstructures and LED component, namely the object obtaining high light extraction efficiency is reached.
Usually, height, the diameter of nano-pillar 2 are all positioned at 1/4 λ ~ λ, and wherein, λ is the optical wavelength of GaN base LED bright dipping, after the height of nano-pillar 2, diameter mate with optical wavelength, can guarantee the maximization of bright dipping further.
As shown in Fig. 3 ~ Figure 13, above-mentioned high light extraction efficiency GaN base LED transparent electrode structure can be prepared by following processing step, and concrete steps comprise:
A, provide GaN substrate 1, and nanometer body layer 5 is set in described GaN substrate 1;
As shown in Figure 3 and Figure 4, described GaN substrate 1 is P-GaN substrate, and nanometer body layer 5 is the silicon nitride layer be deposited on by PECVD in GaN substrate 1.Between the thickness of nanometer body layer 5 goes out optical wavelength at GaN base LED 1/4 times ~ 1 times.Usually, the wave-length coverage of GaN base LED is 400nm-600nm, that is to say that the thickness range of nanometer body layer 5 is 100-600nm.
B, on above-mentioned nanometer body layer 5, arrange etching mask layer 6, described etching mask layer 6 covers on nanometer body layer 5;
As shown in Figure 5, described etching mask layer 6 is the silicon dioxide layer be deposited on by PECVD on nano-pillar layer 5.Usually, the thickness of etching mask layer 6 is more than 1/4 times of nano-pillar layer 5 thickness.
C, nano thin-layer 7 is set on above-mentioned etching mask layer 6;
As shown in Figure 6, described nano thin-layer 7 is the Ag layer by electron beam evaporation or magnetron sputtering.
D, above-mentioned nano thin-layer 7 to be annealed, to be agglomerated into densely arranged some nano dots 8 on etching mask layer 6, form nanometer spot hole 9 in the outside of nano dot 8;
As shown in Figure 7, described nano thin-layer 7 is annealed and is formed the temperature range 450 DEG C-550 DEG C of nano dot 8, and annealing way is short annealing (RTA).The thickness of nano thin-layer 7 is relevant to the diameter of nano dot 8, and the diameter of described nano dot 8 is 200nm ~ 500nm.After annealed formation nano dot 8, natural lithography figure can be obtained on etching mask layer 6.After nano thin-layer 7 reunites formation nano dot 8, namely obtain nanometer spot hole 9 in the outside of nano dot 8, etching mask layer 6 partial denudation can be made by nanometer spot hole 9.To Ag nano thin-layer 7 anneal to reunite form nano dot 8 specific embodiment known by the art personnel, no longer describe in detail herein.
E, utilize nano dot 8 for mask, dry etching is carried out to etching mask layer 6 and nanometer body layer 5, to remove the part nanometer body layer 5 below the etching mask layer 6 corresponding with nanometer spot hole 9 position and described etching mask layer 6, to obtain the etch mask block 12 be positioned at below nano dot 8;
As shown in Figure 8, because etching mask layer 6 can be carried out partial denudation by nanometer spot hole 9, utilize nano dot 8 as after blocking mask, can remove the nanometer body layer 5 below exposed etching mask layer 6 and exposed etching mask layer 6 by dry etching, the thickness of residue nanometer body layer 5 can be selected according to process conditions such as etch periods.Because the etching mask layer 6 of exposed part is etched away, therefore, etch mask block 12 can be formed with the etching mask layer 6 of nano dot 8 contact portion below nano dot 8, meanwhile, form the first etched hole 10 in the outside of nano dot 8 and etch mask block 12, the nanometer body layer 5 of appropriate section can be made exposed by the first etched hole 10.
F, remove above-mentioned nano dot 8, and utilize described etch mask block 12 pairs of nanometer body layers 5 to carry out wet etching, to remove the nanometer body layer 5 outside etch mask block 12;
As shown in Figure 9 and Figure 10, after removing nano dot 8, the surface exposure of etch mask block 12, utilize etch mask block 12 for mask, adopt the nanometer body layer 5 of the above-mentioned exposed part of wet etching, remove so that the nanometer body layer 5 of side under above-mentioned first etched hole 10 hole is carried out etching, to obtain the second etched hole 11, can by the surface exposure of GaN substrate 1 by the second etched hole 11.Usually, remove nano dot 8 and can adopt dust technology, carry out wet etching to nanometer body layer 5 and adopt heating phosphoric acid,diluted, specific embodiment and condition are known by the art personnel, repeat no more herein.
G, remove above-mentioned etch mask block 12 and obtain some mutually discrete nano-pillar 2;
As shown in figure 11, owing to adopting the nanometer body layer 5 outside wet etching removal etch mask block 12, thus the nanometer body layer 5 immediately below etch mask block 12 can be obtained, thus obtain some nano-pillar 2, mutually do not connected by post clearance hole 3 between nano-pillar 2.The height of nano-pillar 2 is consistent with the thickness of nanometer body layer 5.Can adopt BOE solution for etch mask block 12, concrete removal process is known by the art personnel.
H, in above-mentioned nano-pillar 2, deposit ITO layer 4, and described ITO layer 4 is annealed, to make ITO layer 4 and GaN substrate 1 ohmic contact.
As shown in Figure 12 and Figure 13, anneal to make the annealing temperature of ITO layer 4 and GaN substrate 1 ohmic contact be 450 DEG C-650 DEG C to ITO layer 4, ITO layer 4 deposition process can be electron beam evaporation, reaction and plasma deposition or magnetron sputtering; The method for annealing of ITO layer 4 is furnace anneal or short annealing.ITO layer 4 is annealed, makes the specific embodiment of ITO layer 4 and GaN substrate 1 ohmic contact known by the art personnel, repeat no more herein.
Transparent electrode structure of the present invention is made up of with the ITO layer 4 covered on it nano-pillar 2 structure of submicron-scale in GaN substrate 1, does not need to change GaN substrate 1 surface topography, there is not the risk that GaN substrate 1 is damaged.Within the scope of GaN base LED luminescence band, adopt Si
3n
4nano-pillar 2 substantially identical with ITO layer 4 refractive index, close to the refractive index of GaN substrate 1, effectively can avoid the Fresnel reflection loss between optical microstructures and LED component.
Natural lithography graph technology is utilized to obtain highdensity Si
3n
4optical microstructures, low production cost, dimension of picture size easily controls, and distribution is concentrated, and repeatability is high.In conjunction with PEVCD to Si
3n
4the accurate control of deposit thickness, realizes extracting the light of optical microstructures physical dimension optimizing, improves the exit probability of GaN base LED internal illumination to greatest extent.
Adopt the harmless graph transfer method of wet etching after first dry method, the figure vertical transitions excellent by dry etching and speed control characteristic, by the natural lithography Graphic transitions of submicron-scale on etching mask layer 6, and remove most of nanometer body layer 5 of graphics field, finally by SiO
2with Si
3n
4between selective wet etching residue nanometer body layer 5 is removed completely, obtain nano-pillar 2, fundamentally avoid causing surface damage to p-GaN substrate 1, the electrology characteristic of LED can not be affected.
Claims (10)
1. a high smooth extraction efficiency GaN base LED transparent electrode structure, comprises GaN substrate (1); It is characterized in that: nano-pillar layer is set in described GaN substrate (1) and covers the ITO layer (4) on described nano-pillar layer; Described nano-pillar layer comprises some nano-pillar (2), ITO layer (4) covers in nano-pillar (2), and be filled in the post clearance hole (3) of nano-pillar (2) both sides, to make ITO layer (4) and GaN substrate (1) ohmic contact.
2. high light extraction efficiency GaN base LED transparent electrode structure according to claim 1, it is characterized in that: described nano-pillar (2) is silicon nitride nano post, height, the diameter of nano-pillar (2) are all positioned at 1/4 λ ~ λ, and wherein, λ is the optical wavelength of GaN base LED bright dipping.
3. a preparation method for high smooth extraction efficiency GaN base LED transparent electrode structure, it is characterized in that, the preparation method of described transparent electrode structure comprises the steps:
(a), GaN substrate (1) is provided, and nanometer body layer (5) is set in described GaN substrate (1);
(b), on above-mentioned nanometer body layer (5), etching mask layer (6) is set, described etching mask layer (6) covers on nanometer body layer (5);
(c), on above-mentioned etching mask layer (6), nano thin-layer (7) is set;
(d), above-mentioned nano thin-layer (7) is annealed, to be agglomerated into densely arranged some nano dots (8) on etching mask layer (6), form nanometer spot hole (9) in the outside of nano dot (8);
(e), utilize nano dot (8) to be mask, dry etching is carried out to etching mask layer (6) and nanometer body layer (5), to remove part nanometer body layer (5) of the etching mask layer (6) corresponding with nanometer spot hole (9) position and described etching mask layer (6) below, to obtain the etch mask block (12) being positioned at nano dot (8) below;
(f), remove above-mentioned nano dot (8), and utilize described etch mask block (12) to carry out wet etching to nanometer body layer (5), to remove the nanometer body layer (5) in etch mask block (12) outside;
(g), remove above-mentioned etch mask block (12) and obtain some mutually discrete nano-pillar (2);
(h), in above-mentioned nano-pillar (2), deposit ITO layer (4), and described ITO layer (4) to be annealed, to make ITO layer (4) and GaN substrate (1) ohmic contact.
4. the preparation method of high smooth extraction efficiency GaN base LED transparent electrode structure according to claim 3, it is characterized in that: described GaN substrate (1) is P-GaN substrate, nanometer body layer (5) is the silicon nitride layer be deposited on by PECVD in GaN substrate (1).
5. the preparation method of high smooth extraction efficiency GaN base LED transparent electrode structure according to claim 3, is characterized in that: described etching mask layer (6) is the silicon dioxide layer be deposited on by PECVD on nano-pillar layer (5).
6. the preparation method of high smooth extraction efficiency GaN base LED transparent electrode structure according to claim 3, is characterized in that: described nano thin-layer (7) is the Ag layer by electron beam evaporation or magnetron sputtering.
7. the preparation method of high smooth extraction efficiency GaN base LED transparent electrode structure according to claim 6, is characterized in that: described nano thin-layer (7) annealing forms the temperature range 450 DEG C-550 DEG C of nano dot (8).
8. the preparation method of high smooth extraction efficiency GaN base LED transparent electrode structure according to claim 3, is characterized in that: the diameter of described nano dot (8) is 200nm ~ 500nm.
9. the preparation method of high smooth extraction efficiency GaN base LED transparent electrode structure according to claim 3, is characterized in that: anneal to make ITO layer (4) to be 450 DEG C-650 DEG C with the annealing temperature of GaN substrate (1) ohmic contact to ITO layer (4).
10. the preparation method of high smooth extraction efficiency GaN base LED transparent electrode structure according to claim 3, it is characterized in that: described nano-pillar (2) is silicon nitride nano post, height, the diameter of nano-pillar (2) are all positioned at 1/4 λ ~ λ, wherein, λ is the optical wavelength of GaN base LED bright dipping.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108550450A (en) * | 2018-04-19 | 2018-09-18 | 中国科学院新疆理化技术研究所 | A kind of thermosensitive film preparation method with adiabatic buffer layer structure |
| CN108962924A (en) * | 2017-05-17 | 2018-12-07 | 台湾积体电路制造股份有限公司 | The method for forming the influx and translocation structure of imaging sensor |
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| CN103094434A (en) * | 2012-11-27 | 2013-05-08 | 南京大学 | Preparation method of nano array pattern through inductive coupling plasma (ICP) GaN-based multiple quantum wells |
| CN103500778A (en) * | 2013-10-23 | 2014-01-08 | 山东大学 | Method for improving luminous efficiency of LED (light-emitting diode) by embedding TiO2 nano-rod graphic arrays |
| CN204407352U (en) * | 2015-03-10 | 2015-06-17 | 江苏新广联半导体有限公司 | High light extraction efficiency GaN base LED transparent electrode structure |
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| CN108962924A (en) * | 2017-05-17 | 2018-12-07 | 台湾积体电路制造股份有限公司 | The method for forming the influx and translocation structure of imaging sensor |
| CN108550450A (en) * | 2018-04-19 | 2018-09-18 | 中国科学院新疆理化技术研究所 | A kind of thermosensitive film preparation method with adiabatic buffer layer structure |
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