CN104657192A - Method for simulating flash on simulator - Google Patents
Method for simulating flash on simulator Download PDFInfo
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- CN104657192A CN104657192A CN201310590344.8A CN201310590344A CN104657192A CN 104657192 A CN104657192 A CN 104657192A CN 201310590344 A CN201310590344 A CN 201310590344A CN 104657192 A CN104657192 A CN 104657192A
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- flash memory
- writing
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Abstract
The invention discloses a method for simulating a flash on a simulator. The method includes the steps: firstly reading out data needing to write addresses in the process simulating flash writing, and judging whether the data can be correctly written or not; writing the data if the data can be correctly written; outputting written error signals if the data are impossibly and correctly written, processing the written data according to the data wiped by the flash, and writing the processed data. The method completely simulates reading and writing functions of the flash, and the simulation degree of the flash is effectively improved.
Description
Technical field
The present invention relates to emulator field, particularly a kind ofly on emulator, simulate flash(flash memory) method.
Background technology
Along with flash widespread use in the microprocessor, microprocessor simulator also contains the emulation of flash function.In order to improve the dirigibility of emulator, multiplex SRAM(static RAM) storer, add flash to SRAM timing conversion module simulation flash.SRAM can be write " 0 " by " 1 ", also can by " 0 " one writing.But flash can only be write " 0 " by " 1 ", or by " 0 " one writing.On market, most flash can only be write " 0 " by " 1 ", must carry out erase operation before writing, to ensure that write is correct.Just there is a problem in this, on emulator, if forgot erase operation before writing flash, still can write correct data, this and actual chips are not inconsistent.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of method simulating flash on emulator, can improve the emulator of flash.
For solving the problems of the technologies described above, the method simulating flash on emulator of the present invention adopts following technical scheme to realize:
In the process write of simulation flash, first will the data reading of writing address, whether differentiate can accurately writing data; If can accurately writing data, then data be write; If impossible accurately writing data, then export write error signal, and write after write data processing according to the data after flash erasing.
Data after described flash erasing are " 1 " or " 0 ".
Described is "AND" or "or" to write data processing.
Whether described differentiation can accurately writing data, writes determination module complete by the data arranged in flash controller to the change-over circuit of SRAM.
The feature that the present invention utilizes SRAM read or write speed fast, in the process write of simulation flash, first will the data reading of writing address, the data write that will need again after differentiation.If to the address write data of not carrying out wiping, then export write error signal.
The present invention utilizes SRAM to simulate the read-write capability of flash completely, realize flash must first wipe after could accurately writing data, effectively improve the emulator of flash.
Accompanying drawing explanation
Below in conjunction with accompanying drawing and embodiment, the present invention is further detailed explanation:
Accompanying drawing is described method schematic diagram of simulating flash on emulator.
Embodiment
By reference to the accompanying drawings, the described method simulating flash on emulator is intended to realize full simulation flash write-in functions, the key implemented is, in the change-over circuit of flash controller to SRAM, add a data write determination module, the data treating writing address judge.Below a specific embodiment of the method simulating flash on emulator:
Complete " 1 " after the flash erasing of hypothetical simulation, the address A1 of the corresponding SRAM of Flash address A0.
The first step, send after address A0 write data B operation in flash controller, data write determination module is from SRAM address A1 sense data C.
Second step, judges whether data C is complete " 1 ", and if not complete " 1 ", flash write error exports effectively, and emulator shows flash write error, does not carry out erase operation before showing to write data.
3rd step, data write determination module by data C and data B phase with, generate data D, and data D write SRAM address A1; To adapt to some to have specific demand application to flash.
Finally, the travelling speed of described data write determination module will ensure that determination time is less than or equal to the flash write time that will simulate; Namely the write operation time being less than or equal to flash whole working times of above operation will be ensured.
In general emulator flash simulates, only the sequential of flash to SRAM is changed, whether correctly can not write this address and judge.
And this method is in flash write operation simulation process, whether correctly can writes this address and judge; Effectively can improve the emulator of flash thus.
Above by embodiment to invention has been detailed description, but these are not construed as limiting the invention.Without departing from the principles of the present invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.
Claims (6)
1. on emulator, simulate a method of flash memory flash, it is characterized in that: in the process that simulation flash memory flash writes, first will the data reading of writing address, whether differentiate can accurately writing data; If can accurately writing data, then data be write; If impossible accurately writing data, then export write error signal, and the data after wiping according to flash memory flash write after write data processing.
2. the method for claim 1, is characterized in that: the data after described flash memory flash wipes are " 1 " or " 0 ".
3. the method for claim 1, is characterized in that: described is "AND" or "or" to write data processing.
4. the method for claim 1, is characterized in that: whether described differentiation can accurately writing data, writes determination module complete by the data arranged in flash memory flash controller to the change-over circuit of static RAM SRAM.
5. method as claimed in claim 4, is characterized in that: the travelling speed of described data write determination module will ensure that determination time is less than or equal to the flash memory flash write time that will simulate.
6. the method for claim 1, is characterized in that: the write operation time being less than or equal to flash memory flash whole working times of described method all operations.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310590344.8A CN104657192A (en) | 2013-11-20 | 2013-11-20 | Method for simulating flash on simulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310590344.8A CN104657192A (en) | 2013-11-20 | 2013-11-20 | Method for simulating flash on simulator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104657192A true CN104657192A (en) | 2015-05-27 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
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| CN201310590344.8A Pending CN104657192A (en) | 2013-11-20 | 2013-11-20 | Method for simulating flash on simulator |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108804272A (en) * | 2018-05-25 | 2018-11-13 | 深圳市德名利电子有限公司 | A kind of the flash memory simulator and its analogy method of high speed |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060059297A1 (en) * | 2004-09-15 | 2006-03-16 | Kenichi Nakanishi | Memory control apparatus, memory control method and program |
| CN101082872A (en) * | 2006-06-02 | 2007-12-05 | 上海思必得通讯技术有限公司 | Method for error protecting and error correcting of flash memory data in products |
| CN101329646A (en) * | 2007-06-20 | 2008-12-24 | 上海华虹集成电路有限责任公司 | Emulator for implementing FLASH page erase emulation |
| CN102393835A (en) * | 2011-11-24 | 2012-03-28 | 上海宏力半导体制造有限公司 | Flash memory and data updating method thereof |
-
2013
- 2013-11-20 CN CN201310590344.8A patent/CN104657192A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060059297A1 (en) * | 2004-09-15 | 2006-03-16 | Kenichi Nakanishi | Memory control apparatus, memory control method and program |
| CN101082872A (en) * | 2006-06-02 | 2007-12-05 | 上海思必得通讯技术有限公司 | Method for error protecting and error correcting of flash memory data in products |
| CN101329646A (en) * | 2007-06-20 | 2008-12-24 | 上海华虹集成电路有限责任公司 | Emulator for implementing FLASH page erase emulation |
| CN102393835A (en) * | 2011-11-24 | 2012-03-28 | 上海宏力半导体制造有限公司 | Flash memory and data updating method thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108804272A (en) * | 2018-05-25 | 2018-11-13 | 深圳市德名利电子有限公司 | A kind of the flash memory simulator and its analogy method of high speed |
| CN108804272B (en) * | 2018-05-25 | 2021-08-27 | 深圳市德明利技术股份有限公司 | High-speed flash memory simulator and simulation method thereof |
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Application publication date: 20150527 |