CN104637933A - Series-parallel inductance structure and manufacturing method thereof - Google Patents
Series-parallel inductance structure and manufacturing method thereof Download PDFInfo
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- CN104637933A CN104637933A CN201510052270.1A CN201510052270A CN104637933A CN 104637933 A CN104637933 A CN 104637933A CN 201510052270 A CN201510052270 A CN 201510052270A CN 104637933 A CN104637933 A CN 104637933A
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Abstract
The invention provides a series-parallel inductance structure and a manufacturing method thereof. During formation of a first inductor, etching for separation is not performed; during formation of a second inductor, etching for separation is performed to form a stranded line or a multi-path inductance structure; the first inductor and the second inductor are connected in parallel, and each current path in the second inductor is connected through the first inductor instead of being separated fully after parallel connection of the first inductor and the second inductor, so that the defect that current is distributed non-uniformly after full separation is overcome; then, a formed third inductor is connected in series with the second inductor, so that uniform distribution of the current after parallel connection of the first inductor and the second inductor is enhanced, the performance of the whole series-parallel inductance structure is improved remarkably, and the Q values and fSR of all frequencies are increased.
Description
Technical field
The present invention relates to field of semiconductor manufacture, particularly relate to a kind of connection in series-parallel induction structure and manufacture method thereof.
Background technology
Along with the fast development of wireless mobile telecommunication technology, radio frequency integrated circuit (RFIC, Radio Frequency Integrated Circuit) become more and more important, radio frequency integrated circuit is a kind of integrated circuit be operated in 300MHz ~ 300GHz frequency range.And because si-substrate integrated circuit manufacturing cost is relatively low, make silica-based radio frequency integrated circuit have sizable competitiveness to GaAs base integrated circuit.
In radio frequency integrated circuit, inductor plays very important effect, become a kind of electronic devices and components of key and be widely used in various radio frequency integrated circuit, such as voltage controlled oscillator (VCO, Voltage Control Oscillator), low noise amplifier (LNA, Low-noiseAmplifier) and frequency mixer (mixer) etc. all need to use inductor.
The important indicator evaluating inductor performance quality is quality factor q, and the definition of quality factor q is: the ratio being stored in energy in inductor and each concussion cycle loss energy.Quality factor q is higher, and the efficiency of inductor is higher.Affect quality factor q because have: the loss of the ohmic loss of wire coil, the parasitic capacitance of inductor and substrate.In low-frequency range, the performance of inductor decides (mainly the loss of metal) primarily of the characteristic of the metal wire forming inductor; At high band, substrate loss determines the principal element of inductor performance by becoming.Substrate is mainly derived from substrate unit-area capacitance Csub and unit are conductance Gsub to the impact of inductor performance, and the doping characteristic of backing material is then the principal element affecting Csub and Gsub size.Under identical frequency, electromagnetic wave can become large along with the increase of substrate conductivity for the penetration depth of substrate.
Due to skin effect and approach effect, the electric current in inductance wire coil is not uniformly distributed in coil and is only distributed in coil surface, causes effective conductive area of coil reduce and resistance is increased.In order to address this problem, prior art is by being divided into multiple conductive channel by inductance thus increasing effective conductive area (coil surface) and improve the Q value of inductance.Please refer to Fig. 1 and Fig. 2, Fig. 1 is multipath induction structure schematic diagram in prior art, Fig. 2 is the generalized section along A-A ' in Fig. 1, inductance 10 has multiple coil, and each coil is also etched and is divided into multiple line zygonema (Litz line) 11, mutually isolated between each line zygonema 11, as shown in Figure 2.But when number of path is greater than 3, electric current is difficult to be uniformly distributed in each conductive path, thus the effective conductive area of inductance is caused to reduce the validity reducing this kind of method lower than expection.
Series inductance is a kind of method of conventional raising unit are inductance value, but lower metal is thinner because top-level metallic is thicker, therefore formed series inductance time in order to allow resistors match, usually can connect after lower metal Multi-layer Parallel with top-level metallic again, specifically Fig. 3 can be please refer to, Fig. 3 is connection in series-parallel inductance in conjunction with the structural representation of above-mentioned multipath coil inductance structure in prior art, wherein, multilayer inductor is formed in dielectric layer 30, in parallel by through hole line 22 between ground floor inductance 21 and second layer inductance 23, connected with the inductance 24 being formed in dielectric layer 30 surface by through hole line (scheming not shown) again.Because the first inductance 21 is segmented, namely comprise multiple line zygonema, and mutually isolated, also just there is above-mentioned technical problem, can not well make it be improved in any frequency.
Summary of the invention
The object of the present invention is to provide a kind of connection in series-parallel induction structure and manufacture method thereof, the performance (Q value) under all frequencies of the inductance in connection in series-parallel induction structure can be made all to increase.
To achieve these goals, the present invention proposes a kind of connection in series-parallel induction structure, comprise: substrate, first inductance, second inductance, 3rd inductance and dielectric layer, described dielectric layer is formed on described substrate, described first inductance and the second inductance are all formed in described dielectric layer, described 3rd inductance is formed in described dielectric layer surface, described first inductance is an entirety, described second inductance is provided with line zygonema, described first inductance is positioned at the below of described second inductance, both are connected by the first through hole line phase, described second inductance is in series by the second through hole line and described 3rd inductance.
Further, described 3rd inductance adopts and etches partially structure.
Further, in described connection in series-parallel induction structure, the material of described first inductance, the second inductance and the 3rd inductance is copper or aluminium.
Further, in described connection in series-parallel induction structure, described second inductance and the 3rd inductance are helical form.
Further, in described connection in series-parallel induction structure, described dielectric layer material is silica or silicon nitride.
Further, in described connection in series-parallel induction structure, the material of described first through hole line and the second through hole line is copper or aluminium.
The invention allows for a kind of formation method of connection in series-parallel induction structure, for the manufacture of connection in series-parallel induction structure as described above, comprise step:
Substrate is provided;
Form first medium layer over the substrate;
Described first medium layer forms the first inductance;
Described first medium layer and the first inductance form second dielectric layer, and in described second dielectric layer, forms the first through hole line, described first through hole line is connected with described first inductance;
Described second dielectric layer is formed the second inductance, etches described second inductance, form line zygonema, described line zygonema is by described first through hole line and described first inductance in parallel;
Described second dielectric layer and the second inductance form the 3rd dielectric layer, and form the second through hole line in described 3rd dielectric layer, wherein, the material of described first medium layer, second dielectric layer and the 3rd dielectric layer is identical;
Described 3rd dielectric layer forms the 3rd inductance, and described 3rd inductance is connected with described second inductance by described second through hole line.
Further, in the formation method of described connection in series-parallel induction structure, the step forming the first through hole line in described second dielectric layer comprises:
Etching arrives second dielectric layer, forms through hole;
Formation first through hole line is filled in described through hole.
Further, in the formation method of described connection in series-parallel induction structure, the step forming the second through hole line in described 3rd dielectric layer comprises:
Etching arrival the 3rd dielectric layer, forms through hole;
Formation second through hole line is filled in described through hole.
Compared with prior art, beneficial effect of the present invention is mainly reflected in: when formation the first inductance, etching is not carried out separately to it, and when formation the second inductance, etching is carried out to it and separately forms line zygonema or multipath induction structure, make the first inductance and the second inductance in parallel again, do not separate completely when each current path in the second inductance after the first inductance and the second inductance in parallel but be interconnected by the first inductance, thus avoiding the shortcoming of completely separately after-current uneven distribution; Then, then the 3rd inductance formed is connected with the second inductance, thus improve electric current being uniformly distributed after the first inductance, the second inductance in parallel, improve the performance of whole connection in series-parallel induction structure significantly, increase Q value and the self-resonant frequency f of all frequencies
sR.
Accompanying drawing explanation
Fig. 1 is the structural representation of inductance in prior art;
Fig. 2 is the generalized section along A-A ' in Fig. 1;
Fig. 3 is the structural representation of connection in series-parallel induction structure in prior art;
Fig. 4 is inductance generalized section in first embodiment of the invention;
Fig. 5 is the structural representation of connection in series-parallel induction structure in first embodiment of the invention;
Fig. 6 is the structural representation of connection in series-parallel induction structure in second embodiment of the invention.
Embodiment
Below in conjunction with schematic diagram, connection in series-parallel induction structure of the present invention and manufacture method thereof are described in more detail, which show the preferred embodiments of the present invention, should be appreciated that those skilled in the art can revise the present invention described here, and still realize advantageous effects of the present invention.Therefore, following description is appreciated that extensively knowing for those skilled in the art, and not as limitation of the present invention.
In order to clear, whole features of practical embodiments are not described.They in the following description, are not described in detail known function and structure, because can make the present invention chaotic due to unnecessary details.Will be understood that in the exploitation of any practical embodiments, a large amount of implementation detail must be made to realize the specific objective of developer, such as, according to regarding system or the restriction about business, change into another embodiment by an embodiment.In addition, will be understood that this development may be complicated and time-consuming, but be only routine work to those skilled in the art.
In the following passage, more specifically the present invention is described by way of example with reference to accompanying drawing.According to the following describes and claims, advantages and features of the invention will be clearer.It should be noted that, accompanying drawing all adopts the form that simplifies very much and all uses non-ratio accurately, only in order to object that is convenient, the aid illustration embodiment of the present invention lucidly.
As background technology is said, when inductance is divided into the winding structure of multiple line zygonema, the reason causing inductance performance to improve is then because electric current cannot be evenly distributed in the line zygonema of described inductance, thus causes hydraulic performance decline.Therefore, core concept of the present invention is then be dispensed in line zygonema by uniform current, solves the problem.Please refer to Fig. 4, namely after formation inductance 100, when forming line zygonema 110, only etched portions inductance 100, makes the lower part of line zygonema 110 still united, thus can avoid the phenomenon of electric current maldistribution in prior art.
Embodiment one
Based on above-mentioned principle, the present invention proposes a kind of connection in series-parallel induction structure, please refer to Fig. 5, comprise: substrate (scheming not shown), first inductance 210, second inductance 230, 3rd inductance 240 and dielectric layer 300, described dielectric layer 300 is formed on described substrate, described first inductance 210 and the second inductance 230 are all formed in described dielectric layer 300, described 3rd inductance 240 is formed in described dielectric layer 300 surface, described first inductance 210 is an entirety, described second inductance 230 is provided with line zygonema, described first inductance 210 is positioned at the below of described second inductance 230, both connect 220 line phases by the first through hole and connect, described second inductance 230 is in series by the second through hole line (figure is for illustrating) and described 3rd inductance 240.
Concrete, the material of described first inductance 210, second inductance 230 and the 3rd inductance 240 is copper or aluminium.Described second inductance 230 and the 3rd inductance 240 are helical form, can increase the Q value of overall inductance.
In the present embodiment, described dielectric layer 300 material is silica or silicon nitride, plays buffer action.In addition, in fact the first inductance 210 in the present embodiment manufactures last part technology for 6 layers of metal semiconductor, for the 4th layer of metal (M4) in metal connecting line layer, second inductance 230 is the 5th layer of metal (M5), 3rd inductance 240 is the 6th layer of metal (M6), therefore, described dielectric layer 240 is metal interlamination medium layer.The material of described first through hole line 220 and the second through hole line is copper or aluminium.Described substrate material is silicon.
In the another aspect of the present embodiment, also proposed a kind of formation method of connection in series-parallel induction structure, for the manufacture of connection in series-parallel induction structure as described above, comprise step:
Substrate is provided;
Form first medium layer over the substrate;
Described first medium layer is formed the first inductance 210;
Described first medium layer and the first inductance 210 form second dielectric layer, and in described second dielectric layer, forms the first through hole line 220, described first through hole line is connected with described first inductance 210;
Described second dielectric layer is formed the second inductance 230, etches described second inductance 230, form line zygonema, described line zygonema is in parallel with described first inductance 210 by described first through hole line 220;
Described second dielectric layer and the second inductance 230 form the 3rd dielectric layer, and form the second through hole line in described 3rd dielectric layer, wherein, the material of described first medium layer, second dielectric layer and the 3rd dielectric layer is identical, is dielectric layer 300;
Described 3rd dielectric layer forms the 3rd inductance 240, and described 3rd inductance 240 is connected with described second inductance 230 by described second through hole line.
The step forming the first through hole line 220 in described second dielectric layer comprises:
Etching arrives second dielectric layer, forms through hole;
Formation first through hole line 220 is filled in described through hole.
The step forming the second through hole line in described 3rd dielectric layer comprises:
Etching arrival the 3rd dielectric layer, forms through hole;
Formation second through hole line is filled in described through hole.
Adopt the connection in series-parallel induction structure of this kind of method formation except the Q value that can improve inductance, insensitive to Butut (layout), there is certain process window.
Due to identical all with above of the material of the first inductance 210, first through hole line 220, second inductance 230, the 3rd inductance 240, dielectric layer 300 and the second through hole line, therefore not to repeat here, specifically can with reference to above.
Embodiment two
In the present embodiment, be that the 3rd inductance 240 is for etching partially structure with embodiment one difference, namely, 3rd inductance 240 is etched, but do not etched separately, make still to keep bottom it connecting, thus make the 3rd inductance 240 connect with the first inductance 210 and the second inductance 230 again, make balanced current distribution on described 3rd inductance 240, thus the performance of the 3rd inductance 240 and whole induction structure can be improved.
All the other structures are all identical with embodiment one, and therefore not to repeat here, specifically can reference example one.
To sum up, in the connection in series-parallel induction structure provided in the embodiment of the present invention and manufacture method thereof, when formation the first inductance, etching is not carried out separately to it, and when formation the second inductance, etching is carried out to it and separately forms line zygonema or multipath induction structure, make the first inductance and the second inductance in parallel again, do not separate completely when each current path in the second inductance after the first inductance and the second inductance in parallel but be interconnected by the first inductance, thus avoiding the shortcoming of completely separately after-current uneven distribution; Then, then the 3rd inductance formed is connected with the second inductance, thus improve electric current being uniformly distributed after the first inductance, the second inductance in parallel, improve the performance of whole connection in series-parallel induction structure significantly, increase Q value and the f of all frequencies
sR.Above are only the preferred embodiments of the present invention, any restriction is not played to the present invention.Any person of ordinary skill in the field; in the scope not departing from technical scheme of the present invention; the technical scheme disclose the present invention and technology contents make the variations such as any type of equivalent replacement or amendment; all belong to the content not departing from technical scheme of the present invention, still belong within protection scope of the present invention.
Claims (9)
1. a connection in series-parallel induction structure, it is characterized in that, comprise: substrate, first inductance, second inductance, 3rd inductance and dielectric layer, described dielectric layer is formed on described substrate, described first inductance and the second inductance are all formed in described dielectric layer, described 3rd inductance is formed in described dielectric layer surface, described first inductance is an entirety, described second inductance is provided with line zygonema, described first inductance is positioned at the below of described second inductance, both are in parallel by the first through hole line, described second inductance is in series by the second through hole line and described 3rd inductance.
2. connection in series-parallel induction structure as claimed in claim 1, is characterized in that, described 3rd inductance adopts and etches partially structure.
3. connection in series-parallel induction structure as claimed in claim 1, it is characterized in that, the material of described first inductance, the second inductance and the 3rd inductance is copper or aluminium.
4. connection in series-parallel induction structure as claimed in claim 3, it is characterized in that, described second inductance and the 3rd inductance are helical form.
5. connection in series-parallel induction structure as claimed in claim 1, it is characterized in that, described dielectric layer material is silica or silicon nitride.
6. connection in series-parallel induction structure as claimed in claim 1, it is characterized in that, the material of described first through hole line and the second through hole line is copper or aluminium.
7. a formation method for connection in series-parallel induction structure, for the manufacture of the connection in series-parallel induction structure such as described in claim 1 to 6, is characterized in that, comprise step:
Substrate is provided;
Form first medium layer over the substrate;
Described first medium layer forms the first inductance;
Described first medium layer and the first inductance form second dielectric layer, and in described second dielectric layer, forms the first through hole line, described first through hole line is connected with described first inductance;
Described second dielectric layer is formed the second inductance, etches described second inductance, form line zygonema, described line zygonema is by described first through hole line and described first inductance in parallel;
Described second dielectric layer and the second inductance form the 3rd dielectric layer, and form the second through hole line in described 3rd dielectric layer, wherein, the material of described first medium layer, second dielectric layer and the 3rd dielectric layer is identical;
Described 3rd dielectric layer forms the 3rd inductance, and described 3rd inductance is connected with described second inductance by described second through hole line.
8. the formation method of connection in series-parallel induction structure as claimed in claim 7, it is characterized in that, the step forming the first through hole line in described second dielectric layer comprises:
Etching arrives second dielectric layer, forms through hole;
Formation first through hole line is filled in described through hole.
9. the formation method of connection in series-parallel induction structure as claimed in claim 7, it is characterized in that, the step forming the second through hole line in described 3rd dielectric layer comprises:
Etching arrival the 3rd dielectric layer, forms through hole;
Formation second through hole line is filled in described through hole.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113270248A (en) * | 2021-05-18 | 2021-08-17 | 北京普能微电子科技有限公司 | Inductor, impedance matching network, power amplifier and manufacturing method of inductor |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101179072A (en) * | 2006-11-09 | 2008-05-14 | 联华电子股份有限公司 | Induction coil structure and integrate circuit structure |
| CN103400828A (en) * | 2013-07-24 | 2013-11-20 | 上海宏力半导体制造有限公司 | Inductor and formation method thereof, and integrated passive device and formation method thereof |
| CN103474415A (en) * | 2012-06-06 | 2013-12-25 | 中芯国际集成电路制造(上海)有限公司 | Inductor and its formation method |
| CN103474414A (en) * | 2012-06-06 | 2013-12-25 | 中芯国际集成电路制造(上海)有限公司 | Inductor and its formation method |
-
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- 2015-01-31 CN CN201510052270.1A patent/CN104637933A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101179072A (en) * | 2006-11-09 | 2008-05-14 | 联华电子股份有限公司 | Induction coil structure and integrate circuit structure |
| CN103474415A (en) * | 2012-06-06 | 2013-12-25 | 中芯国际集成电路制造(上海)有限公司 | Inductor and its formation method |
| CN103474414A (en) * | 2012-06-06 | 2013-12-25 | 中芯国际集成电路制造(上海)有限公司 | Inductor and its formation method |
| CN103400828A (en) * | 2013-07-24 | 2013-11-20 | 上海宏力半导体制造有限公司 | Inductor and formation method thereof, and integrated passive device and formation method thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113270248A (en) * | 2021-05-18 | 2021-08-17 | 北京普能微电子科技有限公司 | Inductor, impedance matching network, power amplifier and manufacturing method of inductor |
| CN113270248B (en) * | 2021-05-18 | 2023-12-26 | 北京普能微电子科技有限公司 | Inductance, impedance matching network, power amplifier and manufacturing method of inductance |
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