CN104619114A - PCB (printed circuit board) with embedded resistors and embedded resistor test method - Google Patents
PCB (printed circuit board) with embedded resistors and embedded resistor test method Download PDFInfo
- Publication number
- CN104619114A CN104619114A CN201510082453.8A CN201510082453A CN104619114A CN 104619114 A CN104619114 A CN 104619114A CN 201510082453 A CN201510082453 A CN 201510082453A CN 104619114 A CN104619114 A CN 104619114A
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- district
- mai
- resistance
- pcb board
- pcb
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
- H05K1/0268—Marks, test patterns or identification means for electrical inspection or testing
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The invention discloses a PCB with embedded resistors and an embedded resistor test method. The PCB is provided with at least one test area. The test area comprises at least a layer of one row of embedded resistors and a plurality of rectangular copper foil which is arranged on the layer of the embedded resistors in a spaced mode and separates the layer of the embedded resistors into a plurality of rectangular embedded resistor regions. According to the PCB, the test area is additionally arranged and designed during the layout and the electrical resistivity of the embedded resistive material of the entire PCB so as to control circuit units of the entire PCB. For example, circuit units of the entire PCB need to be scrapped to avoid follow-up defective products when the electrical resistivity of multiple locations in the test area is detected to not meet the requirements. When the PCB is applied to the production of microphone circuit units, the ESD (Electronic Static Discharge) resistance of the microphone circuit unit can be effectively identified to avoid the risk in microphone application.
Description
Technical field
The present invention relates to a kind of PCB, more specifically, relate to and a kind of there is the pcb board burying resistance; The invention still further relates to the method for testing of a kind of pcb board burying resistance.
Background technology
Along with the development of science and technology, the requirement of people to electronic product is also more and more higher, and therefore electronic devices and components are also more and more tending towards miniaturization.In the design of existing PCB, people gradually adopt and bury resistance material to replace the resistance in circuit.Fig. 1 shows the circuit board layouts of microphone, one deck is set on circuit boards and buries resistance material, burying, to carry out Copper Foil again above resistance material gold-plated, like this, electric current from power end out after, first to transmit on the Copper Foil that resistance is very little, and in the place that Copper Foil interrupts, electric current can only transmit by burying resistance material, such as, in Fig. 1 region shown in a.Now burying of this region hinders the effect that material serves resistance.
According to the specification of PCB circuit design, need to PCB design resistance value and bury resistance width carry out management and control.But there is following problem in existing board design:
A, PCB bury resistance resistivity of material and circuit design determines the against esd ability of microphone.And bury resistance material in PCB manufacturing process, have change in performance, based on current circuit design, cannot this variable quantity of accurate measurement in addition management and control;
B, because PCB design cell size is less, the tolerance in circuit size measurement process has exceeded material its own tolerances scope, so cannot carry out management and control to resistivity on the impact of burying resistance square resistance rate calculated value;
C, management and control cannot be carried out to the resistivity of burying resistance, just can not identify the microphone against esd ability using this PCB to make comprehensively, increase the risk in microphone applications;
Summary of the invention
An object of the present invention is to provide a kind of new solution with the pcb board burying resistance.
According to a first aspect of the invention, provide and a kind of there is the pcb board burying resistance, described pcb board arranges at least one test zone, described test zone comprises at least one row and buries resistance layer, and be disposed on this and bury multiple Copper Foils above resistance layer, described Copper Foil is rectangular, and described multiple spaced Copper Foil is divided into multiple rectangular Mai Zu district by burying resistance layer.
Preferably, the length and width in described Mai Zu district is all greater than 0.5mm.
Preferably, described Mai Zu district is in square.
Preferably, described Mai Zu district is of a size of 1*1mm.
Preferably, described test zone is provided with three, is separately positioned on the edge of pcb board.
Preferably, at least one Mai Zu district is equipped with solder mask layer.
Present invention also offers the method for testing of a kind of pcb board burying resistance, comprise the following steps:
A, above-mentioned having is provided to bury the pcb board of resistance;
B, two of universal instrument gauge outfits are ridden on the Copper Foil of certain both sides, Mai Zu district in test zone on pcb board, measure the resistance Ω in Mai Zu district;
C, utilize gauging instrument to measure the length and width size in Mai Zu district, be designated as L, W respectively;
D, utilize the square resistance rate in following formulae discovery Chu Maizu district: ρ=Ω * W/L.
Preferably, in described step b, what universal instrument was measured is the resistance that top is equipped with the Mai Zu district of solder mask layer; In described step c, measurement be the length and width size in the Mai Zu district of not laying solder mask layer.
Present invention also offers the method for testing of a kind of pcb board burying resistance, comprise the following steps:
A, above-mentioned having is provided to bury the pcb board of resistance;
B, utilize gauging instrument to measure the length and width size in certain Mai Zu district in test zone on pcb board, be designated as L, W respectively;
C, two of universal instrument gauge outfits are ridden on the Copper Foil of both sides, Mai Zu district, measure the resistance Ω in Mai Zu district;
D, utilize the square resistance rate in following formulae discovery Chu Gaimaizu district: ρ=Ω * W/L.
Preferably, in described step b, measurement be the length and width size in the Mai Zu district of not laying solder mask layer; In described step c, what universal instrument was measured is the resistance in the Mai Zu district with solder mask layer.
In the manufacture craft process of pcb board, in view of the consistency of technique, material, equipment, the resistance of burying that same pcb board is produced is identical substantially.Pcb board of the present invention, increases when Butut and devises test zone, by the measurement of this test zone, can obtain the resistivity of whole pcb board burying resistance material, can carry out management and control to the circuit unit on whole pcb board.Such as when the resistivity detecting multiple position in certain test zone is undesirable time, the circuit unit on whole pcb board should do scraps process, avoids the generation of follow-up defective products.This pcb board is applied in the production of microphone circuit unit, effectively can identifies the against esd ability of microphone circuit unit, avoid the risk in microphone applications.
The present inventor finds, in the prior art, cannot measure the against esd ability of microphone circuit unit in batches, and the also inaccuracy measured, and large quantities of microphones can be caused thus to lose efficacy in the application.Therefore, the technical assignment that the present invention will realize or technical problem to be solved are that those skilled in the art never expect or do not anticipate, therefore the present invention is a kind of new technical scheme.
By referring to the detailed description of accompanying drawing to exemplary embodiment of the present invention, further feature of the present invention and advantage thereof will become clear.
Accompanying drawing explanation
In the description combined and the accompanying drawing forming a part for specification shows embodiments of the invention, and illustrate that one is used from and explains principle of the present invention together with it.
Fig. 1 is the structural representation of circuit unit in pcb board of the present invention.
Fig. 2 is the structural representation of pcb board of the present invention.
Fig. 3 is the partial enlarged drawing at B place in Fig. 2.
Fig. 4 is the profile being provided with solder mask layer test zone.
Embodiment
Various exemplary embodiment of the present invention is described in detail now with reference to accompanying drawing.It should be noted that: unless specifically stated otherwise, otherwise positioned opposite, the numerical expression of the parts of setting forth in these embodiments and step and numerical value do not limit the scope of the invention.
Illustrative to the description only actually of at least one exemplary embodiment below, never as any restriction to the present invention and application or use.
May not discuss in detail for the known technology of person of ordinary skill in the relevant, method and apparatus, but in the appropriate case, described technology, method and apparatus should be regarded as a part for specification.
In all examples with discussing shown here, any occurrence should be construed as merely exemplary, instead of as restriction.Therefore, other example of exemplary embodiment can have different values.
It should be noted that: represent similar terms in similar label and letter accompanying drawing below, therefore, once be defined in an a certain Xiang Yi accompanying drawing, then do not need to be further discussed it in accompanying drawing subsequently.
With reference to figure 1, Fig. 2, the invention provides and a kind ofly have the pcb board 1 burying resistance, in order to improve the efficiency of production, whole pcb board 1 is manufactured with multiple circuit unit 2, such as Fig. 2 shows and be provided with 528 circuit units 2 on whole pcb board 1.When in use, by separated for each circuit unit 2.
Wherein figure 1 illustrate the detailed circuit Butut of circuit unit 2, it comprises power end, output, earth terminal, needs the place arranging resistance all to realize by burying resistance material in this circuit layout.In Copper Foil and the common region of burying resistance material, electric current selects the very little Copper Foil of resistance as the passage of transmission, and is not having Copper Foil region, and electric current flows through and buries resistance material.
Wherein, pcb board 1 of the present invention is provided with at least one test zone, with reference to figure 3, described test zone comprises at least one row and buries resistance layer, and be disposed on this and bury multiple Copper Foils 3 above resistance layer, in the execution mode that the present invention one is concrete, pcb board 1 is provided with three test zones, lays respectively at the edge of pcb board 1.Wherein, each test zone is provided with two rows and buries resistance layer, and two rows bury resistance layer and are arranged in parallel.Bury compartment of terrain above resistance layer be provided with four Copper Foils 3 every row, these four Copper Foils 3 spaced apart will bury resistance layer and be divided into three Ge Maizu districts 4, that is, be a Ge Maizu district 4 between adjacent two Copper Foils 3.Described Copper Foil 3 is rectangular, and four Copper Foils 3 spaced apart are divided into three rectangular Mai Zu districts 4 by burying resistance layer.
In order to reduce the error that length and width are measured, that is, the impact calculated resistivity to make measurement size error is in the scope of material its own tolerances, and the length and width in described Mai Zu district 4 is all greater than 0.5mm.Mai Zu district 4 is such as selected to be of a size of 1*1mm.Square can be selected by described Mai Zu district 4, certainly, for a person skilled in the art, after the technical scheme knowing patent of the present invention, also can select rectangle.
In another embodiment of the invention, in some circuit unit 2, the top in Hui Maizu district 4 arranges one deck solder resist, to this, in test zone, at least one Mai Zu district 4 is also equipped with solder mask layer 5, the Measurement accuracy to pcb board burying resistance material can be realized.With reference to figure 4, such as, select at Liang Gemaizu district 4 upper berth handicapping welding flux layer 5.In order to ensure the Measurement accuracy in the Mai Zu district 4 being provided with solder mask layer 5, in the test, have at least in a Ge Maizu district 4 and do not lay solder mask layer 5.
In the manufacture craft process of pcb board, in view of the consistency of technique, material, equipment, the resistance of burying that same pcb board is produced is identical substantially.Pcb board of the present invention, increases when Butut and devises test zone, by the measurement of this test zone, can obtain the resistivity of whole pcb board burying resistance material, can carry out management and control to the circuit unit on whole pcb board.Such as when the resistivity detecting multiple position in certain test zone is undesirable time, the circuit unit on whole pcb board should do scraps process, avoids the generation of follow-up defective products.This pcb board is applied in the production of microphone circuit unit, effectively can identifies the against esd ability of microphone circuit unit, avoid the risk in microphone applications.
Present invention also offers the method for testing of a kind of pcb board burying resistance, it comprises the following steps:
A, above-mentioned having is provided to bury the pcb board of resistance
B, two of universal instrument gauge outfits are ridden on the Copper Foil 3 of certain both sides, Mai Zu district 4 in test zone on pcb board 1, measure the resistance Ω in Mai Zu district 4; The Copper Foil 3 of both sides, Mai Zu district 4 is measured the resistance Ω in this Mai Zu district 4 as contact;
C, utilize gauging instrument to measure the length and width size in Mai Zu district 4, be designated as L, W respectively;
D, utilize the square resistance rate in following formulae discovery Chu Maizu district 4: ρ=Ω * W/L.
In above-mentioned step, first can measure the resistance in Mai Zu district 4, certainly, for a person skilled in the art, also first can measure the length and width size in Mai Zu district 4, the resistance in Zai Cemaizu district 4, the change of this step does not affect final testing result.
In the application process of reality, exposed Mai Zu district 4 is easily subject to external influence and causes the change of character, finally may have influence on the resistivity of himself.The upper surface in general way Shi Maizu district 4 lays one deck solder mask layer 5, with reference to figure 3, Fig. 4.But when carrying out dimensional measurement to the Mai Zu district 4 being equipped with solder mask layer 5, the edge due to Mai Zu district 4 receives the impact of solder mask layer 5 and pcb board processing procedure to the impact of Mai Zu district 4 lateral erosion, accurately cannot obtain the accurate size in Mai Zu district 4.
To this, in above-mentioned steps b, two gauge outfits of universal instrument ride over upper surface and are equipped with on the Copper Foil of both sides, Mai Zu district 4 of solder mask layer 5, and that is, what universal instrument was measured is the resistance in the Mai Zu district 4 with solder mask layer 5; And in described step c, what gauging instrument was measured is the length and width size in the Mai Zu district 4 of not laying solder mask layer 5.Thus, accurately can obtain resistance and length and width size that top is equipped with the Mai Zu district 4 of solder mask layer, finally can obtain square resistance rate accurately.
Although be described in detail specific embodiments more of the present invention by example, it should be appreciated by those skilled in the art, above example is only to be described, instead of in order to limit the scope of the invention.It should be appreciated by those skilled in the art, can without departing from the scope and spirit of the present invention, above embodiment be modified.Scope of the present invention is limited by claims.
Claims (10)
1. one kind has the pcb board burying resistance, it is characterized in that: on described pcb board (1), at least one test zone is set, described test zone comprises at least one row and buries resistance layer, and be disposed on this and bury multiple Copper Foils (3) above resistance layer, described Copper Foil (3) is rectangular, and described multiple spaced Copper Foil (3) is divided into multiple rectangular Mai Zu district (4) by burying resistance layer.
2. pcb board according to claim 1, is characterized in that: the length and width of described Mai Zu district (4) is all greater than 0.5mm.
3. pcb board according to claim 1, is characterized in that: described Mai Zu district (4) is in square.
4. pcb board according to claim 2, is characterized in that: described Mai Zu district (4) is of a size of 1*1mm.
5. pcb board according to claim 1, is characterized in that: described test zone is provided with three, is separately positioned on the edge of pcb board (1).
6. pcb board according to claim 1, is characterized in that: at least one Mai Zu district (4), be equipped with solder mask layer (5).
7. pcb board buries a method of testing for resistance, it is characterized in that, comprise the following steps:
A, provide the pcb board (1) having as claimed in claim 1 and bury resistance;
B, two of universal instrument gauge outfits to be ridden on the Copper Foil (3) of certain Mai Zu district (4) both sides in the upper test zone of pcb board (1), measure the resistance Ω in Mai Zu district (4);
C, utilize gauging instrument measure Mai Zu district (4) length and width size, be designated as L, W respectively;
D, utilize the square resistance rate of following formulae discovery Chu Maizu district (4): ρ=Ω * W/L.
8. method of testing according to claim 7, is characterized in that: in described step b, and what universal instrument was measured is the resistance that top is equipped with the Mai Zu district (4) of solder mask layer (5); In described step c, what gauging instrument was measured is the length and width size in the Mai Zu district (4) of not laying solder mask layer (5).
9. pcb board buries a method of testing for resistance, it is characterized in that, comprise the following steps:
A, provide the pcb board (1) having as claimed in claim 1 and bury resistance;
B, utilize gauging instrument to measure the length and width size in certain Mai Zu district (4) in the upper test zone of pcb board (1), be designated as L, W respectively;
C, two of universal instrument gauge outfits are ridden on the Copper Foil of Mai Zu district (4) both sides, measure the resistance Ω in Mai Zu district (4);
D, utilize the square resistance rate of following formulae discovery Chu Gaimaizu district (4): ρ=Ω * W/L.
10. method of testing according to claim 9, is characterized in that: in described step b, measurement be the length and width size in the Mai Zu district (4) of not laying solder mask layer (5); In described step c, what universal instrument was measured is the resistance in the Mai Zu district (4) with solder mask layer (5).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510082453.8A CN104619114A (en) | 2015-02-15 | 2015-02-15 | PCB (printed circuit board) with embedded resistors and embedded resistor test method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510082453.8A CN104619114A (en) | 2015-02-15 | 2015-02-15 | PCB (printed circuit board) with embedded resistors and embedded resistor test method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104619114A true CN104619114A (en) | 2015-05-13 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510082453.8A Pending CN104619114A (en) | 2015-02-15 | 2015-02-15 | PCB (printed circuit board) with embedded resistors and embedded resistor test method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104619114A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109992798A (en) * | 2017-12-29 | 2019-07-09 | 深圳市兴森快捷电路科技股份有限公司 | It is a kind of that resistance design method is buried based on Altium Designer software |
| CN110061268A (en) * | 2018-09-26 | 2019-07-26 | 南方科技大学 | Fuel battery internal partition detects bipolar plates |
| CN113552416A (en) * | 2021-06-30 | 2021-10-26 | 惠州市金百泽电路科技有限公司 | Method for measuring resistance value of inner-layer buried resistance pattern of circuit board |
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| CN204408747U (en) * | 2015-02-15 | 2015-06-17 | 歌尔声学股份有限公司 | A kind of have the pcb board burying resistance |
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2015
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| JPH07128379A (en) * | 1993-11-08 | 1995-05-19 | Nitto Denko Corp | Inspection method for printed wiring board |
| CN1253466A (en) * | 1998-11-10 | 2000-05-17 | 华通电脑股份有限公司 | Flat resistor and capacitor and making method thereof |
| CN2563885Y (en) * | 2002-05-21 | 2003-07-30 | 神达电脑股份有限公司 | Wiring improving structure for circuit board test wire |
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| 姜雪飞，刘东，欧植夫: "埋嵌平面电阻印制板阻值控制方法研究", 《印制电路信息》 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109992798A (en) * | 2017-12-29 | 2019-07-09 | 深圳市兴森快捷电路科技股份有限公司 | It is a kind of that resistance design method is buried based on Altium Designer software |
| CN109992798B (en) * | 2017-12-29 | 2023-10-24 | 深圳市兴森快捷电路科技股份有限公司 | Buried resistor design method based on Aldium Designer software |
| CN110061268A (en) * | 2018-09-26 | 2019-07-26 | 南方科技大学 | Fuel battery internal partition detects bipolar plates |
| CN110061268B (en) * | 2018-09-26 | 2021-01-01 | 南方科技大学 | Fuel cell internal partition detection bipolar plate |
| CN113552416A (en) * | 2021-06-30 | 2021-10-26 | 惠州市金百泽电路科技有限公司 | Method for measuring resistance value of inner-layer buried resistance pattern of circuit board |
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Address after: 261031 Dongfang Road, Weifang high tech Development Zone, Shandong, China, No. 268 Applicant after: Goertek Inc. Address before: 261031 Dongfang Road, Weifang high tech Development Zone, Shandong, China, No. 268 Applicant before: Goertek Inc. |
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| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20150513 |
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