CN104617956B - High energy efficiency small area capacitor array gradual approaching A/D converter and conversion method - Google Patents
High energy efficiency small area capacitor array gradual approaching A/D converter and conversion method Download PDFInfo
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- CN104617956B CN104617956B CN201510033894.9A CN201510033894A CN104617956B CN 104617956 B CN104617956 B CN 104617956B CN 201510033894 A CN201510033894 A CN 201510033894A CN 104617956 B CN104617956 B CN 104617956B
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Abstract
The invention discloses high energy efficiency small area capacitor array gradual approaching A/D converter and conversion method, analog-digital converter includes capacitor array digital analog converter, comparator and Approach by inchmeal switch controller, D conversion method proposed by the present invention is in the 1st, 2 comparison capacitor array not consumed energy, 3rd time into (N+2)/2 time comparison, the electric capacity total capacitance value for participating in changing is 2i+1Individual specific capacitance C, wherein, i be 1≤i≤(N 2)/2 natural number, (N+4)/2 time to n-th relatively in, the electric capacity total capacitance value for participating in changing is 2jIndividual specific capacitance C, j are the natural number of 1≤j≤(N 2)/2, and relatively energy of the energy of capacitor array consumption than traditional structure consumption is small every time, can effectively reduce the average switch power consumption of capacitor array；And the present invention compares traditional structure, can effectively reduce area.It the composite can be widely applied to integrated circuit fields.
Description
Technical field
The present invention relates to technical field of integrated circuits, more particularly to a kind of high energy efficiency small area capacitor array successive approximation
Analog-digital converter and conversion method.
Background technology
Gradual approaching A/D converter is a kind of middle high-precision, medium switching rate, the analog-digital converter of super low-power consumption
Structure.For sensor, portable set and biologic applications, it is desirable to which analog-digital converter can be operated in low supply voltage
Under.However as the reduction of supply voltage, the gain of circuit is restricted, and the structure of gradual approaching A/D converter is only
Including circuit comparator, digital analog converter and successive approximation register without providing gain.The power consumption meeting of digital circuit
As process reduction ratio constantly reduces, and the power consumption of analog circuit is difficult to reduce with the progress of technique.
The content of the invention
In order to solve the above-mentioned technical problem, being averaged out for capacitor array can be effectively reduced it is an object of the invention to provide a kind of
Power consumption is closed, and high energy efficiency small area capacitor array gradual approaching A/D converter and the conversion side of capacitor array area can be reduced
Method.
The technical solution adopted in the present invention is：
High energy efficiency small area capacitor array gradual approaching A/D converter, including capacitor array digital analog converter, compare
Device and Approach by inchmeal switch controller, the output end of the capacitor array digital analog converter and the input of comparator connect, institute
The output end for stating comparator is connected with the input of Approach by inchmeal switch controller, the output of the Approach by inchmeal switch controller
End is connected with the switch control terminal of capacitor array digital analog converter.
As the further improvement of described high energy efficiency small area capacitor array gradual approaching A/D converter, the electricity
Holding array digital analog converter includes being connected to phase capacitor array and inverted capacitance array, the output end of the same phase capacitor array
The in-phase input end of comparator, the output end of the inverted capacitance array are connected to the inverting input of comparator.
It is described same as the further improvement of described high energy efficiency small area capacitor array gradual approaching A/D converter
Phase capacitor array is included with phase main capacitance array and with mutually from capacitor array, and the input of the same phase main capacitance array is by opening
Connection is connected to in-phase signal input, and the output end of the same phase main capacitance array is connected to the in-phase input end of comparator, institute
State with the in-phase input end for being mutually connected to comparator by switch from the output end of capacitor array, the same phase main capacitance array with
It is connected with phase from capacitor array.
It is described same as the further improvement of described high energy efficiency small area capacitor array gradual approaching A/D converter
Phase main capacitance array includes N/2 with phase main capacitance unit, described to include N/2 with mutually from electric capacity list from capacitor array with phase
Member, the N/2 individual with phase main capacitance unit to N/2 with phase main capacitance unit with the 1st in phase main capacitance unit
Pole plate is connected to the in-phase input end of comparator, and described 3rd with phase main capacitance unit to N/2 with phase main capacitance unit
Top crown between pass sequentially through switch connection, described 1st with the top crown of phase main capacitance unit and the 2nd with phase main capacitance
The top crown of unit selects connection common-mode voltage or reference voltage or ground by switching respectively, and described 3rd the same as phase main capacitance list
Member to the N/2 top crowns with phase main capacitance unit select connection common-mode voltage or reference voltage or ground by switching respectively,
The N/2 same phases are from the 1st in capacitor cell with mutually bottom crown of a same phase from capacitor cell from capacitor cell to N/2
It is coupled and the in-phase input end of comparator is connected to by switch, described 3rd the same as mutually individual from capacitor cell to N/2
With mutually from passing sequentially through switch connection between the top crown of capacitor cell, described 1st with mutually from the top crown of capacitor cell and
2nd selects connection common-mode voltage or reference voltage or ground by switching respectively with phase from the top crown of capacitor cell, and the described 3rd
It is individual with mutually from capacitor cell to N/2 with mutually from the top crown of capacitor cell respectively by switch select connection common-mode voltage or
Reference voltage or ground, described 3rd with phase main capacitance unit to the N/2 top crowns with phase main capacitance unit respectively by opening
Pass is connected with mutually individual from capacitor cell to N/2 with the 3rd with phase from the top crown of capacitor cell, and wherein N represents analog-to-digital conversion
Device digit.
As the further improvement of described high energy efficiency small area capacitor array gradual approaching A/D converter, described
1 includes the sub- electric capacity that 1 capacitance is unit electric capacity C, institute with phase main capacitance unit respectively with phase main capacitance unit and the 2nd
State the 3rd includes the sub- electric capacity that 1 capacitance is 2 specific capacitance C with phase main capacitance unit respectively, and described 1st the same as mutually main
The bottom crown of the sub- electric capacity of capacitor cell to the N/2 bottom crowns with the sub- electric capacity of phase main capacitance unit are connected to comparator
In-phase input end, the top crown and the 2nd son with phase main capacitance unit of the 1st sub- electric capacity with phase main capacitance unit
The top crown of electric capacity selects connection common-mode voltage or reference voltage or ground by switching respectively, and described 3rd the same as phase main capacitance list
The top crown of the sub- electric capacity of member selects connection common-mode voltage or reference voltage or ground by switching, and described 4th the same as phase main capacitance
Unit is to N/2 with phase main capacitance unit, and the quantity that sub- electric capacity is included with phase main capacitance unit described i-th is i-2, institute
The top crown of the 3rd sub- electric capacity with phase main capacitance unit is stated by switching the 2nd son electricity with the 4th with phase main capacitance unit
Hold and be connected, described i-th with phase main capacitance unit, the capacitance of the 1st sub- electric capacity is 2 specific capacitance C, the 2nd to the
The capacitance of i-2 sub- electric capacity is respectively Cj=2j-1C, the top crown of the 1st sub- electric capacity select connection reference by switching
Voltage or common-mode voltage or ground, the top crown of the 1st sub- electric capacity are individual with the of phase main capacitance unit with i+1 by switching
The top crown of 2 sub- electric capacity is connected, and the top crown of the 1st sub- electric capacity is same mutually from capacitor cell with i-th by switch
Top crown is connected, and the top crown of the 2nd sub- electric capacity to the i-th -2 sub- electric capacity is main with phase with the i-th -1 by switch respectively
The top crown of 1st sub- electric capacity to the i-th -3 sub- electric capacity of capacitor cell is connected, the 2nd sub- electric capacity to the i-th -2 son electricity
The top crown of appearance is upper with individual the 3rd sub- electric capacity with phase main capacitance unit of i+1 to the i-th -1 sub- electric capacity by switching respectively
Pole plate is connected, wherein, i be 4≤i≤N/2-1 natural number, j be 2≤j≤i-2 natural number, CjRepresent j-th sub- electric capacity
Capacitance, the N/2 quantity for including sub- electric capacity with phase main capacitance unit are N/2-2, and the capacitance of the 1st sub- electric capacity is
2 specific capacitance C, the 2nd capacitance to N/2-2 sub- electric capacity are respectively Ck=2k-1C, the 1st sub- electric capacity it is upper
Pole plate selects connection reference voltage or common-mode voltage or ground by switching, the top crown of the 1st sub- electric capacity by switch with
N/2 are connected with phase from the top crown of capacitor cell, the top crown point of the 2nd sub- electric capacity to N/2-2 sub- electric capacity
Not by switching the top crown phase with N/2-1 the 1st sub- electric capacity with phase main capacitance unit to N/2-3 sub- electric capacity
Even, wherein, k be 2≤k≤N/2-2 natural number, CkRepresent the capacitance of k-th of sub- electric capacity；
Described 1st is unit electricity with mutually 1 capacitance is included respectively from capacitor cell with phase from capacitor cell and the 2nd
Hold C electric capacity, described 3rd the same as mutually from capacitor cell respectively including the sub- electric capacity that 1 capacitance is 2 specific capacitance C, institute
The 1st is stated with mutually from the bottom crown of the sub- electric capacity of capacitor cell to N/2 with mutually from the bottom crowns of the sub- electric capacity of capacitor cell
It is coupled and the in-phase input end of comparator is connected to by switch, described 1st the same as mutually from the sub- electric capacity of capacitor cell
Top crown and the 2nd switch selection connection common-mode voltage or with reference to electricity with mutually passing through from the top crown of the sub- electric capacity of capacitor cell
Pressure or ground, described 3rd passes through switch from the top crown of the sub- electric capacity of capacitor cell with phase and selects connection common-mode voltage or reference
Voltage or ground, described 4th the same as mutually individual with mutually from capacitor cell, described i-th the same as mutually from electric capacity from capacitor cell to N/2
The quantity of unit including sub- electric capacity be i-2, and described 3rd from the top crown of the sub- electric capacity of capacitor cell the same as mutually passing through switch and the
4 are connected with phase from the 2nd sub- electric capacity of capacitor cell, and described i-th same phase is from capacitor cell, the electricity of the 1st sub- electric capacity
Capacitance is 2 specific capacitance C, and the capacitance of the 2nd to the i-th -2 sub- electric capacity is respectively Cj=2j-1C, the 1st sub- electric capacity
Top crown select connection reference voltage or common-mode voltage or ground by switching, the top crown of the 1st sub- electric capacity is by opening
Close with i+1 with being mutually connected from the 2nd sub- electric capacity of capacitor cell, the top crown of the 1st sub- electric capacity by switch and
I-th of top crown with the 1st sub- electric capacity of phase main capacitance unit is connected, the 2nd sub- electric capacity to the i-th -2 sub- electric capacity
Top crown is respectively by switching and the i-th -1 top crown with phase from the 1st sub- electric capacity of capacitor cell to the i-th -3 sub- electric capacity
It is connected, the top crown of the 2nd sub- electric capacity to the i-th -2 sub- electric capacity is same mutually from electric capacity list with i+1 by switch respectively
The top crown of the 3rd sub- electric capacity to the i-th -1 sub- electric capacity of member is connected, wherein, i is 4≤i≤N/2-1 natural number, j is 2≤
J≤i-2 natural number, CjThe capacitance of j-th of sub- electric capacity is represented, the N/2 include sub- electric capacity with phase from capacitor cell
Quantity be N/2-2, the capacitance of the 1st sub- electric capacity is 2 specific capacitance C, the 2nd electric capacity to N/2-2 sub- electric capacity
Value is respectively Ck=2k-1C, the top crown of the 1st sub- electric capacity by switch select connection reference voltage or common-mode voltage or
Ground, the top crown of the 1st sub- electric capacity is by switching and the N/2 upper poles with the 1st sub- electric capacity of phase main capacitance unit
Plate is connected, the top crown of the 2nd sub- electric capacity to N/2-2 sub- electric capacity respectively by switch with N/2-1 with phase from
The top crown of 1st sub- electric capacity of capacitor cell to N/2-3 sub- electric capacity is connected, wherein, k is 2≤k≤N/2-2 nature
Number, CkRepresent the capacitance of k-th of sub- electric capacity.
It is described anti-as the further improvement of described high energy efficiency small area capacitor array gradual approaching A/D converter
Phase capacitor array includes anti-phase main capacitance array and anti-phase from capacitor array, and the input of the anti-phase main capacitance array is by opening
Connection is connected to inversion signal input, and the output end of the anti-phase main capacitance array is connected to the inverting input of comparator, institute
State the anti-phase output end from capacitor array and the inverting input of comparator be connected to by switch, the anti-phase main capacitance array with
It is anti-phase to be connected from capacitor array.
It is described anti-as the further improvement of described high energy efficiency small area capacitor array gradual approaching A/D converter
Phase main capacitance array includes N/2 anti-phase main capacitance units, described anti-phase anti-phase from electric capacity list including N/2 from capacitor array
Member, under the 1st anti-phase main capacitance unit to the N/2 anti-phase main capacitance units in the N/2 anti-phase main capacitance units
Pole plate is connected to the inverting input of comparator, the 3rd anti-phase main capacitance unit to N/2 anti-phase main capacitance units
Top crown between pass sequentially through switch connection, the top crown and the 2nd anti-phase main capacitance of the 1st anti-phase main capacitance unit
The top crown of unit selects connection common-mode voltage or reference voltage or ground, the 3rd anti-phase main capacitance list by switching respectively
Member to the top crown of N/2 anti-phase main capacitance units selects connection common-mode voltage or reference voltage or ground by switching respectively,
The N/2 anti-phase from the anti-phase anti-phase bottom crown from capacitor cell from capacitor cell to N/2 of the 1st in capacitor cell
It is coupled and the inverting input of comparator is connected to by switch, described 3rd anti-phase individual from capacitor cell to N/2
Passed sequentially through between the anti-phase top crown from capacitor cell switch connection, the 1st anti-phase top crown from capacitor cell and
The 2nd anti-phase top crown from capacitor cell selects connection common-mode voltage or reference voltage or ground by switching respectively, and the described 3rd
The individual anti-phase anti-phase top crown from capacitor cell from capacitor cell to N/2 respectively by switch select connection common-mode voltage or
Reference voltage or ground, the top crown of the 3rd anti-phase main capacitance unit to N/2 anti-phase main capacitance units is respectively by opening
Close with the 3rd it is anti-phase it is anti-phase from capacitor cell to N/2 be connected from the top crown of capacitor cell, wherein N expression analog-to-digital conversions
Device digit.
As the further improvement of described high energy efficiency small area capacitor array gradual approaching A/D converter, described
1 anti-phase main capacitance unit and the 2nd anti-phase main capacitance unit include the sub- electric capacity that 1 capacitance is unit electric capacity C, institute respectively
State the 3rd anti-phase main capacitance unit includes the sub- electric capacity that 1 capacitance is 2 specific capacitance C, the 1st anti-phase master respectively
The bottom crown of the bottom crown of the sub- electric capacity of capacitor cell to the sub- electric capacity of N/2 anti-phase main capacitance units is connected to comparator
Inverting input, the top crown of sub- electric capacity and the son of the 2nd anti-phase main capacitance unit of the 1st anti-phase main capacitance unit
The top crown of electric capacity selects connection common-mode voltage or reference voltage or ground, the 3rd anti-phase main capacitance list by switching respectively
The top crown of the sub- electric capacity of member selects connection common-mode voltage or reference voltage or ground, the 4th anti-phase main capacitance by switching
Unit is into N/2 anti-phase main capacitance units, and quantity that i-th of anti-phase main capacitance unit includes sub- electric capacity is i-2, institute
The top crown of the sub- electric capacity of the 3rd anti-phase main capacitance unit is stated by switching the 2nd son electricity with the 4th anti-phase main capacitance unit
Hold and be connected, in i-th of anti-phase main capacitance unit, the capacitance of the 1st sub- electric capacity is 2 specific capacitance C, the 2nd to the
The capacitance of i-2 sub- electric capacity is respectively Cj=2j-1C, the top crown of the 1st sub- electric capacity select connection reference by switching
Voltage or common-mode voltage or ground, the top crown of the 1st sub- electric capacity is by switching the with the anti-phase main capacitance unit of i+1
The top crown of 2 sub- electric capacity is connected, the top crown of the 1st sub- electric capacity by switch with i-th it is anti-phase from capacitor cell
Top crown is connected, and the top crown of the 2nd sub- electric capacity to the i-th -2 sub- electric capacity passes through switch and the i-th -1 anti-phase master respectively
The top crown of 1st sub- electric capacity to the i-th -3 sub- electric capacity of capacitor cell is connected, the 2nd sub- electric capacity to the i-th -2 son electricity
The top crown of appearance is upper with the 3rd sub- electric capacity of the individual anti-phase main capacitance unit of i+1 to the i-th -1 sub- electric capacity by switching respectively
Pole plate is connected, wherein, i be 4≤i≤N/2-1 natural number, j be 2≤j≤i-2 natural number, CjRepresent j-th sub- electric capacity
Capacitance, the quantity that the N/2 anti-phase main capacitance units include sub- electric capacity is N/2-2, and the capacitance of the 1st sub- electric capacity is
2 specific capacitance C, the 2nd capacitance to N/2-2 sub- electric capacity are respectively Ck=2k-1C, the 1st sub- electric capacity it is upper
Pole plate selects connection reference voltage or common-mode voltage or ground by switching, the top crown of the 1st sub- electric capacity by switch with
N/2 is anti-phase to be connected from the top crown of capacitor cell, the top crown point of the 2nd sub- electric capacity to N/2-2 sub- electric capacity
Not by switching the top crown phase with the 1st sub- electric capacity of N/2-1 anti-phase main capacitance units to N/2-3 sub- electric capacity
Even, wherein, k be 2≤k≤N/2-2 natural number, CkRepresent the capacitance of k-th of sub- electric capacity；
Described 1st anti-phase anti-phase electric for unit including 1 capacitance respectively from capacitor cell from capacitor cell and the 2nd
Hold C electric capacity, described 3rd anti-phase to include the sub- electric capacity that 1 capacitance is 2 specific capacitance C, institute from capacitor cell respectively
The bottom crown of the 1st anti-phase sub- electric capacity from capacitor cell is stated to the bottom crown of the N/2 anti-phase sub- electric capacity from capacitor cell
It is coupled and the inverting input of comparator, the 1st anti-phase sub- electric capacity from capacitor cell is connected to by switch
Top crown and the 2nd anti-phase sub- electric capacity from capacitor cell top crown pass through switch selection connection common-mode voltage or with reference to electricity
Pressure or ground, the top crown of the 3rd anti-phase sub- electric capacity from capacitor cell select connection common-mode voltage or reference by switching
Voltage or ground, described 4th anti-phase individual anti-phase from capacitor cell from capacitor cell to N/2, and described i-th anti-phase from electric capacity
The quantity of unit including sub- electric capacity be i-2, and the top crown of the 3rd anti-phase sub- electric capacity from capacitor cell passes through switch and the
4 anti-phase to be connected from the 2nd sub- electric capacity of capacitor cell, and described i-th anti-phase from capacitor cell, the electricity of the 1st sub- electric capacity
Capacitance is 2 specific capacitance C, and the capacitance of the 2nd to the i-th -2 sub- electric capacity is respectively Cj=2j-1C, the 1st sub- electric capacity
Top crown select connection reference voltage or common-mode voltage or ground by switching, the top crown of the 1st sub- electric capacity is by opening
Close and i+1 is anti-phase is connected from the 2nd sub- electric capacity of capacitor cell, the top crown of the 1st sub- electric capacity by switch and
The top crown of 1st sub- electric capacity of i-th of anti-phase main capacitance unit is connected, the 2nd sub- electric capacity to the i-th -2 sub- electric capacity
Top crown is respectively by switching the top crown with the i-th -1 anti-phase the 1st sub- electric capacity from capacitor cell to the i-th -3 sub- electric capacity
It is connected, the top crown of the 2nd sub- electric capacity to the i-th -2 sub- electric capacity is anti-phase from electric capacity list by switch and i+1 respectively
The top crown of the 3rd sub- electric capacity to the i-th -1 sub- electric capacity of member is connected, wherein, i is 4≤i≤N/2-1 natural number, j is 2≤
J≤i-2 natural number, CjRepresent the capacitance of j-th of sub- electric capacity, the N/2 anti-phase to include sub- electric capacity from capacitor cell
Quantity be N/2-2, the capacitance of the 1st sub- electric capacity is 2 specific capacitance C, the 2nd electric capacity to N/2-2 sub- electric capacity
Value is respectively Ck=2k-1C, the top crown of the 1st sub- electric capacity by switch select connection reference voltage or common-mode voltage or
Ground, the top crown of the 1st sub- electric capacity is by switching the upper pole with the 1st sub- electric capacity of N/2 anti-phase main capacitance units
Plate is connected, the top crown of the 2nd sub- electric capacity to N/2-2 sub- electric capacity respectively by switch with N/2-1 it is anti-phase from
The top crown of 1st sub- electric capacity of capacitor cell to N/2-3 sub- electric capacity is connected, wherein, k is 2≤k≤N/2-2 nature
Number, CkRepresent the capacitance of k-th of sub- electric capacity.
The present invention another technical scheme be：
The D conversion method of high energy efficiency small area capacitor array gradual approaching A/D converter, comprises the following steps：
A, sample：
By the internal switch of all same phase capacitor arrays and inverted capacitance array close, and will all same phase capacitor cells with
The sub- electric capacity top crown of inverted capacitance unit selects connection common-mode voltage by switching, and analog input signal passes through capacitor array number
Weighted-voltage D/A converter is maintained signal；
B, the 1st comparison：
Comparator is compared to the holding signal of in-phase input end and inverting input, and exports the 1st comparative result D
(1)；
C, the 2nd comparison：
According to the 1st comparative result D (1),
When D (1)=1, the top crown access reference voltage of all inverted capacitance units of inverted capacitance array；
When D (1)=0, the top crown with all same phase capacitor cells of phase capacitor array accesses reference voltage；
The internal switch of all same phase capacitor arrays and inverted capacitance array is kept to close, capacitor array digital analog converter is opened
Begin to carry out electric charge redistribution, after the completion of electric charge redistribution, signal magnitude of the comparator to in-phase input end and inverting input
It is compared, exports the 2nd comparative result D (2)；
D, the 3rd comparison：
According to the 1st comparative result D (1) and the 2nd comparative result D (2),
When D (1) D (2)=11, same phase main capacitance array is disconnected with, from capacitor array connecting valve, disconnecting the 3rd with phase
The 3rd is disconnected with mutually from capacitor cell to N/2 with phase main capacitance unit internal switch to N/2 with phase main capacitance unit
It is individual with mutually from capacitor cell internal switch, the 2nd with phase main capacitance unit and the 2nd with mutually from the upper of the sub- electric capacity of capacitor cell
Pole plate access ground；
When D (1) D (2)=10, anti-phase main capacitance array is disconnected with anti-phase from capacitor array connecting valve, disconnects the 3rd
Anti-phase main capacitance unit is anti-phase from capacitor cell to N/2 to N/2 anti-phase main capacitance unit internal switches, disconnection the 3rd
It is individual anti-phase from capacitor cell internal switch, the 2nd anti-phase main capacitance unit and the 2nd anti-phase sub- electric capacity from capacitor cell it is upper
Pole plate accesses common-mode voltage；
When D (1) D (2)=01, same phase main capacitance array is disconnected with, from capacitor array connecting valve, disconnecting the 3rd with phase
The 3rd is disconnected with mutually from capacitor cell to N/2 with phase main capacitance unit internal switch to N/2 with phase main capacitance unit
It is individual with mutually from capacitor cell internal switch, the 2nd with phase main capacitance unit and the 2nd with mutually from the upper of the sub- electric capacity of capacitor cell
Pole plate accesses common-mode voltage；
When D (1) D (2)=00, anti-phase main capacitance array is disconnected with anti-phase from capacitor array connecting valve, disconnects the 3rd
Anti-phase main capacitance unit is anti-phase from capacitor cell to N/2 to N/2 anti-phase main capacitance unit internal switches, disconnection the 3rd
It is individual anti-phase from capacitor cell internal switch, the 2nd anti-phase main capacitance unit and the 2nd anti-phase sub- electric capacity from capacitor cell it is upper
Pole plate access ground；
Capacitor array digital analog converter proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator is to same phase
The signal magnitude of input and inverting input is compared, and exports the 3rd comparative result D (3)；
E, ith compares：
According to the 1st comparative result D (1), the 2nd comparative result D (2) and the i-th -1 time comparative result D (i-1)；
As D (1) D (2) D (i-1)=111, the i-th -1 with phase main capacitance unit and the i-th -1 with mutually from capacitor cell
The top crown access ground of 1st sub- electric capacity, by the i-th -1 with phase main capacitance unit and the i-th -1 with mutually out of capacitor cell
Portion's switch closure；
As D (1) D (2) D (i-1)=110, the i-th -1 with phase main capacitance unit and the i-th -1 with mutually from capacitor cell
The top crown access voltage of 1st sub- electric capacity keeps constant, same mutually from electricity with phase main capacitance unit and the i-th -1 by the i-th -1
Hold the internal switch closure of unit；
As D (1) D (2) D (i-1)=101, the i-th -1 anti-phase main capacitance unit and the i-th -1 it is anti-phase from capacitor cell
The top crown access voltage of 1st sub- electric capacity keeps constant, and the i-th -1 anti-phase main capacitance unit and the i-th -1 is anti-phase from electricity
Hold the internal switch closure of unit；
As D (1) D (2) D (i-1)=100, the i-th -1 anti-phase main capacitance unit and the i-th -1 it is anti-phase from capacitor cell
The top crown access common-mode voltage of 1st sub- electric capacity, the i-th -1 anti-phase main capacitance unit and the i-th -1 is anti-phase from electric capacity list
The internal switch closure of member；
As D (1) D (2) D (i-1)=011, the i-th -1 with phase main capacitance unit and the i-th -1 with mutually from capacitor cell
The top crown access common-mode voltage of 1st sub- electric capacity, it is same mutually from electric capacity list with phase main capacitance unit and the i-th -1 by the i-th -1
The internal switch closure of member；
As D (1) D (2) D (i-1)=010, the i-th -1 with phase main capacitance unit and the i-th -1 with mutually from capacitor cell
The top crown access voltage of 1st sub- electric capacity keeps constant, same mutually from electricity with phase main capacitance unit and the i-th -1 by the i-th -1
Hold the internal switch closure of unit；
As D (1) D (2) D (i-1)=001, the i-th -1 anti-phase main capacitance unit and the i-th -1 it is anti-phase from capacitor cell
The top crown access voltage of 1st sub- electric capacity keeps constant, and the i-th -1 anti-phase main capacitance unit and the i-th -1 is anti-phase from electricity
Hold the internal switch closure of unit；
As D (1) D (2) D (i-1)=000, the i-th -1 anti-phase main capacitance unit and the i-th -1 it is anti-phase from capacitor cell
The top crown access ground of 1st sub- electric capacity, the i-th -1 anti-phase main capacitance unit and the i-th -1 is anti-phase out of capacitor cell
Portion's switch closure；
Capacitor array digital analog converter proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator is to same phase
The signal magnitude of input and inverting input is compared, and exports ith comparative result, and wherein i is 4≤i≤(N+2)/2
Natural number, N represent analog-digital bit, and i initial value is 4；
F, judge this comparative result whether (N+2)/2 time comparative result, if so, then performing step G；Conversely, then i increases
Add 1, return and perform step E；
G, adjust：
According to the 1st comparative result D (1), the 2nd comparative result D (2) and (N+2)/2 time comparative result D ((N+2)/
2)；
When D (1) D (2) D ((N+2)/2)=111, the 1st is accessed ground with phase from the top crown of the sub- electric capacity of capacitor cell；
When D (1) D (2) D ((N+2)/2)=110, the 2nd the same as mutually common from the top crown access of the sub- electric capacity of capacitor cell
Mode voltage；
When D (1) D (2) D ((N+2)/2)=101, the top crown access ginseng of the 2nd anti-phase sub- electric capacity from capacitor cell
Examine voltage；
When D (1) D (2) D ((N+2)/2)=100, the top crown access of the 1st anti-phase sub- electric capacity from capacitor cell is altogether
Mode voltage；
When D (1) D (2) D ((N+2)/2)=011, the 1st the same as mutually common from the top crown access of the sub- electric capacity of capacitor cell
Mode voltage；
When D (1) D (2) D ((N+2)/2)=010, the 2nd is accessed ginseng with phase from the top crown of the sub- electric capacity of capacitor cell
Examine voltage；
When D (1) D (2) D ((N+2)/2)=001, the top crown access of the 2nd anti-phase sub- electric capacity from capacitor cell is altogether
Mode voltage；
When D (1) D (2) D ((N+2)/2)=000, the top crown access ground of the 1st anti-phase sub- electric capacity from capacitor cell；
Capacitor array digital analog converter carries out electric charge redistribution；
H, (N+4)/2 time comparison：
According to the 2nd comparative result D (2)；
When D (2)=1, with phase main capacitance array and with mutually being disconnected from the internal switch of capacitor array, with phase main capacitance battle array
Row with phase from capacitor array connecting valve with closing；
When D (2)=0, anti-phase main capacitance array and the anti-phase internal switch from capacitor array disconnect, anti-phase main capacitance battle array
Row close with anti-phase from capacitor array connecting valve；
Capacitor array digital analog converter proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator is to same phase
The signal magnitude of input and inverting input is compared, and exports (N+4)/2 time comparative result；
I, jth time compares：
According to -1 comparative result D (j-1) of the 2nd comparative result D (2) and jth；
As D (2) D (j-1)=11, jth-N/2 is the same as mutually from the internal switch closure of capacitor cell；
As D (2) D (j-1)=10 ,-N/2 the internal switches with phase main capacitance unit of jth close；
As D (2) D (j-1)=01 ,-N/2 anti-phase internal switches from capacitor cell of jth close；
As D (2) D (j-1)=00, the internal switch closure of-N/2 anti-phase main capacitance units of jth；
Capacitor array digital analog converter proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator is to same phase
The signal magnitude of input and inverting input is compared, and output jth time comparative result, wherein j is (N+6)/2≤i≤N's
Natural number, N represent analog-digital bit, and j initial value is (N+6)/2；
J, judge this comparative result whether n-th comparative result, if so, then terminating；Conversely, then j increases by 1, return is held
Row step I.
The beneficial effects of the invention are as follows：
High energy efficiency small area capacitor array gradual approaching A/D converter of the present invention and conversion method, high energy efficiency small area
Capacitor array gradual approaching A/D converter is by capacitor array digital analog converter, comparator and Approach by inchmeal switch controller structure
Into wherein capacitor array digital-to-analog converter structures employ high energy efficiency small area capacitor array digital analog converter proposed by the present invention
Structure, and D conversion method proposed by the present invention is in the 1st, 2 comparison capacitor array not consumed energy, the 3rd time to (N+
2)/2 in time comparison, the electric capacity total capacitance value for participating in changing is 2i+1Individual specific capacitance C, wherein, i is oneself of 1≤i≤(N-2)/2
So number, (N+4)/2 time to n-th relatively in, the electric capacity total capacitance value for participating in changing is 2jIndividual specific capacitance C, wherein, j 1
The natural number of≤j≤(N-2)/2, relatively energy of the energy of capacitor array consumption than traditional structure consumption is small every time, can
Effectively reduce the average switch power consumption of capacitor array；And capacitor array digital analog converter area proposed by the present invention is 2N/2It is individual
Specific capacitance C, compared to traditional structure, it can effectively reduce area.
Brief description of the drawings
The embodiment of the present invention is described further below in conjunction with the accompanying drawings：
Fig. 1 is the structural representation of high energy efficiency small area capacitor array gradual approaching A/D converter of the present invention；
Fig. 2 is the structural representation of the capacitor array digital analog converter in the present invention；
Fig. 3 is the structural representation of the same phase capacitor array in the capacitor array digital analog converter of the present invention；
Fig. 4 is the structural representation of the inverted capacitance array in the capacitor array digital analog converter of the present invention；
Fig. 5 is the structural representation of 10 gradual approaching A/D converters of the present invention；
Fig. 6 is the 3 times switch transition diagram of 6 capacitor array digital analog converters of the embodiment of the present invention；
Fig. 7 be 6 capacitor array digital analog converters of the embodiment of the present invention 3 times comparative result be 111 when after No. 3 times switch
Transition diagram；
Fig. 8 be 6 capacitor array digital analog converters of the embodiment of the present invention 3 times comparative result be 110 when after No. 3 times switch
Transition diagram；
Fig. 9 be 6 capacitor array digital analog converters of the embodiment of the present invention 3 times comparative result be 101 when after No. 3 times switch
Transition diagram；
Figure 10 be when the 3 times comparative result of 6 capacitor array digital analog converters of the embodiment of the present invention is 100 after open for 3 times
Close transition diagram；
Figure 11 be when the 3 times comparative result of 6 capacitor array digital analog converters of the embodiment of the present invention is 011 after open for 3 times
Close transition diagram；
Figure 12 be when the 3 times comparative result of 6 capacitor array digital analog converters of the embodiment of the present invention is 010 after open for 3 times
Close transition diagram；
Figure 13 be when the 3 times comparative result of 6 capacitor array digital analog converters of the embodiment of the present invention is 001 after open for 3 times
Close transition diagram；
Figure 14 be when the 3 times comparative result of 6 capacitor array digital analog converters of the embodiment of the present invention is 000 after open for 3 times
Close transition diagram.
Embodiment
With reference to figure 1- Fig. 4, high energy efficiency small area capacitor array gradual approaching A/D converter of the present invention, including electric capacity battle array
Columns weighted-voltage D/A converter 1, comparator 2 and Approach by inchmeal switch controller 3, the output end of the capacitor array digital analog converter 1 with
The input connection of comparator 2, the output end of the comparator 2 is connected with the input of Approach by inchmeal switch controller 3, described
The output end of Approach by inchmeal switch controller 3 is connected with the switch control terminal of capacitor array digital analog converter 1.
As the further improvement of described high energy efficiency small area capacitor array gradual approaching A/D converter, the electricity
Holding array digital analog converter 1 is included with phase capacitor array 11 and inverted capacitance array 12, the output of the same phase capacitor array 11
End is connected to the in-phase input end of comparator 2, and the output end of the inverted capacitance array 12 is connected to the anti-phase input of comparator 2
End.
It is as follows with reference to figure 5- Figure 14, the operation principle of embodiments of the invention：
S1, sampling：
The top crown of all electric capacity meets common-mode voltage Vcm, and analog input signal obtains by capacitor array digital analog converter 1
Keep signal；
S2, the 1st comparison：
Sampling switch is disconnected, according to the holding signal on capacitor array, comparator 2 compares Vip and Vin size, output
1st comparative result D (1), the 1st comparison capacitor array consumed energy are 0；
S3, the 2nd comparison：
According to the 1st comparative result D (1),
Work as Vip>During Vin, i.e. during D (1)=1, the top crown of all electric capacity of inverted capacitance array 12 connects reference voltage
Vref, capacitor array digital analog converter 1 start electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares Vip-Vin
With Vref/2 size, the 2nd comparative result D (2) is exported, the 2nd comparison capacitor array consumed energy is 0；
Work as Vip<During Vin, i.e. during D (1)=0, the top crown with all electric capacity of phase capacitor array 11 connects Vref, electric capacity battle array
Columns weighted-voltage D/A converter 1 starts electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares Vip-Vin's and-Vref/2
Size, exports the 2nd comparative result D (2), and the 2nd comparison capacitor array consumed energy is 0；
S4, the 3rd comparison：
According to the 1st comparative result D (1) and the 2nd comparative result D (2),
Work as Vref/2<Vip-Vin<During Vref, i.e. during D (1) D (2)=11, disconnect same phase main capacitance array 111 with mutually from
The connecting valve of capacitor array 112, disconnection the 3rd is individual with phase main capacitance unit internal switch to N/2 with phase main capacitance unit, breaks
Opening the 3rd, from capacitor cell to N/2, a same phase is from capacitor cell internal switch with phase, and the 2nd the same as phase main capacitance unit and the 2nd
It is individual that with mutually ground is accessed from the top crown of the sub- electric capacity of capacitor cell, capacitor array digital analog converter 1 starts electric charge redistribution, when
After the completion of electric charge redistribution, comparator 2 compares Vip-Vin and 3Vref/4 size, exports the 3rd comparative result D (3), and the 3rd
It is secondary relatively capacitor array consumed energy be；
When 0<Vip-Vin<During Vref/2, i.e. during D (1) D (2)=10, disconnect anti-phase main capacitance array 121 with it is anti-phase from electricity
Hold the connecting valve of array 122, disconnect the 3rd anti-phase main capacitance unit to N/2 anti-phase main capacitance unit internal switches, disconnect
3rd anti-phase anti-phase from capacitor cell internal switch from capacitor cell to N/2, the 2nd anti-phase main capacitance unit and the 2nd
The top crown access common-mode voltage Vcm of the anti-phase sub- electric capacity from capacitor cell, capacitor array digital analog converter 1 start electric charge and divided again
Cloth, after the completion of electric charge redistribution, comparator 2 compares Vip-Vin and Vref/4 size, exports the 3rd comparative result D (3),
3rd time comparison capacitor array consumed energy is；
As-Vref/2<Vip-Vin<When 0, i.e. during D (1) D (2)=01, disconnect same phase main capacitance array 111 with mutually from electricity
Hold the connecting valve of array 112, disconnection the 3rd is with phase main capacitance unit to N/2 with phase main capacitance unit internal switch, disconnection
3rd with phase, from capacitor cell to N/2, a same phase is from capacitor cell internal switch, and the 2nd the same as phase main capacitance unit and the 2nd
With mutually common-mode voltage Vcm is accessed from the top crown of the sub- electric capacity of capacitor cell, capacitor array digital analog converter 1 starts electric charge and divided again
Cloth, after the completion of electric charge redistribution, comparator 2 compares Vip-Vin and-Vref/4 size, exports the 3rd comparative result D
(3), the 3rd comparison capacitor array consumed energy is；
As-Vref<Vip-Vin<During-Vref/2, i.e. during D (1) D (2)=00, disconnect anti-phase main capacitance array 121 with it is anti-phase
From the connecting valve of capacitor array 122, the 3rd anti-phase main capacitance unit of disconnection to the individual anti-phase main capacitance unit internal switches of N/2,
Disconnect the 3rd it is anti-phase anti-phase from capacitor cell internal switch from capacitor cell to N/2, the 2nd anti-phase main capacitance unit and
The top crown access ground of the 2nd anti-phase sub- electric capacity from capacitor cell, capacitor array digital analog converter 1 start electric charge redistribution,
After the completion of electric charge redistribution, comparator 2 compares Vip-Vin and -3Vref/4 size, exports the 3rd comparative result D (3),
3rd time comparison electric capacity consumed energy is；
S5, the 4th compare：
According to the 1st comparative result D (1), the 2nd comparative result D (2) and the 3rd comparative result D (3),
Work as 3Vref/4<Vip-Vin<During Vref, i.e. during D (1) D (2) D (3)=111, the 3rd the same as phase main capacitance unit and
3 with mutually accessing ground from the top crown of the sub- electric capacity of capacitor cell, by the 3rd with phase main capacitance unit and the 3rd with mutually from
The internal switch closure of capacitor cell, capacitor array digital analog converter 1 starts electric charge redistribution, after the completion of electric charge redistribution,
Comparator 2 compares Vip-Vin and 7Vref/8 size, output the 4th comparative result D (4), and the 4th compares capacitor array consumption
Energy is；
Work as Vref/2<Vip-Vin<During 3Vref/4, i.e. during D (1) D (2) D (3)=110, the 3rd with phase main capacitance unit and
3rd keeps constant with mutually accessing voltage from the top crown of the sub- electric capacity of capacitor cell, by the 3rd with phase main capacitance unit and
3rd the same as mutually from the internal switch closure of capacitor cell, capacitor array digital analog converter 1 starts electric charge redistribution, when electric charge weight
After the completion of distribution, comparator 2 compares Vip-Vin and 5Vref/8 size, and output the 4th comparative result D (4), the 4th compares
Capacitor array consumed energy is；
Work as Vref/4<Vip-Vin<During Vref/2, i.e. during D (1) D (2) D (3)=101, the 3rd anti-phase main capacitance unit and
The top crown access voltage of 3rd anti-phase sub- electric capacity from capacitor cell keeps constant, by the 3rd anti-phase main capacitance unit and the
3 anti-phase internal switches from capacitor cell close, and capacitor array digital analog converter 1 starts electric charge redistribution, when again electric charge divides
After the completion of cloth, comparator 2 compares Vip-Vin and 3Vref/8 size, and output the 4th comparative result D (4), the 4th is more electric
Holding array consumed energy is；
When 0<Vip-Vin<During Vref/4, i.e. during D (1) D (2) D (3)=100, the 3rd anti-phase main capacitance unit and the 3rd
The anti-phase sub- electric capacity from capacitor cell top crown access common-mode voltage, by the 3rd anti-phase main capacitance unit and the 3rd it is anti-phase from
The internal switch closure of capacitor cell, capacitor array digital analog converter 1 starts electric charge redistribution, after the completion of electric charge redistribution,
Comparator 2 compares Vip-Vin and Vref/8 size, output the 4th comparative result D (4), and the 4th compares capacitor array consumption
Energy is；
As-Vref/4<Vip-Vin<When 0, i.e. during D (1) D (2) D (3)=011, the 3rd the same as phase main capacitance unit and the 3rd
With mutually common-mode voltage Vcm is accessed from the top crown of the sub- electric capacity of capacitor cell, by the 3rd with phase main capacitance unit and the 3rd
With mutually being closed from the internal switch of capacitor cell, capacitor array digital analog converter 1 starts electric charge redistribution, when electric charge redistribution is complete
Cheng Hou, comparator 2 compare Vip-Vin and-Vref/8 size, output the 4th comparative result D (4), and the 4th compares electric capacity battle array
Row consumed energy is；
As-Vref/2<Vip-Vin<During-Vref/4, i.e. during D (1) D (2) D (3)=010, the 3rd the same as phase main capacitance unit
With the 3rd with mutually keeping constant from the top crown access voltage of the sub- electric capacity of capacitor cell, by the 3rd with phase main capacitance unit and
3rd the same as mutually from the internal switch closure of capacitor cell, capacitor array digital analog converter 1 starts electric charge redistribution, when electric charge weight
After the completion of distribution, comparator 2 compares Vip-Vin and -3Vref/8 size, and output the 4th comparative result D (4), the 4th compares
Capacitor array consumed energy is；
As -3Vref/4<Vip-Vin<During-Vref/2, i.e. during D (1) D (2) D (3)=001, the 3rd anti-phase main capacitance unit
Keep constant with the top crown access voltage of the 3rd anti-phase sub- electric capacity from capacitor cell, by the 3rd anti-phase main capacitance unit and
The 3rd anti-phase internal switch from capacitor cell closes, and capacitor array digital analog converter 1 starts electric charge redistribution, when electric charge weight
After the completion of distribution, comparator 2 compares Vip-Vin and -5Vref/8 size, and output the 4th comparative result D (4), the 4th compares
Capacitor array consumed energy is；
As-Vref<Vip-Vin<During -3Vref/4, i.e. during D (1) D (2) D (3)=000, the 3rd anti-phase main capacitance unit and
The top crown access ground of 3rd anti-phase sub- electric capacity from capacitor cell, by the 3rd anti-phase main capacitance unit and the 3rd it is anti-phase from
The internal switch closure of capacitor cell, capacitor array digital analog converter 1 starts electric charge redistribution, after the completion of electric charge redistribution,
Comparator 2 compares Vip-Vin and -7Vref/8 size, output the 4th comparative result D (4), and the 4th compares capacitor array and disappeared
Energy consumption is；
S6, access voltage adjustment：
According to the 1st comparative result D (1), the 2nd comparative result D (2) and the 4th comparative result D (4)；
Work as 7Vref/8<Vip-Vin<During Vref, i.e. during D (1) D (2) D (3) D (4)=1111, the 1st the same as mutually from electric capacity list
The top crown access ground of the sub- electric capacity of member, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array consumed energy is 0；
Work as 6Vref/8<Vip-Vin<During 7Vref/8, i.e. during D (1) D (2) D (3) D (4)=1110, the 2nd the same as mutually from electric capacity
The top crown access common-mode voltage Vcm of the sub- electric capacity of unit, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array disappear
Energy consumption is；
Work as 5Vref/8<Vip-Vin<During 6Vref/8, i.e. during D (1) D (2) D (3) D (4)=1101, the 1st the same as mutually from electric capacity
The top crown access ground of the sub- electric capacity of unit, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array consumed energy are；
Work as 4Vref/8<Vip-Vin<During 5Vref/8, i.e. during D (1) D (2) D (3) D (4)=1100, the 2nd the same as mutually from electric capacity
The top crown access common-mode voltage Vcm of the sub- electric capacity of unit, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array disappear
Energy consumption is 0；
Work as 3Vref/8<Vip-Vin<During 4Vref/8, i.e. during D (1) D (2) D (3) D (4)=1011, the 2nd anti-phase from electric capacity
The top crown access reference voltage of the sub- electric capacity of unit, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array consumption energy
Measure as 0；
Work as 2Vref/8<Vip-Vin<During 3Vref/8, i.e. during D (1) D (2) D (3) D (4)=1010, the 1st anti-phase from electric capacity
The top crown access common-mode voltage Vcm of the sub- electric capacity of unit, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array disappear
Energy consumption is；
Work as Vref/8<Vip-Vin<During 2Vref/8, i.e. during D (1) D (2) D (3) D (4)=1001, the 2nd anti-phase from electric capacity
The top crown access reference voltage of the sub- electric capacity of unit, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array consumption energy
Measure and be；
When 0<Vip-Vin<During Vref/8, i.e. during D (1) D (2) D (3) D (4)=1000, the 1st anti-phase from capacitor cell
The top crown access common-mode voltage Vcm of sub- electric capacity, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array consumed energy
For 0；
As-Vref/8<Vip-Vin<When 0, i.e. during D (1) D (2) D (3) D (4)=0111, the 1st the same as mutually from capacitor cell
The top crown access common-mode voltage Vcm of sub- electric capacity, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array consumed energy
For 0；
As -2Vref/8<Vip-Vin<During-Vref/8, i.e. during D (1) D (2) D (3) D (4)=0110, the 2nd the same as mutually from electricity
Hold the top crown access reference voltage of the sub- electric capacity of unit, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array consumption
Energy is；
As -3Vref/8<Vip-Vin<During -2Vref/8, i.e. during D (1) D (2) D (3) D (4)=0101, the 1st the same as mutually from electricity
Hold the top crown access common-mode voltage Vcm of the sub- electric capacity of unit, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array
Consumed energy is；
As -4Vref/8<Vip-Vin<During -3Vref/8, i.e. during D (1) D (2) D (3) D (4)=0100, the 2nd the same as mutually from electricity
Hold the top crown access reference voltage of the sub- electric capacity of unit, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array consumption
Energy is 0；
As -5Vref/8<Vip-Vin<During -4Vref/8, i.e. during D (1) D (2) D (3) D (4)=0011, the 2nd anti-phase from electricity
Hold the top crown access common-mode voltage Vcm of the sub- electric capacity of unit, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array
Consumed energy is 0；
As -6Vref/8<Vip-Vin<During -5Vref/8, i.e. during D (1) D (2) D (3) D (4)=0010, the 1st anti-phase from electricity
Hold the top crown access ground of the sub- electric capacity of unit, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array consumed energy is；
As -7Vref/8<Vip-Vin<During -6Vref/8, i.e. during D (1) D (2) D (3) D (4)=0001, the 2nd anti-phase from electricity
Hold the top crown access common-mode voltage Vcm of the sub- electric capacity of unit, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array
Consumed energy is；
As-Vref<Vip-Vin<During -7Vref/8, i.e. during D (1) D (2) D (3) D (4)=0000, the 1st anti-phase from electric capacity
The top crown access ground of the sub- electric capacity of unit, the electric charge redistribution of capacitor array digital analog converter 1, capacitor array consumed energy is 0；
S7, the 5th compare：
According to the 2nd comparative result D (2)；
Work as 7Vref/8<Vip-Vin<During Vref, i.e. during D (1) D (2) D (3) D (4)=1111, with phase main capacitance array 111
With with mutually being disconnected from the internal switch of capacitor array 112, mutually closed with phase main capacitance array 111 with same from capacitor array connecting valve
Close, capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares Vip-
Vin and 15Vref/16 size, output the 5th comparative result D (5), the 5th compare capacitor array consumed energy and are
；
Work as 6Vref/8<Vip-Vin<During 7Vref/8, i.e. during D (1) D (2) D (3) D (4)=1110, with phase main capacitance array
111 and with mutually being disconnected from the internal switch of capacitor array 112, it is connected out with phase main capacitance array 111 with phase from capacitor array
Close and close, capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares
Vip-Vin and 13Vref/16 size, output the 5th comparative result D (5), the 5th compare capacitor array consumed energy for 0；
Work as 5Vref/8<Vip-Vin<During 6Vref/8, i.e. during D (1) D (2) D (3) D (4)=1101, with phase main capacitance array
111 and with mutually being disconnected from the internal switch of capacitor array 112, it is connected out with phase main capacitance array 111 with phase from capacitor array
Close and close, capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares
Vip-Vin and 11Vref/16 size, output the 5th comparative result D (5), the 5th compare capacitor array consumed energy and are；
Work as 4Vref/8<Vip-Vin<During 5Vref/8, i.e. during D (1) D (2) D (3) D (4)=1100, with phase main capacitance array
111 and with mutually being disconnected from the internal switch of capacitor array 112, it is connected out with phase main capacitance array 111 with phase from capacitor array
Close and close, capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares
Vip-Vin and 9Vref/16 size, output the 5th comparative result D (5), the 5th compare capacitor array consumed energy for 0；
Work as 3Vref/8<Vip-Vin<During 4Vref/8, i.e. during D (1) D (2) D (3) D (4)=1011, anti-phase main capacitance array
121 and the anti-phase internal switch from capacitor array 122 disconnect, anti-phase main capacitance array 121 is connected with anti-phase from capacitor array 122
Switch closure, capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares
Vip-Vin and 7Vref/16 size, output the 5th comparative result D (5), the 5th compare capacitor array consumed energy for 0；
Work as 2Vref/8<Vip-Vin<During 3Vref/8, i.e. during D (1) D (2) D (3) D (4)=1010, anti-phase main capacitance array
121 and the anti-phase internal switch from capacitor array 122 disconnect, anti-phase main capacitance array 121 is connected with anti-phase from capacitor array 122
Switch closure, capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares
Vip-Vin and 5Vref/16 size, output the 5th comparative result D (5), the 5th compare capacitor array consumed energy and are；
Work as Vref/8<Vip-Vin<During 2Vref/8, i.e. during D (1) D (2) D (3) D (4)=1001, anti-phase main capacitance array
121 and the anti-phase internal switch from capacitor array 122 disconnect, anti-phase main capacitance array 121 is connected with anti-phase from capacitor array 122
Switch closure, capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares
Vip-Vin and 3Vref/16 size, output the 5th comparative result D (5), the 5th compare capacitor array consumed energy for 0；
When 0<Vip-Vin<During Vref/8, i.e. during D (1) D (2) D (3) D (4)=1000, anti-phase main capacitance array 121 and anti-
Mutually disconnected from the internal switch of capacitor array 122, anti-phase main capacitance array 121 closes with anti-phase from the connecting valve of capacitor array 122
Close, capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares Vip-
Vin and Vref/16 size, output the 5th comparative result D (5), the 5th compare capacitor array consumed energy and are；
As-Vref/8<Vip-Vin<When 0, i.e. during D (1) D (2) D (3) D (4)=0111, with phase main capacitance array 111 and same
Mutually disconnected from the internal switch of capacitor array 112, with phase main capacitance array 111 with being closed with phase from capacitor array connecting valve,
Capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares Vip-Vin
With-Vref/16 size, output the 5th comparative result D (5), the 5th compares capacitor array consumed energy and is；
As -2Vref/8<Vip-Vin<During-Vref/8, i.e. during D (1) D (2) D (3) D (4)=0110, with phase main capacitance array
111 and with mutually being disconnected from the internal switch of capacitor array 112, it is connected out with phase main capacitance array 111 with phase from capacitor array
Close and close, capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares
Vip-Vin and -3Vref/16 size, output the 5th comparative result D (5), the 5th compare capacitor array consumed energy for 0；
As -3Vref/8<Vip-Vin<During -2Vref/8, i.e. during D (1) D (2) D (3) D (4)=0101, with phase main capacitance battle array
Row 111 and the internal switch disconnection with phase from capacitor array 112, it is connected with phase main capacitance array 111 with phase from capacitor array
Switch closure, capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares
Vip-Vin and -5Vref/16 size, output the 5th comparative result D (5), the 5th compare capacitor array consumed energy and are；
As -4Vref/8<Vip-Vin<During -3Vref/8, i.e. during D (1) D (2) D (3) D (4)=0100, with phase main capacitance battle array
Row 111 and the internal switch disconnection with phase from capacitor array 112, it is connected with phase main capacitance array 111 with phase from capacitor array
Switch closure, capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares
Vip-Vin and -7Vref/16 size, output the 5th comparative result D (5), the 5th compare capacitor array consumed energy for 0；
As -5Vref/8<Vip-Vin<During -4Vref/8, i.e. during D (1) D (2) D (3) D (4)=0011, anti-phase main capacitance battle array
Row 121 and the anti-phase internal switch from capacitor array 122 disconnect, and anti-phase main capacitance array 121 connects with anti-phase from capacitor array 122
Switch closure is connect, capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares
Compared with Vip-Vin He -9Vref/16 size, output the 5th comparative result D (5), the 5th compares capacitor array consumed energy and is
0；
As -6Vref/8<Vip-Vin<During -5Vref/8, i.e. during D (1) D (2) D (3) D (4)=0010, anti-phase main capacitance battle array
Row 121 and the anti-phase internal switch from capacitor array 122 disconnect, and anti-phase main capacitance array 121 connects with anti-phase from capacitor array 122
Switch closure is connect, capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares
Compared with Vip-Vin He -11Vref/16 size, output the 5th comparative result D (5), the 5th compares capacitor array consumed energy and is；
As -7Vref/8<Vip-Vin<During -6Vref/8, i.e. during D (1) D (2) D (3) D (4)=0001, anti-phase main capacitance battle array
Row 121 and the anti-phase internal switch from capacitor array 122 disconnect, and anti-phase main capacitance array 121 connects with anti-phase from capacitor array 122
Switch closure is connect, capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares
Compared with Vip-Vin He -13Vref/16 size, output the 5th comparative result D (5), the 5th compares capacitor array consumed energy and is
0；
As-Vref<Vip-Vin<During -7Vref/8, i.e. during D (1) D (2) D (3) D (4)=0000, anti-phase main capacitance array
121 and the anti-phase internal switch from capacitor array 122 disconnect, anti-phase main capacitance array 121 is connected with anti-phase from capacitor array 122
Switch closure, capacitor array digital analog converter 1 proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator 2 compares
Vip-Vin and -15Vref/16 size, output the 5th comparative result D (5), the 5th compare capacitor array consumed energy and are；
S7, the 6th comparison：
According to the 2nd comparative result D (2) and the 5th comparative result D (5)；
Work as 15Vref/16<Vip-Vin<During Vref, i.e. during D (1) D (2) D (3) D (4) D (5)=11111, the 3rd same phase
Closed from the internal switch of capacitor cell, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge redistribution is complete
Cheng Hou, comparator 2 compare Vip-Vin and 31Vref/32 size, export the 6th comparative result D (6), the 6th comparison electric capacity
Array consumed energy is；
Work as 14Vref/16<Vip-Vin<During 15Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=11110, the 3rd
Internal switch with phase main capacitance unit closes, and capacitor array digital analog converter 1 proceeds by electric charge redistribution, when again electric charge divides
After the completion of cloth, comparator 2 compares Vip-Vin and 29Vref/32 size, exports the 6th comparative result D (6), the 6th comparison
Capacitor array consumed energy is；
Work as 13Vref/16<Vip-Vin<During 14Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=11101, the 3rd
With mutually being closed from the internal switch of capacitor cell, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when again electric charge divides
After the completion of cloth, comparator 2 compares Vip-Vin and 27Vref/32 size, exports the 6th comparative result D (6), the 6th comparison
Capacitor array consumed energy is；
Work as 12Vref/16<Vip-Vin<During 13Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=11100, the 3rd
Internal switch with phase main capacitance unit closes, and capacitor array digital analog converter 1 proceeds by electric charge redistribution, when again electric charge divides
After the completion of cloth, comparator 2 compares Vip-Vin and 25Vref/32 size, exports the 6th comparative result D (6), the 6th comparison
Capacitor array consumed energy is；
Work as 11Vref/16<Vip-Vin<During 12Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=11011, the 3rd
With mutually being closed from the internal switch of capacitor cell, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when again electric charge divides
After the completion of cloth, comparator 2 compares Vip-Vin and 23Vref/32 size, exports the 6th comparative result D (6), the 6th comparison
Capacitor array consumed energy is；
Work as 10Vref/16<Vip-Vin<During 11Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=11010, the 3rd
Internal switch with phase main capacitance unit closes, and capacitor array digital analog converter 1 proceeds by electric charge redistribution, when again electric charge divides
After the completion of cloth, comparator 2 compares Vip-Vin and 21Vref/32 size, exports the 6th comparative result D (6), the 6th comparison
Capacitor array consumed energy is；
Work as 9Vref/16<Vip-Vin<During 10Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=11001, the 3rd
With mutually being closed from the internal switch of capacitor cell, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when again electric charge divides
After the completion of cloth, comparator 2 compares Vip-Vin and 19Vref/32 size, exports the 6th comparative result D (6), the 6th comparison
Capacitor array consumed energy is 0；
Work as 8Vref/16<Vip-Vin<During 9Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=11000, the 3rd same
The internal switch closure of phase main capacitance unit, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge redistribution
After the completion of, comparator 2 compares Vip-Vin and 17Vref/32 size, exports the 6th comparative result D (6), and the 6th comparison is electric
It is 0 to hold array consumed energy；
Work as 7Vref/16<Vip-Vin<During 8Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=10111, the 3rd anti-
Mutually closed from the internal switch of capacitor cell, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge redistribution
After the completion of, comparator 2 compares Vip-Vin and 15Vref/32 size, exports the 6th comparative result D (6), and the 6th comparison is electric
It is 0 to hold array consumed energy；
Work as 6Vref/16<Vip-Vin<During 7Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=10110, the 3rd anti-
The internal switch closure of phase main capacitance unit, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge redistribution
After the completion of, comparator 2 compares Vip-Vin and 13Vref/32 size, exports the 6th comparative result D (6), and the 6th comparison is electric
It is 0 to hold array consumed energy；
Work as 5Vref/16<Vip-Vin<During 6Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=10101, the 3rd anti-
Mutually closed from the internal switch of capacitor cell, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge redistribution
After the completion of, comparator 2 compares Vip-Vin and 11Vref/32 size, exports the 6th comparative result D (6), and the 6th comparison is electric
Holding array consumed energy is；
Work as 4Vref/16<Vip-Vin<During 5Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=10100, the 3rd anti-
The internal switch closure of phase main capacitance unit, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge redistribution
After the completion of, comparator 2 compares Vip-Vin and 9Vref/32 size, exports the 6th comparative result D (6), the 6th comparison electric capacity
Array consumed energy is；
Work as 3Vref/16<Vip-Vin<During 4Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=10011, the 3rd anti-
Mutually closed from the internal switch of capacitor cell, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge redistribution
After the completion of, comparator 2 compares Vip-Vin and 7Vref/32 size, exports the 6th comparative result D (6), the 6th comparison electric capacity
Array consumed energy is 0；
Work as 2Vref/16<Vip-Vin<During 3Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=10010, the 3rd anti-
The internal switch closure of phase main capacitance unit, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge redistribution
After the completion of, comparator 2 compares Vip-Vin and 5Vref/32 size, exports the 6th comparative result D (6), the 6th comparison electric capacity
Array consumed energy is 0；
Work as Vref/16<Vip-Vin<During 2Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=10001, the 3rd anti-
Mutually closed from the internal switch of capacitor cell, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge redistribution
After the completion of, comparator 2 compares Vip-Vin and 3Vref/32 size, exports the 6th comparative result D (6), the 6th comparison electric capacity
Array consumed energy is；
When 0<Vip-Vin<During Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=10000, the 3rd anti-phase main capacitance
The internal switch closure of unit, capacitor array digital analog converter 1 proceeds by electric charge redistribution, after the completion of electric charge redistribution,
Comparator 2 compares Vip-Vin and Vref/32 size, exports the 6th comparative result D (6), the 6th comparison capacitor array consumption
Energy is；
As-Vref/16<Vip-Vin<When 0, i.e. during D (1) D (2) D (3) D (4) D (5)=01111, the 3rd the same as mutually from electricity
Hold the internal switch closure of unit, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge redistribution is completed
Afterwards, comparator 2 compares Vip-Vin and-Vref/32 size, exports the 6th comparative result D (6), the 6th comparison capacitor array
Consumed energy is；
As -2Vref/16<Vip-Vin<During-Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=01110, the 3rd
Internal switch with phase main capacitance unit closes, and capacitor array digital analog converter 1 proceeds by electric charge redistribution, when again electric charge divides
After the completion of cloth, comparator 2 compares Vip-Vin and -3Vref/32 size, exports the 6th comparative result D (6), the 6th comparison
Capacitor array consumed energy is；
As -3Vref/16<Vip-Vin<During -2Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=01101, the 3rd
With mutually being closed from the internal switch of capacitor cell, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when again electric charge divides
After the completion of cloth, comparator 2 compares Vip-Vin and -5Vref/32 size, exports the 6th comparative result D (6), the 6th comparison
Capacitor array consumed energy is 0；
As -4Vref/16<Vip-Vin<During -3Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=01100, the 3rd
Internal switch with phase main capacitance unit closes, and capacitor array digital analog converter 1 proceeds by electric charge redistribution, when again electric charge divides
After the completion of cloth, comparator 2 compares Vip-Vin and -7Vref/32 size, exports the 6th comparative result D (6), the 6th comparison
Capacitor array consumed energy is 0；
As -5Vref/16<Vip-Vin<During -4Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=01011, the 3rd
With mutually being closed from the internal switch of capacitor cell, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when again electric charge divides
After the completion of cloth, comparator 2 compares Vip-Vin and -9Vref/32 size, exports the 6th comparative result D (6), the 6th comparison
Capacitor array consumed energy is；
As -6Vref/16<Vip-Vin<During -5Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=01010, the 3rd
Internal switch with phase main capacitance unit closes, and capacitor array digital analog converter 1 proceeds by electric charge redistribution, when again electric charge divides
After the completion of cloth, comparator 2 compares Vip-Vin and -11Vref/32 size, exports the 6th comparative result D (6), the 6th comparison
Capacitor array consumed energy is；
As -7Vref/16<Vip-Vin<During -6Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=01001, the 3rd
With mutually being closed from the internal switch of capacitor cell, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when again electric charge divides
After the completion of cloth, comparator 2 compares Vip-Vin and -13Vref/32 size, exports the 6th comparative result D (6), the 6th comparison
Capacitor array consumed energy is 0；
As -8Vref/16<Vip-Vin<During -7Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=01000, the 3rd
Internal switch with phase main capacitance unit closes, and capacitor array digital analog converter 1 proceeds by electric charge redistribution, when again electric charge divides
After the completion of cloth, comparator 2 compares Vip-Vin and -15Vref/32 size, exports the 6th comparative result D (6), the 6th comparison
Capacitor array consumed energy is 0；
As -9Vref/16<Vip-Vin<During -8Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=00111, the 3rd
The anti-phase internal switch from capacitor cell closes, and capacitor array digital analog converter 1 proceeds by electric charge redistribution, when again electric charge divides
After the completion of cloth, comparator 2 compares Vip-Vin and -17Vref/32 size, exports the 6th comparative result D (6), the 6th comparison
Capacitor array consumed energy is 0；
As -10Vref/16<Vip-Vin<During -9Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=00110, the 3rd
The internal switch closure of individual anti-phase main capacitance unit, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge weight
After the completion of distribution, comparator 2 compares Vip-Vin and -19Vref/32 size, exports the 6th comparative result D (6), the 6th ratio
It is 0 compared with capacitor array consumed energy；
As -11Vref/16<Vip-Vin<During -10Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=00101, the 3rd
The individual anti-phase internal switch from capacitor cell closes, and capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge weight
After the completion of distribution, comparator 2 compares Vip-Vin and -21Vref/32 size, exports the 6th comparative result D (6), the 6th ratio
It is compared with capacitor array consumed energy；
As -12Vref/16<Vip-Vin<During -11Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=00100, the 3rd
The internal switch closure of individual anti-phase main capacitance unit, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge weight
After the completion of distribution, comparator 2 compares Vip-Vin and -23Vref/32 size, exports the 6th comparative result D (6), the 6th ratio
It is compared with capacitor array consumed energy；
As -13Vref/16<Vip-Vin<During -12Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=00011, the 3rd
The individual anti-phase internal switch from capacitor cell closes, and capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge weight
After the completion of distribution, comparator 2 compares Vip-Vin and -25Vref/32 size, exports the 6th comparative result D (6), the 6th ratio
It is compared with capacitor array consumed energy；
As -14Vref/16<Vip-Vin<During -13Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=00010, the 3rd
The internal switch closure of individual anti-phase main capacitance unit, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge weight
After the completion of distribution, comparator 2 compares Vip-Vin and -27Vref/32 size, exports the 6th comparative result D (6), the 6th ratio
It is compared with capacitor array consumed energy；
As -15Vref/16<Vip-Vin<During -14Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=00001, the 3rd
The individual anti-phase internal switch from capacitor cell closes, and capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge weight
After the completion of distribution, comparator 2 compares Vip-Vin and -29Vref/32 size, exports the 6th comparative result D (6), the 6th ratio
It is compared with capacitor array consumed energy；
As-Vref<Vip-Vin<During -15Vref/16, i.e. during D (1) D (2) D (3) D (4) D (5)=00000, the 3rd anti-
The internal switch closure of phase main capacitance unit, capacitor array digital analog converter 1 proceeds by electric charge redistribution, when electric charge redistribution
After the completion of, comparator 2 compares Vip-Vin and -31Vref/32 size, exports the 6th comparative result D (6), and the 6th comparison is electric
Holding array consumed energy is。
Above is the preferable implementation to the present invention is illustrated, but the invention is not limited to the implementation
Example, those skilled in the art can also make a variety of equivalent variations on the premise of without prejudice to spirit of the invention or replace
Change, these equivalent deformations or replacement are all contained in the application claim limited range.
Claims (4)
1. high energy efficiency small area capacitor array gradual approaching A/D converter, it is characterised in that：Turn including capacitor array digital-to-analogue
Parallel operation, comparator and Approach by inchmeal switch controller, the output end of the capacitor array digital analog converter and the input of comparator
End connection, the output end of the comparator are connected with the input of Approach by inchmeal switch controller, the Approach by inchmeal switch control
The output end of device processed is connected with the switch control terminal of capacitor array digital analog converter；
The capacitor array digital analog converter is included with phase capacitor array and inverted capacitance array, the same phase capacitor array it is defeated
Go out the in-phase input end that end is connected to comparator, the output end of the inverted capacitance array is connected to the anti-phase input of comparator
End；
The same phase capacitor array includes with phase main capacitance array and with mutually from capacitor array, the same phase main capacitance array it is defeated
Enter end and phase signals input is connected to by switch, the output end of the same phase main capacitance array is connected to the same phase of comparator
Input, it is described with the in-phase input end for being mutually connected to comparator by switch from the output end of capacitor array, it is described with mutually main
Capacitor array is connected with phase from capacitor array；
The same phase main capacitance array includes N/2 with phase main capacitance unit, described to include N/2 same phases from capacitor array with phase
From capacitor cell, the N/2 individual with phase main capacitance to N/2 with phase main capacitance unit with the 1st in phase main capacitance unit
The bottom crown of unit is connected to the in-phase input end of comparator, and the 3rd with phase main capacitance unit to N/2 with phase main capacitance
Switch connection is passed sequentially through between the top crown of unit, described 1st with the top crown of phase main capacitance unit and the 2nd with mutually main
The top crown of capacitor cell selects connection common-mode voltage or reference voltage or ground by switching respectively, and described 3rd the same as mutually main electricity
Hold unit to N/2 with phase main capacitance unit top crowns respectively by switch select connection common-mode voltage or reference voltage or
Ground, the N/2 is the same as mutually from the 1st in capacitor cell the same as mutually from capacitor cell to N/2 the same as mutually under capacitor cell
Pole plate is coupled and the in-phase input end of comparator is connected to by switch, and the 3rd the same as mutually individual from capacitor cell to N/2
With mutually from passing sequentially through switch connection between the top crown of capacitor cell, described 1st with mutually from the top crown of capacitor cell and
2nd selects connection common-mode voltage or reference voltage or ground by switching respectively with phase from the top crown of capacitor cell, and the described 3rd
It is individual with mutually from capacitor cell to N/2 with mutually from the top crown of capacitor cell respectively by switch select connection common-mode voltage or
Reference voltage or ground, described 3rd with phase main capacitance unit to the N/2 top crowns with phase main capacitance unit respectively by opening
Pass is connected with mutually individual from capacitor cell to N/2 with the 3rd with phase from the top crown of capacitor cell, and wherein N represents analog-to-digital conversion
Device digit；
The inverted capacitance array includes anti-phase main capacitance array and anti-phase from capacitor array, the anti-phase main capacitance array it is defeated
Enter end and inversion signal input is connected to by switch, the output end of the anti-phase main capacitance array is connected to the anti-phase of comparator
Input, the anti-phase output end from capacitor array are connected to the inverting input of comparator, the anti-phase master by switch
Capacitor array is connected with anti-phase from capacitor array；
The anti-phase main capacitance array includes N/2 anti-phase main capacitance units, described anti-phase anti-phase including N/2 from capacitor array
From capacitor cell, the 1st anti-phase main capacitance unit in the N/2 anti-phase main capacitance units to N/2 anti-phase main capacitances
The bottom crown of unit is connected to the inverting input of comparator, the 3rd anti-phase main capacitance unit to N/2 anti-phase main capacitances
Switch connection, the top crown of the 1st anti-phase main capacitance unit and the 2nd anti-phase master are passed sequentially through between the top crown of unit
The top crown of capacitor cell selects connection common-mode voltage or reference voltage or ground, the 3rd anti-phase main electricity by switching respectively
Hold unit to N/2 anti-phase main capacitance units top crown respectively by switch select connection common-mode voltage or reference voltage or
Ground, the N/2 anti-phase anti-phase individual anti-phase under capacitor cell from capacitor cell to N/2 from the 1st in capacitor cell
Pole plate is coupled and the inverting input of comparator is connected to by switch, and the 3rd anti-phase individual from capacitor cell to N/2
Passed sequentially through between the anti-phase top crown from capacitor cell switch connection, the 1st anti-phase top crown from capacitor cell and
The 2nd anti-phase top crown from capacitor cell selects connection common-mode voltage or reference voltage or ground by switching respectively, and the described 3rd
The individual anti-phase anti-phase top crown from capacitor cell from capacitor cell to N/2 respectively by switch select connection common-mode voltage or
Reference voltage or ground, the top crown of the 3rd anti-phase main capacitance unit to N/2 anti-phase main capacitance units is respectively by opening
Close with the 3rd it is anti-phase it is anti-phase from capacitor cell to N/2 be connected from the top crown of capacitor cell, wherein N expression analog-to-digital conversions
Device digit.
2. high energy efficiency small area capacitor array gradual approaching A/D converter according to claim 1, it is characterised in that：
Described 1st includes the son that 1 capacitance is unit electric capacity C with phase main capacitance unit respectively with phase main capacitance unit and the 2nd
Electric capacity, described 3rd includes the sub- electric capacity that 1 capacitance is 2 specific capacitance C, the 1st same phase with phase main capacitance unit
The bottom crown of the sub- electric capacity of main capacitance unit is connected to the N/2 bottom crowns with the sub- electric capacity of phase main capacitance unit to be compared
The in-phase input end of device, the top crown of the 1st sub- electric capacity with phase main capacitance unit and the 2nd are the same as phase main capacitance unit
The top crown of sub- electric capacity selects connection common-mode voltage or reference voltage or ground by switching respectively, and described 3rd the same as phase main capacitance
The top crown of the sub- electric capacity of unit selects connection common-mode voltage or reference voltage or ground by switching, and the 4th the same as phase main capacitance list
For member to N/2 with phase main capacitance unit, the quantity that sub- electric capacity is included with phase main capacitance unit i-th is i-2, the described 3rd
The top crown of the sub- electric capacity of individual same phase main capacitance unit passes through switch and the 4th the 2nd sub- electric capacity phase with phase main capacitance unit
Even, described i-th with phase main capacitance unit, the capacitance of the 1st sub- electric capacity is 2 specific capacitance C, and the 2nd to the i-th -2
The capacitance of sub- electric capacity is respectively Cj=2j-1C, the top crown of the 1st sub- electric capacity select connection reference voltage by switching
Or common-mode voltage or ground, the top crown of the 1st sub- electric capacity is by switching the 2nd with i+1 with phase main capacitance unit
The top crown of sub- electric capacity is connected, and the top crown of the 1st sub- electric capacity is same mutually from the upper pole of capacitor cell with i-th by switch
Plate is connected, and the top crown of the 2nd sub- electric capacity to the i-th -2 sub- electric capacity is respectively by switching with the i-th -1 with phase main capacitance
The top crown of 1st sub- electric capacity to the i-th -3 sub- electric capacity of unit is connected, the 2nd sub- electric capacity to the i-th -2 sub- electric capacity
Top crown is respectively by switching the top crown with individual the 3rd sub- electric capacity with phase main capacitance unit of i+1 to the i-th -1 sub- electric capacity
Be connected, wherein, i be 4≤i≤N/2-1 natural number, j be 2≤j≤i-2 natural number, CjRepresent the electric capacity of j-th of sub- electric capacity
Value, the N/2 quantity for including sub- electric capacity with phase main capacitance unit are N/2-2, and the capacitance of the 1st sub- electric capacity is 2
Specific capacitance C, the 2nd capacitance to N/2-2 sub- electric capacity are respectively Ck=2k-1C, the upper pole of the 1st sub- electric capacity
Plate selects connection reference voltage or common-mode voltage or ground by switching, and the top crown of the 1st sub- electric capacity passes through switch and the
N/2 are connected with phase from the top crown of capacitor cell, the top crown difference of the 2nd sub- electric capacity to N/2-2 sub- electric capacity
It is connected by the top crown switched with N/2-1 the 1st sub- electric capacity with phase main capacitance unit to N/2-3 sub- electric capacity,
Wherein, k be 2≤k≤N/2-2 natural number, CkRepresent the capacitance of k-th of sub- electric capacity；
It is respectively mutually unit electric capacity C including 1 capacitance from capacitor cell that described 1st same from capacitor cell and the 2nd with phase
Sub- electric capacity, described 3rd with mutually including the sub- electric capacity that 1 capacitance is 2 specific capacitance C from capacitor cell, described 1st
With phase, from the bottom crown of the sub- electric capacity of capacitor cell to N/2, a same phase is coupling in one from the bottom crown of the sub- electric capacity of capacitor cell
Rise and the in-phase input end of comparator is connected to by switch, described 1st top crown with phase from the sub- electric capacity of capacitor cell
Connection common-mode voltage or reference voltage or ground are selected by switching from the top crown of the sub- electric capacity of capacitor cell with phase with the 2nd,
Described 3rd with mutually from the top crown of the sub- electric capacity of capacitor cell by switch select connection common-mode voltage or reference voltage or
Ground, from capacitor cell to N/2, for a same phase from capacitor cell, i-th of same phase includes sub- electric capacity to the 4th same phase from capacitor cell
Quantity be i-2, described 3rd with mutually from the top crown of the sub- electric capacity of capacitor cell by switch with the 4th with phase from electric capacity
2nd sub- electric capacity of unit is connected, and described i-th the same as mutually from capacitor cell, the capacitance of the 1st sub- electric capacity is 2 units
Electric capacity C, the capacitance of the 2nd to the i-th -2 sub- electric capacity is respectively Cj=2j-1C, the top crown of the 1st sub- electric capacity pass through
Switch selection connection reference voltage or common-mode voltage or ground, the top crown of the 1st sub- electric capacity are same with i+1 by switch
Mutually it is connected from the 2nd sub- electric capacity of capacitor cell, the top crown of the 1st sub- electric capacity passes through switch and i-th of same mutually main electricity
The top crown for holding the 1st sub- electric capacity of unit is connected, and the top crown of the 2nd sub- electric capacity to the i-th -2 sub- electric capacity leads to respectively
Cross switch with the i-th -1 with phase from the top crown of the 1st sub- electric capacity to the i-th -3 sub- electric capacity of capacitor cell to be connected, the described 2nd
The top crown of individual sub- electric capacity to the i-th -2 sub- electric capacity is same mutually from the 3rd son electricity of capacitor cell with i+1 by switching respectively
Hold to the top crown of the i-th -1 sub- electric capacity and be connected, wherein, i is 4≤i≤N/2-1 natural number, and j is 2≤j≤i-2 nature
Number, Cj represent the capacitance of j-th of sub- electric capacity, and the N/2 quantity for including sub- electric capacity from capacitor cell with phase are N/2-
The capacitance of 2, the 1st sub- electric capacity is 2 specific capacitance C, and the 2nd capacitance to N/2-2 sub- electric capacity is respectively Ck=
2k-1C, the top crown of the 1st sub- electric capacity select connection reference voltage or common-mode voltage or ground by switching, described 1st
The top crown of sub- electric capacity is connected by switching with the individual top crowns with the 1st sub- electric capacity of phase main capacitance unit of N/2, and described the
The top crown of 2 sub- electric capacity to N/2-2 sub- electric capacity is same mutually from the 1st of capacitor cell with N/2-1 by switch respectively
The top crown of individual sub- electric capacity to N/2-3 sub- electric capacity is connected, wherein, k is 2≤k≤N/2-2 natural number, CkRepresent k-th
The capacitance of sub- electric capacity.
3. high energy efficiency small area capacitor array gradual approaching A/D converter according to claim 1, it is characterised in that：
The 1st anti-phase main capacitance unit and the 2nd anti-phase main capacitance unit include the son that 1 capacitance is unit electric capacity C respectively
Electric capacity, the 3rd anti-phase main capacitance unit include the sub- electric capacity that 1 capacitance is 2 specific capacitance C, and described 1st anti-phase
The bottom crown of the bottom crown of the sub- electric capacity of main capacitance unit to the sub- electric capacity of N/2 anti-phase main capacitance units, which is connected to, to be compared
The inverting input of device, the top crown of the sub- electric capacity of the 1st anti-phase main capacitance unit and the 2nd anti-phase main capacitance unit
The top crown of sub- electric capacity selects connection common-mode voltage or reference voltage or ground, the 3rd anti-phase main capacitance by switching respectively
The top crown of the sub- electric capacity of unit selects connection common-mode voltage or reference voltage or ground, the 4th anti-phase main capacitance list by switching
For member into N/2 anti-phase main capacitance units, quantity that i-th of anti-phase main capacitance unit includes sub- electric capacity is i-2, the described 3rd
The top crown of the sub- electric capacity of individual anti-phase main capacitance unit is by switching the 2nd sub- electric capacity phase with the 4th anti-phase main capacitance unit
Even, in i-th of anti-phase main capacitance unit, the capacitance of the 1st sub- electric capacity is 2 specific capacitance C, and the 2nd to the i-th -2
The capacitance of sub- electric capacity is respectively Cj=2j-1C, the top crown of the 1st sub- electric capacity select connection reference voltage by switching
Or common-mode voltage or ground, the top crown of the 1st sub- electric capacity is by switching the 2nd with the anti-phase main capacitance unit of i+1
The top crown of sub- electric capacity is connected, and the top crown of the 1st sub- electric capacity is anti-phase from the upper pole of capacitor cell by switch and i-th
Plate is connected, and the top crown of the 2nd sub- electric capacity to the i-th -2 sub- electric capacity passes through switch and the i-th -1 anti-phase main capacitance respectively
The top crown of 1st sub- electric capacity to the i-th -3 sub- electric capacity of unit is connected, the 2nd sub- electric capacity to the i-th -2 sub- electric capacity
Top crown is respectively by switching the top crown with the 3rd sub- electric capacity of the anti-phase main capacitance unit of i+1 to the i-th -1 sub- electric capacity
Be connected, wherein, i be 4≤i≤N/2-1 natural number, j be 2≤j≤i-2 natural number, CjRepresent the electric capacity of j-th of sub- electric capacity
Value, the quantity that the N/2 anti-phase main capacitance units include sub- electric capacity are N/2-2, and the capacitance of the 1st sub- electric capacity is 2
Specific capacitance C, the 2nd capacitance to N/2-2 sub- electric capacity are respectively Ck=2k-1C, the upper pole of the 1st sub- electric capacity
Plate selects connection reference voltage or common-mode voltage or ground by switching, and the top crown of the 1st sub- electric capacity passes through switch and the
N/2 is anti-phase to be connected from the top crown of capacitor cell, the top crown difference of the 2nd sub- electric capacity to N/2-2 sub- electric capacity
It is connected by the top crown switched with the 1st sub- electric capacity of N/2-1 anti-phase main capacitance units to N/2-3 sub- electric capacity,
Wherein, k be 2≤k≤N/2-2 natural number, CkRepresent the capacitance of k-th of sub- electric capacity；
Described 1st it is anti-phase from capacitor cell and the 2nd it is anti-phase from capacitor cell be respectively unit electric capacity C including 1 capacitance
Sub- electric capacity, described 3rd anti-phase to include the sub- electric capacity that 1 capacitance is 2 specific capacitance C from capacitor cell, described 1st
The bottom crown of the bottom crown of the anti-phase sub- electric capacity from capacitor cell to the N/2 anti-phase sub- electric capacity from capacitor cell is coupling in one
Rise and the inverting input of comparator, the top crown of the 1st anti-phase sub- electric capacity from capacitor cell are connected to by switch
Connection common-mode voltage or reference voltage or ground are selected by switching with the top crown of the 2nd anti-phase sub- electric capacity from capacitor cell,
The top crown of the 3rd anti-phase sub- electric capacity from capacitor cell by switch select connection common-mode voltage or reference voltage or
Ground, the 4th anti-phase anti-phase from capacitor cell from capacitor cell to N/2, and i-th anti-phase to include sub- electric capacity from capacitor cell
Quantity be i-2, the top crown of the 3rd anti-phase sub- electric capacity from capacitor cell is anti-phase from electric capacity by switch and the 4th
2nd sub- electric capacity of unit is connected, and described i-th anti-phase from capacitor cell, and the capacitance of the 1st sub- electric capacity is 2 units
Electric capacity C, the capacitance of the 2nd to the i-th -2 sub- electric capacity is respectively Cj=2j-1C, the top crown of the 1st sub- electric capacity pass through
Switch selection connection reference voltage or common-mode voltage or ground, the top crown of the 1st sub- electric capacity are anti-with i+1 by switch
Mutually it is connected from the 2nd sub- electric capacity of capacitor cell, the top crown of the 1st sub- electric capacity passes through switch and i-th of anti-phase main electricity
The top crown for holding the 1st sub- electric capacity of unit is connected, and the top crown of the 2nd sub- electric capacity to the i-th -2 sub- electric capacity leads to respectively
Cross switch with the top crown of the i-th -1 anti-phase the 1st sub- electric capacity to the i-th -3 sub- electric capacity from capacitor cell to be connected, the described 2nd
The top crown of individual sub- electric capacity to the i-th -2 sub- electric capacity is electric with anti-phase the 3rd son from capacitor cell of i+1 by switching respectively
Hold to the top crown of the i-th -1 sub- electric capacity and be connected, wherein, i is 4≤i≤N/2-1 natural number, and j is 2≤j≤i-2 nature
Number, CjThe capacitance of j-th of sub- electric capacity is represented, the N/2 anti-phase quantity for including sub- electric capacity from capacitor cell are N/2-
The capacitance of 2, the 1st sub- electric capacity is 2 specific capacitance C, and the 2nd capacitance to N/2-2 sub- electric capacity is respectively Ck=
2k-1C, the top crown of the 1st sub- electric capacity select connection reference voltage or common-mode voltage or ground by switching, described 1st
The top crown of sub- electric capacity is connected by the top crown switched with the 1st sub- electric capacity of the individual anti-phase main capacitance units of N/2, and described the
The top crown of 2 sub- electric capacity to N/2-2 sub- electric capacity is anti-phase from the 1st of capacitor cell by switch and N/2-1 respectively
The top crown of individual sub- electric capacity to N/2-3 sub- electric capacity is connected, wherein, k is 2≤k≤N/2-2 natural number, CkRepresent k-th
The capacitance of sub- electric capacity.
4. a kind of modulus of the high energy efficiency small area capacitor array gradual approaching A/D converter based on described in claim 1 turns
Change method, it is characterised in that comprise the following steps：
A, sample：
The internal switch of all same phase capacitor arrays and inverted capacitance array is closed, and by all same phase capacitor cells and anti-phase
The sub- electric capacity top crown of capacitor cell selects connection common-mode voltage by switching, and analog input signal turns by capacitor array digital-to-analogue
Parallel operation is maintained signal；
B, the 1st comparison：
Comparator is compared to the holding signal of in-phase input end and inverting input, and exports the 1st comparative result D (1)；
C, the 2nd comparison：
According to the 1st comparative result D (1),
When D (1)=1, the top crown access reference voltage of all inverted capacitance units of inverted capacitance array；
When D (1)=0, the top crown with all same phase capacitor cells of phase capacitor array accesses reference voltage；
Keep the internal switch of all same phase capacitor arrays and inverted capacitance array to close, capacitor array digital analog converter start into
Row electric charge redistribution, after the completion of electric charge redistribution, comparator is carried out to the signal magnitude of in-phase input end and inverting input
Compare, export the 2nd comparative result D (2)；
D, the 3rd comparison：
According to the 1st comparative result D (1) and the 2nd comparative result D (2),
When D (1) D (2)=11, same phase main capacitance array is disconnected with, from capacitor array connecting valve, disconnecting the 3rd same phase with phase
Main capacitance unit, with phase main capacitance unit internal switch, disconnects the 3rd with mutually individual same from capacitor cell to N/2 to N/2
Mutually from capacitor cell internal switch, the 2nd top crown with phase main capacitance unit and the 2nd with phase from the sub- electric capacity of capacitor cell
Access ground；
When D (1) D (2)=10, disconnect anti-phase main capacitance array with anti-phase from capacitor array connecting valve, disconnect the 3rd it is anti-phase
Main capacitance unit is anti-phase individual anti-from capacitor cell to N/2 to N/2 anti-phase main capacitance unit internal switches, disconnection the 3rd
Mutually from capacitor cell internal switch, the top crown of the 2nd anti-phase main capacitance unit and the 2nd anti-phase sub- electric capacity from capacitor cell
Access common-mode voltage；
When D (1) D (2)=01, same phase main capacitance array is disconnected with, from capacitor array connecting valve, disconnecting the 3rd same phase with phase
Main capacitance unit, with phase main capacitance unit internal switch, disconnects the 3rd with mutually individual same from capacitor cell to N/2 to N/2
Mutually from capacitor cell internal switch, the 2nd top crown with phase main capacitance unit and the 2nd with phase from the sub- electric capacity of capacitor cell
Access common-mode voltage；
When D (1) D (2)=00, disconnect anti-phase main capacitance array with anti-phase from capacitor array connecting valve, disconnect the 3rd it is anti-phase
Main capacitance unit is anti-phase individual anti-from capacitor cell to N/2 to N/2 anti-phase main capacitance unit internal switches, disconnection the 3rd
Mutually from capacitor cell internal switch, the top crown of the 2nd anti-phase main capacitance unit and the 2nd anti-phase sub- electric capacity from capacitor cell
Access ground；
Capacitor array digital analog converter proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator is to homophase input
The signal magnitude of end and inverting input is compared, and exports the 3rd comparative result D (3)；
E, ith compares：
According to the 1st comparative result D (1), the 2nd comparative result D (2) and the i-th -1 time comparative result D (i-1)；
As D (1) D (2) D (i-1)=111, the i-th -1 with phase main capacitance unit and the i-th -1 with mutually from the 1st of capacitor cell
The top crown access ground of individual sub- electric capacity, the i-th -1 is opened with phase main capacitance unit and the i-th -1 with phase from the inside of capacitor cell
Close and close；
As D (1) D (2) D (i-1)=110, the i-th -1 with phase main capacitance unit and the i-th -1 with mutually from the 1st of capacitor cell
The top crown access voltage of individual sub- electric capacity keeps constant, same mutually from electric capacity list with phase main capacitance unit and the i-th -1 by the i-th -1
The internal switch closure of member；
As D (1) D (2) D (i-1)=101, the i-th -1 anti-phase main capacitance unit and the i-th -1 it is anti-phase from the 1st of capacitor cell
The top crown access voltage of individual sub- electric capacity keeps constant, and the i-th -1 anti-phase main capacitance unit and the i-th -1 is anti-phase from electric capacity list
The internal switch closure of member；
As D (1) D (2) D (i-1)=100, the i-th -1 anti-phase main capacitance unit and the i-th -1 it is anti-phase from the 1st of capacitor cell
The top crown access common-mode voltage of individual sub- electric capacity, the i-th -1 anti-phase main capacitance unit and the i-th -1 is anti-phase from capacitor cell
Internal switch closes；
As D (1) D (2) D (i-1)=011, the i-th -1 with phase main capacitance unit and the i-th -1 with mutually from the 1st of capacitor cell
The top crown access common-mode voltage of individual sub- electric capacity, it is same mutually from capacitor cell with phase main capacitance unit and the i-th -1 by the i-th -1
Internal switch closes；
As D (1) D (2) D (i-1)=010, the i-th -1 with phase main capacitance unit and the i-th -1 with mutually from the 1st of capacitor cell
The top crown access voltage of individual sub- electric capacity keeps constant, same mutually from electric capacity list with phase main capacitance unit and the i-th -1 by the i-th -1
The internal switch closure of member；
As D (1) D (2) D (i-1)=001, the i-th -1 anti-phase main capacitance unit and the i-th -1 it is anti-phase from the 1st of capacitor cell
The top crown access voltage of individual sub- electric capacity keeps constant, and the i-th -1 anti-phase main capacitance unit and the i-th -1 is anti-phase from electric capacity list
The internal switch closure of member；
As D (1) D (2) D (i-1)=000, the i-th -1 anti-phase main capacitance unit and the i-th -1 it is anti-phase from the 1st of capacitor cell
The top crown access ground of individual sub- electric capacity, is opened from the inside of capacitor cell by the i-th -1 anti-phase main capacitance unit and the i-th -1 are anti-phase
Close and close；
Capacitor array digital analog converter proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator is to homophase input
The signal magnitude of end and inverting input is compared, and exports ith comparative result, and wherein i is the nature of 4≤i≤(N+2)/2
Number, N represent analog-digital bit, and i initial value is 4；
F, judge this comparative result whether (N+2)/2 time comparative result, if so, then performing step G；Conversely, then i increases by 1,
Return and perform step E；
G, adjust：
According to the 1st comparative result D (1), the 2nd comparative result D (2) and (N+2)/2 time comparative result D ((N+2)/2)；
When D (1) D (2) D ((N+2)/2)=111, the 1st is accessed ground with phase from the top crown of the sub- electric capacity of capacitor cell；
When D (1) D (2) D ((N+2)/2)=110, the 2nd the same as mutually electric from the top crown access common mode of the sub- electric capacity of capacitor cell
Pressure；
When D (1) D (2) D ((N+2)/2)=101, the top crown access of the 2nd anti-phase sub- electric capacity from capacitor cell is with reference to electricity
Pressure；
When D (1) D (2) D ((N+2)/2)=100, the top crown access common mode electricity of the 1st anti-phase sub- electric capacity from capacitor cell
Pressure；
When D (1) D (2) D ((N+2)/2)=011, the 1st the same as mutually electric from the top crown access common mode of the sub- electric capacity of capacitor cell
Pressure；
When D (1) D (2) D ((N+2)/2)=010, the 2nd the same as mutually electric from the top crown access reference of the sub- electric capacity of capacitor cell
Pressure；
When D (1) D (2) D ((N+2)/2)=001, the top crown access common mode electricity of the 2nd anti-phase sub- electric capacity from capacitor cell
Pressure；
When D (1) D (2) D ((N+2)/2)=000, the top crown access ground of the 1st anti-phase sub- electric capacity from capacitor cell；
Capacitor array digital analog converter carries out electric charge redistribution；
H, (N+4)/2 time comparison：
According to the 2nd comparative result D (2)；
When D (2)=1, with phase main capacitance array and with mutually being disconnected from the internal switch of capacitor array, with phase main capacitance array with
With mutually from capacitor array connecting valve closure；
When D (2)=0, anti-phase main capacitance array and the anti-phase internal switch from capacitor array disconnect, anti-phase main capacitance array with
It is anti-phase to be closed from capacitor array connecting valve；
Capacitor array digital analog converter proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator is to homophase input
The signal magnitude of end and inverting input is compared, and exports (N+4)/2 time comparative result；
I, jth time compares：
According to -1 comparative result D (j-1) of the 2nd comparative result D (2) and jth；
As D (2) D (j-1)=11, jth-N/2 is the same as mutually from the internal switch closure of capacitor cell；
As D (2) D (j-1)=10 ,-N/2 the internal switches with phase main capacitance unit of jth close；
As D (2) D (j-1)=01 ,-N/2 anti-phase internal switches from capacitor cell of jth close；
As D (2) D (j-1)=00, the internal switch closure of-N/2 anti-phase main capacitance units of jth；
Capacitor array digital analog converter proceeds by electric charge redistribution, and after the completion of electric charge redistribution, comparator is to homophase input
The signal magnitude of end and inverting input is compared, and output jth time comparative result, wherein j is (N+6)/2≤i≤N nature
Number, N represent analog-digital bit, and j initial value is (N+6)/2；
J, judge this comparative result whether n-th comparative result, if so, then terminating；Conversely, then j increases by 1, return performs step
Rapid I.
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| CN101379707A (en) * | 2006-02-02 | 2009-03-04 | 新加坡国立大学 | An analog-to-digital converter |
| CN103618550A (en) * | 2013-10-29 | 2014-03-05 | 电子科技大学 | A capacitor array successive approximation analog-to-digital converter and a control method |
| CN103905049A (en) * | 2014-03-11 | 2014-07-02 | 中国科学院半导体研究所 | High speed quick flashing plus alternating comparison type successive approximation analog to digital converter |
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| CN104467856A (en) * | 2014-11-21 | 2015-03-25 | 华南理工大学 | High-energy-efficiency capacitor array successive approximation type analog-digital converter and converting method thereof |
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| CN101379707A (en) * | 2006-02-02 | 2009-03-04 | 新加坡国立大学 | An analog-to-digital converter |
| CN103618550A (en) * | 2013-10-29 | 2014-03-05 | 电子科技大学 | A capacitor array successive approximation analog-to-digital converter and a control method |
| CN103905049A (en) * | 2014-03-11 | 2014-07-02 | 中国科学院半导体研究所 | High speed quick flashing plus alternating comparison type successive approximation analog to digital converter |
| CN104113340A (en) * | 2014-07-07 | 2014-10-22 | 西安电子科技大学 | Register-free asynchronous successive approximation analog-to-digital converter |
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