CN104574541B - Method and system for synchronizing time sequence of RSUs and multiple antennae - Google Patents
Method and system for synchronizing time sequence of RSUs and multiple antennae Download PDFInfo
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- CN104574541B CN104574541B CN201410836785.6A CN201410836785A CN104574541B CN 104574541 B CN104574541 B CN 104574541B CN 201410836785 A CN201410836785 A CN 201410836785A CN 104574541 B CN104574541 B CN 104574541B
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- G—PHYSICS
- G07—CHECKING-DEVICES
- G07B—TICKET-ISSUING APPARATUS; FARE-REGISTERING APPARATUS; FRANKING APPARATUS
- G07B15/00—Arrangements or apparatus for collecting fares, tolls or entrance fees at one or more control points
- G07B15/06—Arrangements for road pricing or congestion charging of vehicles or vehicle users, e.g. automatic toll systems
- G07B15/063—Arrangements for road pricing or congestion charging of vehicles or vehicle users, e.g. automatic toll systems using wireless information transmission between the vehicle and a fixed station
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Abstract
The invention provides a method and a system for synchronizing time sequences of RSUs and multiple antennae, and aims to trigger all RSUs to generate external interruption through one same pulse signal so as to achieve time sequence synchronization of multiple RSUs. According to the method and the system, respective preset time delay is set for each RSU, after receiving the external interruption, each RSU transmits a signal after the respective preset time delay, the time interval between two RSUs corresponding to two adjacent transmitted signals is at least the preset time interval, and the preset time interval is a shortest time interval in which the two signals are not overlapped. Through the adoption of the method and the system, the problem of synchronizing a plurality of RSUs is solved, the transmitted signals of the RSUs have sufficient time intervals, an OBU can successfully analyze the signals transmitted from the RSUs, and thus the purpose of normal transaction with the RSUs is achieved.
Description
Technical field
The present invention relates to intelligent transportation field, more particularly, to a kind of rsu and multiple antennas sequential synchronous method and system.
Background technology
In etc (electronic toll collection, electric non-stop toll) free streaming system, in order to improve
Transaction success rate and efficiency, often install not only one rsu (road-side units, roadside unit) antenna and carry out same obu (on
Board unit, board units) complete to conclude the business, generally each road installs even two rsu, in expressway
On the track of all more than three, so the quantity of rsu typically has more than three.
If the sequential of every rsu transmission signal does not synchronize control, then just there may be synchronization have many
The inadequate situation in the interval of platform rsu transmission signal or each rsu transmission signal simultaneously, this will lead to the signal of rsu transmitting in sky
Between superposition collision, obu after receiving this superposed signal cannot successfully resolved, thus the arm's length dealing with rsu cannot be completed.
So between a kind of present stationary problem needing method to can solve the problem that multiple rsu and each rsu there being transmission signal
The problem at enough time interval, so that obu can successfully parse the signal of rsu transmitting, thus completing the arm's length dealing with rsu.
Content of the invention
The invention provides a kind of rsu and multiple antennas sequential synchronous method and system, the present invention can solve the problem that multiple rsu's
Stationary problem, and then ensure that between each rsu, transmission signal has time enough to be spaced, obu can successfully parse rsu to send out
The signal penetrated, thus complete the arm's length dealing with rsu.
A kind of multiple antennas sequential synchronous method, is applied to multiple antennas timing synchronization system, and described system includes being connected with each other
Multiple rsu, the controller being connected with the plurality of rsu, methods described includes:
What each rsu received that described controller sends respectively corresponds initialization information, described initialization with each rsu
Information includes respective mode of operation, respective down trigger mode, and after receiving described initialization information, mode of operation is main frame
Rsu as main frame rsu, remaining be slave rsu, at least initialization information of main frame rsu also comprises the synchronous sequence cycle;
Described main frame rsu sends, to all rsu, the pulse letter that the cycle is the described synchronous sequence cycle by its pwm interface
Number;
Each rsu is launched by respective down trigger mode and respective default delay time after receiving described pulse signal
Signal, wherein, the time interval between the default delay time of the rsu of identical triggering mode is not less than prefixed time interval.
Preferably, described each rsu receives after described pulse signal by respective down trigger mode and respective default
Delay time transmission signal includes:
After the rising edge triggering external interrupt of described pulse signal, down trigger mode is all the rsu of rising edge triggering
By respective default delay time transmission signal;And/or
After the trailing edge triggering external interrupt of described pulse signal, down trigger mode is all the rsu of trailing edge triggering
By respective default delay time transmission signal.
Preferably, determine the respective default delay time of each rsu described method particularly includes:
For rising edge triggering mode and trailing edge triggering mode, determine a rsu's respectively in identical triggering mode
Default delay time is the very first time, and the default delay time of remaining rsu is at least passed on the basis of the described very first time successively
Increase described prefixed time interval;Or
The down trigger mode setting all rsu is identical, determines that the default delay time of a rsu is in all rsu
Second time, the default delay time of remaining rsu is at least incremented by between described Preset Time on described second time basis successively
Every.
Preferably, the described pulse signal of each rsu reception is produced by respective down trigger mode and also wraps after external interrupt
Include:
Each rsu is changed the design variables value of itself according to pulse signal by preset rules;
If the design variables value of itself does not change in Preset Time, send alarm signal to described controller.
Preferably, further comprising the steps of:
Described controller receives the alarm signal that warning rsu sends, and whether judges to send the quantity of the rsu of alarm signal
In predetermined number and whether comprise main frame rsu;
Judge that the quantity sending the rsu of alarm signal and does not comprise main frame rsu in predetermined number, then each is reported to the police
Rsu carries out timing synchronization reparation;
Judge that the rsu quantity sending alarm signal exceedes described predetermined number or comprises main frame rsu, then all rsu are entered
Row timing synchronization is repaired.
Preferably, described each warning rsu is carried out with timing synchronization reparation inclusion:
Again send respective initialization information to each warning rsu, judge each report described after the first Preset Time
Whether the timing synchronization of alert rsu is normal, if abnormal, send reset instruction to abnormal rsu, abnormal rsu is carried out
Reset, after the second Preset Time, judge whether the timing synchronization of abnormal rsu is normal, if abnormal, alerted, if
Timing synchronization normally then terminates to repair;
Described all rsu are carried out with timing synchronization reparation inclusion:
Select next rsu as main frame rsu, described controller resends initialization information to all rsu, first
Judge after Preset Time whether the timing synchronization of all rsu is normal, if abnormal, judge to send the number of the rsu of alarm signal
Whether amount is in predetermined number and whether comprise main frame rsu, if not sending the quantity of the rsu of alarm signal in predetermined number and not
Comprise main frame rsu, then described timing synchronization reparation is carried out to each warning rsu;If the rsu quantity sending alarm signal exceedes institute
State predetermined number or comprise main frame rsu, then send reset instruction to all rsu, all rsu are resetted;Default second
After time, judge whether the sequential of all rsu is normal, if abnormal, reselect another platform rsu as main frame rsu to all
Rsu carries out timing synchronization reparation, until the sequential of all rsu is normal, if the sequential of all rsu normally, is tied during repairing
Shu Xiufu.
A kind of multiple antennas sequential synchronous method, is applied to multiple antennas timing synchronization system, and described system includes multiple rsu,
The controller being connected with the plurality of rsu, methods described includes:
What each rsu received that described controller sends respectively corresponds initialization information, described initialization with each rsu
Information includes respective down trigger mode;
The cycle that each rsu receives described controller transmission respectively is the pulse signal in synchronous sequence cycle;
Each rsu is launched by respective down trigger mode and respective default delay time after receiving described pulse signal
Signal, wherein, the time interval between the default delay time of the rsu of identical triggering mode is not less than prefixed time interval.
A kind of rsu, comprising:
Receiver module, for receiving the initialization information that described controller sends, described initialization information includes Working mould
Formula, down trigger mode;
Principal and subordinate's judge module, for being judged the described rsu conduct when described mode of operation is as main frame to mode of operation
Main frame rsu, when described mode of operation is slave, described rsu is as slave rsu;
Operational module, for when described rsu be main frame rsu when, then the cycle being sent to all rsu by its pwm interface
For the pulse signal in described synchronous sequence cycle, when described rsu is slave rsu, then the cycle that Receiving Host rsu sends is institute
State the pulse signal in synchronous sequence cycle, prolong by respective down trigger mode and respective presetting after receiving described pulse signal
When time transmission signal, wherein, when time interval between the default delay time of the rsu of identical triggering mode is not less than default
Between be spaced.
A kind of multiple antennas timing synchronization system, comprising:
The rsu multiple as claimed in claim 8 being connected with each other, the controller being connected with the plurality of rsu;
Described controller, corresponds initialization information for generating respectively with each rsu, and described initialization information includes
Respective mode of operation, respective down trigger mode and synchronous sequence cycle, send one-to-one initialization to each rsu
Information.
A kind of multiple antennas timing synchronization system, comprising:
Multiple rsu, the controller being connected with the plurality of rsu;
Described controller, corresponds initialization information for generating respectively with each rsu, and described initialization information includes
Respective down trigger mode and synchronous sequence cycle;Send one-to-one initialization information to each rsu;
Described rsu includes the first receiver module and the first operational module;First receiver module is used for receiving described controller
Send corresponds initialization information with each rsu, and described initialization information includes respective down trigger mode, connects simultaneously
The cycle receiving described controller transmission is the pulse signal in described synchronous sequence cycle;Described first operational module is used for receiving institute
State after pulse signal by respective down trigger mode and respective default delay time transmission signal, wherein, identical triggering side
Time interval between the default delay time of the rsu of formula is not less than prefixed time interval.
The invention provides a kind of multiple antennas sequential synchronous method and system, each rsu of the present invention is connected with each other and each
Rsu is all connected with controller, and same pulse signal is simultaneously sent to each rsu by controller, so each rsu can be simultaneously
Receive pulse signal, or main frame rsu sends same pulse signal to each slave rsu, each rsu receives arteries and veins simultaneously
Rush signal, two ways is all capable of each rsu and produces external interrupt by all rsu of same pulse signal triggering, so
It is capable of the timing synchronization of multiple rsu.
And, the present invention sets respective default delay time for each rsu, each rsu, after receiving external interrupt, presses
After respective default delay time time delay again transmission signal it is ensured that the time interval of two rsu corresponding to adjacent transmission signal
At least differ prefixed time interval, prefixed time interval is the minimum time interval that two signals do not produce overlap.So this
The bright stationary problem that can solve the problem that multiple rsu, ensures that between each rsu, transmission signal has enough time interval problem simultaneously, with
Just reach the signal that obu can successfully parse rsu transmitting, thus completing the purpose with the arm's length dealing of rsu.
Brief description
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
Have technology description in required use accompanying drawing be briefly described it should be apparent that, drawings in the following description be only this
Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, acceptable
Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is a kind of structural representation of multiple antennas timing synchronization system disclosed in the embodiment of the present invention;
Fig. 2 is a kind of flow chart of multiple antennas sequential synchronous method disclosed in the embodiment of the present invention;
Fig. 3 a-3e is the signal of default delay time in a kind of multiple antennas sequential synchronous method disclosed in the embodiment of the present invention
Figure;
Fig. 4 is the flow chart of the embodiment of the present invention another multiple antennas sequential synchronous method disclosed;
Fig. 5 is the flow chart of the embodiment of the present invention another multiple antennas sequential synchronous method disclosed;
Fig. 6 is the flow chart of the embodiment of the present invention another multiple antennas sequential synchronous method disclosed;
Fig. 7 is the flow chart of the embodiment of the present invention another multiple antennas sequential synchronous method disclosed;
Fig. 8 is the flow chart of the embodiment of the present invention another multiple antennas sequential synchronous method disclosed;
Fig. 9 is a kind of down trigger schematic diagram of multiple antennas sequential synchronous method disclosed in the embodiment of the present invention;
Figure 10 is a kind of synchronous sequence cycle of multiple antennas sequential synchronous method disclosed in the embodiment of the present invention and default prolongs
When the time schematic diagram;
Figure 11 is a kind of synchronous sequence cycle of multiple antennas sequential synchronous method disclosed in the embodiment of the present invention and default prolongs
When the time schematic diagram;
Figure 12 is a kind of structural representation of rsu disclosed in the embodiment of the present invention.
Specific embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation description is it is clear that described embodiment is only a part of embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under the premise of not making creative work
Embodiment, broadly falls into the scope of protection of the invention.
As shown in figure 1, the invention provides a kind of multiple antennas timing synchronization system, it is many that described system includes being connected with each other
Individual rsu 100, the controller 200 being connected with the plurality of rsu 100.Multiple rsu adopt rsu 1, rsu 2 ... rsu n table
Show, n is non-zero natural number.
In the system, each rsu is connected with each other by bus, and when data are present on the bus, each rsu all can be simultaneously
Obtain this data, in addition each rsu is all connected with controller, when controller sends data to all rsu simultaneously, all rsu
Same data all can be received simultaneously.
As shown in Fig. 2 the invention provides a kind of multiple antennas sequential synchronous method, being applied to the rsu of system shown in Figure 1,
Methods described includes:
Step s101: what each rsu received that described controller sends respectively corresponds initialization information with each rsu,
Described initialization information includes respective mode of operation, respective down trigger mode, works after receiving described initialization information
Pattern be main frame rsu as main frame rsu, remaining be slave rsu, when the initialization information of at least main frame rsu also comprises synchronous
The sequence cycle;
All rsu all can execute the process of once transmitting and obu buying signals within a synchronous sequence cycle, at each
Each rsu synchronized transmissions signal should be realized in the synchronous sequence cycle, between the transmission signal making each rsu again, maintain one
Fixed time interval, to reach multiple rsu synchronized transmissions signals to ensure that signal is not overlapping, so the present invention adopts institute again
There is rsu to realize the purpose of synchronized transmissions signal by the way of same pulse signal triggering external interrupt, be adopted as each
Rsu sets the mode of respective delay time to realize keeping certain time interval between the transmission signal of each rsu.
To achieve these goals, controller was needed to set the mode of operation of each rsu before present invention execution, each
The synchronous sequence cycle that the down trigger mode of rsu and all rsu are used in conjunction with, then by the mode of operation of each rsu, interruption
Triggering mode and synchronous sequence cycle send to each rsu, so that each rsu executes according to the mode that controller sets.Enter one
Step, if rsu is slave, can also only send mode of operation, the down trigger mode of rsu, and not send synchronous sequence
Cycle.
Wherein mode of operation is main frame or slave, and down trigger mode is rising edge triggering or trailing edge triggering, when synchronous
The sequence cycle is a variable quantity, and when the default delay time of rsu changes and/or rsu quantity changes, the synchronous sequence cycle all can
Change, in order to reach all rsu all can within a synchronous sequence cycle transmission signal purpose, the synchronous sequence cycle is at least
Default delay time value preset for each rsu.
Step s102: described main frame rsu passes through its pwm interface and sends the cycle for the described synchronous sequence cycle to all rsu
Pulse signal;
Remaining is slave to only have a main frame within a synchronous sequence cycle, and mode of operation then represents controller for main frame
Order receives the rsu of this mode of operation as main frame rsu, for slave, mode of operation then represents that control order receives this Working mould
As slave rsu, main frame rsu has the ability sending pulse signal to the rsu of formula, and main frame rsu produces pulse signal and is supplied to certainly
When body sends pulse signal by the pwm interface of itself in bus simultaneously, all rsu all can receive pulse letter from bus
Number, trigger itself according to pulse signal to interrupt.
Step s103: each rsu is prolonged by respective down trigger mode and respective presetting after receiving described pulse signal
When time transmission signal, wherein, when time interval between the default delay time of the rsu of identical triggering mode is not less than default
Between be spaced.
After each rsu return pulse signal, just according to the down trigger mode of itself in the rising edge of pulse signal or
Trailing edge produces external interrupt, and according to respective default delay time, sends out after down trigger after default delay time
Penetrate signal, default delay time can be that controller precalculates out, and initializes to each rsu by initialization information
Portion or rsu obtain initialization information after, calculated according to initialization information, no matter any mode is equal
Can achieve.
The down trigger mode of rsu is related to the default delay time of its own, and down trigger mode changes, itself
Default delay time also can change, however, using that triggering mode it is necessary to reach the rsu corresponding to adjacent transmission signal
Prefixed time interval at least differ prefixed time interval, prefixed time interval is that the transmission signal of two rsu in theory will not
Overlapping time interval, if the time interval of the default delay time of the two of adjacent transmission signal rsu is less than between Preset Time
Every the collision of both signal overlaps then can be led to.
The present invention is capable of multiple rsu timing synchronizations, and adjacent transmission signal will not overlap collide, so obu can
Preferably receive the transmission signal of rsu, to be traded with rsu.
The invention provides a kind of multiple antennas sequential synchronous method, each rsu of the present invention is connected with each other by bus and often
Individual rsu is all connected with controller, and same pulse signal is simultaneously sent to each rsu by controller, and each rsu can connect simultaneously
Receive pulse signal, or main frame rsu sends same pulse signal to bus, each rsu receives pulse through bus simultaneously
Signal, two ways is all capable of each rsu and receives same pulse signal simultaneously, all by the triggering of same pulse signal
Rsu produces external interrupt, it is possible to realizing the timing synchronization of multiple rsu.
And, the present invention sets respective default delay time for each rsu, each rsu, after receiving external interrupt, presses
After respective default delay time time delay again transmission signal it is ensured that time between two rsu corresponding to adjacent transmission signal
Interval is at least prefixed time interval, and prefixed time interval is the minimum time interval that two signals do not produce overlap.So this
Invention can solve the problem that the stationary problem of multiple rsu, ensures that between each rsu, transmission signal has enough time interval problem simultaneously,
To reach the signal that obu can successfully parse rsu transmitting, thus completing the purpose with the arm's length dealing of rsu.
The process that determine each rsu respective default delay time is described in detail below, during the default time delay of each rsu
Between, after being realized it is also possible to be precalculated by controller by the algorithm of therein, then it is issued to each rsu, set rsu
Default delay time be broadly divided into two ways:
The first: the triggering mode of all rsu is incomplete same;
For rising edge triggering mode and trailing edge triggering mode, determine a rsu's respectively in identical triggering mode
Default delay time is the very first time, and the default delay time of remaining rsu is at least passed on the basis of the described very first time successively
Increase described prefixed time interval;As long as it is easily understood that the time interval being incremented by can guarantee that transmitting more than prefixed time interval
It is all feasible on the premise of signal period.
Below by several specific embodiments, first kind of way is illustrated, respectively to mark taking four rsu as a example
Numbers 1,2,3 and 4 representing:
A: setting 1 and 3 is rising edge triggering mode, 2 and 4 is trailing edge triggering mode, and 1 and 2 default delay time is
0,3 and 4 default delay time is t, and t is more than or equal to prefixed time interval, and then the triggering of four rsu is suitable in the manner described above
Sequence is 1,3,2 and 4, as shown in Figure 3 a, for the transmission signal schematic diagram of above 4 rsu.Under this triggering mode, synchronous sequence week
Phase is high level and low level respectively accounts for half.
B: setting 1 and 3 is rising edge triggering mode, 2 and 4 is trailing edge triggering mode, and 1 and 2 default delay time is
0,3 and 4 default delay time is 2t, and t is more than or equal to prefixed time interval, in the manner described above the triggering of then four rsu
Order is 1,2,3 and 4, as shown in Figure 3 b, for the transmission signal schematic diagram of above 4 rsu.Synchronous sequence week under this triggering mode
Phase high level accounts for 1/4, and low level accounts for 3/4.
C: setting 1 and 2 is rising edge triggering mode, 3 and 4 is trailing edge triggering mode, then 1 and 3 delay time is 0,2
With 4 delay time be t, t be more than or equal to prefixed time interval, in the manner described above then four rsu trigger sequence be 1,
2nd, 3 and 4, as shown in Figure 3 c, for the transmission signal schematic diagram of above 4 rsu.Under this triggering mode, the synchronous sequence cycle is height
Level and low level respectively account for half.
Certainly other triggering modes and delay time can also be set, under different triggering modes during the time delay of each rsu
Between different, thus leading to the synchronous sequence cycle inconsistent, no matter as long as adjacent transmission signal is capable of using any mode
Two rsu between at least keep prefixed time interval.
Second: the triggering mode of all rsu is identical;
The down trigger mode setting all rsu is identical, determines that the default delay time of a rsu is in all rsu
Second time, the default delay time of remaining rsu is at least incremented by between described Preset Time on described second time basis successively
Every.
D: all rsu are all rising edge triggering, and the delay time selecting label 1 is 0, the delay time t of label 2, label 3
Delay time be 2t, the delay time of label 4 is 3t, and then the trigger sequence of four rsu is 1,2,3 and 4 in the manner described above,
As shown in Figure 3 d, for the transmission signal schematic diagram of above 4 rsu.
E: all rsu are all the lower edge that rises triggers, and the delay time selecting label 1 is 0 for delay time, the time delay of label 2
Time t, the delay time of label 3 is 2t, and the delay time of label 4 is 3t, in the manner described above the trigger sequence of then four rsu
For 1,2,3 and 4, as shown in Figure 3 e, for the transmission signal schematic diagram of above 4 rsu.
In the setting means of second Preset Time, all of rsu is a kind of triggering mode, the triggering mode of trailing edge
Not do not use, so on the premise of the time delay interval of each rsu is certain, in second triggering mode, the synchronous sequence cycle is relatively
Long, lead to the frequency of each rsu transmission signal relatively low.
As shown in figure 4, the invention provides a kind of multiple antennas sequential synchronous method, being applied to the rsu of system shown in Figure 1,
Methods described includes:
Step s201: what each rsu received that described controller sends respectively corresponds initialization information with each rsu,
Described initialization information includes respective down trigger mode and synchronous sequence cycle;
Step s202: the cycle that each rsu receives described controller transmission respectively is the pulse in described synchronous sequence cycle
Signal;
Step s203: each rsu is prolonged by respective down trigger mode and respective presetting after receiving described pulse signal
When time transmission signal, wherein, the time interval between the default delay time of two rsu corresponding to adjacent transmission signal is not
Less than prefixed time interval.
The general idea of method shown in Fig. 4 is consistent with the method shown in Fig. 2, and both differ only in transmission pulse signal
Mode different, Fig. 1 is that main frame rsu passes through bus and sends pulse signal to all rsu, and the method for Fig. 4 is controller to owning
Rsu sending signal, remaining content is consistent, will not be described here.
, as the pulse signal sending needed for each rsu, when controller breaks down, all of rsu is equal for Fig. 4 controller
Timing synchronization can not be realized, in Fig. 2, pulse signal is sent with main frame rsu, additionally it is possible to adopt after main frame rsu goes wrong
Other rsu, as main frame, realize timing synchronization again, just realize in effect, and the mode shown in Fig. 2 is more reliable, in realization
Mode shown in Fig. 4 is relatively simple.Both respectively have quality.
Because ambient influnence or rsu break down, rsu it is possible that nonsynchronous phenomenon, in order to solve this phenomenon,
The present invention, on the basis of method shown in Fig. 2, receives described pulse signal in each rsu and produces by respective down trigger mode
After external interrupt, as shown in figure 5, also including:
Step s301: each rsu is changed the design variables value of itself according to pulse signal by preset rules;
When rsu under normal circumstances, when rsu is abnormal then will not be able to produce according to external interrupt can be produced after pulse signal
Raw external interrupt, so the present invention is after rsu produces external interrupt, changes the internal design variables value of itself of rsu, as long as
Rsu can produce external interrupt, then design variables value changed once within a synchronous sequence cycle.
Change mode can have multiple, for example: set design variables as a certain value, by the way of incremented by successively, according to
The mode such as the secondary mode successively decreased or increase fixed value, as long as the mode that can change design variables value all can be used as the present embodiment
In preset rules.
Step s302: judge whether design variables value changes in Preset Time;
Rsu is after a synchronous sequence cycle, or the design variables value judging therein after multiple synchronous sequence cycle
Whether consistent with the variate-value of last registration, if consistent, represent that design variables value does not change, that is, timing synchronization in this rsu
Abnormal, if inconsistent then it represents that design variables value is more last change, that is, rsu timing synchronization is normal.
Step s303: if the design variables value of itself does not change in Preset Time, send to described controller and report to the police
Signal.
Step s304: if the design variables value of itself changes in Preset Time, do not deal with.
If rsu timing synchronization is abnormal, send alarm signal to controller, to point out controller itself timing synchronization different
Often, so that controller carries out subsequent treatment, sequential reparation is carried out to the rsu abnormal.
Controller processing procedure receive alarm signal after is described below, as shown in fig. 6, during a kind of multiple antennas of the present invention
Sequence synchronous method, is applied to system as shown in Figure 1, and this method includes:
Step s401: receive the alarm signal that multiple warning rsu send;
Step s402: judge to send the quantity of the rsu of alarm signal whether in predetermined number and whether comprise main frame
rsu;
Controller, after receiving alarm signal, first looks at the rsu quantity sending alarm signal, and the work of each warning
Operation mode, then judges the quantity of warning rsu and the size of predetermined number, and judges whether the mode of operation of warning rsu has
Main frame rsu, wherein, predetermined number can be the half of rsu total amount.
When the rsu more than rsu total amount half breaks down, then explanation is that main frame rsu breaks down, when less than rsu total amount
The rsu of half breaks down, then explanation is that indivedual rsu break down.
Step s403: judge that the rsu quantity sending alarm signal and does not comprise main frame rsu, then to each in predetermined number
Individual warning rsu carries out timing synchronization reparation;
When the quantity of warning rsu is less than predetermined number and does not comprise main frame rsu, then illustrate that itself sequential of other rsu goes out
Now abnormal, then only need to carry out sequential to the rsu reporting to the police to repair, the normal rsu of remaining sequential need not carry out sequential reparation.
Step s404: judge that the rsu quantity sending alarm signal exceedes described predetermined number or comprises main frame rsu, then right
All rsu carry out timing synchronization reparation.
When the quantity of warning rsu exceedes half or comprises main frame rsu, then explanation main frame rsu occurs extremely, working as main frame
After exception in rsu, all rsu are equal it is possible that extremely, so needing all to carry out timing synchronization reparation to all rsu.
Below the process carrying out timing synchronization reparation to each warning rsu in step s403 is described in detail as Fig. 7
It is shown, comprising:
Step s501: again send respective initialization information to each warning rsu;
Controller sends initialization information again to each warning rsu, to re-start initialization to warning rsu, then
Return pulse signal produces external interrupt to rsu again, and judges the design variables value of itself, if timing synchronization is normal, no longer to control
Device processed sends alarm signal, if continuing synchronous abnormality, continues to send alarm signal to controller.
Step s502: judge after the first Preset Time whether the timing synchronization of described each warning rsu is normal;
The first Preset Time after being initialized, judge whether again to receive again initialized rsu send
Alarm signal, if not receiving, illustrates that timing synchronization reparation completes, warning rsu has returned normally, if still receive rsu sending
Alarm signal, then illustrate this rsu be abnormal rsu.
Step s503: if abnormal, send reset instruction to abnormal rsu, abnormal rsu is resetted;
If normal, enter step s506;
If continuing to have abnormal rsu, sending reset instruction to abnormal rsu, again rsu being resetted, that is,
Upper electricity is restarted.
Step s504: after the second Preset Time, judge whether the timing synchronization of abnormal rsu is normal;
Again through judging whether the rsu being resetted sends alarm signal after a while, if still sending alarm signal,
Illustrate that this rsu breaks down, then alerted, to point out this rsu of staff to need on-call maintenance, if timing synchronization is normal,
Then explanation rsu has returned normally, may continue to use.
Step s505: if abnormal, alerted, if normal, enter step s506;
Step s506: if timing synchronization normally, terminates to repair.
The above is nonsynchronous repair process to indivedual rsu sequential, is described below that sequential nonsynchronous as main frame rsu
Repair process, as shown in Figure 8, comprising:
Step s601: select next rsu as main frame rsu, described controller resends initialization letter to all rsu
Breath;
If because main frame rsu occurs extremely leading to timing synchronization abnormal, changing main frame rsu, reselecting next rsu
As main frame rsu, controller re-executes timing synchronization process as shown in Figure 2, determining whether shown in then in execution Fig. 5
The abnormal process of timing synchronization occurs.If rsu timing synchronization is abnormal, send alarm signal to controller, if rsu timing synchronization
Normal then do not deal with.
Step s602: judge after the first Preset Time whether the timing synchronization of all rsu is normal;
If after the first Preset Time, do not receive the alarm signal of rsu transmission, then illustrate that all rsu timing synchronizations are normal,
Enter step s607, if after the first Preset Time, still receive alarm signal, then enter step s603;
Step s603: judge to send the quantity of the rsu of alarm signal whether do not comprise whether main frame in predetermined number and
rsu;If then entering step s604, if otherwise entering step s605;
Step s604: if the quantity sending the rsu of alarm signal and does not comprise main frame rsu in predetermined number, described
Timing synchronization reparation is carried out to each warning rsu;
The particular content of this step refers to Fig. 7 and will not be described here.
Step s605: if the rsu quantity sending alarm signal exceedes described predetermined number or comprises main frame rsu, to institute
There is rsu to send reset instruction, all rsu are resetted;
After changing main frame rsu, the abnormal problem of timing synchronization still occurs, then all of rsu is resetted, upper electricity
Restart, so that all rsu reply Default Value, then re-execute initialized process, carry out timing synchronization again with timely
The judgement of sequence synchronous abnormality.
Step s606: after the second Preset Time, judge whether the sequential of all rsu is normal;
If normal, enter step s607, if abnormal, enter step s601;
If abnormal, reselect next rsu, as main frame rsu, timing synchronization reparation is carried out to all rsu, until
The sequential of all rsu is normal or has traveled through all of rsu.If the sequential of all rsu is normally during repairing, terminate to repair.
Still can not be normal by all rsu timing synchronizations when having traveled through all of rsu, then illustrate that all rsu all break down, need entirety
Maintenance, and alert to remind staff's on-call maintenance.
Step s607: if normal, terminate to repair.
The method that the present invention provide not only timing synchronization, and provide the method repaired during sequential exception, no
Timing synchronization only being carried out and can also carry out sequential reparation, thus ensureing rsu timing synchronization, facilitating rsu to be led to obu
Letter.
The specific embodiment of a present invention is described below, to be described in detail to the method for the present invention:
In hardware design, multiple rsu and controller constitute LAN, are led to by network between rsu, controller
Letter, connects, by bus, the synchronization carrying out signal sequence between each rsu.Concrete structure is as shown in Figure 1.
Adopt 485 buses when specifically used, because 485 interfaces are the groups using balance driver and differential receiver
Close, anti-common mode disturbances ability is strong, and that is, noise immunity is good, and transmission range can reach more than 1000 meters, meet certainly
By in streaming system, the distance between rsu may reach tens meters, or even up to a hundred meters of requirement.
A mcu and 485 modules are all had, mcu is the processor of rsu itself, 485 modules are bus module in each rsu,
Mcu as the rsu of main frame produces pwm pulse signal, and it is outer that this pulse signal guides to rsu itself mcu generation by 485 modules again
Portion interrupts, and by 485 modules of 485 bus transfer to other rsu so as to he produces the mcu external interrupt of rsu.As Fig. 9
Shown, for the diagram of each rsu down trigger.
On Software for Design, introduce rsu side first, distribute a different ip address to first every rsu, controller according to
A numbering is distributed to rsu in different ip addresses.For example, in the case of the single antenna in 4 tracks, distribution condition can be as following table
Shown in 1:
Table 1
Numbering | Ip address | Installation site |
0 | 192.168.5.187 | Standby track |
1 | 192.168.5.188 | Slow lane |
2 | 192.168.5.189 | Fast traffic lane |
3 | 192.168.5.190 | Fast |
Controller software realizes the configurable of systematic parameter.Configuration available parameter is as follows: 1. rsu quantity;2. system
The signal synchronous sequence cycle;3. interval time between rsu signal;4. rsu transmission signal down trigger pattern (rising edge or under
Fall is along triggering);5. rsu mode of operation (main frame or slave).
When system starts or during initialization, controller is by the parameter initialization of system to all rsu.The form of data is fixed
Justice is as follows:
Table 2
Rsu quantity | Rsu_num=n |
Rsu numbers | Idx=0~n-1 |
The signal synchronous sequence cycle of system | synctime |
Interval time between rsu signal | intervaltime |
Rsu transmission signal down trigger pattern | syncedge |
Rsu mode of operation | Mode=master/slave |
1., wherein synctime=intervaltime*n, such as when the time interval of rsu signal is 7ms, rsu quantity
During for 4, cycle lock in time of system is exactly 28ms, and when rsu quantity is 5, cycle lock in time of system is exactly 35ms.
2., rsu transmission signal down trigger pattern value represents rising edge triggering for 0 or 1,0, and 1 represents trailing edge touches
Send out, its c language represents that computing formula is as follows: syncedge=idx&0x01, that is, the down trigger situation of every antenna is such as
Under:
Table 3
Rsu numbers | Down trigger pattern |
0 | 0: rising edge triggering |
1 | 1: trailing edge triggering |
2 | 0: rising edge triggering |
3 | 1: trailing edge triggering |
For example: when the quantity of rsu is that signal sequence between 4, rsu is spaced apart 7ms, the rsu in standby track as main frame,
Initialized data is as follows:
Table 4
Initialization data implication | Lay aside | Slow lane | Fast traffic lane | Fast |
Rsu quantity | 4 | 4 | 4 | 4 |
Rsu numbers | 0 | 1 | 2 | 3 |
The signal synchronous sequence cycle of system | 28 | 28 | 28 | 28 |
Interval time between rsu signal | 7 | 7 | 7 | 7 |
Rsu transmission signal down trigger pattern | 0 | 1 | 0 | 1 |
Rsu mode of operation | 0 | 1 | 1 | 1 |
After every rsu receives the initialization data of controller transmission, as the pwm interface of the rsu of main frame, send the cycle
Pwm synchronizing signal for synctime, to trigger all rsu and to produce external interrupt (rising edge or trailing edge triggering).Main frame
The pwm pulse signal sending, the period proportional that height pulse takies can be allocated according to the quantity of antenna, and c language represents
Algorithm is as follows: the time shared by high impulse is: intervaltime* (rsu_num/2+rsu_num%2).For example, when there being 4
During rsu, when between rsu signal, interval time is 7ms, cycle lock in time is 4*7=28, and the pulse high impulse sending occupies
Time is 7* (4/2+4%2)=14ms, i.e. height pulse respectively accounts for 50%.When there being 5 rsu, cycle lock in time is 5*7=
35, the time that the pulse high impulse sending occupies is 7* (5/2+5%2)=21ms, and that is, high impulse respectively accounts for for 3/5 lock in time,
Low pulse account for 2/5.
After all of rsu receives external interrupt, transmission signal after transmitting or time delay for a period of time, the c language table of time delay
Show that algorithm is as follows: time delay is signaled time delay_time=(rsu numbering idx/2) * (interval time between rsu signal
Intervaltime), i.e. delay_time=(idx/2) * intervaltime.For example, according to each rsu of situation of example from above
The delay time of transmission signal is as follows:
Table 5
Initialization data implication | Lay aside | Slow lane | Fast traffic lane | Fast |
Rsu numbers | 0 | 1 | 2 | 3 |
The signal synchronous sequence cycle of system | 28 | 28 | 28 | 28 |
Interval time between rsu signal | 7 | 7 | 7 | 7 |
Rsu transmission signal down trigger pattern | 0 | 1 | 0 | 1 |
The time that time delay is signaled | 0 | 0 | 7 | 7 |
According to design above, after free streaming system each rsu timing synchronization in 4 tracks, skyborne signal such as Figure 10 institute
Show.
Wherein, rsu_0, as main frame, sends the pwm pulse that the cycle is 28ms.Rsu_0 and rsu_2 is in rising edge triggering
Disconnected transmission signal, rsu_1 and rsu_3 is that transmission signal is interrupted in trailing edge triggering.Send out after rsu_0 and rsu_1 down trigger at once
Penetrate signal, after rsu_2 and rsu_3 down trigger after the time delay of 7ms transmission signal again.Equally, if not 4 tracks from
By streaming system, neat aerial signal timing distribution also can be obtained according to design above.For example, the free streaming system in 5 tracks
After each rsu timing synchronization, skyborne signal is as shown in figure 11.
After carrying out timing synchronization, the how signal sequence synchronous situation of monitoring system and the timing synchronization when system
During failure, how again self-healing system, make sequential re-synchronization, concrete implementation is as follows:
Every rsu is to trigger the synchronization of sequential by interrupting, and therefore defines a variable sync_irq_time, often
When the secondary generation in external interrupt, rsu is assigned to this variable from starting to current elapsed time.That is, every time
The generation interrupted, variable sync_irq_time can impart new value, and is worth and is incremented by.For example, if system signal
When the timing synchronization cycle is 28ms, then when interrupting every time producing, the value of sync_irq_time will increase by 28.Therefore real-time
Monitor the situation of change of the value of sync_irq_time, if this value certain time (can be with value 200ms) is all not changed in, that
Being judged as this rsu has not had timing synchronization signal to trigger it is believed that the synchronous sequence of this rsu is abnormal.
Oneself variable sync_irq_time of itself is uploaded to controller by every rsu in real time, and controller is according to whole
The synchronous situation of system carrying out self-healing, the alarm operation of system synchronization signal, is implemented as follows:
If not including within 1. whole system has half and the rsu timing synchronization existing problems of main frame, then sentence
Break not synchronous for individual other rsu sequential itself, controller carrys out the specific rsu of self-healing following the next rules:
1) controller is sent out initialization directive to initialize this rsu again, and the whole state of rsu has re-started initialization, bag
Include and reconfigured external interrupt interface, reconfigured timing synchronization cycle etc.;
2) confirm whether the timing synchronization of this rsu recovers normal in 30 seconds, if normally, reparation terminates, do not produce alarm;
3) if still abnormal, controller sends reset instruction come this rsu that to reset, and rsu carries out reset and restarts;
4) confirm whether the timing synchronization of this rsu recovers normal in 60 seconds, if normally, reparation terminates, do not produce alarm;
5) if or abnormal, produce the alarm of this rsu timing synchronization, and every 3 minutes, repeat 1) to 5) step,
Attempt repairing if it is possible to repair, alarm clearance, this rsu recovers normal and monitors;
If 2. there are more than half or main frame rsu timing synchronization existing problems in whole system, then is judged as making
For the rsu existing problems of main frame, controller carrys out the sequential of the specific whole system of self-healing following the next rules:
1) reselect next rsu as main frame, for example, if current main frame is rsu_1, then just select rsu_
2, as main frame, when the main frame selecting reaches last, reselect First as main frame;
2) controller is sent out initialization directive to initialize whole system again, that is, reinitialize all of rsu;
3) confirm whether the timing synchronization of system recovers normal in 30 seconds, if normally, reparation terminates, and does not produce alarm;
4) if still abnormal, controller sends reset instruction come the whole rsu that to reset, and rsu carries out reset and restarts;
5) confirm whether the timing synchronization of system recovers normal in 60 seconds, if normally, reparation terminates, and does not produce alarm;
6) if or abnormal, produce the alarm of corresponding rsu timing synchronization, and every 3 minutes, repeat 1) to 5)
Step;
7) if system comes into condition 1., then be put into reparation alarm logic 1..
As shown in figure 1, the invention provides a kind of multiple antennas timing synchronization system, comprising:
The multiple rsu 100 being connected with each other by bus, the controller 200 being connected with the plurality of rsu;
Described controller 200, corresponds initialization information, described initialization information for generating respectively with each rsu
Including respective mode of operation, respective down trigger mode and synchronous sequence cycle, send correspondingly just to each rsu
Beginning information;
The plurality of rsu100, receives corresponding just with each rsu of described controller transmission respectively for each rsu
Beginning information, described initialization information includes respective mode of operation, respective down trigger mode and synchronous sequence cycle;Connect
Receive the rsu that mode of operation after described initialization information is main frame as main frame rsu, remaining be slave rsu, described main frame rsu leads to
Cross its pwm interface and send, to all rsu, the pulse signal that the cycle is the described synchronous sequence cycle, each rsu receives described pulse
Respective down trigger mode and respective default delay time transmission signal, wherein, the two of adjacent transmission signal is pressed after signal
Time interval between the corresponding two default delay times of individual rsu is not less than prefixed time interval.
As shown in figure 1, the invention provides a kind of multiple antennas timing synchronization system, comprising:
Multiple rsu100, the controller 200 being connected with the plurality of rsu;
Described controller 200, corresponds initialization information, described initialization information for generating respectively with each rsu
Including respective down trigger mode and synchronous sequence cycle;Send one-to-one initialization information to each rsu;
The plurality of rsu100, receives corresponding just with each rsu of described controller transmission respectively for each rsu
Beginning information, described initialization information includes respective down trigger mode and synchronous sequence cycle;Each rsu receives institute respectively
The cycle stating controller transmission is the pulse signal in described synchronous sequence cycle, and each rsu presses each after receiving described pulse signal
From down trigger mode and respective default delay time transmission signal, wherein, corresponding two of two rsu of adjacent transmission signal
Time interval between default delay time is not less than prefixed time interval.
The invention provides a kind of multiple antennas timing synchronization system, each rsu of the present invention is connected with each other by bus and often
Individual rsu is all connected with controller, and same pulse signal is simultaneously sent to each rsu by controller, so each rsu can be same
When receive pulse signal, or main frame rsu sends same pulse signal to bus, and each rsu receives through bus simultaneously
Pulse signal, two ways is all capable of each rsu and receives same pulse signal simultaneously, is triggered by same pulse signal
All rsu produce external interrupt, it is possible to realizing the timing synchronization of multiple rsu.
And, the present invention sets respective default delay time for each rsu, each rsu, after producing external interrupt, presses
After respective default delay time time delay again transmission signal it is ensured that be connected transmission signal two rsu between time interval extremely
It is prefixed time interval less, prefixed time interval is that two signals do not produce the minimum time interval of overlap so that phase in space
There is between two adjacent signals time enough interval, signal overlap will not be produced.So the present invention can solve the problem that multiple rsu
Stationary problem and each rsu between transmission signal have enough time interval problem, to reach obu can successfully parse rsu
The signal of transmitting, thus complete the purpose with the arm's length dealing of rsu.
Present invention also offers a kind of rsu corresponding with Fig. 1, as shown in figure 12, comprising:
Receiver module 11, for receiving the initialization information that described controller sends, described initialization information includes work
Pattern, down trigger mode;
Principal and subordinate's judge module 12, for being judged that to mode of operation described rsu makees when described mode of operation is as main frame
For main frame rsu, when described mode of operation is slave, described rsu is as slave rsu;
Operational module 13, for when described rsu be main frame rsu when, then the week being sent to all rsu by its pwm interface
Phase is the pulse signal in described synchronous sequence cycle, and when described rsu is slave rsu, then the cycle that Receiving Host rsu sends is
The pulse signal in described synchronous sequence cycle, receives after described pulse signal by respective down trigger mode and respective default
Delay time transmission signal, wherein, the time interval between the default delay time of the rsu of identical triggering mode is not less than default
Time interval.
If the function described in the present embodiment method is realized and as independent product pin using in the form of SFU software functional unit
When selling or using, can be stored in a computing device read/write memory medium.Based on such understanding, the embodiment of the present invention
Partly being embodied in the form of software product of part that prior art is contributed or this technical scheme, this is soft
Part product is stored in a storage medium, including some instructions with so that computing device (can be personal computer,
Server, mobile computing device or network equipment etc.) execution each embodiment methods described of the present invention all or part step
Suddenly.And aforesaid storage medium includes: u disk, portable hard drive, read-only storage (rom, read-only memory), deposit at random
Access to memory (ram, random access memory), magnetic disc or CD etc. are various can be with the medium of store program codes.
In this specification, each embodiment is described by the way of going forward one by one, and what each embodiment stressed is and other
The difference of embodiment, between each embodiment same or similar partly mutually referring to.
Described above to the disclosed embodiments, makes professional and technical personnel in the field be capable of or uses the present invention.
Multiple modifications to these embodiments will be apparent from for those skilled in the art, as defined herein
General Principle can be realized without departing from the spirit or scope of the present invention in other embodiments.Therefore, the present invention
It is not intended to be limited to the embodiments shown herein, and be to fit to and principles disclosed herein and features of novelty phase one
The scope the widest causing.
Claims (10)
1. it is characterised in that being applied to multiple antennas timing synchronization system, described system includes a kind of multiple antennas sequential synchronous method
The multiple rsu being connected with each other, the controller being connected with the plurality of rsu, methods described includes:
What each rsu received that described controller sends respectively corresponds initialization information, described initialization information with each rsu
Including respective mode of operation, respective down trigger mode, after receiving described initialization information, mode of operation is the rsu of main frame
As main frame rsu, remaining be slave rsu, at least initialization information of main frame rsu also comprises the synchronous sequence cycle;
Described main frame rsu sends, to all rsu, the pulse signal that the cycle is the described synchronous sequence cycle by its pwm interface;
Each rsu is believed by respective down trigger mode and respective default delay time transmitting after receiving described pulse signal
Number, wherein, the time interval between the default delay time of the rsu of identical triggering mode is not less than prefixed time interval.
2. the method for claim 1 is it is characterised in that press respective after each rsu described described pulse signal of reception
Down trigger mode and respective default delay time transmission signal include:
After the rising edge triggering external interrupt of described pulse signal, down trigger mode is all the rsu of rising edge triggering by each
From default delay time transmission signal;And/or
After the trailing edge triggering external interrupt of described pulse signal, down trigger mode is all the rsu of trailing edge triggering by each
From default delay time transmission signal.
3. method as claimed in claim 2 is it is characterised in that determine the respective default delay time of each rsu described
Method particularly includes:
For rising edge triggering mode and trailing edge triggering mode, determine that a rsu's is default respectively in identical triggering mode
Delay time is the very first time, and the default delay time of remaining rsu is at least incremented by institute on the basis of the described very first time successively
State prefixed time interval;Or
The down trigger mode setting all rsu is identical, determines that the default delay time of a rsu is second in all rsu
Time, the default delay time of remaining rsu is at least incremented by described prefixed time interval on described second time basis successively.
4. the method any one of claim 1-3 is it is characterised in that pulse signal as described in each rsu reception is pressed respectively
From down trigger mode produce and also include after external interrupt:
Each rsu is changed the design variables value of itself according to pulse signal by preset rules;
If the design variables value of itself does not change in Preset Time, send alarm signal to described controller.
5. method according to claim 4 is it is characterised in that further comprising the steps of:
Whether described controller receives the alarm signal that warning rsu sends, and judge the quantity sending the rsu of alarm signal pre-
If in quantity and whether comprising main frame rsu;
Judge that the quantity sending the rsu of alarm signal and does not comprise main frame rsu in predetermined number, then each warning rsu is entered
Row timing synchronization is repaired;
Judge that the rsu quantity sending alarm signal exceedes described predetermined number or comprises main frame rsu, then when all rsu being carried out
Sequence is synchronously repaired.
6. method as claimed in claim 5 is it is characterised in that described carry out timing synchronization reparation inclusion to each warning rsu:
Again send respective initialization information to each warning rsu, judge described each warning rsu after the first Preset Time
Timing synchronization whether normal, if abnormal, send reset instruction to abnormal rsu, abnormal rsu resetted,
After the second Preset Time, judge whether the timing synchronization of abnormal rsu is normal, if abnormal, alerted, if sequential
Synchronization is normal then to be terminated to repair;
Described all rsu are carried out with timing synchronization reparation inclusion:
Select next rsu as main frame rsu, described controller resends initialization information to all rsu, default first
Judge after time whether the timing synchronization of all rsu is normal, if abnormal, judge that the quantity sending the rsu of alarm signal is
No in predetermined number and whether comprise main frame rsu, if the quantity sending the rsu of alarm signal and does not comprise in predetermined number
Main frame rsu, then described carry out timing synchronization reparation to each warning rsu;If the rsu quantity sending alarm signal exceedes described pre-
If quantity or comprise main frame rsu, then send reset instruction to all rsu, all rsu are resetted;In the second Preset Time
Afterwards, judge whether the sequential of all rsu is normal, if abnormal, reselects another platform rsu as main frame rsu to all rsu
Carry out timing synchronization reparation, until the sequential of all rsu is normal, if the sequential of all rsu normally, terminates during repairing
Repair.
7. it is characterised in that being applied to multiple antennas timing synchronization system, described system includes a kind of multiple antennas sequential synchronous method
Multiple rsu, the controller being connected with the plurality of rsu, methods described includes:
What each rsu received that described controller sends respectively corresponds initialization information, described initialization information with each rsu
Including respective down trigger mode;
The cycle that each rsu receives described controller transmission respectively is the pulse signal in synchronous sequence cycle;
Each rsu is believed by respective down trigger mode and respective default delay time transmitting after receiving described pulse signal
Number, wherein, the time interval between the default delay time of the rsu of identical triggering mode is not less than prefixed time interval.
8. a kind of rsu is it is characterised in that include:
Receiver module, for receiving the initialization information of controller transmission, described initialization information includes mode of operation, interrupts touching
Originating party formula;
Principal and subordinate's judge module, for being judged that to mode of operation described rsu is as main frame when described mode of operation is as main frame
Rsu, when described mode of operation is slave, described rsu is as slave rsu;
Operational module, sends the cycle for synchronization for when described rsu is main frame rsu, then passing through its pwm interface to all rsu
The pulse signal of timing cycles, when described rsu is slave rsu, then the cycle that Receiving Host rsu sends is described synchronous sequence
The pulse signal in cycle, is launched by respective down trigger mode and respective default delay time after receiving described pulse signal
Signal, wherein, the time interval between the default delay time of the rsu of identical triggering mode is not less than prefixed time interval.
9. a kind of multiple antennas timing synchronization system is it is characterised in that include:
The rsu multiple as claimed in claim 8 being connected with each other, the controller being connected with the plurality of rsu;
Described controller, corresponds initialization information for generating respectively with each rsu, and described initialization information includes each
Mode of operation, respective down trigger mode and synchronous sequence cycle, send one-to-one initialization letter to each rsu
Breath.
10. a kind of multiple antennas timing synchronization system is it is characterised in that include:
Multiple rsu, the controller being connected with the plurality of rsu;
Described controller, corresponds initialization information for generating respectively with each rsu, and described initialization information includes each
Down trigger mode and the synchronous sequence cycle;Send one-to-one initialization information to each rsu;
Described rsu includes the first receiver module and the first operational module;First receiver module is used for receiving described controller transmission
Correspond initialization information with each rsu, described initialization information includes respective down trigger mode, receives institute simultaneously
The cycle stating controller transmission is the pulse signal in described synchronous sequence cycle;Described first operational module is used for receiving described arteries and veins
Rush after signal by respective down trigger mode and respective default delay time transmission signal, wherein, identical triggering mode
Time interval between the default delay time of rsu is not less than prefixed time interval.
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