CN104569557A - Rail-to-rail peak detection circuit and method - Google Patents
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Abstract
本发明公开了一种轨到轨峰值检测电路及其方法,该方法包括以下步骤:当输入电压增加时,第一晶体管的栅极电压随之增加,则第一晶体管与第三晶体管的漏极电流差流向第五晶体管;由第六晶体管对第五晶体管的电流差进行镜像;由镜像后的电流差对电容进行持续充电;直至输出电压等于输入电压时,电容停止充电;当输入电压下降时,电容保持输入的最高电压,该最高电压指示为正向峰值电压。本发明晶体管导通时,压差远小于二极管压差,这样使得输出可以达到电源电压,使得输出的即为真正的输入峰值,同时又可达到电源电压,即轨到轨的输出;该方法采用晶体管的作用产生漏极电流差,再由电流镜对电流差进行镜像处理,不仅方便集成,而且精确实现峰值检测。
The invention discloses a rail-to-rail peak detection circuit and a method thereof. The method comprises the following steps: when the input voltage increases, the gate voltage of the first transistor increases accordingly, and the drains of the first transistor and the third transistor The current difference flows to the fifth transistor; the sixth transistor mirrors the current difference of the fifth transistor; the capacitor is continuously charged by the mirrored current difference; until the output voltage is equal to the input voltage, the capacitor stops charging; when the input voltage drops , the capacitor holds the highest voltage on the input, which is indicated as the positive peak voltage. When the transistor of the present invention is turned on, the voltage difference is far smaller than the diode voltage difference, so that the output can reach the power supply voltage, so that the output is the real input peak value, and at the same time can reach the power supply voltage, that is, the output from rail to rail; the method adopts The function of the transistor produces a drain current difference, and then the current mirror performs image processing on the current difference, which is not only convenient for integration, but also accurately realizes peak detection.
Description
the
技术领域 technical field
本发明涉及一种峰值检测方法,尤其涉及一种轨到轨峰值检测电路及其方法。 The invention relates to a peak detection method, in particular to a rail-to-rail peak detection circuit and its method.
the
背景技术 Background technique
目前,市面上常规的峰值检测方法主要有两种,第一种是如图5中所示的,采用二极管的单向导通来实现峰值检测,该方法简单,但是输出峰值跟实际输出相差一个二极管压降,输出并不是真正的输入峰值;第二种是如图6所示的,采用运放+二极管,当输入信号比电源小于二极管压降时,在输出端可以检测到完整的输入信号峰值。但是当输入信号进一步增大时,由于二极管的正向压差的原因,则无法在输出再复现输入信号峰值及方法无法实现轨到轨的峰值检测。 At present, there are mainly two conventional peak detection methods on the market. The first one is as shown in Figure 5, which uses unidirectional conduction of a diode to achieve peak detection. This method is simple, but the difference between the output peak value and the actual output is one diode. Voltage drop, the output is not the real input peak value; the second one is shown in Figure 6, using op amp + diode, when the input signal is less than the diode voltage drop than the power supply, the complete input signal peak value can be detected at the output . However, when the input signal increases further, due to the forward voltage difference of the diode, the peak value of the input signal cannot be reproduced at the output and the method cannot realize rail-to-rail peak detection.
因此,市面上急需一种新型的峰值检测方法来克服现有的缺陷。 Therefore, there is an urgent need for a new peak detection method to overcome the existing defects in the market.
发明内容 Contents of the invention
针对上述技术中存在的不足之处,本发明提供一种结构稳定、方便易用、使用灵活及密封性强的轨到轨峰值检测电路及其方法。 Aiming at the deficiencies in the above-mentioned technologies, the present invention provides a rail-to-rail peak detection circuit and method thereof which are stable in structure, convenient to use, flexible in use and strong in sealing.
为实现上述目的,本发明提供一种轨到轨峰值检测电路,包括由第一晶体管、第二晶体管、第三晶体管及第四晶体管构成的运放电路、由第五晶体管及第六晶体管构成的电流镜电路和电容;所述第一晶体管的栅极接收输入信号,第一晶体管的源极和第二晶体管的源极所形成的公共端接地,所述第一晶体管的漏极与第三晶体管的漏极电连接,第三晶体管的栅极与第四晶体管的栅极所形成的公共端通过电流源接地,第四晶体管的漏极电连接至第二晶体管的漏极,所述第二晶体管的栅极电连接至电容的一端,所述第五晶体管的栅极和第六晶体管所形成的公共端与第五晶体管的漏极分别电连接至第一晶体管和第三晶体管所形成的公共端,所述第六晶体管的漏极与电容的另一端电连接并对电容进行充电,所述电容的另一端接地,所述第三晶体管、第四晶体管、第五晶体管和第六晶体管的源极依次串连接; In order to achieve the above object, the present invention provides a rail-to-rail peak detection circuit, including an operational amplifier circuit composed of a first transistor, a second transistor, a third transistor and a fourth transistor, and an operational amplifier circuit composed of a fifth transistor and a sixth transistor. A current mirror circuit and a capacitor; the gate of the first transistor receives an input signal, the common terminal formed by the source of the first transistor and the source of the second transistor is grounded, and the drain of the first transistor is connected to the third transistor The drain of the third transistor is electrically connected to the drain of the fourth transistor, and the common terminal formed by the gate of the third transistor and the gate of the fourth transistor is grounded through the current source, and the drain of the fourth transistor is electrically connected to the drain of the second transistor, and the second transistor The gate of the fifth transistor is electrically connected to one end of the capacitor, and the common terminal formed by the gate of the fifth transistor and the sixth transistor and the drain of the fifth transistor are respectively electrically connected to the common terminal formed by the first transistor and the third transistor. , the drain of the sixth transistor is electrically connected to the other end of the capacitor and charges the capacitor, the other end of the capacitor is grounded, and the sources of the third transistor, the fourth transistor, the fifth transistor and the sixth transistor Serial connection in turn;
其中,所述晶体管为三极管或MOS管。 Wherein, the transistor is a triode or a MOS transistor.
为实现上述目的,本发明提供一种轨到轨峰值检测方法,包括以下步骤: To achieve the above object, the present invention provides a rail-to-rail peak detection method, comprising the following steps:
当输入电压增加时,第一晶体管的栅极电压随之增加,则第一晶体管与第三晶体管的漏极电流差流向第五晶体管; When the input voltage increases, the gate voltage of the first transistor increases accordingly, and the drain current difference between the first transistor and the third transistor flows to the fifth transistor;
由第六晶体管对第五晶体管的电流差进行镜像; mirroring the current difference of the fifth transistor by the sixth transistor;
由镜像后的电流差对电容进行持续充电; The capacitor is continuously charged by the current difference after mirroring;
直至输出电压等于输入电压时,电容停止充电; Until the output voltage is equal to the input voltage, the capacitor stops charging;
当输入电压下降时,电容保持输入的最高电压,该最高电压指示为正向峰值电压。 As the input voltage drops, the capacitor holds the highest voltage at the input, which is indicated as the positive peak voltage.
为实现上述目的,本发明提供还一种轨到轨峰值检测电路,包括由第一晶体管、第二晶体管、第三晶体管及第四晶体管构成的运放电路、由第五晶体管及第六晶体管构成的电流镜电路和电容;所述第一晶体管的栅极接收输入信号,电容的一端通过电流源连接至第一晶体管的源极与第二晶体管的源极所形成的公共端,第一晶体管的漏极与第三晶体管的漏极电连接,第三晶体管的栅极与第四晶体管的栅极所形成的公共端和第四晶体管的漏极分别电连接至第二晶体管的漏极,所述第二晶体管的栅极电连接至电容的另一端,所述第五晶体管的栅极和第六晶体管所形成的公共端与第五晶体管的漏极分别电连接至第一晶体管和第三晶体管所形成的公共端,所述第六晶体管的漏极与电容的另一端电连接并对电容进行充电,所述第三晶体管、第四晶体管、第五晶体管和第六晶体管的源极均接地; In order to achieve the above object, the present invention provides a rail-to-rail peak detection circuit, including an operational amplifier circuit composed of a first transistor, a second transistor, a third transistor and a fourth transistor, and a fifth transistor and a sixth transistor. A current mirror circuit and a capacitor; the gate of the first transistor receives an input signal, and one end of the capacitor is connected to the common terminal formed by the source of the first transistor and the source of the second transistor through a current source, and the first transistor The drain is electrically connected to the drain of the third transistor, the common terminal formed by the gate of the third transistor and the gate of the fourth transistor and the drain of the fourth transistor are respectively electrically connected to the drain of the second transistor, and The gate of the second transistor is electrically connected to the other end of the capacitor, and the common terminal formed by the gate of the fifth transistor and the sixth transistor and the drain of the fifth transistor are respectively electrically connected to the first transistor and the third transistor. A common terminal is formed, the drain of the sixth transistor is electrically connected to the other end of the capacitor and charges the capacitor, and the sources of the third transistor, the fourth transistor, the fifth transistor and the sixth transistor are all grounded;
当输入电压减少时,第一晶体管的栅极电压随之减少,则第一晶体管与第三晶体管的漏极电流差流向第五晶体管,并由第六晶体管对第五晶体管的电流差进行镜像,由镜像后的电流差对电容进行持续放电,直至输出电压等于输入电压时,电容停止放电;当输入电压上升时,电容保持输入端的最低电压,该最高低电压指示为负向峰值电压。 When the input voltage decreases, the gate voltage of the first transistor decreases accordingly, then the drain current difference between the first transistor and the third transistor flows to the fifth transistor, and the current difference of the fifth transistor is mirrored by the sixth transistor, The capacitor is continuously discharged by the mirrored current difference until the output voltage is equal to the input voltage, and the capacitor stops discharging; when the input voltage rises, the capacitor maintains the lowest voltage at the input terminal, and the highest low voltage indicates a negative peak voltage.
其中,所述晶体管为三极管或MOS管。 Wherein, the transistor is a triode or a MOS transistor.
为实现上述目的,本发明还提供一种轨到轨峰值检测方法,包括以下步骤: To achieve the above object, the present invention also provides a rail-to-rail peak detection method, comprising the following steps:
当输入电压减少时,第一晶体管的栅极电压随之减少,则第一晶体管与第三晶体管的漏极电流差流向第五晶体管; When the input voltage decreases, the gate voltage of the first transistor decreases accordingly, and the drain current difference between the first transistor and the third transistor flows to the fifth transistor;
由第六晶体管对第五晶体管的电流差进行镜像; mirroring the current difference of the fifth transistor by the sixth transistor;
由镜像后的电流差对电容进行持续放电; The capacitor is continuously discharged by the current difference after mirroring;
直至输出电压等于输入电压时,电容停止放电; When the output voltage is equal to the input voltage, the capacitor stops discharging;
当输入电压上升时,电容保持输入端的最低电压,该最低电压指示为负向峰值电压。 As the input voltage rises, the capacitor maintains a minimum voltage at the input, which is indicated as a negative-going peak voltage.
本发明的有益效果是:与现有技术相比,本发明提供的轨到轨峰值检测电路及其方法,该电路采用晶体管替代现有的二极管,该晶体管导通时,压差远小于二极管压差,这样使得输出可以达到电源电压,使得输出的即为真正的输入峰值,同时又可达到电源电压,即轨到轨的输出;该方法采用第一晶体管与第三晶体管的作用产生漏极电流差,再由电流镜对电流差进行镜像处理,该方法实现了晶体的控制和电流镜的处理,不仅方便了集成,而且精确实现峰值检测。 The beneficial effects of the present invention are: compared with the prior art, the present invention provides a rail-to-rail peak detection circuit and its method. The circuit uses a transistor to replace the existing diode. When the transistor is turned on, the voltage difference is much smaller than the diode voltage. difference, so that the output can reach the power supply voltage, so that the output is the real input peak value, and at the same time it can reach the power supply voltage, that is, rail-to-rail output; this method uses the action of the first transistor and the third transistor to generate drain current The current difference is mirrored by the current mirror. This method realizes the control of the crystal and the processing of the current mirror, which not only facilitates the integration, but also accurately realizes the peak detection.
the
附图说明 Description of drawings
图1为本发明第一具体实施例的电路原理图; Fig. 1 is the circuit schematic diagram of the first specific embodiment of the present invention;
图2为本发明第一具体实施例的工作流程图; Fig. 2 is the work flowchart of the first specific embodiment of the present invention;
图3为本发明第二具体实施例的电路原理图; Fig. 3 is the circuit schematic diagram of the second specific embodiment of the present invention;
图4为本发明第二具体实施例的工作流程图; Fig. 4 is the work flowchart of the second specific embodiment of the present invention;
图5为现有技术中的第一种检测电路图; Fig. 5 is the first detection circuit diagram in the prior art;
图6为现有技术中的第二种检测电路图。 Fig. 6 is a second detection circuit diagram in the prior art.
the
具体实施方式 Detailed ways
为了更清楚地表述本发明,下面结合附图对本发明作进一步地描述。 In order to express the present invention more clearly, the present invention will be further described below in conjunction with the accompanying drawings.
请参阅图1,本发明的第一具体实施例的正向轨到轨峰值检测电路,包括由第一晶体管M11、第二晶体管M12、第三晶体管M13及第四晶体管M14构成的运放电路、由第五晶体管M15及第六晶体管M16构成的电流镜电路和电容C1;第一晶体管M11的栅极接收输入信号,第一晶体管M11的源极和第二晶体管M12的源极所形成的公共端接地,第一晶体管M11的漏极与第三晶体管M13的漏极电连接,第三晶体管M13的栅极与第四晶体管M14的栅极所形成的公共端通过电流源I1接地,第四晶体管M14的漏极电连接至第二晶体管M12的漏极,第二晶体管M12的栅极电连接至电容C1的一端,第五晶体管M15的栅极和第六晶体管M16所形成的公共端与第五晶体管M15的漏极分别电连接至第一晶体管M11和第三晶体管M13所形成的公共端,第六晶体管M16的漏极与电容C1的另一端电连接并对电容C1进行充电,电容C1的另一端接地,第三晶体管M13、第四晶体管M14、第五晶体管M15和第六晶体管M16的源极依次串连接;当输入电压增加时,第一晶体管M11的栅极电压随之增加,则第一晶体管M11与第三晶体管M13的漏极电流差流向第五晶体管M15,并由第六晶体管M16对第五晶体管M15的电流差进行镜像,由镜像后的电流差对电容C1进行持续充电,直至输出电压等于输入电压时,电容C1停止充电;当输入电压下降时,电容C1保持输入端的最高电压,该最高电压指示为正向峰值电压。晶体管为三极管或MOS管。 Please refer to FIG. 1, the forward rail-to-rail peak detection circuit of the first specific embodiment of the present invention includes an operational amplifier circuit composed of a first transistor M11, a second transistor M12, a third transistor M13 and a fourth transistor M14, A current mirror circuit composed of the fifth transistor M15 and the sixth transistor M16 and a capacitor C1; the gate of the first transistor M11 receives the input signal, and the source of the first transistor M11 and the source of the second transistor M12 form a common terminal Grounded, the drain of the first transistor M11 is electrically connected to the drain of the third transistor M13, the common terminal formed by the gate of the third transistor M13 and the gate of the fourth transistor M14 is grounded through the current source I1, and the fourth transistor M14 The drain of the second transistor M12 is electrically connected to the drain of the second transistor M12, the gate of the second transistor M12 is electrically connected to one end of the capacitor C1, and the common terminal formed by the gate of the fifth transistor M15 and the sixth transistor M16 is connected to the fifth transistor. The drain of M15 is electrically connected to the common terminal formed by the first transistor M11 and the third transistor M13 respectively, the drain of the sixth transistor M16 is electrically connected to the other end of the capacitor C1 and charges the capacitor C1, and the other end of the capacitor C1 Grounded, the sources of the third transistor M13, the fourth transistor M14, the fifth transistor M15 and the sixth transistor M16 are sequentially connected in series; when the input voltage increases, the gate voltage of the first transistor M11 increases accordingly, and the first transistor M11 The drain current difference between M11 and the third transistor M13 flows to the fifth transistor M15, and the current difference of the fifth transistor M15 is mirrored by the sixth transistor M16, and the capacitor C1 is continuously charged by the mirrored current difference until the output voltage When equal to the input voltage, capacitor C1 stops charging; when the input voltage drops, capacitor C1 maintains the highest voltage at the input, which is indicated as the positive peak voltage. Transistors are triodes or MOS tubes.
相较于现有技术的情况,本发明提供的正向轨到轨峰值检测电路,该电路采用晶体管替代现有的二极管,该晶体管导通时,压差远小于二极管压差,这样使得输出可以达到电源电压,使得输出的即为真正的正向输入峰值,同时又可达到电源电压,即轨到轨的输出。 Compared with the situation in the prior art, the forward rail-to-rail peak detection circuit provided by the present invention uses a transistor to replace the existing diode. When the transistor is turned on, the voltage difference is much smaller than the diode voltage difference, so that the output can The power supply voltage is reached, so that the output is the true positive input peak, and at the same time it can reach the power supply voltage, that is, rail-to-rail output.
请进一步参照图2,基于上述的电路,本发明提供一种轨到轨峰值检测方法,包括以下步骤: Please further refer to Fig. 2, based on the above-mentioned circuit, the present invention provides a rail-to-rail peak detection method, comprising the following steps:
当输入电压增加时,第一晶体管的栅极电压随之增加,则第一晶体管与第三晶体管的漏极电流差流向第五晶体管; When the input voltage increases, the gate voltage of the first transistor increases accordingly, and the drain current difference between the first transistor and the third transistor flows to the fifth transistor;
由第六晶体管对第五晶体管的电流差进行镜像; mirroring the current difference of the fifth transistor by the sixth transistor;
由镜像后的电流差对电容进行持续充电; The capacitor is continuously charged by the current difference after mirroring;
直至输出电压等于输入电压时,电容停止充电; Until the output voltage is equal to the input voltage, the capacitor stops charging;
当输入电压下降时,电容保持输入的最高电压,该最高电压指示为正向峰值电压。 As the input voltage drops, the capacitor holds the highest voltage at the input, which is indicated as the positive peak voltage.
相较于现有技术的情况,本发明提供的正向轨到轨峰值检测方法,该方法采用第一晶体管M11与第三晶体管M13的作用产生漏极电流差,再由电流镜对电流差进行镜像处理,该方法实现了晶体的控制和电流镜的处理,不仅方便了集成,而且精确实现正向峰值检测。 Compared with the situation in the prior art, the forward rail-to-rail peak detection method provided by the present invention uses the action of the first transistor M11 and the third transistor M13 to generate a drain current difference, and then uses a current mirror to detect the current difference Mirror image processing, this method realizes the control of the crystal and the processing of the current mirror, which not only facilitates the integration, but also accurately realizes the forward peak detection.
请进一步参阅图3,本发明的第二具体实施例的负向轨到轨峰值检测电路,包括由第一晶体管M21、第二晶体管M22、第三晶体管M23及第四晶体管M24构成的运放电路、由第五晶体管M25及第六晶体管M26构成的电流镜电路和电容C2;第一晶体管M21的栅极接收输入信号,电容C2的一端通过电流源I2连接至第一晶体管M21的源极与第二晶体管M22的源极所形成的公共端,第一晶体管M21的漏极与第三晶体管M23的漏极电连接,第三晶体管M23的栅极与第四晶体管M24的栅极所形成的公共端和第四晶体管M24的漏极分别电连接至第二晶体管M22的漏极,第二晶体管M22的栅极电连接至电容C2的另一端,第五晶体管M25的栅极和第六晶体管M26所形成的公共端与第五晶体管M25的漏极分别电连接至第一晶体管M21和第三晶体管M23所形成的公共端,第六晶体管M26的漏极与电容C1的另一端电连接并对电容C1进行充电,第三晶体管M23、第四晶体管M24、第五晶体管M25和第六晶体管M26的源极均接地;当输入电压减少时,第一晶体管M21的栅极电压随之减少,则第一晶体管M21与第三晶体管M23的漏极电流差流向第五晶体管M25,并由第六晶体管M26对第五晶体管M25的电流差进行镜像,由镜像后的电流差对电容C1进行持续放电,直至输出电压等于输入电压时,电容C1停止放电;当输入电压上升时,电容C1保持输入端的最低电压,该最高低电压指示为负向峰值电压。晶体管为三极管或MOS管。 Please refer further to FIG. 3 , the negative rail-to-rail peak detection circuit of the second specific embodiment of the present invention includes an operational amplifier circuit composed of a first transistor M21, a second transistor M22, a third transistor M23 and a fourth transistor M24 1. A current mirror circuit composed of the fifth transistor M25 and the sixth transistor M26 and a capacitor C2; the gate of the first transistor M21 receives an input signal, and one end of the capacitor C2 is connected to the source of the first transistor M21 and the first transistor M21 through a current source I2 The common end formed by the sources of the two transistors M22, the drain of the first transistor M21 is electrically connected to the drain of the third transistor M23, the common end formed by the gate of the third transistor M23 and the gate of the fourth transistor M24 and the drain of the fourth transistor M24 are respectively electrically connected to the drain of the second transistor M22, the gate of the second transistor M22 is electrically connected to the other end of the capacitor C2, the gate of the fifth transistor M25 and the sixth transistor M26 form a The common terminal of the fifth transistor M25 is electrically connected to the common terminal formed by the first transistor M21 and the third transistor M23 respectively, and the drain of the sixth transistor M26 is electrically connected to the other end of the capacitor C1 and conducts the capacitor C1 Charging, the sources of the third transistor M23, the fourth transistor M24, the fifth transistor M25 and the sixth transistor M26 are all grounded; when the input voltage decreases, the gate voltage of the first transistor M21 decreases accordingly, and the first transistor M21 The drain current difference with the third transistor M23 flows to the fifth transistor M25, and the current difference of the fifth transistor M25 is mirrored by the sixth transistor M26, and the capacitor C1 is continuously discharged by the mirrored current difference until the output voltage is equal to When the input voltage is applied, the capacitor C1 stops discharging; when the input voltage rises, the capacitor C1 maintains the lowest voltage at the input terminal, and the highest low voltage is indicated as a negative peak voltage. Transistors are triodes or MOS tubes.
相较于现有技术的情况,本发明提供的负向轨到轨峰值检测电路,该电路采用晶体管替代现有的二极管,该晶体管导通时,压差远小于二极管压差,这样使得输出可以达到电源电压,使得输出的即为真正的负向输入峰值,同时又可达到电源电压,即轨到轨的输出。 Compared with the situation in the prior art, the negative rail-to-rail peak detection circuit provided by the present invention uses a transistor to replace the existing diode. When the transistor is turned on, the voltage difference is much smaller than the diode voltage difference, so that the output can The power supply voltage is reached, so that the output is the real negative input peak, and at the same time it can reach the power supply voltage, that is, the output of rail to rail.
请进一步参照图4,基于上述的电路,本发明提供一种轨到轨峰值检测方法,包括以下步骤: Please further refer to FIG. 4, based on the above-mentioned circuit, the present invention provides a rail-to-rail peak detection method, including the following steps:
当输入电压减少时,第一晶体管的栅极电压随之减少,则第一晶体管与第三晶体管的漏极电流差流向第五晶体管; When the input voltage decreases, the gate voltage of the first transistor decreases accordingly, and the drain current difference between the first transistor and the third transistor flows to the fifth transistor;
由第六晶体管对第五晶体管的电流差进行镜像; mirroring the current difference of the fifth transistor by the sixth transistor;
由镜像后的电流差对电容进行持续放电; The capacitor is continuously discharged by the current difference after mirroring;
直至输出电压等于输入电压时,电容停止放电; When the output voltage is equal to the input voltage, the capacitor stops discharging;
当输入电压上升时,电容保持输入端的最低电压,该最低电压指示为负向峰值电压。 As the input voltage rises, the capacitor maintains a minimum voltage at the input, which is indicated as a negative-going peak voltage.
相较于现有技术的情况,本发明提供的负向轨到轨峰值检测方法,采用第一晶体管M21与第三晶体管M23的作用产生漏极电流差,再由电流镜对电流差进行镜像处理,该方法实现了晶体的控制和电流镜的处理,不仅方便了集成,而且精确实现负向峰值检测。 Compared with the situation in the prior art, the negative rail-to-rail peak detection method provided by the present invention uses the action of the first transistor M21 and the third transistor M23 to generate a drain current difference, and then mirrors the current difference by a current mirror , the method realizes the control of the crystal and the processing of the current mirror, which not only facilitates the integration, but also accurately realizes the negative peak detection.
本发明提供的轨到轨峰值检测电路及其方法,采用晶体管替代二极管,该晶体管导通时,压差远小于二极管压差,不存在二极管正向压差的原因,因此在输出再复现输入信号峰值时也可实现轨到轨的峰值检测。 The rail-to-rail peak detection circuit and method provided by the present invention use a transistor instead of a diode. When the transistor is turned on, the voltage difference is much smaller than the diode voltage difference, and there is no reason for the forward voltage difference of the diode. Therefore, the output can reproduce the input Rail-to-rail peak detection is also available for signal peaks.
以上公开的仅为本发明的几个具体实施例,但是本发明并非局限于此,任何本领域的技术人员能思之的变化都应落入本发明的保护范围。 The above disclosures are only a few specific embodiments of the present invention, but the present invention is not limited thereto, and any changes conceivable by those skilled in the art shall fall within the protection scope of the present invention.
Claims (6)
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107395165A (en) * | 2016-05-16 | 2017-11-24 | 上海亨骏自动化设备有限公司 | A kind of liquid level gauge echo time collection peak detection circuit |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0722924A (en) * | 1993-07-02 | 1995-01-24 | Fujitsu Ltd | Peak detection circuit |
US5471169A (en) * | 1993-10-20 | 1995-11-28 | Silicon Systems, Inc. | Circuit for sinking current with near-ground voltage compliance |
CN2519284Y (en) * | 2001-10-11 | 2002-10-30 | 华为技术有限公司 | Mutual complementing differential peak value detecting circuit |
CN1904622A (en) * | 2005-07-28 | 2007-01-31 | 崇贸科技股份有限公司 | Valley bottom voltage detection device |
CN101728940A (en) * | 2009-12-31 | 2010-06-09 | 苏州市华芯微电子有限公司 | Circuit capable of automatically acquiring maximum voltage source |
CN101788598A (en) * | 2009-11-25 | 2010-07-28 | 天津南大强芯半导体芯片设计有限公司 | Voltage peak detection circuit and operating method thereof |
CN102498406A (en) * | 2009-08-27 | 2012-06-13 | 高通股份有限公司 | High linear fast peak detector |
CN202331252U (en) * | 2011-12-06 | 2012-07-11 | 四川和芯微电子股份有限公司 | Threshold voltage generating circuit |
CN102692549A (en) * | 2012-06-18 | 2012-09-26 | 苏州硅智源微电子有限公司 | Peak detection integrated circuit |
CN202815066U (en) * | 2012-09-20 | 2013-03-20 | 天津亿为特电子科技有限公司 | Voltage peak detecting circuit |
CN103116062A (en) * | 2013-03-11 | 2013-05-22 | 矽力杰半导体技术(杭州)有限公司 | Circuit and method for detecting voltage peak |
-
2014
- 2014-03-26 CN CN201410114797.8A patent/CN104569557A/en active Pending
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0722924A (en) * | 1993-07-02 | 1995-01-24 | Fujitsu Ltd | Peak detection circuit |
US5471169A (en) * | 1993-10-20 | 1995-11-28 | Silicon Systems, Inc. | Circuit for sinking current with near-ground voltage compliance |
CN2519284Y (en) * | 2001-10-11 | 2002-10-30 | 华为技术有限公司 | Mutual complementing differential peak value detecting circuit |
CN1904622A (en) * | 2005-07-28 | 2007-01-31 | 崇贸科技股份有限公司 | Valley bottom voltage detection device |
CN102498406A (en) * | 2009-08-27 | 2012-06-13 | 高通股份有限公司 | High linear fast peak detector |
CN101788598A (en) * | 2009-11-25 | 2010-07-28 | 天津南大强芯半导体芯片设计有限公司 | Voltage peak detection circuit and operating method thereof |
CN101728940A (en) * | 2009-12-31 | 2010-06-09 | 苏州市华芯微电子有限公司 | Circuit capable of automatically acquiring maximum voltage source |
CN202331252U (en) * | 2011-12-06 | 2012-07-11 | 四川和芯微电子股份有限公司 | Threshold voltage generating circuit |
CN102692549A (en) * | 2012-06-18 | 2012-09-26 | 苏州硅智源微电子有限公司 | Peak detection integrated circuit |
CN202815066U (en) * | 2012-09-20 | 2013-03-20 | 天津亿为特电子科技有限公司 | Voltage peak detecting circuit |
CN103116062A (en) * | 2013-03-11 | 2013-05-22 | 矽力杰半导体技术(杭州)有限公司 | Circuit and method for detecting voltage peak |
Non-Patent Citations (1)
Title |
---|
高松松等: "CMOS峰值检测电路", 《微电子学与计算机》 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107395165A (en) * | 2016-05-16 | 2017-11-24 | 上海亨骏自动化设备有限公司 | A kind of liquid level gauge echo time collection peak detection circuit |
CN107395165B (en) * | 2016-05-16 | 2022-09-09 | 上海亨骏自动化设备有限公司 | Peak detection circuit for acquiring echo time of liquid level meter |
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