CN104539472A - Transmission frame sequence control method based on packet mechanism - Google Patents

Transmission frame sequence control method based on packet mechanism Download PDF

Info

Publication number
CN104539472A
CN104539472A CN201410727952.3A CN201410727952A CN104539472A CN 104539472 A CN104539472 A CN 104539472A CN 201410727952 A CN201410727952 A CN 201410727952A CN 104539472 A CN104539472 A CN 104539472A
Authority
CN
China
Prior art keywords
register
frame
transmission
value
length
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201410727952.3A
Other languages
Chinese (zh)
Other versions
CN104539472B (en
Inventor
蒲恺
李大鹏
李玉发
田园
徐文杰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AVIC No 631 Research Institute
Original Assignee
AVIC No 631 Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AVIC No 631 Research Institute filed Critical AVIC No 631 Research Institute
Priority to CN201410727952.3A priority Critical patent/CN104539472B/en
Publication of CN104539472A publication Critical patent/CN104539472A/en
Application granted granted Critical
Publication of CN104539472B publication Critical patent/CN104539472B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

The invention discloses a transmission frame sequence control method based on a packet mechanism. The method comprises the following steps that: (1) a host machine writes configuration data into a configuration register; (2) a control state machine starts a sequence number generating unit, a computing unit and a transmission unit; and (3) the sequence number generating unit generates a random control sequence number; the transmission unit checks a transmission mode started by the host machine; and corresponding frames are transmitted normally or transmitted repeatedly or discarded or transmitted disorderly according to the transmission mode till all frames are transmitted. The sequence of bottom-layer transmission frames belonging to the same top-layer data is controlled according to the configuration of the host machine, so that random repeated transmission, discarding and disordered transmission of the frames are realized. Control of a transmission frame sequence is realized through processing of a packet transmission sequence, so that the test demand of a network is met, and the aims of easiness in implementation, flexibility in use and reduction of cost are fulfilled.

Description

A kind of transmission frame sequence control method based on subpackage mechanism
Technical field
The present invention relates to a kind of transmission frame sequence control method, particularly a kind of transmission frame sequence control method based on subpackage mechanism.
Background technology
In the communications field, the usual hierarchical design of transfer of data, and bottom is different with the demand that upper strata will meet, so the data structure on bottom and upper strata often can not directly be mated, needs to change.As a rule bottom and the upper strata size of data to transmission is all conditional, but the data that the data length that upper strata can be supported generally can allow than bottom are long, therefore always need before transmission upper layer data subpackage, the long upper layer data of Jiang Yibao is decomposed into the parcel that some bags meet bottom transmission requirement.During normal transmission, these parcels are sent in order, but how to upset sending order, thus meet the testing requirement of network, also there is no related art scheme at present.
In the communications field, the usual hierarchical design of transfer of data, and bottom is different with the demand that upper strata will meet, so the data structure on bottom and upper strata often can not directly be mated, needs to change.And bottom and the upper strata size of data to transmission is all conditional, and the data that the data length that upper strata can be supported generally can allow than bottom are long, therefore need before transmission upper layer data subpackage, long upper layer data is decomposed into the parcel that some bags meet bottom transmission requirement.
When network is working properly, these parcels decomposited all can by sequential delivery, but when network failure, these parcels just likely can not by sequential delivery, but duplicate, packet loss or out of order situation, therefore when testing network, just need a kind of method being easy to the control transmission frame sequence realized, it can be used flexibly to send correct frame sequence or incorrect frame sequence, with working condition when test network normal condition and malfunction.But up to the present yet there are no the open scheme of correlation technique.
Summary of the invention
The present invention proposes a kind of transmission frame sequence control method based on subpackage mechanism, can according to the configuration of main frame, control the order belonging to the bottom transmission frame of same upper layer data, thus realize random for frame repetition to send, abandon and out of order transmission.It is low that the present invention has cost, uses flexibly, is easy to the feature realized.
The present invention, by the process to subpackage sending order, realizes the control to transmission frame sequence, and then it is simple to reach realization, uses flexibly, the object reduced costs.
Technical solution of the present invention is as follows:
Based on a transmission frame sequence control method for subpackage mechanism, its special character is:
Described control method is as follows:
1) configuration data is write configuration register by main frame;
2) state of a control machine unlock code generation unit, computing unit and transmitting element;
3) sequence number generation unit produces STOCHASTIC CONTROL sequence number; Transmitting element checks the sending mode that main frame is opened;
If enable normal transmission, then frame is normally sent,
If enable improper transmission, check that whether the sequence number of current transmission frame is identical with described STOCHASTIC CONTROL sequence number;
If identical, then perform step 4); If different, then normally send data;
4) send effectively if repeat, then calculated transmission address and the transmission length of frame by computing unit according to STOCHASTIC CONTROL sequence number, this frame is repeated transmission twice;
If abandon effectively, then abandon this frame, directly send next frame;
If effectively out of order, then calculated transmission address and the transmission length of frame by computing unit according to STOCHASTIC CONTROL sequence number, record the sequence number of this frame, send next frame, then read the sequence number of the frame recorded, and send this frame, after being sent completely by the frame of LSN, next frame starts normal transmission;
5) step 3 is repeated) to step 4), until this all frame is sent completely.
Above-mentioned configuration register comprises transmission start register, host data length register and sending mode mask register, and the value that sending mode mask register is low 3 is effective; Whether Bit0 controls to repeat to send, and whether Bit1 controls to abandon, and whether Bit2 controls out of order, represents normal transmission during the value full 0 of low 3;
State of a control machine comprises 5 states, and 5 states are as follows respectively: dummy status S0, register more new state S1, normal sequence transmission state S2, improper sequence transmission state S3 and be transmitted state S4;
State of a control machine entry condition is the write operation of transmission start register;
State of a control machine is in dummy status S0 at first, register more new state S1 is transferred to after the transmission of host-initiated frame, if the value that sending mode mask register is low 3 is 0 entirely, transfer to normal sequence transmission state, otherwise transfer to improper sequence transmission state S3, state of a control machine receives after frame is sent completely index signal and transfers to register more new state S1, receive after frame is transmitted index signal and show DTD, transfer to and be transmitted state S4, finally get back to dummy status S0.
Above-mentioned steps 3) in, the state of transmitting element residing for state of a control machine, sends the respective frame sending buffering as follows:
A) when state of a control machine is in dummy status S0, the value sending length register is initialized as the value of host data length register, the value of transmission frame length records register, transmission frame length register, transmission frame sequence number record register and transmission frame serial number register is all initialized as 0;
Send length register for recording the total length sending all frames to be sent in buffering; Transmission frame length records register is for recording the length of repetition and out of order frame, and transmission frame length register is for recording the current length needing the frame sent; Transmission frame sequence number record register is for recording the sequence number of out of order frame, and transmission frame serial number register is for recording the sequence number of current transmission frame;
B) when state of a control machine be in register more new state S1 time,
Sending index signal if repeat is 1, then read in transmission frame length register by the value of transmission frame length records register;
If out of order index signal is 1, then the value of transmission frame length records register is read in transmission frame length register, the value of transmission frame sequence number record register is read in transmission frame serial number register;
When repeating transmission index signal and out of order index signal is all 0, if the value sending length register is not more than a frame data length, then the value of transmission frame length register is initialized as the value sending length register, and will the value clear 0 of length register be sent, otherwise the value of transmission frame length register is initialized as a frame data length, and the value sending length register is deducted a frame data length;
C) when state of a control machine is in normal sequence transmission state S2,
By the value record of transmission frame length register in transmission frame length records register, by the value record of transmission frame serial number register in transmission frame sequence number record register; Calculated the transmission address of this frame according to the value of transmission frame serial number register by computing unit, corresponding frame sends in transmission being cushioned according to the value sending address and transmission frame length register by transmitting element, and the value of transmission frame length register is synchronously from subtracting;
When the value of transmission frame length register is 0 and the value sending length register is not 0, show that present frame is sent, transmission frame serial number register adds 1, and produce present frame be sent completely index signal;
When the value of transmission frame length register is 0 and the value sending length register is also 0, shows that this all frame is transmitted, produce and be transmitted index signal;
D) when state of a control machine is in improper sequence transmission state S3,
By the value record of transmission frame length register in transmission frame length records register, by the value record of transmission frame serial number register in transmission frame sequence number record register;
Check that whether the value of transmission frame serial number register is identical with STOCHASTIC CONTROL sequence number;
If different, then process when being in S2 state according to state of a control machine;
If identical, then carry out described step 4), judge effective sending mode;
Send effectively if repeat,
Then by the value record of transmission frame length register in transmission frame length records register, and judge repeat send index signal;
Sending index signal if repeat is 0, then calculated the transmission address of this frame according to the value of transmission frame serial number register by computing unit, corresponding frame sends in transmission being cushioned according to the value sending address and transmission frame length register by transmitting element, the value of transmission frame length register is synchronously from subtracting, when the value of transmission frame length register is 0, put 1 by repeating to send index signal, what produce present frame is sent completely index signal;
Sending index signal if repeat is 1, then calculated the transmission address of this frame according to the value of transmission frame serial number register by computing unit, corresponding frame sends in transmission being cushioned according to the value sending address and transmission frame length register by transmitting element, the value of transmission frame length register is synchronously from subtracting, when the value of transmission frame length register is 0, index signal clear 0 is sent by repeating, if when the value now sending length register is 0, then show that this all frame is transmitted, generation is transmitted index signal, otherwise produce present frame be sent completely index signal;
If abandon effectively,
Then by clear for transmission frame length register 0, transmission frame serial number register is added 1, if the value sending length register is not 0, what produce present frame is sent completely index signal, if the value sending length register is 0, then show that this all frame is transmitted, produce and be transmitted index signal;
If effectively out of order,
Then by the value record of transmission frame length register in transmission frame length records register, by the value record of frame number register in frame number record register, judge out of order index signal;
When out of order index signal is 1, then calculated the transmission address of this frame according to the value of transmission frame serial number register by computing unit, corresponding frame sends in transmission being cushioned according to the value sending address and transmission frame length register by transmitting element, and the value of transmission frame length register is synchronously from subtracting; If the value of transmission frame length register is 0 and sends the value of length register when not being 0, transmission frame serial number register adds 2, and out of order index signal is set to 0, and what produce present frame is sent completely index signal; If the value of transmission frame length register is 0 and sends the value of length register when being also 0, then show that this all frame is transmitted, by clear for out of order index signal 0, produce and be transmitted index signal;
When out of order index signal is 0, then transmission frame serial number register is added 1, if the value sending length register is not more than a frame data length, then the value of transmission frame length register is set to the value sending length register, and the value value sending length register being become a frame data length is calculated the transmission address of this frame according to the value of transmission frame serial number register by computing unit, corresponding frame sends in transmission being cushioned according to the value sending address and transmission frame length register by transmitting element, and the value of transmission frame length register is synchronously from subtracting; If when the value of transmission frame length register is 0, what produce present frame is sent completely index signal, and out of order index signal is set to 1,
E) when state of a control machine be in be transmitted state S4 time,
All registers clear 0.
An above-mentioned frame data length is 2096B.
The value of transmission frame serial number register to be specifically multiplied with the value of single frames length by computing unit and to obtain by above-mentioned transmission address, and the value of single frames length is 2096B.
The present invention has following technique effect:
A) adopt digital circuit completely, circuit structure is simple;
B) support the use of the integrated circuits such as FPGA, be easy to realize;
C) can by simply changing realization to existing circuit, cost is low;
D) easy to use, flexible operation.
Accompanying drawing explanation
Fig. 1 is technical scheme schematic diagram of the present invention;
Fig. 2 is technical solution of the present invention workflow diagram;
Fig. 3 is state of a control machine state transitions schematic diagram;
Fig. 4 is sequence number generation unit workflow diagram;
Fig. 5 is computing unit schematic diagram;
Fig. 6 is transmitting element workflow diagram.
Embodiment
Based on a transmission frame sequence control method for subpackage mechanism, as shown in Figure 1,
The control system of described control method, comprises configuration register, state of a control machine, transmitting element, computing unit and sequence number generation unit;
Wherein, state of a control machine controls the work schedule of sequence number generation unit, computing unit and transmitting element, guarantees that three unit can co-ordination.Configuration register stores the configuration information of main frame, and be used for opening the sending mode of frame, sending mode comprises normal transmission and improper transmission, and improper transmission comprises and repeats transmission, abandons with out of order;
State of a control machine controls sequence number generation unit, computing unit and transmitting element work according to the value of configuration register; Sequence number generation unit produces at random to be needed to repeat to send, abandon or the sequence number of out of order frame; Computing unit calculates according to the sequence number that sequence number generation unit produces and sends address and send length, sending mode, described transmission address that transmitting element is opened according to the control of state of a control machine, main frame and send length transmissions is cushioned in accordingly frame send;
Described control method is as follows:
1) configuration data is write configuration register by main frame;
2) state of a control machine unlock code generation unit, computing unit and transmitting element;
3) sequence number generation unit produces STOCHASTIC CONTROL sequence number; Transmitting element checks the sending mode that main frame is opened;
If enable normal transmission, then frame is normally sent,
If enable improper transmission, check that whether the sequence number of current transmission frame is identical with described STOCHASTIC CONTROL sequence number;
If identical, then perform step 4); If different, then normally send data;
4) send effectively if repeat, then calculated transmission address and the transmission length of frame by computing unit according to STOCHASTIC CONTROL sequence number, this frame is repeated transmission twice;
If abandon effectively, then abandon this frame, directly send next frame;
If effectively out of order, then calculated transmission address and the transmission length of frame by computing unit according to STOCHASTIC CONTROL sequence number, record the sequence number of this frame, send next frame, then read the sequence number of the frame recorded, and send this frame, after being sent completely by the frame of LSN, next frame starts normal transmission;
5) step 3 is repeated) to step 4), until this all frame is sent completely.
Described configuration register comprises transmission start register, host data length register and sending mode mask register, and the value that sending mode mask register is low 3 is effective; Whether Bit0 controls to repeat to send, and whether Bit1 controls to abandon, and whether Bit2 controls out of order, represents normal transmission during the value full 0 of low 3.
The definition of configuration register and illustrate as shown in table 1.
The explanation of table 1 configuration register
State of a control machine comprises 5 states, and 5 states are as follows respectively: dummy status S0, register more new state S1, normal sequence transmission state S2, improper sequence transmission state S3 and be transmitted state S4;
State of a control machine entry condition is the write operation of transmission start register;
State of a control machine is in dummy status S0 at first, register more new state S1 is transferred to after the transmission of host-initiated frame, if the value that sending mode mask register is low 3 is 0 entirely, transfer to normal sequence transmission state, otherwise transfer to improper sequence transmission state S3, state of a control machine receives after frame is sent completely index signal and transfers to register more new state S1, receive after frame is transmitted index signal and show DTD, transfer to and be transmitted state S4, finally get back to dummy status S0.
Sequence number generation unit:
Described step 2) sequence number generation unit be work when state of a control machine is in S1 state, produce a STOCHASTIC CONTROL sequence number, for subsequent treatment.Workflow as shown in Figure 4, is described as follows:
A) counter adds counting certainly according to counting clock;
B) when state of a control machine is in S1 state and STOCHASTIC CONTROL sequence number index signal is 0, be that the value of sampling clock to counter is sampled with work clock, sampled value exports as control sequence number, produces STOCHASTIC CONTROL sequence number index signal simultaneously;
C) when state of a control machine is in S4 state, by STOCHASTIC CONTROL sequence number index signal clear 0.
Step 3) in, the state of transmitting element residing for state of a control machine, sends the respective frame sending buffering as follows:
A) when state of a control machine is in dummy status S0, the value sending length register is initialized as the value of host data length register, the value of transmission frame length records register, transmission frame length register, transmission frame sequence number record register and transmission frame serial number register is all initialized as 0;
Send length register for recording the total length sending all frames to be sent in buffering; Transmission frame length records register is for recording the length of repetition and out of order frame, and transmission frame length register is for recording the current length needing the frame sent; Transmission frame sequence number record register is for recording the sequence number of out of order frame, and transmission frame serial number register is for recording the sequence number of current transmission frame;
B) when state of a control machine be in register more new state S1 time,
Sending index signal if repeat is 1, then read in transmission frame length register by the value of transmission frame length records register;
If out of order index signal is 1, then the value of transmission frame length records register is read in transmission frame length register, the value of transmission frame sequence number record register is read in transmission frame serial number register;
When repeating transmission index signal and out of order index signal is all 0, if the value sending length register is not more than a frame data length, then the value of transmission frame length register is initialized as the value sending length register, and will the value clear 0 of length register be sent, otherwise the value of transmission frame length register is initialized as a frame data length, and the value sending length register is deducted a frame data length;
C) when state of a control machine is in normal sequence transmission state S2,
By the value record of transmission frame length register in transmission frame length records register, by the value record of transmission frame serial number register in transmission frame sequence number record register; Calculated the transmission address of this frame according to the value of transmission frame serial number register by computing unit, corresponding frame sends in transmission being cushioned according to the value sending address and transmission frame length register by transmitting element, and the value of transmission frame length register is synchronously from subtracting;
When the value of transmission frame length register is 0 and the value sending length register is not 0, show that present frame is sent, transmission frame serial number register adds 1, and produce present frame be sent completely index signal;
When the value of transmission frame length register is 0 and the value sending length register is also 0, shows that this all frame is transmitted, produce and be transmitted index signal;
D) when state of a control machine is in improper sequence transmission state S3,
By the value record of transmission frame length register in transmission frame length records register, by the value record of transmission frame serial number register in transmission frame sequence number record register;
Check that whether the value of transmission frame serial number register is identical with STOCHASTIC CONTROL sequence number;
If different, then process when being in S2 state according to state of a control machine;
If identical, then carry out described step 4), judge effective sending mode;
Send effectively if repeat,
Then by the value record of transmission frame length register in transmission frame length records register, and judge repeat send index signal;
Sending index signal if repeat is 0, then calculated the transmission address of this frame according to the value of transmission frame serial number register by computing unit, corresponding frame sends in transmission being cushioned according to the value sending address and transmission frame length register by transmitting element, the value of transmission frame length register is synchronously from subtracting, when the value of transmission frame length register is 0, put 1 by repeating to send index signal, what produce present frame is sent completely index signal;
Sending index signal if repeat is 1, then calculated the transmission address of this frame according to the value of transmission frame serial number register by computing unit, corresponding frame sends in transmission being cushioned according to the value sending address and transmission frame length register by transmitting element, the value of transmission frame length register is synchronously from subtracting, when the value of transmission frame length register is 0, index signal clear 0 is sent by repeating, if when the value now sending length register is 0, then show that this all frame is transmitted, generation is transmitted index signal, otherwise produce present frame be sent completely index signal;
If abandon effectively,
Then by clear for transmission frame length register 0, transmission frame serial number register is added 1, if the value sending length register is not 0, what produce present frame is sent completely index signal, if the value sending length register is 0, then show that this all frame is transmitted, produce and be transmitted index signal;
If effectively out of order,
Then by the value record of transmission frame length register in transmission frame length records register, by the value record of frame number register in frame number record register, judge out of order index signal;
When out of order index signal is 1, then calculated the transmission address of this frame according to the value of transmission frame serial number register by computing unit, corresponding frame sends in transmission being cushioned according to the value sending address and transmission frame length register by transmitting element, and the value of transmission frame length register is synchronously from subtracting; If the value of transmission frame length register is 0 and sends the value of length register when not being 0, transmission frame serial number register adds 2, and out of order index signal is set to 0, and what produce present frame is sent completely index signal; If the value of transmission frame length register is 0 and sends the value of length register when being also 0, then show that this all frame is transmitted, by clear for out of order index signal 0, produce and be transmitted index signal;
When out of order index signal is 0, then transmission frame serial number register is added 1, if the value sending length register is not more than a frame data length, then the value of transmission frame length register is set to the value sending length register, and the value value sending length register being become a frame data length is calculated the transmission address of this frame according to the value of transmission frame serial number register by computing unit, corresponding frame sends in transmission being cushioned according to the value sending address and transmission frame length register by transmitting element, and the value of transmission frame length register is synchronously from subtracting; If when the value of transmission frame length register is 0, what produce present frame is sent completely index signal, and out of order index signal is set to 1,
E) when state of a control machine be in be transmitted state S4 time,
All registers clear 0.
One frame data length is 2096B.
The value of transmission frame serial number register to be specifically multiplied with the value of single frames length by computing unit and to obtain by transmission address of the present invention, and the value of single frames length is 2096B.

Claims (5)

1., based on a transmission frame sequence control method for subpackage mechanism, it is characterized in that:
Described control method is as follows:
1) configuration data is write configuration register by main frame;
2) state of a control machine unlock code generation unit, computing unit and transmitting element;
3) sequence number generation unit produces STOCHASTIC CONTROL sequence number; Transmitting element checks the sending mode that main frame is opened;
If enable normal transmission, then frame is normally sent,
If enable improper transmission, check that whether the sequence number of current transmission frame is identical with described STOCHASTIC CONTROL sequence number;
If identical, then perform step 4); If different, then normally send data;
4) send effectively if repeat, then calculated transmission address and the transmission length of frame by computing unit according to STOCHASTIC CONTROL sequence number, this frame is repeated transmission twice;
If abandon effectively, then abandon this frame, directly send next frame;
If effectively out of order, then calculated transmission address and the transmission length of frame by computing unit according to STOCHASTIC CONTROL sequence number, record the sequence number of this frame, send next frame, then read the sequence number of the frame recorded, and send this frame, after being sent completely by the frame of LSN, next frame starts normal transmission;
5) step 3 is repeated) to step 4), until this all frame is sent completely.
2. the transmission frame sequence control method based on subpackage mechanism according to claim 1, is characterized in that:
Described configuration register comprises transmission start register, host data length register and sending mode mask register, and the value that sending mode mask register is low 3 is effective; Whether Bit0 controls to repeat to send, and whether Bit1 controls to abandon, and whether Bit2 controls out of order, represents normal transmission during the value full 0 of low 3;
State of a control machine comprises 5 states, and 5 states are as follows respectively: dummy status S0, register more new state S1, normal sequence transmission state S2, improper sequence transmission state S3 and be transmitted state S4;
State of a control machine entry condition is the write operation of transmission start register;
State of a control machine is in dummy status S0 at first, register more new state S1 is transferred to after the transmission of host-initiated frame, if the value that sending mode mask register is low 3 is 0 entirely, transfer to normal sequence transmission state, otherwise transfer to improper sequence transmission state S3, state of a control machine receives after frame is sent completely index signal and transfers to register more new state S1, receive after frame is transmitted index signal and show DTD, transfer to and be transmitted state S4, finally get back to dummy status S0.
3. the transmission frame sequence control method based on subpackage mechanism according to claim 2, is characterized in that:
Described step 3) in, the state of transmitting element residing for state of a control machine, sends the respective frame sending buffering as follows:
A) when state of a control machine is in dummy status S0, the value sending length register is initialized as the value of host data length register, the value of transmission frame length records register, transmission frame length register, transmission frame sequence number record register and transmission frame serial number register is all initialized as 0;
Send length register for recording the total length sending all frames to be sent in buffering; Transmission frame length records register is for recording the length of repetition and out of order frame, and transmission frame length register is for recording the current length needing the frame sent; Transmission frame sequence number record register is for recording the sequence number of out of order frame, and transmission frame serial number register is for recording the sequence number of current transmission frame;
B) when state of a control machine be in register more new state S1 time,
Sending index signal if repeat is 1, then read in transmission frame length register by the value of transmission frame length records register;
If out of order index signal is 1, then the value of transmission frame length records register is read in transmission frame length register, the value of transmission frame sequence number record register is read in transmission frame serial number register;
When repeating transmission index signal and out of order index signal is all 0, if the value sending length register is not more than a frame data length, then the value of transmission frame length register is initialized as the value sending length register, and will the value clear 0 of length register be sent, otherwise the value of transmission frame length register is initialized as a frame data length, and the value sending length register is deducted a frame data length;
C) when state of a control machine is in normal sequence transmission state S2,
By the value record of transmission frame length register in transmission frame length records register, by the value record of transmission frame serial number register in transmission frame sequence number record register; Calculated the transmission address of this frame according to the value of transmission frame serial number register by computing unit, corresponding frame sends in transmission being cushioned according to the value sending address and transmission frame length register by transmitting element, and the value of transmission frame length register is synchronously from subtracting;
When the value of transmission frame length register is 0 and the value sending length register is not 0, show that present frame is sent, transmission frame serial number register adds 1, and produce present frame be sent completely index signal;
When the value of transmission frame length register is 0 and the value sending length register is also 0, shows that this all frame is transmitted, produce and be transmitted index signal;
D) when state of a control machine is in improper sequence transmission state S3,
By the value record of transmission frame length register in transmission frame length records register, by the value record of transmission frame serial number register in transmission frame sequence number record register;
Check that whether the value of transmission frame serial number register is identical with STOCHASTIC CONTROL sequence number;
If different, then process when being in S2 state according to state of a control machine;
If identical, then carry out described step 4), judge effective sending mode;
Send effectively if repeat,
Then by the value record of transmission frame length register in transmission frame length records register, and judge repeat send index signal;
Sending index signal if repeat is 0, then calculated the transmission address of this frame according to the value of transmission frame serial number register by computing unit, corresponding frame sends in transmission being cushioned according to the value sending address and transmission frame length register by transmitting element, the value of transmission frame length register is synchronously from subtracting, when the value of transmission frame length register is 0, put 1 by repeating to send index signal, what produce present frame is sent completely index signal;
Sending index signal if repeat is 1, then calculated the transmission address of this frame according to the value of transmission frame serial number register by computing unit, corresponding frame sends in transmission being cushioned according to the value sending address and transmission frame length register by transmitting element, the value of transmission frame length register is synchronously from subtracting, when the value of transmission frame length register is 0, index signal clear 0 is sent by repeating, if when the value now sending length register is 0, then show that this all frame is transmitted, generation is transmitted index signal, otherwise produce present frame be sent completely index signal;
If abandon effectively,
Then by clear for transmission frame length register 0, transmission frame serial number register is added 1, if the value sending length register is not 0, what produce present frame is sent completely index signal, if the value sending length register is 0, then show that this all frame is transmitted, produce and be transmitted index signal;
If effectively out of order,
Then by the value record of transmission frame length register in transmission frame length records register, by the value record of frame number register in frame number record register, judge out of order index signal;
When out of order index signal is 1, then calculated the transmission address of this frame according to the value of transmission frame serial number register by computing unit, corresponding frame sends in transmission being cushioned according to the value sending address and transmission frame length register by transmitting element, and the value of transmission frame length register is synchronously from subtracting; If the value of transmission frame length register is 0 and sends the value of length register when not being 0, transmission frame serial number register adds 2, and out of order index signal is set to 0, and what produce present frame is sent completely index signal; If the value of transmission frame length register is 0 and sends the value of length register when being also 0, then show that this all frame is transmitted, by clear for out of order index signal 0, produce and be transmitted index signal;
When out of order index signal is 0, then transmission frame serial number register is added 1, if the value sending length register is not more than a frame data length, then the value of transmission frame length register is set to the value sending length register, and the value value sending length register being become a frame data length is calculated the transmission address of this frame according to the value of transmission frame serial number register by computing unit, corresponding frame sends in transmission being cushioned according to the value sending address and transmission frame length register by transmitting element, and the value of transmission frame length register is synchronously from subtracting; If when the value of transmission frame length register is 0, what produce present frame is sent completely index signal, and out of order index signal is set to 1,
E) when state of a control machine be in be transmitted state S4 time,
All registers clear 0.
4. the transmission frame sequence control method based on subpackage mechanism according to claim 3, is characterized in that: a described frame data length is 2096B.
5. the transmission frame sequence control method based on subpackage mechanism according to claim 3, it is characterized in that: the value of transmission frame serial number register to be specifically multiplied with the value of single frames length by computing unit and to obtain by described transmission address, and the value of single frames length is 2096B.
CN201410727952.3A 2014-12-03 2014-12-03 A kind of transmission frame sequence control method based on subpackage mechanism Active CN104539472B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410727952.3A CN104539472B (en) 2014-12-03 2014-12-03 A kind of transmission frame sequence control method based on subpackage mechanism

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410727952.3A CN104539472B (en) 2014-12-03 2014-12-03 A kind of transmission frame sequence control method based on subpackage mechanism

Publications (2)

Publication Number Publication Date
CN104539472A true CN104539472A (en) 2015-04-22
CN104539472B CN104539472B (en) 2017-12-22

Family

ID=52854941

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410727952.3A Active CN104539472B (en) 2014-12-03 2014-12-03 A kind of transmission frame sequence control method based on subpackage mechanism

Country Status (1)

Country Link
CN (1) CN104539472B (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108616329A (en) * 2016-12-12 2018-10-02 中国航空工业集团公司西安航空计算技术研究所 A kind of FC network sequences sending control system and method based on digital circuit
CN110704133A (en) * 2019-09-11 2020-01-17 北京控制工程研究所 Satellite subpackage remote control receiving control method based on finite-state machine
CN115865092A (en) * 2023-03-02 2023-03-28 广东华芯微特集成电路有限公司 Analog-digital conversion controller, control method and system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080291842A1 (en) * 2007-05-25 2008-11-27 Psytechnics Limited Video quality assessment
CN102045222A (en) * 2011-01-30 2011-05-04 重庆思建科技有限公司 Real-time overall test method of network system
CN102932665A (en) * 2012-11-14 2013-02-13 北京汉邦高科数字技术股份有限公司 Method for testing decoding performance of network hard disk video recorder

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080291842A1 (en) * 2007-05-25 2008-11-27 Psytechnics Limited Video quality assessment
CN102045222A (en) * 2011-01-30 2011-05-04 重庆思建科技有限公司 Real-time overall test method of network system
CN102932665A (en) * 2012-11-14 2013-02-13 北京汉邦高科数字技术股份有限公司 Method for testing decoding performance of network hard disk video recorder

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108616329A (en) * 2016-12-12 2018-10-02 中国航空工业集团公司西安航空计算技术研究所 A kind of FC network sequences sending control system and method based on digital circuit
CN108616329B (en) * 2016-12-12 2020-12-29 中国航空工业集团公司西安航空计算技术研究所 FC network sequence sending control system and method based on digital circuit
CN110704133A (en) * 2019-09-11 2020-01-17 北京控制工程研究所 Satellite subpackage remote control receiving control method based on finite-state machine
CN110704133B (en) * 2019-09-11 2023-03-31 北京控制工程研究所 Satellite subpackage remote control receiving control method based on finite-state machine
CN115865092A (en) * 2023-03-02 2023-03-28 广东华芯微特集成电路有限公司 Analog-digital conversion controller, control method and system
CN115865092B (en) * 2023-03-02 2023-04-28 广东华芯微特集成电路有限公司 Analog-to-digital conversion controller, control method and system

Also Published As

Publication number Publication date
CN104539472B (en) 2017-12-22

Similar Documents

Publication Publication Date Title
CN103907297B (en) Multi-protocols serioparallel exchange physical layer element device
CN1902596B (en) Programmable measurement method, equipment and system for a serial point to point link
CN101599053B (en) Serial interface controller supporting multiple transport protocols and control method
US20150026494A1 (en) Intelligent mesochronous synchronizer
CN102918513B (en) For enabling the methods, devices and systems of determinacy interface
US9647859B2 (en) System and method for link training of a backplane physical layer device operating in simplex mode
CN102143023B (en) Error code testing system based on FPGA (Field Programmable Gate Array)
CN102123060B (en) FPGA (Field Programmable Gate Array) based error code testing method
CN101213534B (en) Latency insensitive FIFO signaling protocol
CN102708086B (en) Elastic buffer structure and method applied to universal serial bus 3.0 (USB 3.0)
CN104539472A (en) Transmission frame sequence control method based on packet mechanism
CN106464559A (en) High speed embedded protocol for distributed control system
US7434150B1 (en) Methods, circuits, architectures, software and systems for determining a data transmission error and/or checking or confirming such error determinations
CN103164314B (en) Peripheral component interface express (PCIe) interface chip hardware verification method based on asynchronous physical layer interface
WO2012078341A1 (en) Memory components and controllers that utilize multiphase synchronous timing references
CN106354686B (en) A kind of SATA interface data flow control and control method based on FPGA
US9479310B2 (en) Method, apparatus and system to communicate with a device
US20120317380A1 (en) Device and method for a half-rate clock elasticity fifo
Lim UART Architecture
CN105550089B (en) A kind of FC network frame head error in data method for implanting based on digital circuit
CN104750648B (en) One-way communication control device and method based on dual-wire bus
JP2004056803A (en) Programmable glitch filter for asynchronous data communication interface
EP3267305A1 (en) Circuit and method for credit-based flow control
JPH06311127A (en) Digital data arbiter
CN111052682B (en) Master device for a bus system

Legal Events

Date Code Title Description
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant