CN104538496A - Efficient silicon heterojunction solar cell electroplating electrode preparing method - Google Patents
Efficient silicon heterojunction solar cell electroplating electrode preparing method Download PDFInfo
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- CN104538496A CN104538496A CN201410827142.5A CN201410827142A CN104538496A CN 104538496 A CN104538496 A CN 104538496A CN 201410827142 A CN201410827142 A CN 201410827142A CN 104538496 A CN104538496 A CN 104538496A
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- 238000000034 method Methods 0.000 title claims abstract description 49
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 14
- 239000010703 silicon Substances 0.000 title claims abstract description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 13
- 238000009713 electroplating Methods 0.000 title abstract description 14
- 239000002184 metal Substances 0.000 claims abstract description 32
- 229910052751 metal Inorganic materials 0.000 claims abstract description 32
- 239000000758 substrate Substances 0.000 claims description 191
- 229910021419 crystalline silicon Inorganic materials 0.000 claims description 189
- 239000010410 layer Substances 0.000 claims description 94
- 239000011241 protective layer Substances 0.000 claims description 76
- 238000007747 plating Methods 0.000 claims description 75
- 239000000463 material Substances 0.000 claims description 58
- 238000000151 deposition Methods 0.000 claims description 39
- 238000007650 screen-printing Methods 0.000 claims description 36
- 239000011800 void material Substances 0.000 claims description 15
- 230000000873 masking effect Effects 0.000 claims description 12
- 238000005260 corrosion Methods 0.000 claims description 9
- 230000007797 corrosion Effects 0.000 claims description 9
- 238000005507 spraying Methods 0.000 claims description 8
- 238000002360 preparation method Methods 0.000 claims description 7
- 238000007639 printing Methods 0.000 claims description 7
- 239000000126 substance Substances 0.000 claims description 7
- 238000004090 dissolution Methods 0.000 claims description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims description 5
- 239000002904 solvent Substances 0.000 claims description 5
- 238000004528 spin coating Methods 0.000 claims description 5
- 238000005516 engineering process Methods 0.000 abstract description 20
- 239000013078 crystal Substances 0.000 abstract 2
- 239000010949 copper Substances 0.000 description 16
- 238000010586 diagram Methods 0.000 description 13
- 229910052802 copper Inorganic materials 0.000 description 8
- 238000012856 packing Methods 0.000 description 8
- 230000005611 electricity Effects 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 description 6
- 238000006243 chemical reaction Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 5
- 239000002253 acid Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- -1 cause battery drain Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 239000000377 silicon dioxide Substances 0.000 description 3
- 239000007921 spray Substances 0.000 description 3
- 239000003513 alkali Substances 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 231100000252 nontoxic Toxicity 0.000 description 2
- 230000003000 nontoxic effect Effects 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 239000002033 PVDF binder Substances 0.000 description 1
- 229920002472 Starch Polymers 0.000 description 1
- 239000002585 base Substances 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000003912 environmental pollution Methods 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229920002981 polyvinylidene fluoride Polymers 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000012260 resinous material Substances 0.000 description 1
- 238000005245 sintering Methods 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 235000019698 starch Nutrition 0.000 description 1
- 239000008107 starch Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
- H01L31/074—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a heterojunction with an element of Group IV of the Periodic Table, e.g. ITO/Si, GaAs/Si or CdTe/Si solar cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention discloses an efficient silicon heterojunction solar cell electroplating electrode preparing method. According to the main technical scheme, the method comprises the steps that an electroplating mask is formed on the upper surface of a crystal silicon chip with a transparent conducting medium layer deposited, and a protection layer is formed on the side face of the periphery of the crystal silicon chip; the electroplating mask formed on the transparent conducting medium layer comprises grooves, and metal layers are electroplated at the positions of the grooves. The method is used for solving the problems that in the prior art, electric leakage is prone to occurring on the edge of a battery in the Cu electroplating technology, and Cu atoms are prone to seeping into the battery.
Description
Technical field
The present invention relates to silicon wafer area of solar cell, relate to a kind of preparation method of efficient silicon heterogenous solar cell electroplated electrode more specifically.
Background technology
Along with the exhaustion day by day of traditional energy and the day by day serious of problem of environmental pollution, photovoltaic power generation technology more and more receives publicity, and is considered to important renewable and clean energy resource.Improve the photoelectric conversion efficiency of photovoltaic cell, reduce cost of electricity-generating, make it have the target that competitiveness is photovoltaic industry compared with traditional grid generation cost.Current industrialization crystal-silicon solar cell front surface electrode utilizes silk screen printing Ag to starch and the Ag grid line of the technology sintered formation patterning, and the advantage of this technology is that technique is simple, and production capacity is higher.But the gate electrode line depth-width ratio example that this technology is produced is little, causes battery shading-area larger; In sintering disposed slurry, the residual and fault of construction of organic substance causes grid line resistance larger; Ag's is expensive simultaneously, is unfavorable for the further lifting of solar cell conversion efficiency and the reduction of production cost.
Plating Cu grid line technology is the Ag gate line electrode substitute technology of great potential.Wherein, electroplate Cu grid line technology relatively to electroplate Ag grid line technology there is following advantage: the low price of the cost ratio Ag of Cu; Electricity copper facing technology can complete at a lower temperature; The grid line very narrow (<20 μm) obtained in electricity copper facing technology.
For in the electroplated electrode technological process of efficient silicon heterojunction solar battery, usually first there is the anti-plate material of grid line pattern as plating mask in the preparation of transparent conductive medium layer surface.Due to process conditions restriction, crystalline silicon substrate edge and side are difficult to be covered by anti-plate layer simultaneously, in following electroplating process, the edge of crystalline silicon substrate and side bend down resistance region at doped layer and conductive covering and may grow Cu particle, cause battery drain, or Cu ion infiltrates crystalline silicon substrate material internal, has a strong impact on battery performance.
In solar cell electroplated electrode technology known at present, the method of being cleaned by subsequent corrosion removes the Cu particle of battery edge and lateral parts region growing or attachment, the method can corrode Cu grid line conductive layer simultaneously, and effectively cannot remove the Cu being infiltrated silicon chip inside in electroplating process by side.
In sum, in the edge of crystalline silicon substrate of unprotect layer protection and the side of surrounding under traditional handicraft, there is electric copper facing technology and easily cause battery edge to leak electricity and Cu atom easily infiltrates the problem of inside battery.
Summary of the invention
The embodiment of the present invention provides a kind of efficient silicon heterogenous solar cell electroplated electrode preparation method, there is electric copper facing technology easily cause battery edge to leak electricity and Cu atom easily infiltrates the problem of inside battery in order to solve in prior art.
The embodiment of the present invention provides a kind of efficient silicon heterogenous solar cell electroplated electrode preparation method, comprising:
Form plating mask at the crystalline silicon substrate upper surface depositing transparent conductive medium layer, form protective layer in the side of the surrounding of described crystalline silicon substrate; Wherein, described transparent conductive medium layer forms plating mask and comprise groove;
At described groove location electroplated metal layer.
Further, the described crystalline silicon substrate upper surface depositing transparent conductive medium layer forms plating mask, forms protective layer, comprising in the side of the surrounding of described crystalline silicon substrate:
Formed plating mask by silk-screen printing technique at the crystalline silicon substrate upper surface depositing transparent conductive medium layer and form protective layer in the side of the surrounding of described crystalline silicon substrate, wherein, plates for screen printing comprises void region and grid region.
Further, also comprise:
The marginal portion of the upper surface of described crystalline silicon substrate and the marginal portion horizontal range of described printed panel are 10 ~ 2000 μm.
Further, the described crystalline silicon substrate upper surface depositing transparent conductive medium layer forms plating mask, forms protective layer, comprising in the side of the surrounding of described crystalline silicon substrate:
The described crystalline silicon substrate upper surface depositing transparent conductive medium layer forms plating mask;
Multiple crystalline silicon substrate that described crystalline silicon substrate upper surface forms plating mask are stacked, forms protective layer in the side of the described multiple crystalline silicon substrate surroundings stacked;
Wherein, the edge complete matching of the multiple crystalline silicon substrate stacked described in.
Further, the side of the described multiple crystalline silicon substrate surroundings stacked at described justified margin forms protective layer, comprising:
The side of the multiple crystalline silicon substrate surroundings stacked at described justified margin forms protective layer by spraying.
Further, the described crystalline silicon substrate upper surface depositing transparent conductive medium layer forms plating mask, forms protective layer, comprising in the side of the surrounding of described crystalline silicon substrate:
The described crystalline silicon substrate upper surface depositing transparent conductive medium layer forms plating mask;
Multiple crystalline silicon substrate that described crystalline silicon substrate upper surface forms plating mask are vertically positioned in protective layer fluent material; make the side of described multiple crystalline silicon substrate surrounding be immersed in described protective layer fluent material successively, form protective layer in the side of described multiple crystalline silicon substrate surrounding.
Further, the described side of described multiple crystalline silicon substrate surrounding that makes successively is immersed in protective layer fluent material, comprising:
1 ~ 2000 μm, the side of described multiple crystalline silicon substrate surrounding is immersed in described protective layer fluent material.
Further, the described crystalline silicon substrate upper surface depositing transparent conductive medium layer forms plating mask, comprising:
In the crystalline silicon substrate depositing transparent conductive medium layer, form protective layer by printing, spraying or spin coating method.
Further, also comprise:
The crystalline silicon substrate upper surface depositing transparent conductive medium layer described in chemical corrosion, directly stripping or dissolution with solvents removal is adopted to form plating mask; Or
The side adopting the crystalline silicon substrate upper surface depositing transparent conductive medium layer described in chemical corrosion, directly stripping or dissolution with solvents removal to form the surrounding of plating mask and described crystalline silicon substrate forms protective layer.
Further, the thickness 0.1 μm ~ 1000 μm of described protective layer.
Further, described electroplate masking material comprises ink or photoresist.
The crystalline silicon substrate upper surface that the embodiment of the present invention is depositing transparent conductive medium layer forms plating mask, forms protective layer in the side of the surrounding of described crystalline silicon substrate; Wherein, described transparent conductive medium layer forms plating mask and comprise groove; Adopt said method; before electroplated metal layer; covering protection is carried out to the side of the surrounding of crystalline silicon substrate; when electroplated metal layer; decrease the phenomenon causing battery edge to leak electricity by electroplating technology; decrease electroplated metal layer atom simultaneously and penetrate into inside battery, cause the problem affecting battery performance.
Accompanying drawing explanation
Fig. 1 provides a kind of solar cell electroplated electrode preparation method flow chart for the embodiment of the present invention;
The solar cell substrates structural representation that Fig. 2 provides for the embodiment of the present invention;
The screen printing plate schematic diagram that Fig. 3 provides for the embodiment of the present invention;
The employing silk-screen printing technique that Fig. 4 provides for the embodiment of the present invention forms plating mask at crystalline silicon substrate upper surface and forms protective layer schematic diagram in the side of the surrounding of described crystalline silicon substrate;
What Fig. 5 provided for the embodiment of the present invention forms the reeded plating mask schematic diagram of band at crystalline silicon substrate upper surface;
What Fig. 6 provided for the embodiment of the present invention stacks schematic diagram by multiple crystalline silicon substrate;
The side of multiple crystalline silicon substrate surroundings that Fig. 7 provides for the embodiment of the present invention forms protective layer schematic diagram;
The crystalline silicon substrate upper surface that Fig. 8 provides for the embodiment of the present invention forms plating mask, forms protective layer schematic diagram in the side of the surrounding of crystalline silicon substrate;
The schematic diagram completing electroplated metal layer in crystalline silicon substrate that Fig. 9 provides for the embodiment of the present invention;
What Figure 10 provided for the embodiment of the present invention removes crystalline silicon substrate upper surface plating mask, and by schematic diagram that the lateral protection layer of crystalline silicon substrate surrounding retains;
Figure 11 for the embodiment of the present invention provide the lateral protection layer of crystalline silicon substrate upper surface plating mask and crystalline silicon substrate surrounding is removed after schematic diagram.
Embodiment
The crystalline silicon substrate upper surface that the embodiment of the present invention is depositing transparent conductive medium layer forms plating mask, forms protective layer in the side of the surrounding of described crystalline silicon substrate; Wherein, described transparent conductive medium layer forms plating mask and comprise groove; Adopt said method; before electroplated metal layer; covering protection is carried out to the side of the surrounding of crystalline silicon substrate; when electroplated metal layer; decrease the phenomenon causing battery edge to leak electricity by electroplating technology; decrease electroplated metal layer atom simultaneously and penetrate into inside battery, cause the problem affecting battery performance.
Below in conjunction with Figure of description, the preferred embodiments of the present invention are described, be to be understood that, preferred embodiment described herein is only for instruction and explanation of the present invention, be not intended to limit the present invention, and when not conflicting, the embodiment in the present invention and the feature in embodiment can combine mutually.
As shown in Figure 1, the embodiment of the present invention one provides a kind of efficient silicon heterogenous electrode of solar battery electro-plating method, comprises the steps:
Step 101, deposit transparent conductive medium layer crystalline silicon substrate upper surface formed plating mask, the side of the surrounding of described crystalline silicon substrate formed protective layer; Wherein, described transparent conductive medium layer forms plating mask and comprise groove;
Step 102, at described groove location electroplated metal layer.
As shown in Figure 2, the main body of crystalline silicon substrate 1 to be processed is Si base, deposits intrinsic amorphous silicon layer 2 and doped amorphous silicon layer 3, deposit transparent conductive medium layer 4 on doped amorphous silicon layer 3 at the upper surface of crystalline silicon substrate 1; Crystalline silicon substrate 1 the back side also deposit intrinsic amorphous silicon layer 2 and doped amorphous silicon layer 3 accordingly, deposit transparent conductive medium layer 4 at the lower surface of doped amorphous silicon layer 3, below transparent conductive medium layer 4, have back metal electrode layer 5.
In a step 101, plating mask is formed at the crystalline silicon substrate upper surface depositing transparent conductive medium layer, protective layer is formed in the side of the surrounding of described crystalline silicon substrate, comprise two kinds of methods, wherein in first method, the side formation protective layer of the surrounding of plating mask and described crystalline silicon substrate can be formed at the crystalline silicon substrate upper surface depositing transparent conductive medium layer simultaneously; In second method, first form plating mask at the crystalline silicon substrate upper surface depositing transparent conductive medium layer, then form protective layer in the side of the surrounding of described crystalline silicon substrate.Below these two kinds of methods are introduced respectively:
First method:
In embodiments of the present invention, adopt silk-screen printing technique can form plating mask and protective layer successively in the side of the surrounding of the crystalline silicon substrate upper surface and described crystalline silicon substrate that deposit transparent conductive medium layer simultaneously.
As shown in Figure 3, plates for screen printing comprises grid line structure 6 and void region 7, when screen printing plate is when printing, by the extruding of scraper plate, make ink or other material transfer on stock by the hole, void region of plates for screen printing, form the pattern the same with void region on screen printing plate on the substrate.In embodiments of the present invention; when preparing plating mask and protective layer to the crystalline silicon substrate upper surface and surrounding side that deposit transparent conductive medium layer; pass through positioner; the void region of the inside of plates for screen printing is made to keep equal with the distance on four limits of crystalline silicon substrate; namely ensure that crystalline silicon substrate is positioned at the half tone center of plates for screen printing; preferably, the void region of inside of guarantee plates for screen printing and the distance on four limits of crystalline silicon substrate are between 10 ~ 2000 μm.
When printing, packing material is filled in the void region, inside of plates for screen printing, packing material is transferred in crystalline silicon substrate by the void region of screen printing plate under blade pressure effect, crystalline silicon substrate is formed the plating mask of the pattern the same with the void region of screen printing plate, due to the packing material of scraper plate on screen printing forme being applied with certain pressure, move towards the screen printing forme other end simultaneously.Packing material is expressed in crystalline silicon substrate by scraper plate under the movement of scraper plate from the mesh of void region, in embodiments of the present invention, because the distance on the void region of screen printing plate and four limits of crystalline silicon substrate is between 10 ~ 2000 μm, so the side of the surrounding of crystalline silicon substrate all covers by packing material under the active force of scraper plate.Plates for screen printing is made to be attached in crystalline silicon substrate due to packing material viscous effect, printing process middle scraper is linear contact lay with screen printing plate and crystalline silicon substrate all the time, contact wire moves with scraper plate and mobile, owing to keeping certain gap between screen printing forme and crystalline silicon substrate, make screen printing forme when printing be produced reaction force to scraper plate by the tension force of self, this reaction force is called resilience force.Due to the effect of resilience force, make screen printing forme and crystalline silicon substrate only in portable linear contact lay, and the grid region of screen printing forme and crystalline silicon substrate are disengaged position.
In embodiments of the present invention, the thickness due to the void region of screen printing plate is between 0.1 μm ~ 1000 μm, accordingly, is 0.1 μm ~ 1000 μm at the thickness of the plating mask of crystalline silicon substrate upper surface formation.In embodiments of the present invention, formed owing to forming plating mask at the crystalline silicon substrate upper surface depositing transparent conductive medium layer and forming protective layer in the side of the surrounding of described crystalline silicon substrate simultaneously, so the material of plating mask and protective layer is identical, after electroplated metal layer in crystalline silicon substrate, need by the method for corrosion cleaning, the protective layer of the side of the surrounding of the plating mask of crystalline silicon substrate upper surface and described crystalline silicon substrate to be removed, so, the packing material be filled on plates for screen printing necessarily requires chemical reaction does not occur in acid electroplating solution and to peel off etc. physical phenomenon, there is good stability, and it is nontoxic, nonpollution environment etc.In embodiments of the present invention, select can the material such as resinae, silica type of acid and alkali resistance as electroplate masking material and protective layer material.
Further; because screen printing plate comprises grid region and void region; when screen printing plate departs from from crystalline silicon substrate time; the grid region of screen printing plate is from after crystalline silicon substrate departs from; the pattern of the pattern that crystalline silicon substrate retains and the void region of screen printing plate is mutually complementary; in crystalline silicon substrate, the region of hollow out is the grid region on screen printing plate; so the position in the region of hollow out is the position of grid region in the protective layer covered in crystalline silicon substrate, the position of grid region and the position of electroplated metal level.
Complete the crystalline silicon substrate of silk screen printing after overcuring, as described in Figure 4, form plating mask 8 at crystalline silicon substrate 1 upper surface depositing transparent conductive medium layer 4, and form protective layer 9 in the side of the surrounding of described crystalline silicon substrate 1.
Second method:
First forming plating mask at the described crystalline silicon substrate upper surface depositing transparent conductive medium layer, then forming protective layer in the side of the surrounding of described crystalline silicon substrate.Wherein, transparent conductive medium layer forms plating mask specifically comprise depositing: printing, spraying, spin coating etc.
Wherein, spraying is sprayed into the air nozzle center of compressed air from spray gun, negative pressuren zone is formed at spray nozzle front end, protective layer material in container is sprayed from nozzle, and enter rapidly high-speed compressed air stream, make liquid-speed diffusion out of breath, protective layer material is by micronize, comprising layer material is vaporificly fly to the surface being attached to crystalline silicon substrate, forms uniform plating mask; Spin coating method completes on spin coater, the electroplate masking material of spin coating and crystalline silicon substrate are placed on spin coater, when spin coater in the running, due to relatively steady during spin coater dial rotation, so the plating mask Thickness Ratio that crystalline silicon substrate is formed is more even; The method of photoetching determines photo etched mask according to the position of electroplated metal level.Wherein, forming photoresist mask at the described crystalline silicon substrate upper surface depositing transparent conductive medium layer, covering by forming groove after film exposure, development to described photoresist; Wherein, the position of groove is corresponding with the position of electroplated metal level.Adopt said method, the protective layer thickness of formation is between 0.1 μm ~ 1000 μm.
Further; after electroplated metal layer in crystalline silicon substrate; need by the method for corrosion cleaning, the protective layer of the side of the surrounding of the plating mask of crystalline silicon substrate upper surface and described crystalline silicon substrate to be removed; so; the packing material be filled on plates for screen printing necessarily requires chemical reaction does not occur in acid electroplating solution and to peel off etc. physical phenomenon; there is good stability, and nontoxic, nonpollution environment etc.In embodiments of the present invention, select can the material such as resinae, silica type of acid and alkali resistance as electroplate masking material and protective layer material.
As shown in Figure 5, the crystalline silicon substrate 1 depositing transparent conductive medium layer 4 is formed the reeded plating mask 8 of band, and wherein, the position of groove is the position of electroplated metal layer.
In embodiments of the present invention; after forming plating mask at the crystalline silicon substrate upper surface depositing transparent conductive medium layer; the method side of the surrounding of crystalline silicon substrate being formed to protective layer at least comprises following two schemes, is introduced respectively below to two schemes:
Scheme one:
The crystalline silicon substrate justified margin that the crystalline silicon substrate upper surface depositing transparent conductive medium layer forms plating mask is stacked together, in embodiments of the present invention, four edges of crystalline silicon substrate all must align, and in the embodiment of the present invention, do not limit the quantity of the crystalline silicon substrate stacked.Complete the shape of the crystalline silicon substrate stacked as shown in Figure 6, the side of multiple crystalline silicon substrate 11 surrounding stacked is covered, wherein, the crystalline silicon substrate being placed in the multiple crystalline silicon substrate the superiors stacked comprises: grid line 12 and plating mask 8, because crystalline silicon substrate stacks, and between crystalline silicon substrate, there is certain gap, so, the choice for use spraying method when covering the surrounding of the multiple crystalline silicon substrate stacked, adopt the method for spraying, can ensure that the surrounding of the multiple crystalline silicon substrate stacked can cover up-protective layer material uniformly.Wherein, spray the protective layer material selected and comprise the material such as resinae, silica type, further, it is completely the same that the protective layer material that the surrounding of the multiple crystalline silicon substrate stacked covers can form electroplate masking material with the crystalline silicon substrate upper surface stacked, such as, electroplate masking material and protective layer material all select resinous material, or electroplate masking material and protective layer material all select ink class material; It is inconsistent that the protective layer material that the side of the surrounding of the multiple crystalline silicon substrate stacked is formed also can form electroplate masking material with the crystalline silicon substrate upper surface stacked, and such as, electroplate masking material is ink, and the side material of the surrounding of crystalline silicon substrate is photoresist.The side being illustrated in figure 7 the multiple crystalline silicon substrate surroundings stacked forms the schematic diagram of protective layer 9; wherein; the crystalline silicon substrate being placed in the multiple crystalline silicon substrate the superiors stacked comprises grid line 12 and plating mask 8, and the embodiment of the present invention does not do further restriction to the protective layer material that the side of the multiple crystalline silicon substrate surroundings stacked is selected with the selection that the multiple crystalline silicon substrate upper surfaces stacked form electroplate masking material.
Scheme two
The crystalline silicon substrate that the crystalline silicon substrate upper surface depositing transparent conductive medium layer forms plating mask is inserted in the gaily decorated basket successively, in embodiments of the present invention, ensure that crystalline silicon substrate four edges be inserted in the gaily decorated basket all must align, wherein, the quantity of the crystalline silicon substrate be inserted in the gaily decorated basket is not limited.Because the gaily decorated basket adopts PVDF, FTFE or PFA to be that raw material is made, so the gaily decorated basket has stronger rigidity, corrosion-resistant, wear-resisting, Long-Time Service is indeformable, not foul solution, during device crystalline silicon substrate, crystalline silicon substrate can not be scratched.
Time the crystalline silicon substrate be inserted in the gaily decorated basket is placed in the liquid that protective layer material is housed; 1 ~ 2000 micron of each side of crystalline silicon substrate is ensured to be immersed in protective layer material liquid; after treating that the side of the surrounding of crystalline silicon substrate all forms up-protective layer material, multiple crystalline silicon substrate completes the covering of the lateral protection layer material of surrounding.In embodiments of the present invention, the material of the plating mask that the protective layer material that the side of crystalline silicon substrate surrounding is formed is formed with the upper surface of crystalline silicon substrate can be identical, also can not be identical.The protective layer material that the embodiment of the present invention is formed the side of crystalline silicon substrate surrounding forms with the upper surface of crystalline silicon substrate whether electroplate masking material is identical does not do further restriction.
In a step 102, at described groove location electroplated metal layer.
Plating mask groove location in the crystalline silicon substrate depositing transparent conductive medium layer carries out electroplated metal layer, wherein, as shown in Figure 8 be the schematic diagram that the side depositing plating mask 8 groove in the crystalline silicon substrate 1 of transparent conductive medium layer 4 and crystalline silicon substrate surrounding forms the crystalline silicon substrate of protective layer 9, electroplated metal layer is carried out in the groove location of the upper surface plating mask 8 of crystalline silicon substrate 1, wherein, the metal of electroplated metal layer can be copper product, also can be composite material, further, the performance of composite material and the performance of metallic copper basically identical.
In the embodiment of the present invention, the method for electroplated metal layer can be any method following, such as Direct Electroplating, chemical plating, photoinduction plating, immersion plating.
As shown in Figure 9, the position of electroplated metal layer 10 is corresponding with the position of the groove that transparent conductive medium layer 4 is formed, after metal level has been electroplated, the protective layer 9 of the side of the plating mask 8 of crystalline silicon substrate upper surface and crystalline silicon substrate 1 surrounding is needed to remove, wherein, the minimizing technology of plating mask 8 and protective layer 9 can comprise chemical corrosion, direct stripping, the combination of any one or multiple method in the methods such as dissolution with solvents, in embodiments of the present invention, if the protective layer material of the side of the surrounding of crystalline silicon substrate does not affect the performance of crystalline silicon substrate and the performance of solar cell, then the protective layer material of the side of crystalline silicon substrate surrounding can complete follow-up continuation of insurance at electroplated metal layer and stays.But the plating mask of crystalline silicon substrate upper surface then needs to get rid of after electroplated metal layer completes.
As shown in Figure 10, for providing the schematic diagram of the plating mask 8 removing crystalline silicon substrate 1 upper surface in the embodiment of the present invention; As shown in figure 11, be the schematic diagram of the plating mask 8 of removal crystalline silicon substrate 1 upper surface that provides in the embodiment of the present invention and the lateral protection layer 9 of crystalline silicon substrate 1 surrounding.In embodiments of the present invention, whether the protective layer of the side of the surrounding of the crystalline silicon substrate after completing electroplated metal layer is removed do not do further restriction.
The crystalline silicon substrate upper surface that the embodiment of the present invention is depositing transparent conductive medium layer forms plating mask, forms protective layer in the side of the surrounding of described crystalline silicon substrate; Wherein, described transparent conductive medium layer forms plating mask and comprise groove; Adopt said method; before electroplated metal layer; covering protection is carried out to the side of the surrounding of crystalline silicon substrate; when electroplated metal layer; decrease the phenomenon causing battery edge to leak electricity by electroplating technology; decrease electroplated metal layer atom simultaneously and penetrate into inside battery, cause the problem affecting battery performance.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.
Claims (11)
1. an efficient silicon heterogenous solar cell electroplated electrode preparation method, is characterized in that, comprising:
Form plating mask at the crystalline silicon substrate upper surface depositing transparent conductive medium layer, form protective layer in the side of the surrounding of described crystalline silicon substrate; Wherein, described transparent conductive medium layer forms plating mask and comprise groove;
At described groove location electroplated metal layer.
2. method as claimed in claim 1, is characterized in that, the described crystalline silicon substrate upper surface depositing transparent conductive medium layer forms plating mask, forms protective layer, comprising in the side of the surrounding of described crystalline silicon substrate:
Formed plating mask by silk-screen printing technique at the crystalline silicon substrate upper surface depositing transparent conductive medium layer and form protective layer in the side of the surrounding of described crystalline silicon substrate, wherein, plates for screen printing comprises void region and grid region.
3. method as claimed in claim 2, is characterized in that, also comprise:
The marginal portion of the upper surface of described crystalline silicon substrate and the marginal portion horizontal range of described printed panel are 10 ~ 2000 μm.
4. method as claimed in claim 1, is characterized in that, the described crystalline silicon substrate upper surface depositing transparent conductive medium layer forms plating mask, forms protective layer, comprising in the side of the surrounding of described crystalline silicon substrate:
The described crystalline silicon substrate upper surface depositing transparent conductive medium layer forms plating mask;
Multiple crystalline silicon substrate that described crystalline silicon substrate upper surface forms plating mask are stacked, forms protective layer in the side of the described multiple crystalline silicon substrate surroundings stacked;
Wherein, the edge complete matching of the multiple crystalline silicon substrate stacked described in.
5. method as claimed in claim 4, is characterized in that, the side of the described multiple crystalline silicon substrate surroundings stacked at described justified margin forms protective layer, comprising:
The side of the multiple crystalline silicon substrate surroundings stacked at described justified margin forms protective layer by spraying.
6. method as claimed in claim 1, is characterized in that, the described crystalline silicon substrate upper surface depositing transparent conductive medium layer forms plating mask, forms protective layer, comprising in the side of the surrounding of described crystalline silicon substrate:
The described crystalline silicon substrate upper surface depositing transparent conductive medium layer forms plating mask;
Multiple crystalline silicon substrate that described crystalline silicon substrate upper surface forms plating mask are vertically positioned in protective layer fluent material; make the side of described multiple crystalline silicon substrate surrounding be immersed in described protective layer fluent material successively, form protective layer in the side of described multiple crystalline silicon substrate surrounding.
7. method as claimed in claim 6, is characterized in that, the described side of described multiple crystalline silicon substrate surrounding that makes successively is immersed in protective layer fluent material, comprising:
1 ~ 2000 μm, the side of described multiple crystalline silicon substrate surrounding is immersed in described protective layer fluent material.
8. method as claimed in claim 1, is characterized in that, the described crystalline silicon substrate upper surface depositing transparent conductive medium layer forms plating mask, comprising:
In the crystalline silicon substrate depositing transparent conductive medium layer, form protective layer by printing, spraying or spin coating method.
9. method as claimed in claim 1, is characterized in that, also comprise:
The crystalline silicon substrate upper surface depositing transparent conductive medium layer described in chemical corrosion, directly stripping or dissolution with solvents removal is adopted to form plating mask; Or
The side adopting the crystalline silicon substrate upper surface depositing transparent conductive medium layer described in chemical corrosion, directly stripping or dissolution with solvents removal to form the surrounding of plating mask and described crystalline silicon substrate forms protective layer.
10. method as described in claim as arbitrary in claim 1 ~ 9, is characterized in that, the thickness of described protective layer 0.1 μm ~ 1000 μm.
Method as described in 11. claims as arbitrary in claim 1 ~ 9, it is characterized in that, described electroplate masking material comprises ink or photoresist.
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