CN104505433A - Cadmium sulfide chip and manufacturing method for surface passivation layer of cadmium sulfide chip - Google Patents

Abstract

The invention provides a manufacturing method of a cadmium sulfide chip and a surface passivation layer thereof, which is used to solve the problem that the current cadmium sulfide chip manufacturing process is relatively complicated. This method is different from the traditional physical, chemical, and deposition passivation layer preparation processes. It is the first time to apply photosensitive polyimide glue. The method includes: coating a layer of photosensitive polyimide glue on the surface of the cadmium sulfide chip, coating The cadmium sulfide chip of polyimide rubber is pre-baked, and the positive and negative electrode contact holes of the cadmium sulfide chip are exposed. , post-baking the cadmium sulfide chip until the polyimide glue is cured to obtain a passivation layer attached to the surface of the cadmium sulfide. This new process method can simplify a large number of preparation process steps, improve the production efficiency and reliability of the cadmium sulfide chip, and the photoelectric performance of the prepared cadmium sulfide chip meets the use requirements.

Description

A kind of cadmium sulfide chip and the manufacturing method of cadmium sulfide chip surface passivation layer

technical field

The invention relates to the field of ultraviolet detection, in particular to a cadmium sulfide chip and a method for making a passivation layer on the surface of the cadmium sulfide chip.

Background technique

So far, semiconductor ultraviolet detectors have been applied in many fields such as gas detection and analysis, flame sensing, and pollution monitoring. The spectral response band of cadmium sulfide single crystal material is 300nm ~ 500nm, which is just in the "ultraviolet window" area of the atmosphere, and can work normally under low temperature conditions, so it is very suitable to use it as a substrate to make semiconductor ultraviolet detector chips. The cadmium sulfide ultraviolet detector chip adopts a metal-semiconductor Schottky barrier structure. Metal and semiconductor contacts have different work functions, which cause the internal energy band of the semiconductor to bend, thereby generating a built-in electric field, similar to a PN junction with a unilateral mutation. When the incident light hits the surface of the barrier, a photoelectromotive force is formed between the surface of the cadmium sulfide and the body. If there is a short circuit, there will be a short circuit current (photocurrent), and if it is open, there will be an open circuit voltage, thereby performing target detection. The structure of the cadmium sulfide ultraviolet detector chip with a typical Schottky structure is shown in Figure 1, in which a thin layer of translucent metal is in contact with cadmium sulfide to form a Schottky barrier, and light is incident from above the thin layer of metal; on the surface of cadmium sulfide Except for the barrier area and the contact holes of the positive and negative electrodes, they are covered with a passivation layer, which plays the role of electrical isolation and surface protection; the positive and negative electrodes of the chip form ohmic contacts through the growth of metal as the lead-out electrodes; in order to improve the photoelectricity of the cadmium sulfide chip Performance, a layer of UV anti-reflection coating can be grown on the incident window.

The preparation of cadmium sulfide chips usually adopts traditional semiconductor processes such as deposition, photolithography, etching, and metallization. The growth of the surface passivation layer usually adopts the process of physical or chemical vapor deposition. The passivation layer is mostly made of silicon dioxide, nitrogen, etc. For materials such as silicon oxide and zinc sulfide, one or more passivation layers need to be deposited according to the specific chip structure; the growth of metal layers such as thin metal and contact electrodes adopts the process of thermal evaporation or magnetron sputtering. Metal materials such as platinum, indium, chromium, and gold are selected. According to the specific chip structure, multiple layers of metal layers with different functions need to be deposited; all structural patterns such as passivation layer and metal layer on the chip are transferred to the chip by photolithography. Surface, and then through etching and stripping processes to form the final chip structure, the preparation process requires multiple different photolithography, etching and stripping processes.

At present, there are nearly 40 process steps in the cadmium sulfide ultraviolet detector chip (only the photolithography process has 8 processes), the process line is too long and the process is complicated, which is not conducive to the subsequent mass production, and the prepared by using this process route The cadmium sulfide chip is covered by multiple passivation layers and metal layers, so its firmness is not very good, resulting in reliability problems such as film drop, bulge and open circuit in subsequent engineering applications.

Contents of the invention

The invention provides a cadmium sulfide chip and a method for making a passivation layer on the surface of the cadmium sulfide chip, which is used to solve the problem that the existing cadmium sulfide chip manufacturing process is relatively complicated.

According to one aspect of the present invention, a method for making a passivation layer on the surface of a cadmium sulfide chip is provided, comprising: coating a layer of photosensitive polyimide glue on the surface of the cadmium sulfide chip; The cadmium chip is pre-baked; the positive and negative electrode contact holes of the cadmium sulfide chip are exposed; the exposed cadmium sulfide chip is put into a developing solution for development to obtain the graphics on the surface of the cadmium sulfide chip; Post-baking until the polyimide glue is cured to obtain a passivation layer attached to the surface of the cadmium sulfide.

Wherein, the thickness of the passivation layer is 1.0 μm˜1.5 μm.

Wherein, coating a layer of polyimide glue on the surface of the cadmium sulfide chip includes: using a glue applicator to spin coat a layer of polyimide glue on the surface of the cadmium sulfide.

Wherein, pre-baking the cadmium sulfide chip coated with polyimide glue includes: pre-baking the cadmium sulfide chip coated with polyimide glue at 110°C-120°C.

Wherein, post-baking the cadmium sulfide chip includes: post-baking the cadmium sulfide chip in an environment where the temperature is gradually raised from 80° C. to 300° C. until the polyimide glue is cured.

Wherein, post-baking the cadmium sulfide chip includes: post-baking the cadmium sulfide chip in a closed environment filled with nitrogen gas and gradually increasing the temperature.

Further, the above method also includes: before coating a layer of polyimide glue on the surface of the cadmium sulfide chip, coating a layer of adhesion promoter on the surface of the cadmium sulfide chip.

Wherein, the exposure dose for exposing the positive and negative electrode contact holes of the cadmium sulfide chip is 100mj/cm ² -150mj/cm ² .

Wherein, the developing time of putting the exposed cadmium sulfide chip into a developing solution for developing is 1-2 minutes.

According to another aspect of the present invention, a cadmium sulfide chip is provided, comprising: a photosensitive polyimide glue passivation layer attached to the surface of the cadmium sulfide chip.

The solution provided by the embodiment of the present invention can simplify the manufacturing process of the passivation layer on the surface of the cadmium sulfide chip and improve the production efficiency compared with the process of manufacturing the passivation layer on the surface of the cadmium sulfide chip in the prior art.

Description of drawings

Fig. 1 is the sectional structure schematic diagram of the cadmium sulfide ultraviolet detector chip of typical Schottky structure in related art;

Fig. 2 is the flow chart of the preparation method of the cadmium sulfide chip surface passivation layer of the embodiment of the present invention 1;

Fig. 3 is the surface structure schematic diagram of the cadmium sulfide chip that the embodiment of the present invention 2 provides;

Fig. 4 is a mid-test I-V curve diagram of the cadmium sulfide chip in Example 3 of the present invention.

Detailed ways

In order to solve the relatively complicated problem of the cadmium sulfide chip manufacturing process in the prior art, the present invention provides a kind of cadmium sulfide chip and a method for manufacturing the surface passivation layer of the cadmium sulfide chip. Detailed description. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

Example 1

Fig. 2 is the flow chart of the manufacture method of the cadmium sulfide chip surface passivation layer of the embodiment of the present invention 1, as shown in Fig. 2, this method comprises the following steps:

Step 201: coating a layer of photosensitive polyimide glue on the surface of the cadmium sulfide chip;

Specifically, in this step, a glue applicator may be used to evenly coat a layer of photosensitive polyimide glue on the surface of the cadmium sulfide in a rotating manner.

Step 202: pre-baking the cadmium sulfide chip coated with polyimide glue;

Step 203: exposing the contact holes of the positive and negative electrodes of the cadmium sulfide chip, and putting the exposed cadmium sulfide chip into a developing solution for development, so as to obtain the pattern on the surface of the cadmium sulfide chip;

Step 204 : Post-baking the cadmium sulfide chip until the polyimide glue is cured to obtain a passivation layer attached to the surface of the cadmium sulfide.

Preferably, the thickness of the passivation layer is 1.0 μm˜1.5 μm.

After coating a layer of photosensitive polyimide glue on the surface of the cadmium sulfide chip, the cadmium sulfide chip coated with the photosensitive polyimide glue is prebaked at 110° C. to 120° C.

In order to combine the passivation layer and the cadmium sulfide chip relatively firmly, before coating a layer of photosensitive polyimide glue on the surface of the cadmium sulfide chip, a layer of adhesion promoter can be applied on the surface of the cadmium sulfide chip.

In order to form a firm passivation layer on the surface of cadmium sulfide, on the basis of the above steps 201 and 202, the above method may also include:

The cadmium sulfide chips were post-baked in a sealed atmosphere filled with nitrogen at increasing temperature.

Photosensitive photosensitive polyimide glue is similar to photoresist. It has photosensitive properties and does not need photoresist. Like photoresist, it can directly form the required chip pattern through photolithography processes such as spin coating, exposure and development. , and a stable and firm passivation layer or insulating layer is formed after imidization with stepwise temperature rise and post-baking. In this embodiment, a positive photosensitive polyimide glue is used. Like the positive photoresist, the film layer in the exposed area is dissolved in the developer solution after exposure through the photoresist mask, and the film layer in the non-exposed area is left to form a pattern. Photosensitive polyimide glue The application of photosensitive polyimide glue can further improve the processing yield in the chip manufacturing process, simplify the production process, and thereby reduce the manufacturing cost. Ordinary polyimide does not have a photosensitive function, and the drawing process must be completed with the help of photoresist, and the preparation process is relatively complicated.

Example 2

This embodiment provides a method for making a passivation layer on the surface of a cadmium sulfide chip, which has the same implementation principle as that of Embodiment 1. It discloses more technical details of the method of the present invention to more clearly express the present invention. The specific implementation process. It should be noted that this embodiment is a preferred embodiment, and the disclosed content thereof is not used to exclusively limit the implementation process of the present invention.

In this example, photosensitive polyimide glue is used to prepare a passivation layer on the surface of a new cadmium sulfide chip through a photolithography process. The specific process is described in detail as follows:

Glue application: Spin and coat a layer of uniform photosensitive polyimide glue layer on the surface of the cleaned cadmium sulfide chip with a thickness of 1.0 μm to 1.5 μm by spinning the glue machine. According to the substrate conditions and adhesion requirements, a layer of tackifier (hexamethyldisilamine) HMDS can be spin-coated before the photosensitive polyimide adhesive is spin-coated to further enhance its firmness with the substrate.

Pre-baking: The chips coated with photosensitive polyimide glue are pre-baked using a hot plate or an oven. The temperature is set at 110°C to 120°C, and the time is 5min to 10min.

Exposure: According to the structure requirements of the passivation layer on the surface of the cadmium sulfide chip, the contact holes of the positive and negative electrodes are exposed through the photolithography mask using a photolithography machine, and other parts that need to be kept to form the passivation layer structure are not exposed, and the exposure dose is 100mj /cm ² ~150mj/cm ² , where mj is millijoule.

Development: immerse the exposed chip in tetramethylammonium hydroxide aqueous solution for development, until the photosensitive polyimide glue in the exposed area is clear, the time is 1min to 2min, then rinse with ultrapure water for 2min to 3min, blow with nitrogen Dry.

Inspection: The developed chips are inspected using the bright field of a microscope, and the appropriate magnification is selected according to the size of the graphics. The specific qualification criteria are as follows:

a) The photosensitive polyimide adhesive layer is even and smooth, without obvious damage, defect and impurity contamination;

b) The edges of the adhesive layer are neat and clear, with clear boundaries, no bridging and no obvious burrs;

c) The surface of the chip outside the glue layer should be bright and clean, without residual glue and liquid residue;

d) Graphic alignment is precise, and registration accuracy is within the tolerance range.

Post-baking (imidization): The photosensitive polyimide adhesive layer on the qualified cadmium sulfide chip needs to be post-baked, that is, imidized, to finally form a firm and reliable passivation layer on the chip surface. Baking after imidization is a stepwise heating process, which is best carried out in a closed space filled with nitrogen. The specific temperature and time are shown in the table below:

Table 1

Example 3

This embodiment provides a cadmium sulfide chip, which has a passivation layer manufactured by the method provided in the above-mentioned embodiment 1 or embodiment 2.

FIG. 3 is a schematic diagram of the surface structure of the cadmium sulfide chip provided in this embodiment. As shown in Figure 3, the chip includes: a photosensitive polyimide glue passivation layer attached to the surface of the cadmium sulfide chip. Preferably, the thickness of the passivation layer is 1.0 μm to 1.5 μm, that is, the “ 1", further, the passivation layer can be imidized photosensitive polyimide glue layer; "2" is the negative electrode hole (ground hole), and the material in the hole is infrared light on the cadmium sulfide substrate. Masking metal layer; "3" is the positive electrode hole, which is also the ultraviolet incident window, and the material in the hole is a cadmium sulfide substrate.

In this embodiment, the photosensitive polyimide adhesive forms the required pattern structure on the surface of the cadmium sulfide chip through the photolithography process, and the photosensitive polyimide adhesive layer after imidization will be permanently retained as a passivation film layer, so The adhesion of the photosensitive polyimide adhesive layer to the cadmium sulfide substrate material and the barrier metal layer is very important, which directly determines its firmness on the surface of the cadmium sulfide chip. Therefore, after the photosensitive polyimide glue passivation layer is made on the surface of cadmium sulfide by the method of the above-mentioned Example 1 and Example 2, the photosensitive polyimide can be verified by the test methods of ultrasonic, UV (ultraviolet) film adhesion and high and low temperature impact. The adhesion of polyimide adhesive layer on cadmium sulfide substrate material and barrier metal layer, to determine its fastness situation as passivation layer, by the passivation layer that mode provided by the invention is made on cadmium sulfide surface Ultrasonic, UV film sticking and high-low temperature impact three adhesion tests were carried out, and it was concluded that the photosensitive polyimide adhesive has high adhesion, and the photosensitive polyimide adhesive after photolithography imidization is It has good firmness on substrates such as silicon, cadmium sulfide and metal layers.

The photosensitive polyimide glue passivation layer forms a stable interface on the surface of the cadmium sulfide chip, which acts as an insulating medium and reduces leakage. A good passivation layer can improve the photoelectric performance of the chip. The photosensitive polyimide glue is used as a passivation layer on the cadmium sulfide chip, and the prepared chip needs to be tested by I-V curve to verify whether its photoelectric properties such as short-circuit current and open-circuit voltage meet the requirements for use. At the same time, multiple high and low temperature impact tests should be carried out on the prepared chips to verify the reliability of the polyimide passivation layer. The I-V curve of the cadmium sulfide chip sample of the photosensitive polyimide glue passivation layer is shown in Figure 4, wherein, the zero bias current is -5.2nA, the open circuit voltage is 430mV, the photoelectric performance meets the use requirements, and the sample has been tested for many times. In the sub-high and low temperature impact test, the photoelectric performance did not deteriorate, indicating that the reliability of the photosensitive polyimide glue as the passivation layer of the cadmium sulfide chip is good.

The novel polyimide passivation layer produced by the method for manufacturing the passivation layer on the surface of the cadmium sulfide chip provided by the embodiment of the present invention replaces the passivation layer deposited by the traditional process, and the required passivation layer can be formed only by the photolithography process. Compared with the traditional process of passivation layer deposition, photolithography electrode hole pattern and etching electrode hole in the prior art, it is no longer necessary to prepare a multi-layer passivation system, so a large number of processes can be simplified steps to improve production efficiency. At the same time, the sidewall of the passivation layer prepared by the traditional process is relatively steep or even "inverted trapezoidal", which is not conducive to the coverage of the metal layer, especially the thin layer of metal, while the sidewall of the passivation layer of photosensitive polyimide glue is gradually changing. "Positive trapezoid", which is conducive to the coverage of the metal layer, makes the cadmium sulfide chip have better reliability in subsequent applications.

Although preferred embodiments of the present invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, and therefore, the scope of the present invention should not be limited to the above-described embodiments.

Claims (10)

1. a preparation method of cadmium sulfide chip surface passivation layer, it is characterized in that, comprising: Coating a layer of photosensitive polyimide glue on the surface of the cadmium sulfide chip; The cadmium sulfide chip coated with the polyimide glue is prebaked; Expose the positive and negative electrode contact holes of the cadmium sulfide chip; Putting the exposed cadmium sulfide chip into a developing solution for development to obtain the pattern on the surface of the cadmium sulfide chip; Post-baking the cadmium sulfide chip until the polyimide glue is cured to obtain a passivation layer attached to the surface of the cadmium sulfide. 2. The method according to claim 1, wherein the passivation layer has a thickness of 1.0 μm˜1.5 μm. 3. method as claimed in claim 1, is characterized in that, described in cadmium sulfide chip surface coating one deck polyimide glue, comprising: Use a glue applicator to spin coat a layer of polyimide glue on the surface of the cadmium sulfide. 4. method as claimed in claim 1, is characterized in that, described will be coated with the cadmium sulfide chip of described polyimide glue and carry out prebaking and comprise: The cadmium sulfide chip coated with the polyimide glue is pre-baked at 110° C. to 120° C. 5. The method according to claim 1, wherein said post-baking the cadmium sulfide chip comprises: The cadmium sulfide chip is post-baked in an environment where the temperature is gradually raised from 80° C. to 300° C. until the polyimide glue is cured. 6. The method according to claim 1, wherein said post-baking the cadmium sulfide chip comprises: The cadmium sulfide chip was post-baked in a closed environment filled with nitrogen and gradually increased in temperature. 7. The method of claim 1, further comprising: Before the surface of the cadmium sulfide chip is coated with a layer of polyimide glue, a layer of tackifier is applied on the surface of the cadmium sulfide chip. 8 . The method according to claim 1 , wherein the exposure dose for exposing the positive and negative electrode contact holes of the cadmium sulfide chip is 100mj/cm ² -150mj/cm ² . 9. The method according to claim 1, characterized in that the developing time of putting the exposed cadmium sulfide chip into a developing solution for developing is 1-2 minutes. 10. A cadmium sulfide chip, characterized in that, comprising: A photosensitive polyimide glue passivation layer attached to the surface of the cadmium sulfide chip.