CN104503305B - Signal playback method for signal playback module based on ground load detector - Google Patents
Signal playback method for signal playback module based on ground load detector Download PDFInfo
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- CN104503305B CN104503305B CN201410704590.6A CN201410704590A CN104503305B CN 104503305 B CN104503305 B CN 104503305B CN 201410704590 A CN201410704590 A CN 201410704590A CN 104503305 B CN104503305 B CN 104503305B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25314—Modular structure, modules
Abstract
The invention discloses a signal playback method for a signal playback module based on a ground load detector, and the method comprises the following steps that an FPGA receives a data signal from a main control computer through a PCIe bus, and the data signal is temporarily stored in a DDR buffer memory; the FPGA receives a triggering signal from the main control computer through the PCIe bus and starts the signal playback; the FPGA carries out the filtering and modulation of the data signal, and enables the data signal after filtering and modulation to be transmitted to a digital-analog conversion circuit; the digital-analog conversion circuit carries out the digital-analog conversion of the data signal, obtains an analog signal, and outputs the analog signal to a filter circuit; and the filter circuit filters out a spurious signal in the analog signal and enables the analog signal to be outputted to external equipment through two DA output terminals. The method can achieve the transformation and modulation of data rate of a specific data source, and outputs a radio frequency signal meeting the requirements of indexes.
Description
Technical field
The present invention relates to a kind of signal playback method of the signal playback module based on load ground detector.
Background technology
Artificial satellite be transmitting quantity at most, spacecraft with fastest developing speed, be widely used in telecommunications, meteorology, resource investigation and
The fields such as military surveillance.Present artificial satellite is main by structural system, propulsion system, heat control system, power supply-distribution system, star thing system
The some such as system, telemetering and remote control system, attitude control system, data transmission system and payload are constituted.Wherein have
The core that the subsystem that load is direct execution particular task in satellite is satellite is imitated, it is to determine satellite performance level
Primary sub-system.And data transmission system is to realize that the key of payload information real-time Transmission between space and ground is divided to be
System.Due to the particularity of satellite operation on orbit, extremely difficult is safeguarded to it after lift-off.Therefore, the ground test work before transmitting
It is particularly important.
The content of the invention
It is an object of the invention to overcome the deficiencies in the prior art, there is provided a kind of signal based on load ground detector is returned
The signal playback method of amplification module, realizes specifying data rate conversion and the modulation of data source, and output meets penetrating for index request
Frequency signal.
The purpose of the present invention is achieved through the following technical solutions：A kind of signal based on load ground detector is returned
The signal playback method of amplification module, it is comprised the following steps：
S1. FPGA is by PCIe buses, receives the data-signal from main control computer, and keeps in DDR cachings；
S2. FPGA receives the trigger signal from main control computer, commencing signal playback by PCIe buses；
S3. FPGA is filtered and modulates to data-signal, then will filter and digital-to-analogue is arrived in the data-signal output of modulation
Change-over circuit；
S4. D/A converting circuit carries out digital-to-analogue conversion to data-signal, obtains analog signal, then that analog signal is defeated
Go out to filter circuit；
S5. filter circuit filters the spurious signal in described analog signal, then that analog signal is defeated by two-way DA
Go out terminal to export to external equipment.
Described step S3 includes following sub-step：
S31. FPGA carries out semi-band filtering to data-signal by internal semi-band filtering circuit, completes in data-signal
Insert；
S32. FPGA carries out one-level orthogonal modulation by internal Direct Digital Synthesizer DDS to data-signal,
The trickle adjustment of frequency is realized, by the data-signal output after modulation to D/A converting circuit.
Described step S4 includes following sub-step：
S41. D/A converting circuit receives the control signal from main control computer, sets the load of inner modulation processor
Wave frequency rate, value；
S42. D/A converting circuit carries out semi-band filtering to data-signal by internal semi-band filtering circuit, completes signal
Interpolation, by the data-signal output after semi-band filtering to modulated processor；
S43. D/A converting circuit is carried out according to default carrier frequency value by internal modulated processor to data-signal
Modulation treatment, by the data-signal output after modulation to digital analog converter；
S44. D/A converting circuit carries out digital-to-analogue conversion to data-signal and obtains simulation letter by internal digital analog converter
Number；
S45. D/A converting circuit receives outside TTL trigger pulse control signals, is then controlled according to TTL trigger pulses
Described analog signal is transported to filter circuit by signal.
The beneficial effects of the invention are as follows：Data rate conversion and the modulation of specified data source are capable of achieving, output meets index
It is required that radiofrequency signal.
Brief description of the drawings
Fig. 1 is the flow chart of the signal playback method of signal playback module of the present invention based on load ground detector；
Fig. 2 is the structured flowchart of one embodiment of the present of invention.
Specific embodiment
Technical scheme is described in further detail below in conjunction with the accompanying drawings, but protection scope of the present invention is not limited to
It is as described below.
As shown in figure 1, a kind of signal playback method of the signal playback module based on load ground detector, it include with
Lower step：
S1. FPGA is by PCIe buses, receives the data-signal from main control computer, and keeps in DDR cachings；
S2. FPGA receives the trigger signal from main control computer, commencing signal playback by PCIe buses；
S3. FPGA is filtered and modulates to data-signal, then will filter and digital-to-analogue is arrived in the data-signal output of modulation
Change-over circuit；
S4. D/A converting circuit carries out digital-to-analogue conversion to data-signal, obtains analog signal, then that analog signal is defeated
Go out to filter circuit；
S5. filter circuit filters the spurious signal in described analog signal, then that analog signal is defeated by two-way DA
Go out terminal to export to external equipment.
Described step S3 includes following sub-step：
S31. FPGA carries out semi-band filtering to data-signal by internal semi-band filtering circuit, completes in data-signal
Insert；
S32. FPGA carries out one-level orthogonal modulation by internal Direct Digital Synthesizer DDS to data-signal,
The trickle adjustment of frequency is realized, by the data-signal output after modulation to D/A converting circuit.
Described step S4 includes following sub-step：
S41. D/A converting circuit receives the control signal from main control computer, sets the load of inner modulation processor
Wave frequency rate, value；
S42. D/A converting circuit carries out semi-band filtering to data-signal by internal semi-band filtering circuit, completes signal
Interpolation, by the data-signal output after semi-band filtering to modulated processor；
S43. D/A converting circuit is carried out according to default carrier frequency value by internal modulated processor to data-signal
Modulation treatment, by the data-signal output after modulation to digital analog converter；
S44. D/A converting circuit carries out digital-to-analogue conversion to data-signal and obtains simulation letter by internal digital analog converter
Number；
S45. D/A converting circuit receives outside TTL trigger pulse control signals, is then controlled according to TTL trigger pulses
Described analog signal is transported to filter circuit by signal.
Fig. 2 is the structured flowchart of one embodiment of the present of invention, as shown in Fig. 2 a kind of based on load ground detector
Signal playback module, it includes FPGA, DDR buffer, D/A converting circuit and filter circuit, the input of FPGA and external piloting control
Computer is connected, and FPGA is connected with DDR buffers carries out data exchange, and the output of FPGA connects with the input of D/A converting circuit
Connect, the output of D/A converting circuit is connected with the input of filter circuit, the output of filter circuit is defeated by two-way DA lead-out terminals
Go out to external equipment.
Described FPGA includes two-way semi-band filtering circuit and Direct Digital Synthesizer DDS, two-way semi-band filtering
The input of circuit is connected by PCIe buses with the output of main control computer respectively, two-way semi-band filtering circuit and DDR buffers
Connection carries out data exchange, and two-way semi-band filtering circuit is received from receiving the data-signal from main control computer, and by number
It is believed that in number keeping in DDR buffers, the output of two-way semi-band filtering circuit and the input of Direct Digital Synthesizer DDS
Connection, Direct Digital Synthesizer DDS carries out one-level orthogonal modulation, realizes the trickle adjustment of frequency, directly to data-signal
Connect the output of digital frequency synthesizer DDS to be connected with the input of D/A converting circuit, the data-signal after output modulation.
Described every road semi-band filtering circuit is made up of three half-band filters.
Described D/A converting circuit includes two-way semi-band filtering circuit, modulator and digital analog converter, the band filter of two-way half
The data input of wave circuit is connected with the I/Q data signal output part of FMC boards, receives I/Q data signal, and to being received
Data-signal carries out three-level semi-band filtering, and two data inputs that the transmission of data of two-way half-band filter goes out respectively with modulator connect
Connect, the I/Q data signal input modulator after interpolation will be completed, modulator enters according to default carrier frequency value to I/Q data signal
Row modulation treatment, the data output of modulator is connected with the data input of digital analog converter, and modulator will complete modulation treatment
I/Q data signal output is to digital analog converter, and digital analog converter carries out digital-to-analogue conversion and obtains analog signal to I/Q data signal, several
The control signal of weighted-voltage D/A converter is connected by FMC boards interface with two-way TTL trigger pulse inputs, receives TTL triggering arteries and veins
Signal is rushed, the data output all the way of digital analog converter is connected with the data input of the first wave filter, another circuit-switched data output and the
The data input connection of two wave filters, digital analog converter obtains digital-to-analogue conversion according to the TTL start pulse signals for being received
Analog signal output filter circuit.
Described filter circuit includes the first wave filter and the second wave filter, described the first wave filter and the second wave filter
Input exported by the two-way of SMA interfaces and D/A converting circuit be connected respectively, simulation of the reception from digital analog converter is believed
Number, the first wave filter and the second wave filter filter the spurious signal in analog signal, the first wave filter and the second wave filter it is defeated
Go out and be connected with two-way DA lead-out terminals respectively by SMA interfaces, analog signal is exported to outer by two-way DA lead-out terminals
Portion's equipment.
Claims (1)
1. a kind of signal playback method of the signal playback module based on load ground detector, it is characterised in that：It include with
Lower step：
S1. FPGA is by PCIe buses, receives the data-signal from main control computer, and keeps in DDR cachings；
S2. FPGA receives the trigger signal from main control computer, commencing signal playback by PCIe buses；
S3. FPGA is filtered and modulates to data-signal, then will filter and digital-to-analogue conversion is arrived in the data-signal output of modulation
Circuit；
Described step S3 includes following sub-step：
S31. FPGA carries out semi-band filtering to data-signal by internal semi-band filtering circuit, completes data-signal interpolation；
S32. FPGA carries out one-level orthogonal modulation to data-signal by internal Direct Digital Synthesizer DDS, realizes
The trickle adjustment of frequency, by the data-signal output after modulation to D/A converting circuit；
S4. D/A converting circuit carries out digital-to-analogue conversion to data-signal, obtains analog signal, then arrives analog signal output
Filter circuit；
Described step S4 includes following sub-step：
S41. D/A converting circuit receives the control signal from main control computer, sets the carrier frequency of inner modulation processor
Rate value；
S42. D/A converting circuit carries out semi-band filtering to data-signal by internal semi-band filtering circuit, completes in signal
Insert, by the data-signal output after semi-band filtering to modulated processor；
S43. D/A converting circuit is modulated according to default carrier frequency value by internal modulated processor to data-signal
Treatment, by the data-signal output after modulation to digital analog converter；
S44. D/A converting circuit carries out digital-to-analogue conversion and obtains analog signal by internal digital analog converter to data-signal；
S45. D/A converting circuit receives outside TTL trigger pulse control signals, then according to TTL trigger pulse control signals
Described analog signal is transported to filter circuit；
S5. filter circuit filters the spurious signal in described analog signal, and analog signal then is passed through into two-way DA output ends
Son is exported to external equipment；
Signal playback module includes FPGA, DDR buffer, D/A converting circuit and filter circuit, input and the outside master of FPGA
Control computer connection, FPGA is connected with DDR buffers carries out data exchange, and the output of FPGA connects with the input of D/A converting circuit
Connect, the output of D/A converting circuit is connected with the input of filter circuit, the output of filter circuit is defeated by two-way DA lead-out terminals
Go out to external equipment；
FPGA includes two-way semi-band filtering circuit and Direct Digital Synthesizer DDS, the input of two-way semi-band filtering circuit
It is connected with the output of main control computer by PCIe buses respectively, two-way semi-band filtering circuit is connected into line number with DDR buffers
According to exchange, two-way semi-band filtering circuit is received from data-signal of the reception from main control computer, and data-signal is kept in
To in DDR buffers, the output of two-way semi-band filtering circuit is connected with the input of Direct Digital Synthesizer DDS, directly
Digital frequency synthesizer DDS carries out one-level orthogonal modulation to data-signal, realizes the trickle adjustment of frequency, and Direct Digital is frequently
The output of rate synthesizer DDS is connected with the input of D/A converting circuit, the data-signal after output modulation；
It is made up of three half-band filters per road semi-band filtering circuit；
D/A converting circuit includes two-way semi-band filtering circuit, modulator and digital analog converter, the number of two-way semi-band filtering circuit
It is connected with the I/Q data signal output part of FMC boards according to input, receives I/Q data signal, and received data signal is entered
Row three-level semi-band filtering, the transmission of data of two-way half-band filter goes out and is connected with two data inputs of modulator respectively, will complete
I/Q data signal input modulator after interpolation, modulator is modulated place according to default carrier frequency value to I/Q data signal
Reason, the data output of modulator is connected with the data input of digital analog converter, and modulator will complete the I/Q data letter of modulation treatment
To digital analog converter, digital analog converter carries out digital-to-analogue conversion and obtains analog signal, digital analog converter to I/Q data signal for number output
Control signal be connected with two-way TTL trigger pulse inputs by FMC boards interface, receive TTL start pulse signals, number
The data output all the way of weighted-voltage D/A converter is connected with the data input of the first wave filter, and another circuit-switched data is exported and the second wave filter
Data input is connected, and digital analog converter is defeated according to the analog signal that the TTL start pulse signals for being received obtain digital-to-analogue conversion
Go out filter circuit；
Described filter circuit includes the first wave filter and the second wave filter, described the first wave filter and the second wave filter it is defeated
Enter to be exported with the two-way of D/A converting circuit by SMA interfaces respectively and be connected, receive the analog signal from digital analog converter, the
One wave filter and the second wave filter filter the spurious signal in analog signal, and the output of the first wave filter and the second wave filter is led to
Cross SMA interfaces to be connected with two-way DA lead-out terminals respectively, analog signal is exported to external equipment by two-way DA lead-out terminals.
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| CN201410704590.6A CN104503305B (en) | 2014-11-28 | 2014-11-28 | Signal playback method for signal playback module based on ground load detector |
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| CN201410704590.6A CN104503305B (en) | 2014-11-28 | 2014-11-28 | Signal playback method for signal playback module based on ground load detector |
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| CN104503305A CN104503305A (en) | 2015-04-08 |
| CN104503305B true CN104503305B (en) | 2017-05-17 |
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| CN101075814A (en) * | 2007-05-10 | 2007-11-21 | 京信通信系统（中国）有限公司 | Digital receiver system based on special digital medium-frequency structure |
| CN101977020A (en) * | 2010-02-26 | 2011-02-16 | 京信通信系统（中国）有限公司 | Digital up/down frequency conversion system and implementation method thereof |
| CN103647529A (en) * | 2013-12-26 | 2014-03-19 | 中国电子科技集团公司第四十一研究所 | Multimode signal generating device and signal generating method thereof |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102253915A (en) * | 2011-06-16 | 2011-11-23 | 中国科学院自动化研究所 | Data acquisition and playback system |
| JP5914645B2 (en) * | 2012-05-16 | 2016-05-11 | パイオニアデジタルデザインアンドマニュファクチャリング株式会社 | Waveform equalizer, information reproducing apparatus and method, and computer program |
| CN104166639B (en) * | 2014-05-23 | 2017-03-22 | 中国人民解放军国防科学技术大学 | 10 GSps 8 bit high-speed signal real-time acquisition, transmission, storage and playback system |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101075814A (en) * | 2007-05-10 | 2007-11-21 | 京信通信系统（中国）有限公司 | Digital receiver system based on special digital medium-frequency structure |
| CN101977020A (en) * | 2010-02-26 | 2011-02-16 | 京信通信系统（中国）有限公司 | Digital up/down frequency conversion system and implementation method thereof |
| CN103647529A (en) * | 2013-12-26 | 2014-03-19 | 中国电子科技集团公司第四十一研究所 | Multimode signal generating device and signal generating method thereof |
Non-Patent Citations (1)
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| 基于半带滤波器的插值结构FPGA优化实现;沈志等;《微电子学与计算机》;20110205;第28卷(第2期);第15-19页 * |
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